JPH04168870A - Image reading device - Google Patents

Abstract

PURPOSE:To arrange the timing of all photoelectric conversion equipment by simultaneously and completely extracting signals stored in a 1st storage means, simultaneously discharging residual charges, transferring the signal to a 3rd storage means for each block and sequentially extracting a signal. CONSTITUTION:With a light made incident in optical sensors E1-E9, a charge is stored in capacitors C1-C9 in response to the intensity of the light. Then switching TRs ST1-ST9 are turned on and the charge is transferred to capacitors CT1-CT9. Succeedingly, switching TRs SR1-SR9 are simultaneously turned on and residual charge of the capacitors C1-C9 is completely discharged. The charge in existence in the capacitors CT1-CT9 and equal to the signal charge is transferred to capacitors CL1-CL9 by sequentially turning on switching TRs T1-T3, T4-T6 and T7-T9 by each block and read sequentially by switching TRs T10-T12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to an image reading device used in an input section of equipment such as a facsimile, an image league, a digital copying machine, or an electronic blackboard.

[Prior Art] In recent years, in order to miniaturize and improve the performance of facsimiles, image leagues, etc., long line sensors with equal-magnification optical systems have been developed as photoelectric conversion devices.

Conventionally, this type of line sensor is constructed by connecting a signal processing integrated circuit (hereinafter referred to as IC), which is made up of a switching element, etc., to each photoelectric conversion element arranged in a single row of arrays. ing.

However, according to the facsimile G3 standard, 1728 photoelectric conversion elements are required for A4 size, and a large number of signal processing ICs are required. For this reason,
The number of mounting steps increases, and the manufacturing cost and reliability are not satisfactory.

On the other hand, as a structure capable of reducing the number of signal processing ICs and the number of mounting steps, a structure using matrix wiring has been conventionally adopted.

In addition, thin film transistors (hereinafter also referred to as TFTs) are used as switching elements, and by adopting an integrated configuration consisting of photoelectric conversion elements, thin film transistors, matrix wiring, etc., the functions of signal processing ICs are reduced and high speeds are achieved. Attempts have also been made to provide a long contact type image reading device at a low cost.

In order to further reduce manufacturing costs and provide a highly reliable long contact type image reading device, the photoelectric conversion layer of the photoelectric conversion element and the semiconductor layer of the thin film transistor are formed from the same material, amorphous silicon, and the photoelectric conversion elements, thin film transistors, matrix wiring, etc. on the same substrate using the same manufacturing process,
A method has been developed to produce the material in one piece.

As a conventional example of such an image reading device, Japanese Patent Application Laid-Open No. 1986-
This will be explained based on Japanese Patent No. 26385 using FIGS. 8 to 12.

FIG. 8 is a circuit diagram of a conventional image reading device.

However, here, the case of a photosensor array having nine photosensors will be taken as an example.

In the figure, three optical sensors E1 to E9 constitute one block, and three blocks constitute one optical sensor array. Capacitors 01 to C9 and switching transistors T1 to T9 respectively correspond to optical sensors E1 to E9.
The same applies to

One electrode (common electrode) of each of the optical sensors E1 to E9 is connected to a power source 101, and the other electrode (individual electrode) is grounded via a capacitor 01 to C9, respectively.

Furthermore, individual electrodes having the same order within each block of photosensors E1 to E9 are connected to switching transistors T1 to T1, respectively.
It is connected to one of the common lines 102-104 via T9. In detail, the first switching transistors T1, T4, T7 of each block are connected to the common line 102, and the second switching transistors T2, T5 of each block are connected to the common line 102.
, T8 to the common line 103, and the third switching transistors T3, T6, T9 of each block to the common line 10
4, respectively, and each capacitor CLI~C
It is grounded via L3, and is grounded via switching transistors 81 to S3. Capacitor CL1
The capacitance of ~CL3 is set to be sufficiently larger than that of capacitors 01~C9.

Each gate electrode of switching transistors 81 to S3 is commonly connected to terminal 108.

That is, by applying a high level to the terminal 108, the switching transistors 81 to S3 are simultaneously turned on, and the common lines 102 to 104 are grounded.

Common lines 102-104 are connected to amplifier 105 via switching transistors TIO-TI2, respectively.

Further, the gate electrodes of the switching transistors T1 to T9 are commonly connected for each block, and each of the switching transistors T1 to T9 is connected to the shift register 2.
It is connected to the parallel output terminal of 01. Since a high level is sequentially output from the parallel output terminals of the shift register 201 at a predetermined timing, the switching transistors T1 to T9 are sequentially turned on for each block.

Each gate electrode of the switching transistors TIO to TI2 is connected to a parallel output terminal of another shift register 107, and by sequentially outputting a high level from this parallel output terminal at a predetermined timing, the switching transistors TIO to T12 are sequentially turned on. state.

Furthermore, the individual electrodes of the photosensors E1-E9 are grounded via switching transistors R1-R9, respectively.

That is, each of switching transistors R1-R9 is connected in parallel with capacitors 01-C9.

The gate electrodes of the switching transistors R1 to R9 are
Like the gate electrodes of the switching transistors T1 to T9, they are commonly connected for each block, and connected to the parallel output terminals of the shift register 201 for each block.

Therefore, depending on the shift timing of the shift register 201, the switching transistors T1 to T9 and R1 type R9 are sequentially turned on for each block.

Next, the operation of the conventional image reading device having such a configuration will be explained using the switching transistors T1 to T shown in FIG.
I2, S1 to S1 will be explained using a timing chart of S3 and R1 formula R9. Here, the timing at which each switching transistor turns on is shown, but of course this timing is also the timing at which the high level is output from the shift registers 107 and 201.

First, when light enters the optical sensor El-E9, charges are accumulated in the capacitors 01 to C9 from the power source 101 depending on the intensity of the light. Then, a high level is applied from the first parallel terminal of the shift register 201, and the switching transistors T1 to T3 are turned on [FIG. 9(a)]
.

By turning on the switching transistor TI-T3, the charges accumulated in the capacitor ClNC5 are transferred to the capacitors CLI to CL3, respectively. Subsequently, the high level output from the shift register 107 is shifted, and the switching transistors TIO to TI2 are sequentially turned on [FIGS. The optical information of the first block thus stored is sequentially read out through the amplifier 105.

When the information of the first block is read, a high level is applied to the terminal 108, and the switching transistors 81 to
S3 is simultaneously turned on [FIG. 9(h)], thereby completely discharging the residual charges in the capacitors CLI to CL3.

When the residual charges in the capacitors CIO to CI2 are completely discharged, the shift register 201 shifts and a high level is output from the second parallel terminal. As a result, the switching transistors T4 to T6 are turned on [
FIG. 9(b)], capacitors 04 to C6 of the second block
The charges stored in the capacitors CLI to CL3 are transferred to the capacitors CLI to CL3.

At the same time, since the second parallel terminal of the shift register 201 is connected to the switching transistors R1 to R3, the switching transistors R1 to R3 are turned on [FIG. 9(b)], and the residual charges in the capacitors 01 to C3 are reduced. completely discharged.

In this way, the discharging operation of the capacitors 01-C3 of the first block and the transfer operation of transferring the charges accumulated in the capacitors 04-C6 of the second block to the capacitors CLI-CL3 are performed in parallel.

Then, as in the case of the first block, the switching transistor TI is shifted by the shift register 107.
O~T12 are sequentially turned on, and capacitor CLI~
The optical information of the second block stored in CL3 is sequentially read out [FIGS. 9(e) to (g)].

Similarly, in the case of the third block, in parallel with the transfer operation, the capacitors 04 to C6 of the second block are discharged [Fig. 9(c)], and the above operation is repeated for each block. .

In this way, by transferring the information stored in the capacitors 01 to C9 block by block, it is possible to use TPT, which has high resistance in the on state, as the switching transistor, resulting in an inexpensive long contact type image reading device. can be provided.

[Problem to be Solved by the Invention J] However, the conventional example shown in FIG. 8 has the following problems.

In the figure, the capacitors 01 to C3 of the first block are connected to the timing when the switching transistors R1 to R3 are turned on, and the capacitors C3 of the second block are
4 to C6 are the timings of R4-R6, and the capacitors C7 to C9 of the third block are discharged at the timings of R7-R9, and the period from then until each block starts the transfer operation is the output of the optical sensor. This is the accumulation period for accumulating.

For this reason, as shown in FIG. 10, although it is possible to make the accumulation time the same in each block, the timing of the start and end of accumulation will be different.

Therefore, the output of the l block that is read out is only the information on the nth row, but the output of the second block also contains the information on the (n+1)th row. Furthermore, the output of the third block includes more information on the n+1th line, and as a result, the document is read diagonally in a stepwise manner with respect to the main scanning direction as shown in Figure 11 (hereinafter referred to as one-step reading). 1).

- The average image reproduction device corresponds to the so-called r-linear reading 1, which reads the original in a straight line in the main scanning direction without taking into account the staircase reading 1. When an image is reproduced using a read signal that has been subjected to this process, the reproduced image is distorted and the quality is degraded.

Furthermore, when using this contact type image reading device as an image input unit for a facsimile machine, etc., it is not always necessary to move the document in the sub-scanning direction at regular intervals due to constraints such as communication line conditions and memory capacity within the main system. There may be cases where this is not possible.

In such a case, if you perform one step reading 1, the first
As shown in Figure 2, the reading position will shift between when movement in the sub-scanning direction is stopped and when it is resumed, and the quality of the image reproduced based on this output will deteriorate. It also has drawbacks.

Also, the accumulation period of each block is R1-R3 and T1-T3.
timing, R4-R6 and T4-T6 timing,
Although it depends on the timing relationship between R7-R9 and T7-T9, in the conventional example shown in FIG.
The timings of R4-T6 and R4-R6 and T7-T9 cannot be changed independently because they are connected in common. Therefore, if you want to change the storage period, you will need to change the wiring pattern, making it difficult to use. It is difficult to set it arbitrarily in response to changes in the amount of light or the sensitivity of the photosensor depending on the situation.

In order to compensate for these drawbacks, it may be possible to provide a shift register that drives R9 to R1 separately from the shift register 201, but in that case, new problems such as an increase in the number of wires and an increase in the number of shift registers would arise. It happens.

[Means for Solving the Problems] The present invention provides an image reading device having a photoelectric conversion element and a first storage means provided corresponding to each of the photoelectric conversion elements. a first switch means for transferring the signal to the N second storage means; the first switch means is constituted by a field effect transistor;
A gate electrode of the field effect transistor and one of the electrodes of the second storage means are connected to each other, and signal detection means is provided for detecting the N signals stored in the second storage means. by providing, isometrically complete transfer of the signal to the second storage means and then sequentially retrieving the signal.
In addition to enabling high-quality image reproduction without reducing the signal amount from the first storage means to the second storage means, the storage timing of all photoelectric conversion elements is made to match, and the image can be reproduced without performing "step reading". It is possible to read. Further, by changing the timing at which all charges remaining in the first storage means are simultaneously discharged, the storage period of all photoelectric conversion elements can be easily set.

[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of an image reading device according to the present invention. However, in this embodiment, the optical sensors El to E9,
Capacitors 01 to C9, switching transistor T1
~T12. R1-R9 and shift registers 201, 10
7 and the like are the same as the conventional example shown in FIG. 7, so their explanation will be omitted.

In FIG. 1, the individual electrodes of photosensors E1-E9 are each connected to one electrode of capacitors CTI-CT9 via switching transistors STI-ST9. The gate electrodes of switching transistors STI-ST9 are all connected in common, and are connected to a terminal 110 and the other electrodes of capacitors CTI-CT9. Here, the capacitance value of capacitors CTI to CT9 is capacitor 01
- The capacitance value is approximately the same as that of C9.

Further, the individual electrodes of the photosensors E1 to E9 are grounded via switching transistors SRI to SR9, respectively.

That is, each of switching transistors SRI-SR9 is connected in parallel with capacitors 01-C9. The gate electrodes of the switching transistors SRI to SR9 are all connected in common and connected to a terminal 111.

Furthermore, switching transistors R1-R9 are connected to one electrode of capacitors CTI-CT9, respectively, and switching transistors STI-ST9. It is connected to Tl to T9 and grounded via a power supply 109. Here power supply 10
9 is set to output a potential difference obtained by subtracting the threshold potential of the switching transistors STI to ST9 from the high level output from the terminal 110.

Next, the operation of this embodiment having such a configuration will be explained in the second section.
Switching transistors ST1 to ST9 shown in the figure. S
RI~SR9, Tl~T12°R1-R9 and S1~S
This will be explained using the timing chart of No. 3. However, S
The operations from TI to ST9°SRI to SR9 are the same as those in the conventional example shown in FIG. 9, so the explanation thereof will be omitted.

First, when light enters the optical sensors E1 to E9, charges are accumulated in the capacitors 01 to C9 from the power source 101 depending on the intensity of the light. Then, when a high level is output from the terminal 110, the switching transistors STI to ST9 are turned on [FIG. 2(A)].

When the switching transistors STI to ST9 are turned on, the electric charge stored in the capacitors CTI to CT9 is transferred to the capacitors CTI to CT9 by the power supply 109.
begins to be transferred to. Then, the potential of the non-grounded electrodes of the capacitors 01 to C9 changes from the high level output from the terminal 110 to the switching transistor ST.
The transfer ends when the value obtained by subtracting the threshold potential of 1 to ST9 is reached. Then, the low level (OV) is output from the terminal 110.
is output, terminals 11 of capacitors CTI to CT9
The potential of the electrode on the side that is not connected to
The potential is almost the same as that of the non-grounded electrode.

This operation is described in detail in Japanese Unexamined Patent Publication No. 138359/1983.

Subsequently, a high level is output from the terminal 111, and the switching transistors SRI to SR9 are simultaneously turned on [FIG. 2(B)]. This allows capacitor 01
~The charge charged in C9 is completely discharged. and,
After discharging, it starts accumulating charge again.

The same amount of charge as the signal charge existing in the capacitors CTI to CT9 is transferred to the switching transistors T1 to T3 . T4-T6. By sequentially turning on T7 to T9 block by block, the data is transferred to the capacitors CLI to CL3, and further to the switching transistors TIO to T12.
The data are sequentially read out [FIGS. 2(a) to (h)].

FIG. 5 is a plan view showing one pixel out of a set of a photoelectric conversion section, a capacitor section, a thin film transistor section, and a matrix wiring section, which have a plurality of pixels in the longitudinal direction in this embodiment. FIG. 6 is a cross-sectional view of one pixel of the image reading device in this embodiment.

In FIG. 5, the photoelectric conversion section 1 has a lower electrode 12 that also serves as a light shielding film against light from the base side. Light irradiated from the substrate side passes through the lighting window 11 and is reflected on a document surface (not shown) located above perpendicular to the drawing, and the reflected light enters the photoelectric conversion unit 1. The photocurrent due to the carriers generated here flows into the first storage capacitor section 2 and is stored therein. The accumulated charges are equivalently transferred to and accumulated in the second storage capacitor section 5 by the first transfer thin film transistor section 4. The accumulated charge is transferred to the signal line matrix wiring section 8 by the second transfer thin film transistor section 6, and read as a voltage by a signal processing section (not shown).

Further, the first reset thin film transistor section 3 completely discharges the charge in the first storage capacitor section 2, and
The reset thin film transistor section 7 charges the second storage capacitor section 5 to a certain - constant potential.

In FIG. 6, the layer structure of each part will be briefly explained.

In the figure, 1 to 11 indicate the same elements as the photoelectric conversion section, capacitor section, thin film transistor section, and matrix wiring section explained in FIG. All five layers have a common structure, consisting of an SiN layer (hereinafter referred to as SiN layer) 22, an amorphous silicon layer (hereinafter referred to as semiconductor layer) 23, an amorphous silicon layer 24 for ohmic contact, and a second conductive layer 25. are doing.

In this way, in the present invention, the charges accumulated in capacitors 01 to C9 are simultaneously and completely transferred to capacitors CTI to CT.
9, and the transferred charges are read out block by block. Further, after the transfer operation, the capacitors C1 to C9 simultaneously discharge and then start accumulating charges again.

That is, as shown in FIG. 3, the start and end timings of accumulation in each block coincide. for that,
The outputs of blocks 1 to 3 that are read out are all n.
As a result, as shown in Fig. 4, it is possible to perform r-linear reading, which reads in the same direction as the main scanning direction, and the reproduced image based on this signal output has one step reading. This method does not cause distortion as in No. 1 and does not cause deterioration in quality.

Further, even when a situation arises in which the document does not move in the sub-scanning direction, r-linear reading 1 can be performed without causing any problems.

Furthermore, as is clear from FIG. 3, the period for accumulating the output of the optical sensor is different from that at terminal 110 and terminal 111 in FIG.
It is determined by the timing when the signal becomes high level. Therefore, the accumulation time can be changed by setting only the high level timing of the terminal 111 according to the usage situation at that time without changing the wiring pattern. That is, if the timing of the high level of the terminal 111 is delayed, the accumulation time will be shortened, and if it is made early, the accumulation time can be lengthened.

In this embodiment, nine optical sensors are divided into three blocks, but the present invention is not limited to this, and it is possible to divide any number of optical sensors into any number of blocks. This can be done more easily than in the example.

In addition, in this embodiment, in the matrix wiring section shown in 8 of FIG. 5, capacitance is formed at the intersection of an arbitrary signal line and another signal line in a certain block, which causes crosstalk and deteriorates signal accuracy. In such a case, the matrix wiring section should be constructed with three layers of conductors, and the coupling capacitance between the first and third conductor layers should be shielded by the second conductor layer. method can also be used (see Japanese Patent Application Laid-Open No. 63-44759).

Furthermore, in this embodiment, as shown in FIGS. 2(e) to (above 1), it is conceivable that the interval between reading the output signals of a given block and the next block becomes long; divides the blocks that share a common signal line in the matrix wiring section into two or more groups, and divides the common signal line into two groups.
A method in which the output signal of a block sharing a common signal line is read between the reading of the output signal of an arbitrary block sharing a certain common signal line and the next block, in which the output signal of a block sharing a common signal line is read. can also be used (Japanese Unexamined Patent Publication No. 61-2
(See Publication No. 6367).

Further, in this embodiment, as shown in FIG. 1, the signal reading operation after the transfer operation of the second transfer means T1 to T9 is performed using a matrix configuration of individual signal lines of each pixel and common signal lines 102 to 104. However, this is not limited to,
When performing the transfer operation of the second transfer means TINT9, T
A matrix configuration of individual gate electrodes 1 to T9 and a common power supply line connected by a shift register can be easily implemented from this embodiment (Japanese Patent Laid-Open No. 62-171).
(See Publication No. 373).

FIG. 7 is a schematic configuration diagram showing an example of a facsimile having a communication function as an image information processing device configured using the image reading device according to the present embodiment.

Here, 302 is a feeding roller as a feeding means for feeding the original 301 toward the reading position, 303 is a light source, and 304 is a separation piece for reliably separating and feeding the original 301 one by one. be.

Reference numeral 306 denotes a platen roller that is provided at a reading position with respect to the sensor unit 300 and is a document holding means for holding the document 301 and regulating the surface to be read, and is a conveying means for conveying the document 301.

In the illustrated example, P is a recording medium in the form of roll paper, and image information read by an image reading device, or image information transmitted from the outside in the case of a facsimile device, is reproduced here. Reference numeral 310 denotes a recording head as a recording means for forming the image, and various types such as a thermal head and an inkjet recording head can be used. Further, this recording head may be of a serial type or a line type.

Reference numeral 312 denotes a platen roller serving as a conveying means for conveying the recording medium P to the recording position by the recording head 310 and regulating the recording surface thereof.

Reference numeral 320 denotes an operation panel on which are arranged switches and messages for receiving operation input as input/output means, and a display section for notifying the status of the apparatus. 3
30 is a system control board as a control means, which includes a control unit (controller) that controls each part,
A drive circuit (driver) for the photoelectric conversion element, an image information processing section (processor), a transmitting/receiving section, etc. are provided.

340 is a power source for the device.

As the recording means used in the information processing device of the present invention,
For example, U.S. Pat. No. 4,723,129, U.S. Pat.
Preferably, the typical configuration and principle thereof are disclosed in the specification of No. 0796. In this method, at least one electrothermal transducer that corresponds to the recorded information and that causes a rapid temperature rise exceeding nucleate boiling is applied to an electrothermal transducer placed corresponding to the sheet holding the liquid (ink) or the liquid path. By applying a drive signal, thermal energy is generated in the electrothermal transducer, causing film boiling on the heat-active surface of the recording head, resulting in a drop in the liquid (ink) that corresponds one-to-one to this drive signal. It is effective because it can form bubbles. The growth and contraction of the bubble causes liquid (ink) to be ejected through the ejection opening to form a small droplet (at least one droplet).

Furthermore, as a full-line type recording head having a length corresponding to the width of the maximum recording medium that can be recorded by the recording apparatus, the length can be increased by combining multiple recording heads as disclosed in the above-mentioned specification. Either a configuration that satisfies the above requirements or a configuration as a single recording head formed integrally may be used.

In addition, a replaceable chip-type recording head that is attached to the device body enables electrical connection to the device body and ink supply from the device body, or an ink tank integrated into the recording head itself. The present invention is also effective when a cartridge type recording head is used.

[Effects of the Invention] As explained above in detail, the image reading device according to the present invention has a first switching means that simultaneously and completely takes out the signals accumulated in the first accumulation means, and a second switching means that simultaneously discharges the signals accumulated in the first accumulation means. a switching means and a second storage means, for isometrically completely transferring the signal to the second storage means, further transferring the signal block by block to the third storage means, and then sequentially transferring the signal to the third storage means; By taking out the photoelectric conversion elements, the storage timing of all the photoelectric conversion elements can be set at the same time.

Therefore, the image reproduced using the signal output of this image reading device is of high quality and free from distortion (also, no problem occurs even if the document does not move in the sub-scanning direction).

Furthermore, there is an advantage that the accumulation time can be set by changing only the timing of one control signal depending on the usage situation.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an image reading device according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the device in FIG. 1, and FIG. 3 is a timing diagram showing the accumulation time of each block in the device. Chart diagram, FIG. 4 is an explanatory diagram showing the range in which the device actually reads a document, FIG. 5 is a plan view of one pixel of the device, FIG. 6 is a cross-sectional view of FIG. 5, and FIG. 1st
A schematic configuration diagram showing an example of a facsimile having a communication function as an image information processing device configured using the image reading device shown in the figure, FIG. 8 is a circuit diagram of a conventional image reading device, and FIG.
The figure is a timing chart diagram showing the operation of the device in FIG.
Fig. 10 is a timing chart showing the accumulation time of each block in this conventional device, Fig. 11 is an explanatory diagram showing the range in which this conventional device actually reads a document, and Fig. 12 is a timing chart showing the accumulation time of each block in this conventional device. FIG. 2 is an explanatory diagram showing a range in which a document is read. 1 is a photoelectric conversion section, 2.5 is a storage capacitor section, 3.7 is a reset thin film transistor section, 8 is a matrix wiring section, 9 and 10 are power supply wiring sections, 11 is a window for lighting, 12 is a lower electrode section, 21 is a lower layer electrode, 22 is an insulating layer, 23 is an amorphous silicon intrinsic layer, 24 is an amorphous silicon layer, 15 is an upper layer electrode, E1 to E9 are optical sensors, T1 to T
I2. STI~ST9. SRI to SR9 are switching transistors, and 107 and 201 are shift registers. Agent Patent Attorney Seki Yamashita Figure 5 Figure 9 (A), Sg~53

Claims (6)

[Claims] (1) N photoelectric conversion elements (N is a positive integer of 2 or more), and a first storage means, and N signals stored in this first storage means.
a first switch means for transferring data to a second storage means; the first switch means is constituted by a field effect transistor; the gate electrode of the field effect transistor and the electrode of the second storage means; an image reading device, further comprising a signal detecting means for detecting the N signals accumulated in the second accumulating means. (2) a first discharge switch means connected in parallel with each of the first storage means; and a second discharge switch means connected in parallel with each of the second storage means; The image reading device according to claim 1, further comprising: a. (3) The image reading apparatus according to claim 2, further comprising a second switch means for sequentially transferring a fixed number of signals stored in the second storage means as one block. (4) third storage means for respectively storing the fixed number of signals transferred by the second switch means; and a third storage means for transferring the signals accumulated in the third storage means in time series. 3. The image reading apparatus according to claim 2, further comprising a third switch means and a third discharge switch means connected in parallel with each of said third storage means. (5) The image reading device according to claim 1, a document holding means for holding a document carrying image information at a reading position by the image reading device, and recording the image information read by the image reading device. 1. An image information processing apparatus comprising an image reading apparatus, comprising: a recording means for reading an image; (6) The image information processing apparatus according to claim 5, wherein the recording means is a recording head that performs recording by ejecting ink using thermal energy.