JPH0413716B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a graphic display device that processes multiple display requests in parallel.

[Background of the invention]

The content displayed on a bitmap type graphic display device was only the usual graphic (figure) display, but in order to improve the ease of use and maintainability, information on I/O abnormalities and CPU
There is a demand for displaying information such as abnormality information as well.

An example is shown in Figure 6A. A circle, triangle, or rectangle shape is normally displayed, but a part of the screen displays the error information “SYSTEM MESSAGE＊I/
This is an example where "OERROR NO=1054" is displayed. The display of this error information is asynchronous to the original display of figures such as circles and triangles, the display requests occur randomly, and the display location is often not specified.

Examples that require asynchronous display include modern multitasking operating systems. This multitasking operating system refers to a processing method that executes multiple processes in parallel. There is a demand for sequential display of processing conditions in a multi-task operating system on a graphic display. This sequential display is
The display will be asynchronous to each other. FIG. 6B shows an example of displaying the contents of parallel processing in a multitasking operating system.

In Figure 6B, we decided to associate a window (WINDOWi, where i = 1, 2, 3) for each process, and each window would display in its own display area and at its own display timing. .

FIG. 7 shows a conventional example of a graphic display device that realizes the various types of asynchronous display described above. This display device consists of a CPU 1, a segment buffer 2, a graphics controller 4, a common I/O bus 3, a frame memory 6, and a graphics display 7. Common I/O bus 3
A bus connects the CPU 1, segment buffer 2, and graphics controller 4, and naturally includes a data bus, an address bus, and various control lines.

The CPU 1 is a processor that operates on a multi-task operating system (also called multi-process). Segment buffer 2
is a memory that temporarily stores display commands from the CPU 1, but it can also be used to temporarily store information other than display commands.

The graphics controller 4 has a common bus 5,
Graphics processor 41, internal register 4
2, a frame memory controller 43, and an image expansion memory 44. The common bus 5 is a bus that connects the graphics processor 41, internal register 42, frame memory controller 43, and image expansion memory 44, and is composed of a data bus, an address bus, and various control lines.

The graphics processor 41 performs graphics processing (this processing also includes the processing of receiving graphic display information and developing it into a bit map), and the internal register 42 temporarily stores display attribute information (display format information). and image expansion memory 44
stores graphic image information, and the frame memory controller 43 controls the transfer of the contents of the image expansion memory 44 to the frame memory 6.

FIG. 8 shows the processing contents of the operation of the graphic display device shown in FIG. 7.

In this conventional example, since there is only one internal register, when a certain display processing program starts displaying, display cannot be interrupted by any other display processing program until the display processing is completed. This is because if subsequent display processing is accepted, the state of the internal registers will be destroyed. Therefore, when a plurality of display processes are performed using this type of graphic display device, the processes are performed only in a completely sequential manner, which poses a problem with respect to processes that require real-time performance, such as the above-mentioned emergency error display.

To solve this problem, a system was considered in which an auxiliary display device such as an LED display device was provided in the graphic display controller, and an example of this method is shown in FIG. An auxiliary display device interface 46 is provided inside the graphics controller 4, and a separate display is made on an auxiliary display device 8 provided outside. Display information is more suitable for displaying error information than for things like multi-process window displays.

In this system, the information can be displayed immediately when an abnormality occurs, but there are problems such as the cost of installing a new auxiliary display device increases and the amount of information that can be displayed is limited.

Therefore, the ``Nikkei Electronics May 20, 1985 issue'' has recently begun to be adopted.
No. 369) p.257 to p.281, frame memories are provided in double or triple layers so that they can be displayed overlappingly on a graphic display, and frame memories are added for each display request. An example of this is shown in FIG. 10.

In this conventional example, instead of the frame memory 6, 3
frame memories 61, 62, and 63 are provided.
Frame memories 61, 62, and 63 correspond to WINDOWs 1, 2, and 3, respectively, in relation to FIG. 6B, and store display information corresponding to each WINDOW. 45 is a terminal emulator.

According to this method, the amount of information that can be displayed can be increased without adding an auxiliary display device, but it is necessary to add an expensive frame memory, which increases the cost, and the number that can be displayed in parallel depends on the multiplicity of the frame memory. As a result, there are restrictions, and there are problems such as not being able to display so many things in parallel.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a graphic display device that is capable of high-speed display even in response to a plurality of display requests that occur asynchronously.

[Summary of the invention]

The present invention prepares a plurality of internal registers and provides a means by which the CPU can specify which register information is to be used for display, so that the internal register information corresponding to each display process can be retained without being destroyed and reused. The goal is to achieve the goal by making it possible.

[Embodiments of the invention]

FIG. 1 is a diagram showing an embodiment of a bitmap type graphic display device of the present invention. In this embodiment, three internal registers 421, 422, 423 are used instead of the internal register 42, as compared to FIG.
It is distinctive in that it has been newly established. Further, a selector 44 is provided to select one of the registers 421, 422, and 423. The bitmap method is a control method that controls bits, which are the smallest unit of display.

Each of the three internal registers 421, 422, and 423 stores graphic attribute information for each parallel process.
For example, assume that the internal register compatible with WINDOW is register 421, the internal register compatible with WINDOW is register 422, and the internal register compatible with WINDOW is register 423.

In FIG. 1, a CPU 1 executes a display program for displaying information on a graphic display 7. In recent systems, the number of display programs is plural, and since they operate under multitasking management, it has become mainstream for the plural programs to be executed in parallel. The display program passes graphic display information to be displayed to the graphics controller 4 in the form of graphic display commands that depend on various hardware. In order to temporarily store the graphic display commands, it is common to have a memory called a segment buffer 2 that can be accessed at high speed. The segment buffer 2 may be placed under the common I/O bus 3 as shown in this figure, but it may also be placed under the internal bus 5 within the graphics controller 4.
Figure display commands can be broadly divided into figure drawing commands for actually displaying figures on a graphic display, and figure attribute definition commands for specifying the color, line type, etc. when drawing figures. When a figure attribute command is issued, its contents are stored in one of the internal registers 421, 422, 423 selected by the selector 44 and enabled at that time, and when a figure drawing command is issued, its contents are stored in the internal register. The figure is drawn according to the attribute information provided. Which internal registers are valid depends on the CPU.
1 and switched by the selector 44. The register capacity of one set of internal registers is about 1 kilobyte at most, so increasing this number does not result in a large increase in cost.

Furthermore, specific examples are given and detailed explanations of the operations of each part, centering on the internal registers, are given in Figures 2, 3, and 4.
Do this using diagrams.

FIG. 2 shows a specific example of a display program used in the present invention. The purpose of the display program 1 is to draw one solid white circle and one red dotted triangle. The purpose of the display program 2 is to draw one solid white rectangle, one solid white circle, and one solid, thick white line segment. Similarly, the purpose of display program N is to draw character strings. This figure shows a specific example of the graphic display command at that time and a specific example of each display result.

FIG. 3 shows the display operation when only one internal register 42 is provided.

Now, when the aforementioned display program 1 attempts to display on the graphic display 7, the internal register 42 is first initialized to an initialization pattern by an internal register initialization command.

Here, the initialization pattern is a standard pattern for display, such as "solid line, white, thin line, detailed pattern, etc." in the figure. If there is a change, we will change it accordingly. For example, when displaying a dotted line instead of a "solid line", the "solid line" part is changed to a "dotted line". Then, since a command to draw a circle is executed, the circle is drawn with the state of the internal register 42 at that time, that is, with the attributes of a solid line, white, and thin line. Next, a command is executed to change the line type to a dotted line and the white of the line to red, so the respective attribute information in the internal register 42 is rewritten. Therefore, when the next command to draw a triangle is executed, a triangle with dotted red lines and thin lines will be drawn. In this way, figures are drawn one after another on the graphic display 7, but if the processing of another display program interrupts this process, the internal register 42
Since the contents of the program were rewritten by that program, even if the execution right was returned to display program 1, the figure would still be drawn with attributes different from the content originally intended to be displayed by display program 1. . In other words, in a multitasking operating system, tasks are switched completely regardless of the execution state of the display program, resulting in display attribute information such as line thickness being confused between tasks. was. As a result, asynchronous display requests occur. For this reason, in a graphic display device having only one set of internal registers 42, when multiple display programs are executed, it is necessary to perform serial processing such as executing display program 2 after display program 1 is completed. .

FIG. 4 shows a plurality of internal registers 4 in the present invention.
21, 422, and 423 are shown.

Now, internal registers 421, 422, and 423 (assuming N=3) are provided corresponding to display programs 1, 2 to N, and each display program operates asynchronously under the control of the operating system. There is. Therefore, when each display program is executed, the operating system is configured to switch one of the corresponding internal registers via the selector 44 before giving execution authority. As a result, the display attribute information of other internal registers is displayed without being destroyed or confused. In other words, display can be performed in parallel, similar to the parallel processing of the operating system.

In addition, if there is a physical restriction that prevents the number of registers from increasing in the graphics controller 4, the graphics controller 4 may have one set of internal registers 42 as shown in FIG. External register 92 under I/O bus 3
Even if implemented with 1,922,923 and selector 91, the exchange of attribute information that occurs when switching internal registers is at most about 2 kilobytes in total, so consider the transfer capacity of the common I/O bus 3. It can be processed without any performance problems.

〔Effect of the invention〕

As detailed above, according to the present invention, it is possible to construct a graphic display device that can quickly respond to multiple display requests without adding a special auxiliary display device or adding a large amount of memory. .

[Brief explanation of drawings]

Fig. 1 is an embodiment of the present invention, Fig. 2, Fig. 3,
FIG. 4 is a diagram explaining the display program and display results, FIG. 5 is a diagram of another embodiment of the present invention, and FIG.
B shows an example of an asynchronous display, FIGS. 7, 9, and 10 show conventional examples, and FIG. 8 shows a processing diagram of the operation shown in FIG. 1...CPU, 2...Segment buffer, 4
...Graphic controller, 421, 42
2,423...Internal register.

Claims (1)

[Claims] 1 A CPU that processes multiple programs that display on the screen in parallel, and a register that stores attribute information such as color and line type for each figure among the figure display information from the CPU, and a figure attribute definition command from the program. a register whose contents are rewritten each time the image is emitted; an image development memory; a graphics processor which receives the graphic display information and develops the graphic into a bitmap using the data stored in the register and stores it in the image development memory; ,
A graphic display device comprising a frame memory for temporarily storing data stored in the image development memory for displaying on the screen, wherein a plurality of the registers are provided, and a selector selects one register for each program to be processed in parallel. A graphic display device characterized by comprising: