JPH04109177A - Power supply short circuit inspection method for semiconductor circuits - Google Patents
Power supply short circuit inspection method for semiconductor circuitsInfo
- Publication number
- JPH04109177A JPH04109177A JP2225037A JP22503790A JPH04109177A JP H04109177 A JPH04109177 A JP H04109177A JP 2225037 A JP2225037 A JP 2225037A JP 22503790 A JP22503790 A JP 22503790A JP H04109177 A JPH04109177 A JP H04109177A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- power supply
- short circuit
- circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体集積回路およびそれらを実装した回路基
板など半導体素子で構成される回路の電源間、電源接地
短絡の検査方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for inspecting short circuits between power supplies and power supply ground in circuits composed of semiconductor elements, such as semiconductor integrated circuits and circuit boards on which they are mounted.
従来の電源短絡検査は、各電源端子間の抵抗値を測定し
、あらかじめ求めておいた正常回路の抵抗値との比較に
よって短絡の有無を判定していた。In conventional power supply short-circuit inspection, the presence or absence of a short-circuit was determined by measuring the resistance value between each power supply terminal and comparing it with a previously determined resistance value of a normal circuit.
上記従来技術は半導体回路の電源インピーダンスの点に
ついて配慮がされておらず、被試験半導体回路の電源イ
ンピーダンスは半導体素子の回路構成、その集積度など
により異なり、半導体回路の高集積化に伴いその値が数
Ωと小さいものもある。このため抵抗値では、正常、短
絡の判定が困難という問題があった6
本発明の目的は、被試験半導体回路の電源インピーダン
スに影響されることなく、電源短絡検査をすることにあ
り、さらに被試験半導体回路に電源短絡があった場合に
、電源短絡検査によって被試験半導体回路に与える損傷
を最小限に抑えることにある。The above conventional technology does not take into consideration the power supply impedance of the semiconductor circuit, and the power supply impedance of the semiconductor circuit under test varies depending on the circuit configuration of the semiconductor element, its degree of integration, etc., and its value increases as semiconductor circuits become more highly integrated. In some cases, the resistance is as small as several Ω. For this reason, there is a problem in that it is difficult to judge whether the circuit is normal or short based on the resistance value.6 The purpose of the present invention is to test for power supply short circuits without being affected by the power supply impedance of the semiconductor circuit under test. The object of this invention is to minimize damage to the semiconductor circuit under test by inspecting the power supply short circuit when there is a power supply short circuit in the semiconductor circuit under test.
上記目的を達成するために、被試験半導体回路の各電源
端子に順次電圧を印加する。接地間の短絡を検査するた
めには、電圧を印加した電源端子の電圧を測定し、正常
に印加できているか否かで判定する。また電源間の短絡
を検査するためには、電圧を印加していない他の電源端
子の電圧を測定し、電圧が印加されていないか否かで判
定するようにしたものである。In order to achieve the above object, a voltage is sequentially applied to each power supply terminal of the semiconductor circuit under test. In order to check for a short circuit between grounds, measure the voltage at the power supply terminal to which voltage is applied, and determine whether or not the voltage is being applied normally. Furthermore, in order to check for short circuits between power supplies, the voltages of other power supply terminals to which voltage is not applied are measured, and a determination is made based on whether or not voltage is applied.
さらに、被試験半導体回路に電源短絡があった場合に、
被試験半導体回路に与える損傷を最小限に抑えるため、
電流クランプ機能を有する電圧源を用い、印加電圧を半
導体素子が遮断状態を維持する範囲にしたものである。Furthermore, if there is a power supply short circuit in the semiconductor circuit under test,
To minimize damage to the semiconductor circuit under test,
A voltage source with a current clamping function is used, and the applied voltage is set within a range in which the semiconductor element maintains a cut-off state.
被試験半導体回路の各電源端子に、電流クランプ機能を
有する電圧源で、半導体素子が遮断状態を維持する範囲
の電圧を順次印加する。電圧を印加した電源と接地間の
短絡がなければ、この電源端子の電圧測定結果は印加電
圧と等しくなり、短絡があれば、接地電位(OV)とな
る、また電源間の短絡がなければ、電圧を印加していな
い他の電源端子の電圧測定結果は接地電位(Ov)とな
り、短絡があれば、印加電圧と等しくなる。このように
、各電源端子に順次電圧を印加し、印加毎に各電源端子
の電圧を判定することで、接地間、電源間の短絡を、被
試験半導体回路の電源インピーダンスとは無関係に判定
できる。A voltage within a range in which the semiconductor element maintains a cut-off state is sequentially applied to each power supply terminal of the semiconductor circuit under test using a voltage source having a current clamping function. If there is no short circuit between the energized power supply and ground, the voltage measurement result at this power supply terminal will be equal to the applied voltage; if there is a short circuit, it will be at ground potential (OV), and if there is no short circuit between the power supplies, The voltage measurement result of other power supply terminals to which no voltage is applied becomes the ground potential (Ov), and if there is a short circuit, it becomes equal to the applied voltage. In this way, by sequentially applying voltage to each power supply terminal and determining the voltage of each power supply terminal each time it is applied, short circuits between ground and power supply can be determined regardless of the power supply impedance of the semiconductor circuit under test. .
被試験半導体回路に電源間の短絡があると複数の電源に
同時に電圧が印加されることになるが。If there is a short circuit between power supplies in the semiconductor circuit under test, voltage will be applied to multiple power supplies simultaneously.
印加電圧を半導体素子が遮断状態を維持する範囲として
いるので、半導体素子を損傷させることがない・また、
電源間、接地間の短絡があると短絡部分に短絡電流が流
れるが、電圧源の電流クランプ機能により一定値以上の
電流は流れず、この値は遮断電流を供給できる範囲で小
さな値に設定できるので、短絡部分への損傷を最小限に
抑えることができる。これは電流供給能力の、小さな電
圧源を用いることでも実現できる。Since the applied voltage is within the range where the semiconductor element maintains the cut-off state, the semiconductor element will not be damaged.
If there is a short circuit between power supplies or ground, a short circuit current will flow in the shorted part, but due to the current clamp function of the voltage source, the current will not flow above a certain value, and this value can be set to a small value within the range that can supply the cutoff current. Therefore, damage to the short circuit can be minimized. This can also be achieved by using a voltage source with a small current supply capacity.
以下、本発明の一実施例を第1図、第2図により説明す
る。An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.
第1図は本実施例の測定回路を示す、1はECL (E
mitter Coupled LogiC)素子
で構成される被試験半導体回路、2〜4は被試験半導体
回路1の電源端子で、2はVcc(接地)端子、3はv
TT電源端子、4はv■電源端子、5は電源クランプ機
能付電圧源、6は印加電源端子を切替えるためのスイッ
チ、7,8は電源端子の電圧を測定するための電圧計で
ある。FIG. 1 shows the measurement circuit of this embodiment, 1 indicates ECL (E
2 to 4 are power supply terminals of the semiconductor circuit under test 1, 2 is a Vcc (ground) terminal, and 3 is a Vcc (ground) terminal.
TT power supply terminal, 4 is a v■ power supply terminal, 5 is a voltage source with a power supply clamp function, 6 is a switch for switching the applied power supply terminal, and 7 and 8 are voltmeters for measuring the voltage of the power supply terminal.
第2図はそれぞれ(1)正常時、(2)VTT−VCC
短絡時、(3)Vtt Vzz短絡時の検査結果であ
る。Figure 2 shows (1) normal state, (2) VTT-VCC, respectively.
These are the test results when a short circuit occurs and (3) when a Vtt Vzz short circuit occurs.
電流クランプ機能付電圧源5の印加電圧を、被試験半導
体回路lが遮断状態を維持する範囲の電圧e(例えば−
〇、3V)に設定する。またクランプ電流は、被試験半
導体回路1のVTT電源端子3、■□□源端子4にそれ
ぞれ電圧eを印加した時に電源端子に流れる遮断電流の
和を満す範囲で最小に設定する。The voltage applied by the voltage source 5 with a current clamp function is set to a voltage e within a range where the semiconductor circuit under test l maintains a cut-off state (for example -
〇, set to 3V). Further, the clamp current is set to the minimum within a range that satisfies the sum of the interrupting currents flowing to the power supply terminals when voltage e is applied to the VTT power supply terminal 3 and the ■□□ source terminal 4 of the semiconductor circuit under test 1, respectively.
スイッチ6を切替えながら、印加電圧およびクランプ電
流を設定した電流クランプ機能付電圧源5で被試験半導
体回路lのVtt電源端子3およびv0電源端子4に電
圧eを順次印加する。電圧印加している電源端子と他方
の電源端子の電圧を。While switching the switch 6, a voltage e is sequentially applied to the Vtt power supply terminal 3 and the v0 power supply terminal 4 of the semiconductor circuit under test l using the voltage source 5 with a current clamping function in which the applied voltage and clamp current are set. The voltage between the power supply terminal that is applying voltage and the voltage of the other power supply terminal.
それぞれ電圧計7,8で測定する。被試験半導体回路1
のVTT電源およびv0電源に接地(Vcc)間、電源
間の短絡がなければ、第2図の(1)正常時のように、
電圧印加した電源端子にのみ印加電圧eが測定され、他
方の電源端子の測定結果はovとなる* Vtt電源が
接地(Vcc)間と短絡していると、Vtt電源端子3
に電圧eを印加しても、第2図の(2)Vtt−Vcc
短絡時のように、電圧計7の測定値はOvとなる。また
、v0電源が接地(V c c )間と短絡している場
合も同様である。Measure with voltmeters 7 and 8, respectively. Semiconductor circuit under test 1
If there is no short circuit between the VTT power supply and the v0 power supply between the ground (Vcc) and the power supply, as in the normal state (1) in Figure 2,
The applied voltage e is measured only to the power supply terminal to which the voltage is applied, and the measurement result of the other power supply terminal is ov.* If the Vtt power supply is short-circuited to the ground (Vcc), the Vtt power supply terminal 3
Even if voltage e is applied to (2) Vtt-Vcc in Figure 2,
As in the case of a short circuit, the measured value of the voltmeter 7 is Ov. The same applies when the v0 power supply is short-circuited to ground (V c c ).
VTTll[とv00電源に短絡があると、第2図の(
3)VTTV□短絡時のように、電圧を印加していない
電源端子に印加電圧eが測定される。If there is a short circuit between VTTll[ and v00 power supply, (
3) As in the case of VTTV□ short circuit, the applied voltage e is measured at the power supply terminal to which no voltage is applied.
VT?電源およびv0電源に接地(Vcc)間、電源間
の短絡があると、その短絡部分に短絡電流が流れるが、
電流クランプ機能付電圧源5に設定した電流以上は流れ
ず、短絡部分への損傷を最小限に抑えることができる。VT? If there is a short circuit between the power supply and the v0 power supply, between the ground (Vcc) and between the power supply, a short circuit current will flow through the short circuit, but
A current exceeding the set value does not flow through the voltage source 5 with a current clamp function, and damage to the short-circuited portion can be minimized.
また、VTT電源とV□電電源間口短絡があると、VT
T電源とVzz電源に対して同時に電圧eが印加される
が、印加電圧eは被試験半導体回路1が遮断状態を維持
する範囲に設定されているので、被試験半導体回路1を
損傷させない。Also, if there is a short circuit between the VTT power supply and the V□ power supply, the VT
A voltage e is simultaneously applied to the T power supply and the Vzz power supply, but the applied voltage e is set within a range in which the semiconductor circuit under test 1 maintains a cut-off state, so that it does not damage the semiconductor circuit under test 1.
本実施例によれば、電源端子に電圧を印加し、それが正
常に印加できているか否か、電圧を印加していない電源
端子に電圧が印加されているか否かで電源短絡検査がで
きるので、事前に正常回路の電源端子間、電源−接地端
子間の抵抗値を求めておく必要がなく、また、正常時の
抵抗値と短絡時の抵抗値との差が小さい場合にも、短絡
を検出できる。さらに短絡部分への損傷を最小限に抑え
るとともに、半導体素子を損傷させることがないので、
電源短絡のある半導体回路を修理できるという効果があ
る。According to this embodiment, it is possible to test for short circuits in the power supply by applying voltage to the power supply terminals and checking whether the voltage is being applied normally or whether voltage is being applied to the power supply terminals to which no voltage is being applied. , there is no need to determine the resistance value between the power supply terminals and between the power supply and ground terminals in advance in a normal circuit, and even if the difference between the resistance value during normal operation and the resistance value at the time of a short circuit is small, it is possible to detect a short circuit. Can be detected. Furthermore, damage to short-circuited parts is minimized and semiconductor elements are not damaged.
This has the effect of being able to repair semiconductor circuits with short circuits in the power supply.
第3図は第1図の電流クランプ機能付電圧源5とスイッ
チ6および電圧計7,8を、出力電圧値およびクランプ
電流値を任意に設定でき、出力電圧の測定機能のあるプ
ログラム電源で実現したものである。9,10がプログ
ラム電源である。Figure 3 shows the voltage source 5 with current clamp function, switch 6, and voltmeters 7 and 8 shown in Figure 1 realized by a programmable power supply that can set the output voltage value and clamp current value as desired, and has an output voltage measurement function. This is what I did. 9 and 10 are program power supplies.
第1図の実施例と異なるのは、電圧を印加しない方の電
源端子にプログラム電源10(または9)が接続されて
いることである。この電圧を印加しない方のプログラム
電源10(または9)の出力電圧値にOvを設定するa
VTT電源とVER電源間に短絡があると、出力電圧値
に電圧eを設定したプログラム電源9(または10)と
Ovを設定したプログラム電源10(または9)の出力
が短絡することになるが、Ovを設定したプログラム電
源10(または9)は、Ov出力を制御できなくなり、
第1図の電流クランプ機能付電圧源5がスイッチ6で切
離されたのと同じ働きをする。The difference from the embodiment shown in FIG. 1 is that a program power supply 10 (or 9) is connected to the power supply terminal to which no voltage is applied. Set Ov to the output voltage value of the program power supply 10 (or 9) that does not apply this voltage a
If there is a short circuit between the VTT power supply and the VER power supply, the outputs of the program power supply 9 (or 10) whose output voltage value is set to voltage e and the program power supply 10 (or 9) whose output voltage value is set to Ov will be short-circuited. The program power supply 10 (or 9) that has set Ov will no longer be able to control Ov output,
This function is the same as when the voltage source 5 with current clamp function shown in FIG. 1 is disconnected by the switch 6.
本実施例によれば、第1図の実施例の効果に加え、プロ
グラム電源のみで測定回路を構成できるので、半導体回
路の試験装置など被試験半導体回路にプログラム電源で
電源を供給する装置で、特別な測定回路を付加すること
なく、電源短絡検査が実施できる効果がある。According to this embodiment, in addition to the effects of the embodiment shown in FIG. 1, the measurement circuit can be configured using only the program power supply, so that it is possible to use a device that supplies power to a semiconductor circuit under test using the program power supply, such as a semiconductor circuit testing device. This has the advantage that power supply short circuit inspection can be performed without adding a special measurement circuit.
本発明によれば、被試験半導体回路の電源端子に電圧を
印加し、それが正常に印加できているか否か、電圧を印
加していない電源端子がOvか否かで電源短絡検査がで
きるので、従来の抵抗値による判定に比べ、事前に正常
回路の電源端子間、電源−接地端子間の抵抗値を求めて
おく必要がなく、また、正常回路の抵抗値と短絡時の抵
抗値の差の大小にかかわらず短絡を検出できる効果があ
る。According to the present invention, a power supply short circuit test can be performed by applying a voltage to the power supply terminal of the semiconductor circuit under test and checking whether the voltage is applied normally and whether the power supply terminal to which no voltage is applied is Ov. , compared to the conventional judgment based on resistance values, there is no need to determine the resistance values between the power supply terminals of a normal circuit and between the power supply and ground terminals in advance, and the difference between the resistance value of a normal circuit and the resistance value at the time of a short circuit is not necessary. This has the effect of detecting short circuits regardless of their size.
さらに、被試験半導体回路に電源短絡があっても、印加
電圧を半導体素子が遮断状態を維持する範囲で設定して
あり、電圧源の電流制限機能により短絡電流を制限する
ので、被試験半導体回路に与える損傷を最小限に抑える
ことができ、被試験半導体回路を修理できる効果もある
。Furthermore, even if there is a power supply short circuit in the semiconductor circuit under test, the applied voltage is set within a range where the semiconductor element maintains the cut-off state, and the short circuit current is limited by the current limiting function of the voltage source, so the semiconductor circuit under test This also has the effect of minimizing damage to the semiconductor circuit under test and allowing repair of the semiconductor circuit under test.
第1図は本発明の一実施例の規定回路図、第2図は第1
図の測定回路による短絡検査結果を示す図、第3図は第
1図の測定回路をプログラム電源で構成した時の測定回
路図である。
1・・・被試験半導体回路、 2・・・接地(Vcc)
端子。
3・・・VTT電源端子、 4・・・v0電源端子
。
5・・・電流クランプ機能付電圧源、
6・・・スイッチ、 7,8・・・電圧計、9
.10・・・プログラム電源。FIG. 1 is a prescribed circuit diagram of one embodiment of the present invention, and FIG.
FIG. 3 is a diagram illustrating a short circuit test result using the measurement circuit shown in FIG. 3. FIG. 3 is a measurement circuit diagram when the measurement circuit shown in FIG. 1... Semiconductor circuit under test, 2... Ground (Vcc)
terminal. 3...VTT power supply terminal, 4...v0 power supply terminal. 5... Voltage source with current clamp function, 6... Switch, 7, 8... Voltmeter, 9
.. 10...Program power supply.
Claims (1)
の電源端子に対し、半導体素子が遮断状態を維持する範
囲の電圧を電流クランプ機能を有する電圧源で各電源種
の電源端子に順次印加し、印加時に各電源種の電源端子
の電圧を測定することを特徴とする半導体回路の電源短
絡検査方法。1. Sequentially apply a voltage within a range that allows the semiconductor element to maintain a cut-off state to one or more types of power supply terminals of a circuit composed of semiconductor elements using a voltage source with a current clamp function. A power supply short-circuit inspection method for a semiconductor circuit, comprising: measuring the voltage at a power supply terminal of each power supply type at the time of application.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2225037A JPH04109177A (en) | 1990-08-29 | 1990-08-29 | Power supply short circuit inspection method for semiconductor circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2225037A JPH04109177A (en) | 1990-08-29 | 1990-08-29 | Power supply short circuit inspection method for semiconductor circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04109177A true JPH04109177A (en) | 1992-04-10 |
Family
ID=16823066
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2225037A Pending JPH04109177A (en) | 1990-08-29 | 1990-08-29 | Power supply short circuit inspection method for semiconductor circuits |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04109177A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5048633A (en) * | 1989-01-18 | 1991-09-17 | Mazda Motor Corporation | Integrated control system for steering and power unit |
-
1990
- 1990-08-29 JP JP2225037A patent/JPH04109177A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5048633A (en) * | 1989-01-18 | 1991-09-17 | Mazda Motor Corporation | Integrated control system for steering and power unit |
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