JP7600451B1 - Infrared device and method for manufacturing the same - Google Patents

Abstract

A high performance infrared device and a method for manufacturing the infrared device are provided.
[Solution] The infrared device comprises a substrate (10), a semiconductor laminate (20) provided on the substrate (10) and having a first semiconductor layer (21), an active layer (23) and a second semiconductor layer (25), and an electrical barrier layer (30) located between the substrate (10) and the semiconductor laminate (20) and contributing to an increase in electrical resistance between the substrate (10) and the semiconductor laminate (20), and the semiconductor laminate (20) is provided in plurality, with the plurality of semiconductor laminates (20) being connected in series.
[Selected Figure] Figure 1

Description

This disclosure relates to infrared devices and methods for manufacturing infrared devices.

For example, infrared rays with wavelengths of about 2 to 15 μm contain many absorption bands specific to gas molecules, and are therefore used in non-dispersive infrared absorption gas concentration measuring devices. The infrared devices used in gas concentration measuring devices are important components that greatly affect key performance such as detection resolution, and are required to have high emission intensity or light receiving sensitivity at the desired wavelength. Here, the infrared device is an infrared light emitting element or an infrared light receiving element, and is used as a general term for these. For example, a light emitting diode (LED) is used as the light emitting element. Also, for example, a photodiode (PD) is used as the light receiving element. Infrared devices using such semiconductors can receive and emit light in the desired wavelength band due to material design, and are used in gas concentration measuring devices that detect specific gases. The gas concentration measuring device is, for example, an NDIR (non dispersive infrared) type gas sensor (for example, Patent Document 1). The NDIR type gas sensor can measure the gas concentration using an infrared receiving element that receives infrared rays in an absorption wavelength band corresponding to the gas to be detected and an infrared light emitting element that emits infrared rays in that absorption wavelength band.

JP 2004-271518 A

Infrared devices are now required to have a further improved emission intensity or detection sensitivity. For example, a method is known for improving emission intensity or detection sensitivity by connecting small light-emitting diodes or small photodiodes, which are unit elements, in series. Here, the unit elements are formed on a substrate in a semiconductor layered structure. If current leaks to the substrate, the emission intensity or detection sensitivity of the infrared device decreases.

This disclosure has been made in light of these circumstances, and aims to provide a high-performance infrared device and a method for manufacturing an infrared device.

(1) An infrared device according to an embodiment of the present disclosure,
A substrate;
a semiconductor lamination portion provided on the substrate, the semiconductor lamination portion having a first semiconductor layer, an active layer, and a second semiconductor layer;
an electrical barrier layer located between the substrate and the semiconductor laminate and contributing to an increase in electrical resistance between the substrate and the semiconductor laminate;
The semiconductor laminated portion is provided in plurality, and the plurality of semiconductor laminated portions are connected in series.

(2) As one embodiment of the present disclosure, in (1),
The electrical barrier layer is an amorphous or polymeric layer.

(3) As one embodiment of the present disclosure, in (2),
The electrical barrier layer is a layer of silicon nitride, silicon dioxide, aluminum oxide, thermal silicon nitride, silica gel, silicon monoxide, epoxy resin or polyimide.

(4) As an embodiment of the present disclosure, in any one of (1) to (3),
The electrical barrier layer is present in a first region which is a region between a plurality of the semiconductor laminated portions, and the thickness of the electrical barrier layer in the laminated direction in the first region is thinner than the thickness of the electrical barrier layer in the laminated direction in a second region which is not the first region.

(5) As an embodiment of the present disclosure, in any one of (1) to (4),
The surface of the substrate on which the semiconductor laminate is to be provided is set as a reference surface,
A first angle that a side surface of the first semiconductor layer makes with a plane parallel to the reference plane is different from a second angle that a side surface of the electrical barrier layer makes with a plane parallel to the reference plane.

(6) As an embodiment of the present disclosure, in any one of (1) to (5),
The electrical barrier layer is formed in a recess in the substrate.

(7) As an embodiment of the present disclosure, in any one of (1) to (6),
The electrical barrier layer has a thickness in the lamination direction of 500 nm or more.

(8) As an embodiment of the present disclosure, in any one of (1) to (7),
The refractive index of the electrical barrier layer is lower than the average refractive index of the semiconductor laminate.

(9) As an embodiment of the present disclosure, in any one of (1) to (8),
It has optical characteristics having a peak at a wavelength λ _p [nm],
When the thickness of the semiconductor laminate in the lamination direction is t [nm] and m is an integer of 0 or more, the following formula (1) is satisfied.

(10) As an embodiment of the present disclosure, in (1),
The electrical barrier layer is a semiconductor layer.

(11) As an embodiment of the present disclosure, in (10),
The electrical barrier layer is made of a material having a larger energy gap than the material of the first semiconductor layer.

(12) As an embodiment of the present disclosure, in (10) or (11),
The electrical barrier layer has a conductivity type different from that of the first semiconductor layer.

(13) As an embodiment of the present disclosure, in any one of (10) to (12),
The electrical barrier layer is made of a material having a smaller energy gap than the material of the substrate.

(14) As an embodiment of the present disclosure, in any one of (10) to (13),
The electrical barrier layer has a different conductivity type than the substrate.

(15) As an embodiment of the present disclosure, in any one of (1) to (14),
The first semiconductor layer is in direct contact with the active layer, and the material of the layer in contact with the active layer of the first semiconductor layer has a larger energy gap than the active layer.

(16) As an embodiment of the present disclosure, in any one of (1) to (15),
The second semiconductor layer is in direct contact with the active layer, and the material of the layer in contact with the active layer of the second semiconductor layer has a larger energy gap than the active layer.

(17) As an embodiment of the present disclosure, in any one of (1) to (16),
The side from which infrared rays are emitted or incident has n-type conductivity.

(18) A method for manufacturing an infrared device according to an embodiment of the present disclosure includes the steps of:
A sacrificial layer and a semiconductor laminate film are laminated on a substrate,
removing the sacrificial layer;
forming an amorphous or polymeric electrical barrier layer on a substrate separate from the substrate;
bonding the semiconductor laminated film onto the electrical barrier layer;
The semiconductor laminated film is etched to form a plurality of semiconductor laminated portions;
A plurality of the semiconductor laminated portions are connected in series.

This disclosure provides a high-performance infrared device and a method for manufacturing an infrared device.

FIG. 1 is a diagram illustrating an example of the configuration of an infrared device according to an embodiment of the present disclosure. FIG. 2 is a diagram showing another example of the configuration of the infrared device. FIG. 3 is a diagram showing another example of the configuration of the infrared device. FIG. 4 is a diagram showing another example of the configuration of the infrared device. FIG. 5 is a diagram showing another example of the configuration of the infrared device. FIG. 6 is a diagram showing another example of the configuration of the infrared device. FIG. 7 is a diagram showing another example of the configuration of the infrared device. FIG. 8 is a diagram showing another example of the configuration of the infrared device. FIG. 9 is a diagram showing another example of the configuration of the infrared device. FIG. 10 is a diagram showing another example of the configuration of the infrared device. FIG. 11 is a diagram showing another example of the configuration of the infrared device. FIG. 12 is a diagram illustrating another example of the configuration of the infrared device. FIG. 13 is a partial cross-sectional view of an infrared device, showing an example of the side angle of the first semiconductor layer and the side angle of the electrical barrier layer. FIG. 14 is a partial cross-sectional view of an infrared device, illustrating the angle of the side surface of the electric barrier layer. FIG. 15 is a diagram for explaining the thickness of the semiconductor laminate in the lamination direction. FIG. 16 is a partial cross-sectional view of an infrared device, showing an example of the side angle of the first semiconductor layer and the side angle of the electrical barrier layer. FIG. 17 is a partial cross-sectional view of an infrared device, illustrating the angle of the side surface of the electric barrier layer. FIG. 18A is a diagram for explaining a method for manufacturing an infrared device according to an embodiment of the present disclosure. FIG. 18B is a diagram for explaining a method for manufacturing an infrared device according to an embodiment of the present disclosure. FIG. 18C is a diagram for explaining a manufacturing method of an infrared device according to an embodiment of the present disclosure. FIG. 18D is a diagram for explaining a method for manufacturing an infrared device according to an embodiment of the present disclosure. FIG. 18E is a diagram for explaining a method for manufacturing an infrared device according to an embodiment of the present disclosure.

<Infrared Device>
1 is a diagram showing a configuration example of an infrared device according to an embodiment of the present disclosure. The infrared device according to this embodiment may have optical characteristics having a peak at a wavelength λ _p . The infrared device may have multiple peaks in its optical characteristics. For example, the wavelength λ _p may be any one of the multiple peaks of the optical characteristics. The infrared device includes a substrate 10, a semiconductor laminate 20, and an electrical barrier layer 30. The semiconductor laminate 20 is multiple, and the multiple semiconductor laminates 20 are connected in series.

Here, the term "infrared device" refers to an infrared light emitting element or an infrared light receiving element, and is a collective name for both. An infrared light emitting element is realized with the structure of an infrared device described below, and an infrared light receiving element is realized with the same structure. If the infrared device is an infrared light emitting element, it may specifically be a light emitting diode (LED). Also, if the infrared device is an infrared light receiving element, it may specifically be a photodiode (PD).

<Substrate>
The infrared device according to this embodiment includes a substrate 10. There are no particular limitations on the substrate 10 as long as it is a substrate that supports the semiconductor laminate portion 20. Examples of the substrate 10 include a GaAs substrate, an InP substrate, a GaN substrate, a Si substrate, a quartz substrate, an aluminum substrate, an oxide substrate, an aluminum nitride substrate, and a polyimide flexible substrate. For example, a Si-based substrate including an IC circuit may be used as the substrate 10.

In the infrared device according to this embodiment, the electrical barrier layer 30 can suppress current leaking from the semiconductor laminate 20 to the substrate 10 (hereinafter, "leakage current"). By using a substrate 10 with a low impurity concentration (carrier concentration) or a semi-insulating substrate 10, the leakage current can be further suppressed. In the mid-infrared long wavelength region, free electron absorption by electrons or holes can become significant. For example, by using a substrate 10 with a low impurity concentration or a semi-insulating substrate 10, the effect of suppressing free electron absorption can be enhanced.

Here, the reference surface 10a shown in FIG. 1 is the surface of the substrate 10 on which the semiconductor laminate 20 is provided.

<Semiconductor laminate>
The infrared device according to this embodiment includes a semiconductor laminate 20 provided on a substrate 10. The semiconductor laminate 20 includes, from the substrate 10 side, a first semiconductor layer 21, an active layer 23, and a second semiconductor layer 25. The first semiconductor layer 21 and the second semiconductor layer 25 are directly connected to the active layer 23. The semiconductor laminate 20 and the electrode portion 50 form a unit element. When the infrared device is an infrared light emitting element, a plurality of unit elements are connected in series to obtain a necessary emission intensity and to realize an appropriate driving voltage and current. In this embodiment, the unit element forms one light emitting diode. Also, when the infrared device is an infrared light receiving element, a plurality of unit elements are connected in series to realize an easy-to-handle resistance value when amplifying an output signal by an amplifier circuit. In this embodiment, the unit element forms one photodiode.

The direction in which the first semiconductor layer 21, the active layer 23, and the second semiconductor layer 25 are stacked on the substrate 10 may be referred to as the "stacking direction" in the following description. In this embodiment, the stacking direction is perpendicular to the reference plane 10a.

<First Semiconductor Layer>
The first semiconductor layer 21 is a semiconductor layer of a first conductivity type. In this embodiment, the first conductivity type may be n-type. The constituent material of the first semiconductor layer 21 may be, but is not limited to, InSb, GaAs, InAs, InGaAs, InAlSb, GaAsSb, or InGaP. The first semiconductor layer 21 may be formed of a laminated structure made of a plurality of materials. The above materials are doped with impurities to control the impurity concentration (carrier concentration).

Here, for example, Sn and Te are used as n-type doped materials, and Zn, Be and Ge are used as p-type doped materials as impurities. Si is used as an n-type or p-type doped material depending on the semiconductor of the base material. However, the impurity material is not limited to these. The impurity concentration can be evaluated by, for example, secondary ion mass spectrometry (SIMS). The first semiconductor layer 21 is preferably doped n-type or p-type with donor impurities or acceptor impurities, but may not be doped as long as it has the first conductivity type. The first semiconductor layer 21 may include a dislocation filter layer. The first semiconductor layer 21 may be composed of multiple layers. Here, when the first semiconductor layer 21 is in direct contact with the active layer 23, it is preferable that the material of the layer in contact with the active layer 23 in the first semiconductor layer 21 has a larger energy gap than the active layer 23 from the viewpoint of reducing the diffusion current.

<Active layer>
The active layer 23 is a light emitting layer or a light receiving layer. The material of the active layer 23 may be, but is not limited to, InAsSb. Here, the active layer 23 may be an intrinsic semiconductor and may be doped to a p-type. In particular, when the energy gap is narrow, the active layer 23 may be slightly doped to a p-type. As an example of the slight doping, impurity doping of 10 ¹⁶ /cm ³ to 10 ¹⁸ /cm ³ is performed.

<Second Semiconductor Layer>
The second semiconductor layer 25 is a semiconductor layer of a second conductivity type. The second conductivity type is a conductivity type different from the first conductivity type, and is p-type in this embodiment. As another example, the first conductivity type may be p-type and the second conductivity type may be n-type. As a constituent material of the second semiconductor layer 25, InSb, GaAs, InAs, InGaAs, InAlSb, GaAsSb, InGaP, etc. are used, but are not limited to these. In addition, the second semiconductor layer 25 may be configured as a laminated structure made of multiple materials. Here, when the second semiconductor layer 25 is in direct contact with the active layer 23, it is preferable that the material of the layer in the second semiconductor layer 25 that is in contact with the active layer 23 has a larger energy gap than the active layer 23 from the viewpoint of reducing the diffusion current. In addition, the direction of emission of infrared rays from the light-emitting element or the direction of incidence of infrared rays from the light-receiving element may be either above or below the substrate 10. From the viewpoint of improving the infrared transmittance of the infrared element by the Burstein-Moss effect, it is preferable that the side from which infrared rays are emitted or incident has n-type conductivity.

<Electrode part>
A material having a high reflectance in the mid-infrared long wavelength region is preferred as the material of the electrode section 50. For example, Au and Al can be used as the material of the electrode section 50. In addition, the electrode section 50 can be formed by laminating different electrode materials in order to reduce contact resistance, improve adhesion, and prevent interdiffusion between the electrode material and the semiconductor material. For example, Ti, Pt, Ni, Cr, Cu, etc. can also be used. However, the electrode material is not limited to these.

The electrode unit 50 is electrically connected (in contact) with the first semiconductor layer 21 at the first portion, and injects or extracts a current into or from the first semiconductor layer 21. The electrode unit 50 is electrically connected (in contact) with the second semiconductor layer 25 at the second portion, and injects or extracts a current into or from the second semiconductor layer 25.

<Electric Barrier Layer>
The electrical barrier layer 30 is located between the substrate 10 and the semiconductor laminate 20, and contributes to increasing the electrical resistance between the substrate 10 and the semiconductor laminate 20. The electrical barrier layer 30 suppresses leakage current, thereby realizing a high-performance infrared device that does not reduce the emission intensity or detection sensitivity. From the viewpoint of insulation, the thickness of the electrical barrier layer 30 in the lamination direction is preferably 500 nm or more.

The electrical barrier layer 30 may be an amorphous or polymer layer. For example, the electrical barrier layer 30 may be a layer of silicon nitride (SiN), silicon dioxide (SiO ₂ ), aluminum oxide (Al ₂ O ₃ ), thermal silicon nitride, silica gel, silicon monoxide (SiO), epoxy resin, or polyimide. When the material of the electrical barrier layer 30 is amorphous or polymer, the infrared device is manufactured by connecting the pre-formed semiconductor stack 20 to the substrate 10 through the electrical barrier layer 30 and connecting the adjacent semiconductor stack 20 by the electrode portion 50.

Here, when the material of the electrical barrier layer 30 is amorphous or polymer, it is difficult to form the semiconductor laminate 20 on the electrical barrier layer 30 using MBE or MOCVD. MBE and MOCVD are methods for growing crystals by inheriting the crystalline information of the underlying layer. This is because the underlying amorphous or polymer is non-crystalline and does not contain crystalline information (orientation, atomic spacing, etc.). The manufacturing method of an infrared device according to one embodiment of the present disclosure is as follows. First, a sacrificial layer b that will be removed later is laminated on a substrate a (see FIG. 18A) other than the substrate 10 (see FIG. 18B), and a semiconductor laminate film X is further formed (see FIG. 18C). Examples of the formation method include MBE or MOCVD. Next, the sacrificial layer b is removed, and only the semiconductor laminate film X is peeled off, and the semiconductor laminate film X is bonded to the substrate 10 via the electrical barrier layer 30 (see FIG. 18D). Here, the bonding to the substrate 10 is performed, for example, by bonding. A method for removing the sacrificial layer b includes etching. A method for bonding the electrical barrier layer 30 and the semiconductor laminated film X includes atomic diffusion bonding or surface activation. The surface of the semiconductor laminated film X that is bonded to the substrate 10 may be the surface c that was in contact with the sacrificial layer b, or the surface d opposite to the surface c that was in contact with the sacrificial layer b. This allows a structure e to be formed in which the electrical barrier layer 30 and the semiconductor laminated film X are laminated on the substrate 10 (see FIG. 18E). Then, the semiconductor laminated film X of the structure e is appropriately etched to form a plurality of semiconductor laminated parts 20. The layer used as a mask during this etching may be used as a protective layer for the infrared device as it is. Then, an appropriate protective layer is formed and adjacent semiconductor laminated parts 20 are connected by the electrode part 50 to manufacture an infrared device.

The electric barrier layer 30 may be a semiconductor layer. In this case, the infrared device is manufactured by a known semiconductor manufacturing method. When the material of the electric barrier layer 30 is a semiconductor, a material having a larger energy gap (band gap) than the material of the first semiconductor layer 21 may be used for the electric barrier layer 30 in order to make it difficult for leakage current to flow. By utilizing the fact that a potential barrier is formed in a material with a large energy gap compared to a material with a small energy gap, the inflow of carriers from the first semiconductor layer 21 with a small energy gap to the electric barrier layer 30 with a large energy gap can be restricted, and the leakage current can be reduced. Here, the electric barrier layer 30 may be made of a material having a smaller energy gap than the material of the substrate 10. This restricts the inflow of carriers from the electric barrier layer 30 with a small energy gap to the substrate 10 with a large energy gap, and the leakage current can be reduced. The electric barrier layer 30 may have a different conductivity type from the first semiconductor layer 21. The electric barrier layer 30 may have a different conductivity type from the substrate 10. This is because a potential barrier is formed between different conductivity types, limiting the inflow of carriers and reducing leakage current.

Here, as shown in FIG. 1, the region between the plurality of semiconductor laminated parts 20 is the "first region", and the region that is not the first region is the "second region". In other words, the second region is the region where the main part of the unit element is formed, and the connection region between adjacent unit elements is the first region. Here, the main part of the unit element is the part excluding the second layer 21b from the unit element when the semiconductor laminated part 20 includes the second layer 21b described later, and is the same as the unit element when the semiconductor laminated part 20 does not include the second layer 21b. The electrical barrier layer 30 is provided at least in the second region. The electrical barrier layer 30 does not need to be present in the first region as in FIG. 1. As another example, as shown in FIG. 2, the electrical barrier layer 30 may be formed so as to be present in the first region. Also, as shown in FIG. 3, the electrical barrier layer 30 may be formed so as to be present in the first region and further divide the first protective film 31. Here, the first protective film 31 is a film formed on the side and top surfaces of the semiconductor laminate 20 to protect the semiconductor laminate 20. For example, silicon oxide, silicon nitride, aluminum oxide, titanium oxide, zinc oxide, hafnium oxide, etc. can be selected as the first protective film 31. Silicone resin, polyimide resin, epoxy resin, etc. can also be selected. If the electrical barrier layer 30 is formed so that it is present in the first region, the coverage is improved, and the effect of suppressing leakage current is further enhanced.

Here, the first protective film 31 may be formed so as to be in direct contact with the side and top surfaces of the semiconductor laminate 20, or may be formed so as to be in contact via the second protective film 32. The infrared devices in Figures 4, 5, and 6 are provided with the second protective film 32, and the configuration of the electrical barrier layer 30 corresponds to Figures 1, 2, and 3, respectively.

As another example, the electrical barrier layer 30 may be formed in a depression (recess) in the substrate 10. In this case, the electrical barrier layer 30 may be formed so as to be absent (divided) in part of the first region as shown in FIG. 7, or may be formed so as to be present in the first region as shown in FIG. 8.

As described above, the effect of suppressing leakage current is enhanced when the electrical barrier layer 30 is formed so as to be present in the first region, but the leakage current can be further suppressed by forming the first semiconductor layer 21 from multiple layers with different properties. The infrared devices of Figures 9 and 10 have a first semiconductor layer 21 composed of two layers, and the configuration of the electrical barrier layer 30 corresponds to Figures 2 and 3, respectively. The first layer 21a is a layer with a relatively low resistance. The second layer 21b is a layer with a relatively high resistance. The constituent materials or doping are adjusted so that the resistance of the second layer 21b is higher than the resistance of the first layer 21a, and the first semiconductor layer 21 is formed. The second layer 21b may be present in the first region as shown in Figures 9 and 10.

Also, as shown in FIG. 11, the electrical barrier layer 30 may be formed so that it exists in the first region, and the thickness (h1) of the electrical barrier layer 30 in the stacking direction in the first region is thinner than the thickness (h2) of the electrical barrier layer 30 in the stacking direction in the second region. In this case, since the thickness of the electrical barrier layer 30 changes at the boundary between the first region and the second region, the distance along the surface of the electrical barrier layer 30 (creepage distance) can be extended. By extending the creepage distance, the ESD (Electro Static Discharge) resistance with the adjacent unit element can be improved. Here, as shown in FIG. 12, the electrical barrier layer 30 may be formed so as to divide the first protective film 31.

It is also preferable to extend the creepage distance for the side portion of the semiconductor laminate 20. FIG. 13 is a partial cross-sectional view of an infrared device, showing an example of the angle of the side of the first semiconductor layer 21 and the angle of the side of the electric barrier layer 30. The first angle (θ1) that the side of the first semiconductor layer 21 makes with a plane parallel to the reference plane 10a and the second angle (θ2) that the side of the electric barrier layer 30 makes with a plane parallel to the reference plane 10a are different, and the second angle may be larger than the first angle. By making the first angle different from the second angle, the creepage distance of the side portion of the first semiconductor layer 21 can be extended compared to the case where the first angle is aligned with the second angle. By extending the creepage distance, the ESD resistance with the adjacent unit element can be further improved. Here, as shown in FIG. 14, when the electric barrier layer 30 has a portion with a thin thickness in the stacking direction, the second angle is determined excluding the thin portion. 16 and 17, the second angle may be smaller than the first angle. If the second angle is smaller than the first angle, the adhesion between the first semiconductor layer 21 and the electrical barrier layer 30 can be improved when an electrode and a protective layer are further formed on the first semiconductor layer 21 and the electrical barrier layer 30.

Here, in this embodiment, the refractive index of the electrical barrier layer 30 may be lower than the average refractive index of the semiconductor laminate 20. For example, the average refractive index of the semiconductor laminate 20 may be 3 to 4, and the refractive index of the electrical barrier layer 30 may be less than 1.5. The refractive index of the substrate 10 may be, for example, 3 to 4. Since the electrode (part of the electrode unit 50) on the upper surface of the semiconductor laminate 20 functions as a mirror, the infrared device may have a resonant structure, and may have optical characteristics having a peak at a wavelength λ _p [nm]. When the thickness of the semiconductor laminate 20 in the lamination direction is t [nm] and m is an integer equal to or greater than 0, the following formula (1) is satisfied.

In more detail, the thickness (t) of the semiconductor laminate 20 in the lamination direction is calculated by the following formula (2), where the average refractive index of the semiconductor laminate 20 is "n".

Here, the average refractive index refers to the average value weighted by the film thickness for the refractive index of each layer of the semiconductor laminate. Here, FIG. 15 shows the relationship between the thickness of the semiconductor laminate 20 in the lamination direction and the magnitude of the energy of light trapped inside the resonant structure (|E| ² ). In the resonant structure, as shown in FIG. 15, a fixed end is located at the interface between the metal and the semiconductor laminate 20, and a free end is located at the interface between the semiconductor laminate and the electric barrier layer 30, and the thickness t of the semiconductor laminate 20 in the lamination direction and the wavelength λ _p are in a relationship formula such as formula (2). In addition, formula (1) is obtained by substituting the average refractive index (3 to 4) of the semiconductor laminate 20 in this embodiment into formula (2). The infrared device according to this embodiment can have optical characteristics having a peak at a desired wavelength λ _p by designing the thickness of the laminate structure, etc., so as to satisfy formula (1).

Although the embodiment has been described above based on the drawings and examples, it should be noted that a person skilled in the art would easily be able to make various modifications and corrections based on this disclosure. It should be noted, therefore, that these modifications and corrections are included in the scope of this disclosure. For example, the functions included in each component, each means, etc. can be rearranged so as not to cause logical inconsistencies, and multiple means, etc. can be combined into one or divided.

REFERENCE SIGNS LIST 10: Substrate 20: Semiconductor laminate portion 21: First semiconductor layer 21a: First layer 21b: Second layer 23: Active layer 25: Second semiconductor layer 30: Electric barrier layer 31: First protective film 32: Second protective film 50: Electrode portion

Claims (17)

A substrate;
a semiconductor lamination portion provided on the substrate, the semiconductor lamination portion having a first semiconductor layer, an active layer, and a second semiconductor layer;
an electric barrier layer located between the substrate and the semiconductor laminate and suppressing leakage current between the substrate and the semiconductor laminate ;
The semiconductor laminated portion is a plurality of portions, and the plurality of semiconductor laminated portions are connected in series,
The surface of the substrate on which the semiconductor laminate is to be provided is set as a reference surface,
a first angle that a side surface of the first semiconductor layer forms with a plane parallel to the reference plane is different from a second angle that a side surface of the electrical barrier layer forms with a plane parallel to the reference plane,
An infrared device, wherein a side of the first semiconductor layer is in contact with a side of the electrical barrier layer . The infrared device of claim 1, wherein the electrical barrier layer is an amorphous or polymeric layer. The infrared device of claim 2, wherein the electrical barrier layer is a layer of silicon nitride, silicon dioxide, aluminum oxide, thermal silicon nitride, silica gel, silicon monoxide, epoxy resin, or polyimide. The infrared device according to any one of claims 1 to 3, wherein the electrical barrier layer is present in a first region that is a region between a plurality of the semiconductor laminated portions, and the thickness of the electrical barrier layer in the first region in the lamination direction is thinner than the thickness of the electrical barrier layer in the lamination direction in a second region that is not the first region. The infrared device of claim 1 , wherein the second angle is non-perpendicular to the reference plane. The infrared device according to any one of claims 1 to 3, wherein the thickness of the electrical barrier layer in the stacking direction is 500 nm or more. The infrared device according to any one of claims 1 to 3, wherein the refractive index of the electrical barrier layer is lower than the average refractive index of the semiconductor laminate. It has optical characteristics having a peak at a wavelength λ _p [nm],
4. The infrared device according to claim 1, wherein the following formula (1) is satisfied, where t [nm] is a thickness in a stacking direction of the semiconductor stack and m is an integer of 0 or more.

The infrared device of claim 1, wherein the electrical barrier layer is a semiconductor layer. The infrared device according to claim 9 , wherein the electrical barrier layer is made of a material having a larger energy gap than a material of the first semiconductor layer. 11. The infrared device according to claim 9 , wherein the electrical barrier layer has a different conductivity type from the first semiconductor layer. 11. The infrared device according to claim 9 , wherein the electrical barrier layer is made of a material having a smaller energy gap than a material of the substrate. 11. The infrared device according to claim 9 or 10 , wherein the electrical barrier layer has a different conductivity type than the substrate. The infrared device according to any one of claims 1 to 3, wherein the first semiconductor layer is in direct contact with the active layer, and the material of the layer of the first semiconductor layer in contact with the active layer has a larger energy gap than the active layer. The infrared device according to any one of claims 1 to 3, wherein the second semiconductor layer is in direct contact with the active layer, and the material of the layer in contact with the active layer of the second semiconductor layer has a larger energy gap than the active layer. The infrared device according to any one of claims 1 to 3, wherein the side from which infrared light is emitted or incident has n-type conductivity. A sacrificial layer and a semiconductor laminate film are laminated on a substrate,
removing the sacrificial layer;
forming an amorphous or polymeric electrical barrier layer on a substrate separate from the substrate;
bonding the semiconductor laminated film onto the electrical barrier layer;
The semiconductor laminated film is etched to form a plurality of semiconductor laminated portions;
A method for manufacturing an infrared device , comprising connecting a plurality of the semiconductor laminated portions in series, the method comprising the steps of:
The infrared device to be manufactured comprises:
The substrate;
the semiconductor laminate portion provided on the substrate and having a first semiconductor layer, an active layer, and a second semiconductor layer;
an electric barrier layer located between the substrate and the semiconductor laminate and suppressing leakage current between the substrate and the semiconductor laminate;
The semiconductor laminated portion is a plurality of portions, and the plurality of semiconductor laminated portions are connected in series,
The surface of the substrate on which the semiconductor laminate is to be provided is set as a reference surface,
a first angle that a side surface of the first semiconductor layer forms with a plane parallel to the reference plane is different from a second angle that a side surface of the electrical barrier layer forms with a plane parallel to the reference plane,
A method for manufacturing an infrared device, wherein a side surface of the first semiconductor layer is in contact with a side surface of the electrical barrier layer.

Images