JP6531945B2 - Overcurrent detection circuit - Google Patents

Description

  The present invention relates to an overcurrent detection circuit that detects an overcurrent condition during charging and discharging of a battery.

FIG. 5 is a circuit diagram of the prior art described in Patent Document 1. As shown in FIG.
In FIG. 5, 100 is a battery (secondary battery), 200 is an overcurrent protection circuit, and 301 and 302 are connection terminals to the battery 100.
The overcurrent protection circuit 200 includes an overcurrent detection circuit 210, a voltage monitoring unit 250, a charge / discharge control unit 260, and a charge / discharge control switch 270. Further, the overcurrent detection circuit 210 includes a voltage dividing resistor 211, a delay circuit 212 including a low pass filter, buffers 213 and 214 with an amplification factor of 1, a differential amplifier circuit 215 having an operational amplifier 216, and a comparator 217. And a reference voltage source 218.

V _t is the terminal voltage of the battery 100, I _c is the current flowing through the battery 100, V _d is the voltage division value by the voltage dividing resistor 211, V ₁ is the output voltage of the buffer 213, and V ₂ is the output voltage of the buffer 214 (delay voltage of the voltage value of the partial pressure _{V d), V s} is the reference voltage is the output voltage, _{V f} of the differential amplifier circuit 215 is set by the reference voltage source 218.

In general, when an overcurrent flows in a battery, the battery deteriorates. Therefore, the overcurrent detection circuit 210 of FIG. 5 detects a change in current I _c per unit time as the difference between the output voltages V ₁ and V ₂ of the buffers 213 and 214, and a voltage V _s proportional to the difference voltage. Is detected by the differential amplifier 215 and the subsequent comparator 217 is compared with the reference voltage V _f to detect the occurrence of the overcurrent. Then, the charge / discharge control unit 260 turns off the charge / discharge control switch 270 to prevent the deterioration of the battery 100 due to the overcurrent.
The voltage monitoring unit 250, by comparing the terminal voltage V _t of the battery 100 using an internal comparator with a predetermined reference voltage, monitors the status of the battery 100.

  According to the above-described overcurrent detection circuit 210, the power loss due to resistance is greater than the method in which a shunt resistor, an FET or the like is connected in series to battery 100 and the overcurrent is detected using the voltage drop due to these resistance values. There is an advantage that it does not occur.

Patent No. 4932975 (Paragraphs [0013] to [0049], FIG. 1, etc.)

Incidentally, the overcurrent detection circuit 210 in FIG. 5, in order to detect both during charging overcurrent and (increase in the terminal voltage V _t) and the discharge overcurrent (decrease in the terminal voltage V _t), for example, the voltage In forming the monitoring unit 250, it is necessary to provide a reference voltage source different from the reference voltage source 218, which causes an increase in the number of parts and the cost.
The above problems will be described in detail below.

In FIG. 5, for example, when the load current is constant, considering the leakage current in delay circuit 212, voltages V ₁ and V ₂ are stabilized in the state of V ₁ > V ₂ and differential output voltage V _{s of} both voltages is stabilized. = _(V 2 -V ₁₎ becomes negative _(V s <0). Note that the value of V _s at this time is V _s0 .

When the voltage _{V d} by overcurrent during discharging is rapidly _reduced, since between V 1, _{V 2} there is a time delay, both the magnitude relation of changes to _V 1 _{<V 2} from _V 1> _{V 2.} As a result, V _s = (V ₂ −V ₁ ) reverses to positive, which indicates that V _s changes in the direction of increasing V _s due to over current during discharge.
In the circuit of FIG. 5, the charge / discharge control unit 260 detects the occurrence of an overcurrent by inverting the output of the comparator 217 when V _s becomes larger than the reference voltage V _f . Therefore, the reference voltage _Vf must be set to a value larger than the _Vs0 ( _Vf > _Vs0 ).

On the other _hand, in a state which is set to V _{f> V s0,} an overcurrent is generated during charging, since _{V d} is not changed in relation _V 1> _{V 2} increases, _{V s} is increased in the negative direction. This indicates that the charge overcurrent changes to decrease V _s .
However, there is the relationship of V _f> V _s0, since the output V _s of the comparator 217 also tends to increase V _d how much will not be reversed, the charging and discharging control unit 260 to detect the occurrence of charge overcurrent I can not

Therefore, in the prior art, as described above, the voltage monitoring unit 250 is provided with a comparator, and a reference voltage different from the reference voltage V _f is set to detect an over current during charging. In addition to the source 218, it means that another reference voltage source is needed.

Further, Patent Document 1 also suggests that an absolute value circuit detects an absolute value of the output voltage V _s of the differential amplifier circuit 215 to detect both the charging overcurrent and the discharging overcurrent.
If an absolute value circuit is used, even if there is only one reference voltage source, charging over current and discharging over current can be detected. In that case, a negative power supply generation circuit is additionally required, and the number of parts is still required. And the cost increases.

  Therefore, the problem to be solved by the present invention is to detect both the charging overcurrent state and the discharging overcurrent state with a small number of circuit components without using a plurality of reference voltage sources, negative power supply generation circuits and the like. To provide an over-current detection circuit.

In order to solve the above-mentioned problems, the invention according to claim 1 is an overcurrent detection circuit for detecting that an overcurrent flows in a chargeable / dischargeable battery,
A first signal is output by comparing a first potential proportional to a positive electrode potential of the battery and a second potential obtained by temporally delaying the potential proportional to the positive electrode potential by a voltage delay unit. 1, the voltage comparison unit,
A differential amplification unit that amplifies a difference between the first potential and the second potential;
A second voltage comparison unit that compares the output voltage of the differential amplification unit with a reference voltage and outputs a second signal;
A control unit configured to determine a steady state of current flowing in the battery, an overcharge state during charging of the battery, or an overcurrent state during discharging based on a combination of logics of the first signal and the second signal; It is

  According to a second aspect of the present invention, in the overcurrent detection circuit according to the first aspect, the control unit is configured such that the logic of the first signal and the logic of the second signal is the same as each other (for example, first logic When it is “0”, it is determined that the battery is in the over current state during charging, and the logic of the first signal and the logic of the second signal are the same, and the first logic Is a second logic opposite to (e.g., "1") to determine that the battery is in the over current state during discharge.

  The invention according to claim 3 is the overcurrent detection circuit according to claim 1 or 2, wherein the first voltage comparison unit compares the first potential and the second potential by a comparator having hysteresis. It is

  The invention according to claim 4 is the overcurrent detection circuit according to any one of claims 1 to 3, further comprising: a voltage dividing resistor for dividing a terminal voltage of the battery, wherein the voltage dividing point is divided by the voltage dividing resistor. The potential is the first potential and the potential of the input terminal of the voltage delay unit.

  The invention according to claim 5 is the overcurrent detection circuit according to any one of claims 1 to 3, further comprising: a voltage dividing resistor that divides a terminal voltage of the battery, wherein the voltage dividing resistor The potential at one end located on the positive electrode side is the first potential, and the potential at the other end of the voltage dividing resistor is the potential at the input end of the voltage delaying portion.

  According to the present invention, the signal obtained by comparing the first potential corresponding to the current potential of the battery with the second potential obtained by temporally delaying the current potential, and the first and second potentials It is possible to determine the normal state of the current flowing through the battery, the charging overcurrent state, or the discharging overcurrent state based on a combination of logic with a signal obtained by comparing the voltage corresponding to the difference with the reference voltage. . In particular, in the present invention, since a plurality of reference voltage sources and negative power supply generation circuits are unnecessary, the circuit configuration can be simplified and the cost can be reduced.

It is a circuit diagram showing a 1st embodiment of the present invention. FIG. 7 is an operation explanatory view in the case where an overcurrent at the time of charge occurs in the first embodiment of the present invention. FIG. 7 is an operation explanatory view in the case where an overcurrent during discharge occurs in the first embodiment of the present invention. It is a circuit diagram showing a 2nd embodiment of the present invention. It is a circuit diagram of the prior art described in patent document 1. FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram showing a first embodiment of the present invention. In FIG. 1, resistors 2 and 3 for voltage division are connected in series between the positive electrode and the negative electrode of a chargeable / dischargeable battery (secondary battery) 1. Further, the positive electrode of the battery 1 is connected to the terminal 61, and the negative electrode of the battery 1 is connected to the terminal 62.

  The connection point between the resistors 2 and 3 is connected to the inverting input terminal of the comparator 11 of the first voltage comparison unit 10 via the buffer 5 with an amplification factor of 1, and via the resistor 4 a of the voltage delay unit 4. The amplification factor is connected to the buffer 6 of one. Here, the voltage delay unit 4 is a low pass filter including a resistor 4 a and a capacitor 4 b as in the delay circuit 212 of FIG. 5.

In the first voltage comparison unit 10, the comparator 11 and the resistors 12 and 13 constitute a so-called comparator with hysteresis, and the non-inverted input terminal of the comparator 11 is connected to the output terminal of the comparator 11 via the resistor 12. And, it is connected to the output side of the buffer 6 through the resistor 13. Furthermore, the output of the comparator 11 is inputted to the control unit 40 as the signal D _1.
The hysteresis voltage of the comparator 11 is a value obtained by dividing the output voltage by the resistors 12 and 13. The output is inverted when the voltage difference between both input terminals of the comparator 11 exceeds the hysteresis voltage.

  The outputs of the buffers 5 and 6 are input to the non-inverted input terminal and the inverted input terminal of the operational amplifier 23 through the resistors 21 and 22 in the differential amplifier unit 20, respectively. The non-inverted input terminal of the operational amplifier 23 is grounded via the resistor 24, and the resistor 25 is connected between the output terminal of the operational amplifier 23 and the inverted input terminal. The operational amplifier 23 outputs a voltage proportional to the difference between the output voltages of the buffers 5 and 6. Here, the amplification factor of the operational amplifier 23 is set to 1 for convenience. Needless to say, the amplification factor is not limited to one.

The output of the operational amplifier 23 is applied to the inverting input terminal of the comparator 31 of the second voltage comparing unit 30, and the non-inverting input terminal is connected to the positive terminal of the reference voltage source 32. The output signal of the comparator 31 is inputted to the control unit 40 as the signal D _2.
Control unit 40 determines a steady state in which an overcurrent is not generated, an overcurrent state during charging, or an overcurrent state during discharge according to a combination of logics of input signals D ₁ and D ₂ , as will be described later. It operates to output a control signal to the blocking unit 50.

The negative electrode of the battery 1 and the negative electrode of the reference voltage source 32 are both grounded, and the connection point between the two is connected to the terminal 62 through the electric path blocker 50.
The electric circuit interruption unit 50 has a function of interrupting the charge path or the discharge path of the battery 1 by the control signal from the control unit 40 when an overcurrent occurs, and the FET 51 which shuts off the overcurrent at the time of discharge Are connected in series so that each parasitic diode is in the opposite direction. The configuration and function of the circuit breaker 50 are substantially the same as the charge / discharge control switch 270 of FIG.

  In the above configuration, the buffers 5, 6, the comparators 11, 31, and the operational amplifier 23 usually have positive power supply terminals and negative power supply terminals, and the positive power supply terminals are the battery positive terminal and other positive voltages not shown. Although connected to the source, the negative power supply terminal is connected to the ground level, ie 0 [V].

Next, the operation of this embodiment will be described.
(1) Operation in Steady State First, an operation in the case where the overcurrent does not flow in the battery 1 and the fluctuation of the load current is substantially constant will be described.
Assuming that the potentials on the input side of the buffers 5 and 6 are V _t1 and V _t2 respectively, the magnitude relationship between V _t1 and V _t2 is V as in the prior art due to the influence of the leakage current of the capacitor 4 b and the voltage drop by the resistor 4 a. _t1 > _Vt2 Therefore, assuming that the potentials on the output side of the buffers 5 and 6 are V _b1 and V _b2 respectively, V _b1 > V _b2 , and the output voltages of the buffers 5 and 6 at this time are V _b10 [V] and V _b20 , respectively. It is assumed that [V].

Since V _b1 (V _b10 ) described above is input to the inverting input terminal of the comparator 11 and V _b2 (V _b20 ) is input to the non-inverting input terminal of the comparator 11, the potential V _d1 of the output of the comparator 11 is It becomes potential ie ground level of the negative power supply terminal of the comparator 11, the logic of the signal D ₁ input to the control unit 40 is "0".
Further, V _b1 and V _b2 are input to the differential amplification unit 20, and the operational amplifier 23 outputs a voltage V _s = (V _b10 -V _b20 )> 0 [V].

Here, if the voltage V _f of the reference voltage source 32 is set to a value larger than (V _b10 −V _b20 ), the potential V _d2 of the output of the comparator 31 becomes the potential of the positive power supply terminal of the comparator 31, logic signal D ₂ that is inputted to the section 40 is "1".
Therefore, the control unit 40 determines that the state in which D ₁ = “0” and D ₂ = “1” is the steady state in which the overcurrent does not occur, and turns on the FETs 51 and 52 of the circuit breaker 50. It outputs a control signal that maintains the status.

(2) Operation in the Case of Overcurrent at the Time of Charging Next, the operation in the case where the charging current to the battery 1 becomes an overcurrent will be described with reference to FIG.
When a voltage equal to or higher than the charge rating is applied between the terminals 61 and 62 in FIG. 1, etc., since there is no resistance for current limitation between the terminal 61 and the positive electrode of the battery 1, an overcurrent flowing in the charging direction As a result, the potential V _t on the positive electrode side of the battery 1 rises sharply.
At this time, the potential V _t1 on the input side of the buffer 5 rises as a voltage division value by the resistors 2 and 3 at the same timing as the change of V _t , but the potential V _t2 on the input side of the buffer 6 is a voltage It rises with a delay by the time set by the delay unit 4.

FIG. 2 is a waveform diagram schematically showing how V _t1 (V _b1 ) and V _t2 (V _b2 ) change.
2, the slope of V _t2 when charging overcurrent after the occurrence is related to the delay time by the voltage delay unit 4, the slope more constant is small when the by resistor 4a and a capacitor 4b becomes steep, the time constant is The larger the value, the smaller the inclination. Note that V _b1 and V _b2 change substantially in the same manner as V _t1 and V _t2 .
Even _{V t} changes rapidly by the charging _overcurrent, the magnitude relation of V _{b1, V b2} is not _changed, the state of V _{b1> V b2} is maintained. Therefore, the potential V _d1 of the output of the comparator 11 does not change from the ground level, and the logic of the signal D ₁ input to the control unit 40 is “0”.

On the other hand, the potential V _s of the output of the differential amplifier 23 increases with the passage of time as shown in FIG. The potential V _s is compared with the reference voltage V _f by the comparator 31 of the second voltage comparing section 30, and when V _s <V _f , the logic of the signal D ₂ input to the control section 40 becomes “1”. It becomes "0" when V _s > V _f .
The control unit 40 sets the potential V _s to the reference voltage V _f even if D ₁ = “0”, D ₂ = “0”, ie, the logic of D ₁ is “0” as in the steady state. a control signal so as to increase become by D ₂ of the logic determines that the overcurrent state when charging the case of "0", to interrupt the current flowing in the charging direction to FET52 of the path cut-off portion 50 over Output.

In the above-described operation, the time constant of the voltage delay unit 4 and the reference voltage V _f may be appropriately set in accordance with the overvoltage to be detected (in other words, the charging over current). When it is desired to increase the detection sensitivity of the overcurrent during charging, the time constant of the voltage delay unit 4 is increased to reduce V _f, and when it is desired to perform a somewhat loose operation in consideration of the noise margin, the voltage The time constant of the delay unit 4 may be reduced to increase V _f .

(3) Operation in the Case of Overcurrent at the Time of Discharge Next, the operation in the case where the discharge current from the battery 1 becomes an overcurrent will be described with reference to FIG.
When the terminals 61 and 62 of Figure 1 is overcurrent in the discharge direction by the reasons such as the short circuit occurs, the positive electrode side potential V _t of the battery 1 is rapidly lowered.
At this time, the potential V _t1 on the input side of the buffer 5 decreases as the voltage division value by the resistors 2 and 3 at the same timing as the change of V _t , but the potential V _t2 on the input side of the buffer 6 is a voltage The delay time decreases with the delay time set by the delay unit 4.

FIG. 3 is a waveform diagram schematically showing how V _t , V _t1 (V _b1 ) and V _t2 (V _b2 ) change.
As shown in FIG. 3, after the discharge overcurrent _occurs, the magnitude relation of V _{b1, V b2} is changed from _{V b1> V b2} of normal state to _V b1 _{<V b2.} Then, when the absolute value | V _b1 −V _b2 | becomes larger than the hysteresis voltage of the comparator 11 of the voltage comparison unit 10, the potential V _d1 of the output of the comparator 11 is inverted from the ground level to the potential of the positive power supply terminal. logic of the signal D ₁ input to 40 becomes "1". Incidentally, _thereafter, the absolute value magnitude of V _{b1, V b2} becomes the _{V b1> V b2 | V b1} -V b2 | is as long as it does not exceed a different hysteresis voltage is greater than the hysteresis voltage, the signal _{D 1} Logic does not invert from "1" to "0".

On the other hand, in the differential amplification unit 20, the potential V _s of the output of the operational amplifier 23 is maintained at the ground level (0 [V]) which is the potential of the negative power supply terminal due to the relationship of V _b1 <V _b2 . Therefore, the potential V _d2 of the output of the comparator _31, i.e. the logic signal D ₂ that is inputted to the control unit 40 remains "1".
Therefore, the control unit 40 determines that the state of D ₁ = “1” and D ₂ = “1” is the over current state at the time of discharge, and cuts off the current flowing in the discharge direction to the FET 51 of the electric circuit block 50. Output the control signal.

As described above, according to the first embodiment, the difference between the potentials V _b1 and V _b2 and the signal D ₁ obtained by comparing the potential V _b1 and its delayed potential V _b2 by the first voltage comparison unit 10 The control unit 40 is in the normal state, in the charge overcurrent state or in the discharge state, based on the combination of the logic with the signal D ₂ obtained by comparing the V _s corresponding to the reference voltage V _f by the second voltage comparison unit 30. It is possible to determine the over-current state.

Next, a second embodiment of the present invention will be described based on FIG. The difference between FIG. 4 and FIG. 1 according to the first embodiment is the circuit configuration on the input side of the voltage delay unit 4 and the connection position of the input signal to the voltage delay unit 4.
That is, in FIG. 4, another resistor 3a is connected between the resistor 3 and the negative electrode of the battery 1, and one end of the resistor 4a is connected to a connection point between the resistors 3 and 3a. In other words, the potential at the connection point between the resistors 2 and 3 is the potential V _t1 , and the potential at the connection point between the resistors 3 and 3a is the potential at the input end of the voltage delay unit 4.

As described above, in order to detect the charge-time overcurrent according to the first embodiment, it is a condition that the potential V _t rapidly rises and the relationship of V _s > V _f is quickly established. Therefore, V _t is the case of gradually increasing a degree that is not affected by the delay operation of the voltage delay unit 4, it may not be possible to detect the charging overcurrent.
The second embodiment shown in FIG. 4 is for solving the above problem.

If you configure the input side of the voltage delay unit 4 as shown in FIG. 4, regardless of the rate at which the potential V _t is increased by an overcurrent, a potential difference applied to the resistor 3 as potential V _t is increased becomes larger. Therefore, the potential difference between V _t1 and V _t2 (V _b1 and V _b2 ), that is, the potential V _s of the output of the differential amplification unit 20 also increases.
Therefore, even if the rising speed of V _t is slow, if V _t becomes so high that V _s exceeds V _f , the logic of the signals D ₁ and D ₂ input to the control unit 40 is “ The control unit 40 can reliably detect the over-current at the time of charge.

  In the present invention, a secondary battery pack including the overcurrent detection circuit and the battery 1 is formed by the entire circuit shown in FIG. 1 and FIG. 4, and the secondary battery pack is used as information for notebook computers, mobile phones, etc. It can be used as a DC power supply device for communication terminals, digital cameras, video cameras and the like. Further, the charging device including the overcurrent detection circuit may be configured by the portion excluding the battery 1 in FIG. 1 and FIG. 4.

  The overcurrent detection circuit of the present invention can be used as a DC power supply device or a charging device for electric vehicles and hybrid vehicles in addition to the various electric / electronic / communication devices described above.

1: Battery (secondary battery)
2, 3, 3a, 4a, 12, 13, 12, 22, 24, 25: Resistor 4: Voltage delay unit 4b: Capacitor 5, 6: Buffer 10, 30: Voltage comparison unit 11, 31: Comparator 20: Differential Amplification unit 23: Op-amp 32: DC voltage source 40: Control unit 50: Electric circuit interruption unit 51, 52: FET
61, 62: Terminal

Claims (5)

In an overcurrent detection circuit that detects that an overcurrent flows in a chargeable / dischargeable battery,
A first signal is output by comparing a first potential proportional to a positive electrode potential of the battery and a second potential obtained by temporally delaying the potential proportional to the positive electrode potential by a voltage delay unit. 1, the voltage comparison unit,
A differential amplification unit that amplifies a difference between the first potential and the second potential;
A second voltage comparison unit that compares the output voltage of the differential amplification unit with a reference voltage and outputs a second signal;
A control unit that determines a steady state of current flowing in the battery, an overcharge state during charging of the battery, or an overcurrent state during discharging based on a combination of logics of the first signal and the second signal;
An overcurrent detection circuit characterized by comprising: In the overcurrent detection circuit according to claim 1,
The control unit
When the logic of the first signal and the logic of the second signal are both the same first logic, it is determined that the battery is in the over current state during charging, and the first signal and the logic It is determined that the battery is in the over current state during discharge when the logics of the second signal are both the same and the second logic reverse to the first logic. Current detection circuit. In the overcurrent detection circuit according to claim 1 or 2,
The first voltage comparison unit
An overcurrent detection circuit, wherein the first potential and the second potential are compared by a comparator having hysteresis. In the overcurrent detection circuit according to any one of claims 1 to 3,
A voltage dividing resistor for dividing the terminal voltage of the battery is provided, and the potential at the voltage dividing point by the voltage dividing resistor is set to the first potential and the potential at the input end of the voltage delay unit. Overcurrent detection circuit. In the overcurrent detection circuit according to any one of claims 1 to 3,
The voltage dividing resistor for dividing the terminal voltage of the battery is provided, and the potential of one end of the voltage dividing resistor positioned on the positive electrode side of the battery is the first potential, and the potential of the other end of the voltage dividing resistor is the An overcurrent detection circuit characterized in that the potential of the input terminal of the voltage delay unit is used.

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