JP5493575B2 - Information processing apparatus and information processing apparatus control method - Google Patents

Description

  The present invention relates to a network system, an information processing apparatus, and a network system control method.

  The performance of information processing devices such as computers (or computers) continues to improve year by year, but due to the saturation of the rising curve of the operating clock frequency accompanying the arrival of miniaturization limits of semiconductor circuits, the CPU (Central Processing Unit), etc. There is a limit to improving the performance of these processors. For this reason, in recent years, further improvement in performance has been achieved by a parallel computer having a plurality of processors.

  The performance of a parallel computer depends not only on the calculation speed of a single processor but also on the time required for communication between processors, that is, the communication speed. Since there is a limit to improving the performance of a single processor, in the current situation, an improvement in communication speed between processors is required to further improve the performance of parallel computers. The communication speed in a parallel computer can be roughly divided into two elements. One is the latency that is the data transfer time, and the other is the bandwidth that is the bandwidth of the data transfer.

  The latency is the time taken from the start of data communication to the end of communication. The shorter the latency, the higher the communication speed. However, if the structure of the parallel computer is complicated in order to improve the performance of the parallel computer, the logic becomes complex, resulting in an increase in the number of transistors used and a signal delay, resulting in a decrease in latency. In addition, the influence of latency is accumulated as the scale of the parallel computer increases, making it difficult to further improve the performance of the entire parallel computer system.

  Bandwidth is a measure of the amount of data that can be transferred at one time, and of course it is desirable that a large amount of data can be transferred at one time, but simply increasing the amount of data that can be transferred at one time Since the number of bits to be transferred increases, the number of transistors used for data transfer and retention also increases, resulting in an increase in the area of a semiconductor chip of a large scale integrated circuit (LSI) constituting a parallel computer. End up. For this reason, increasing the number of bits transferred at one time takes time to synchronize the data transfer, resulting in a decrease in the latency.

  FIG. 1 is a diagram illustrating an example of a conventional network system (or network architecture). FIG. 1 shows a network system 1 that uses a two-dimensional mesh topology such as a two-dimensional mesh torus topology. As illustrated in FIG. 1, the network system 1 includes a crossbar switch 2 and crossbar interfaces 3-1 to 3-4 connected to the crossbar switch 2. All data from the crossbar interfaces 3-1 to 3-4 are redistributed to the crossbar interfaces 3-1 to 3-4 via the crossbar switch 2.

  A node 5 is connected to each of the crossbar interfaces 3-1 to 3-4. The node 5 is a calculation node 5 such as a processor or an input / output (I / O) node, and at least one node 5 is a calculation node. The network system 1 and the four nodes 5 form an information processing apparatus. When two or more nodes 5 are calculation nodes, a parallel computer is formed.

  As can be seen from FIG. 1, the latency and the bandwidth are in a trade-off relationship not only in the computer but also in the network system, and it is difficult to improve both the latency and the bandwidth.

JP-A-11-212866 JP 2002-328838 A JP-A-10-215266

  Conventional computers and network systems have a problem that it is difficult to improve both latency and bandwidth.

  Accordingly, an object of the present invention is to provide a network system, an information processing apparatus, and a network system control method capable of improving both latency and bandwidth.

  According to one aspect of the present invention, a crossbar switch, a plurality of crossbar interfaces having ports connected to the crossbar switch, and a set of ports having a use frequency equal to or higher than a predetermined value among the plurality of crossbar interfaces are formed. A network system including a bypass route for directly connecting crossbar interfaces is provided.

According to one aspect of the present invention , based on a result of the first calculation, a first calculation node that transmits a packet, and a packet that is connected to the first calculation node and that is connected to the first calculation node. A first analysis unit for analyzing a header included in the first analysis unit, and the first analysis unit connected to the first analysis unit, outputting a first request, and inputting a first permission for the output first request The packet from the first computation node is held in the first buffer, and when the first permission is input, the packet is held in the first buffer according to the analysis result of the header by the first analysis unit. Based on the packet from the first computing node, the first transmitter that transmits the first packet and the second packet, and the first transmitter that is connected to the first transmitter, Based on the first request entered A crossbar switch that outputs the first permission, receives the first packet from the first transmitter, and switches a path of the received first packet; the crossbar switch; and the first bar A second reception unit connected to the transmission unit for receiving in parallel the first packet from the crossbar switch and the second packet from the first transmission unit; and the second reception connected. An information processing apparatus having a second calculation node that performs a calculation based on the first packet and the second packet received from the unit is provided.

According to an aspect of the present invention, in a method for controlling an information processing device, a first calculation node included in the information processing device transmits a packet based on a result of performing a first calculation, and the information processing device It has the first analysis unit connected to the first computing node, before Symbol analyzes the header included in the packet from the first computing node, the information processing apparatus having the first analysis The first transmission unit connected to the unit outputs the first request, and the crossbar switch connected to the first transmission unit included in the information processing apparatus inputs from the first transmission unit Based on the first request, a first permission is output, and packets from the first computing node are output until the first transmitter inputs the first permission for the output first request. In the first buffer When the first permission is input, the first packet is determined based on the packet from the first calculation node held in the first buffer according to the analysis result of the header by the first analysis unit. The crossbar switch receives the first packet from the first transmitter, switches the path of the received first packet, and the crossbar has the information processing apparatus. A second receiver connected to the switch and the first transmitter receives in parallel the first packet from the crossbar switch and the second packet from the first transmitter; Provided is a method for controlling an information processing apparatus that performs a calculation based on a first packet and a second packet received by the second calculation node of the information processing apparatus from the connected second receiving unit. .

  According to the disclosed network system, information processing apparatus, and network system control method, both latency and bandwidth can be improved.

It is a figure explaining an example of the conventional network system. It is a figure explaining an example of the network system in an Example. It is a figure explaining an example of a crossbar switch. It is a figure which shows the simulation result of the performance evaluation of simultaneous communication. It is a figure explaining the other example of the network system in an Example. It is a figure explaining the other example of the network system in an Example. It is a figure explaining the other example of the network system in an Example. It is a figure explaining the other example of the network system in an Example. It is a figure explaining an example of a crossbar interface. It is a flowchart explaining operation | movement of a crossbar switch.

  In the disclosed network system, information processing apparatus, and network system control method, attention is paid to the bias of the communication path, that is, the bias of the use frequency (or data communication frequency) of the port, and both the latency and the bandwidth are improved. . By improving both latency and bandwidth, the performance of an information processing apparatus such as a parallel computer can be improved.

  Embodiments of the disclosed network system, information processing apparatus, and network system control method will be described below with reference to the drawings.

  In many parallel computers, a communication path selection algorithm that logically avoids deadlock such as Dimension Order Routing (DOR) is employed in order to avoid deadlock. When such a communication path selection algorithm is employed, communication path bias, that is, a pair of ports having a high use frequency (or data communication frequency) and a set of ports having a low use frequency are generated.

  For example, when dimensional order routing (DOR) is adopted in a two-dimensional mesh topology, data passing through a distributed switch network such as a crossbar switch is a target (or a destination). A communication path that matches the X coordinate of the node coordinates and then the Y coordinate is selected and transferred. All data crosses the X coordinate in the same order when matching the X coordinate of the target node coordinate, and crosses the Y coordinate in the same order when matching the Y coordinate of the target node coordinate. Deadlock can be avoided. For convenience of explanation, for example, when the data on the two-dimensional mesh is (x, y) and data is transferred from the coordinate (0, 0) to the coordinate (n, n), the communication between the X-axis ports is n times, Communication between Y-axis ports is n-1 times, communication between X-axis ports and Y-axis ports is once, and the number of communication between coaxial ports such as X-axis ports or Y-axis ports is The number of times of communication between the ports of different axes between the other ports of the X axis and the Y axis is larger.

  Therefore, in one embodiment of the present invention, paying attention to the uneven usage frequency, both the latency and the bandwidth are improved. By improving both latency and bandwidth, it is possible to improve the performance of an information processing apparatus such as a parallel computer.

  FIG. 2 is a diagram illustrating an example of a network system (or network architecture) in the embodiment. FIG. 2 uses one of two-dimensional mesh torus topology, two-dimensional line torus topology, two-dimensional mesh ring topology, and two-dimensional line ring topology. 1 shows a network system 11. As illustrated in FIG. 2, the network system 11 includes a crossbar switch 12, crossbar interfaces (or switch interfaces) 13-1 to 13-4 connected to the crossbar switch 12, and a bypass route 14-1. , 14-2. The crossbar interfaces 13-1 to 13-4 forming the ports are connected between the crossbar switch 12 and the corresponding nodes 50-1 to 50-4. The nodes 50-1 to 50-4 are, for example, calculation nodes such as a CPU and a processor that execute various calculations (or operations), or input / output (I / O) nodes, and the node 50-1 ˜50-4, at least one node is a computation node. The network system 11 and the four nodes 50-1 to 50-4 form an information processing apparatus. When two or more of the nodes 50-1 to 50-4 are calculation nodes, a parallel computer is used. Is formed. That is, the information processing apparatus includes the crossbar switch 12, the crossbar interfaces 13-1 to 13-4, the bypass routes 14-1 and 14-2, and the nodes 50-1 to 50-4.

  Data from each of the crossbar interfaces 13-1 to 13-4 is redistributed to the crossbar interfaces 13-1 to 13-4 via the crossbar switch 12 that switches the data path, or passes through the crossbar switch 12. Without being transferred to the corresponding crossbar interface via the bypass routes 14-1 and 14-2.

  FIG. 3 is a diagram illustrating an example of the crossbar switch 12. In this example, the crossbar switch 12 has n switches (SW) 121 (n is a natural number of 2 or more) arranged in the X-axis direction and n switches 121 arranged in the Y-axis direction. In such a crossbar switch 12, a two-dimensional mesh torus topology, a two-dimensional line torus topology, a two-dimensional mesh ring topology, or a two-dimensional line ring topology employs dimensional order routing (DOR) as a communication route selection algorithm. For example, when the data on the two-dimensional mesh is (x, y) and data is transferred from the coordinates (0, 0) to the coordinates (n, n), the communication between the X-axis ports is n times, the Y-axis The communication between the ports is n−1 times, and the communication between the X-axis port and the Y-axis port is once. In this way, the number of communications between coaxial ports, such as between X-axis ports or between Y-axis ports, is the number of communications between ports on different axes between the other X-axis ports and Y-axis ports. More than Therefore, in this example, the X-axis crossbar interfaces 13-1 and 13-2 that form a set of ports having a usage frequency higher than or equal to a predetermined value are connected by the bypass route 14-1, and the usage frequency is a predetermined value. The Y-axis crossbar interfaces 13-3 and 13-4 forming the high port pair are connected by the bypass route 14-2 as described above, but the crossbar interface connected by the bypass route is not limited to this.

Needless to say, the crossbar switch 12 having n X-axis ports and n Y-axis ports is not limited to the configuration using n ² switches 121 as shown in FIG.

  For example, when the number of communication between ports of different axes adopting different communication path selection algorithms is larger than the number of communication between coaxials, the crossbar interfaces 13-1 and 13-4 are connected by a bypass route, The crossbar interfaces 13-2 and 13-2 may be connected by a bypass route.

  In this way, data transfer between, for example, the crossbar interfaces 13-1 and 13-2 that form a set of ports whose usage frequency (or data communication frequency) is higher than a predetermined value is directly transferred without passing through the crossbar switch 12. This is done via the bypass route 14-1. As a result, data passing through the bypass route 14-1 is directly transferred between the ports of the crossbar interfaces 13-1 and 13-2 without going through the crossbar switch 12. Data transfer can be performed with low latency compared to the above. In addition, since the majority of data transfer via the crossbar interfaces 13-1 and 13-2 is data transfer via the bypass route 14-1, the latency is substantially reduced.

  Furthermore, by providing a bypass route, when the crossbar interface has a virtual channel, it is also possible to transfer data via the bypass route and data via the other crossbar switch 12 simultaneously, that is, in parallel. The bandwidth can be substantially increased. For example, when a packet is transferred from the crossbar interface 13-1 to the crossbar interface 13-2, the data is transferred via the bypass route 14-1, and at the same time, the data is transferred via the crossbar switch 12. The bandwidth can be doubled. The packet format (or format) is not particularly limited. In the case of distributed (or distributed) routing, the packet includes destination information and packet source (source) information. Contains information. For example, in the case of a packet formed of a header and a data part, routing information is included in the packet header, and data is included in the data part.

  FIG. 2 is for explaining connections in the network system 11, and the physical positions of the crossbar interfaces 13-1 to 13-4 with respect to the crossbar switch 12 are not limited to the positions in FIG. . Also in FIGS. 5 to 8 described later, the positions of the illustrated crossbar interfaces with respect to the crossbar switch do not indicate physical positions.

  FIG. 4 is a diagram illustrating a simulation result of performance evaluation of simultaneous communication. In FIG. 4, the vertical axis indicates the number of unreached packets, and the horizontal axis indicates the elapsed time as the number of CPU cycles. For example, when a packet is transferred from the crossbar interface 13-1 to the crossbar interface 13-2 in FIG. 2, the data matches the X coordinate of the target (or destination) node coordinate and then the Y coordinate. Select the communication path to be used. In FIG. 4, Ax is a simulation result of the performance evaluation of the process of matching the X coordinate when passing through the crossbar switch 12, Ay is a simulation result of the performance evaluation of the process of matching the Y coordinate when passing through the crossbar switch 12, A-1 shows a simulation result of performance evaluation when a packet is transferred from the crossbar interface 13-1 to the crossbar interface 13-2 via the crossbar switch 12, and in the conventional example of FIG. This corresponds to a simulation result of performance evaluation when a packet is transferred to the interface 3-2 via the crossbar switch 2. Also, Bx is a simulation result of performance evaluation of the process of matching the X coordinate when passing directly through the bypass route 14-1 without going through the crossbar switch 12, and By is directly bypassing the bypass route 14 without going through the crossbar switch 12. As a result of the simulation of the performance evaluation of the process of matching the Y coordinate when passing through -1, B-1 is directly bypassed from the crossbar interface 13-1 to the crossbar interface 13-2 without passing through the crossbar switch 12. The simulation result of the performance evaluation when the packet is transferred via is shown. From a comparison between the simulation result B-1 and the simulation result A-1 in FIG. 4, a 10% performance improvement was confirmed for the simulation result B-1. Note that the simulation result of FIG. 4 is calculated for the normalized packet transfer rate.

  FIG. 5 is a diagram illustrating another example of the network system in the embodiment. FIG. 5 shows a network system 11 using any one of a two-dimensional mesh torus topology, a two-dimensional line torus topology, a two-dimensional mesh ring topology, and a two-dimensional line ring topology. In FIG. 5, the same parts as those in FIG. 2 are denoted by the same reference numerals, and the description thereof is omitted. In this example, a communication path selection algorithm is employed in which the number of communications between coaxial ports is larger than the number of communications other than that, so the crossbar interface 13-1 having a + X axis port and the -X axis A crossbar interface 13-2 having ports is connected by a bypass route 14-1. A crossbar interface 13-3 having a + Y axis port and a crossbar interface 13-4 having a -Y axis port are connected by a bypass route 14-2. The + X-axis and -X-axis ports of the crossbar interfaces 13-1 and 13-2 are ports connected to the corresponding X-axis ports of the crossbar switch 11, and the crossbar interfaces 13-3 and 13-4. + Y-axis and -Y-axis ports are ports connected to the corresponding Y-axis ports of the crossbar switch 11, and + X, -X, + Y, and -Y-axis ports are port names given for convenience. It is.

  FIG. 6 is a diagram illustrating another example of the network system in the embodiment. FIG. 6 shows a network system 21 that uses any one of a three-dimensional mesh torus topology, a three-dimensional line torus topology, a three-dimensional mesh ring topology, and a three-dimensional line ring topology. In addition to the crossbar interfaces 13-1 to 13-4, crossbar interfaces 13-5 and 13-6 are connected to the crossbar switch 12A. In FIG. 6, the same parts as those in FIG. In this example, a communication path selection algorithm is employed in which the number of communications between coaxial ports is larger than the number of communications other than that, so the crossbar interface 13-5 having a + Z axis port and the −Z axis A crossbar interface 13-6 having ports is connected by a bypass route 14-3.

  The crossbar interfaces 13-5 and 13-6 forming the ports are connected between the crossbar switch 12A and the corresponding nodes 50-5 to 50-6. The nodes 50-5 to 50-6 are calculation nodes or I / O nodes, and at least one of the nodes 50-1 to 50-6 is a calculation node. The network system 21 and the six nodes 50-1 to 50-6 form an information processing apparatus, and when two or more of the nodes 50-1 to 50-6 are calculation nodes, a parallel computer Is formed. That is, the information processing apparatus includes a crossbar switch 12A, crossbar interfaces 13-1 to 13-6, bypass routes 14-1 to 14-3, and nodes 50-1 to 50-6.

  FIG. 7 is a diagram illustrating another example of the network system in the embodiment. FIG. 7 shows a network system 31 that uses any one of a two-dimensional mesh torus topology, a two-dimensional line torus topology, a two-dimensional mesh ring topology, and a two-dimensional line ring topology. In FIG. 7, the same parts as those in FIG. In this example, a communication path selection algorithm is employed in which the number of communications between ports on different axes is greater than the number of communications between coaxial ports, so the crossbar interface 13-1 having a + X axis port A crossbar interface 13-3 having a + Y axis port is connected by a bypass route 14-4. A crossbar interface 13-2 having a -X axis port and a crossbar interface 13-4 having a -Y axis port are connected by a bypass route 14-5.

  FIG. 8 is a diagram illustrating another example of the network system in the embodiment. FIG. 8 shows a network system 41 using a tree topology. A parent crossbar interface 13A-1 and child crossbar interfaces 13B-1 and 13B-2 are connected to the crossbar switch 12B. A tree type is formed by branching the child crossbar interfaces 13B-1 and 13B-2 from the parent crossbar interface 13A-1 via the crossbar switch 12B. In this example, the number of communications from the ports of the child crossbar interfaces 13B-1 and 13B-2 to the ports of the parent crossbar interface 13A-1 is the number of communications between the ports of the child crossbar interfaces 13B-1 and 13B-2. Therefore, the port of the child crossbar interface 13B-1 and the port of the parent crossbar interface 13A-1 are connected by the bypass route 14B-1. Further, the port of the child crossbar interface 13B-2 and the port of the parent crossbar interface 13A-1 are connected by a bypass route 14B-2. In this example, bypass routes 14B-1 and 14B-2 from the ports of the child crossbar interfaces 13B-1 and 13B-2 to the ports of the parent crossbar interface 13A-1 are provided. Needless to say, a bypass route from the interface 13A-1 to the ports of the child crossbar interfaces 13B-1 and 13B-2 may be further provided.

  The crossbar interfaces 13A-1, 13B-1, and 13B-2 forming the ports are connected between the crossbar switch 12B and the corresponding nodes 50A-1, 50B-1, and 50B-2. The nodes 50-A-1, 50B-1, and 50B-2 are calculation nodes or I / O nodes, and at least one of the nodes 50A-1, 50B-1, and 50B-2 is a calculation node. It is. The network system 41 and the three nodes 50A-1, 50B-1, and 50B-2 form an information processing apparatus, and two or more nodes among the node nodes 50A-1, 50B-1, and 50B-2 If is a compute node, a parallel computer is formed. That is, the information processing apparatus includes the crossbar switch 12B, the crossbar interfaces 13A-1, 13B-1, 13B-2, the bypass routes 14B-1, 14B-2, and the node nodes 50A-1, 50B-1, 50B-. 2

  In the tree topology, for example, when a grandbar and great-grandchild crossbar interface is further provided, as shown in FIG. 8, the grandchild crossbar interface 13C-1 is connected to the node 50B-1, and the grandchild crossbar interface 13C-1 is connected to the crossbar interface. It is connected to the great grandchild's crossbar interface (not shown) via the switch 12C. The grandchild crossbar interface 13C-1 and the great grandchild crossbar interface may have the same configuration as the crossbar interfaces 13A-1, 13B-1, and 13B-2. The configuration of the crossbar switch 12C may be the same as that of the crossbar switch 12B.

  In the network systems 11, 21, 31, and 41, there is one bypass route connected to one crossbar interface, but one crossbar interface is connected depending on the communication path selection algorithm employed. In order to connect two or more crossbar interfaces, two or more bypass routes may be connected. For example, in the network system 21 shown in FIG. 6, the crossbar interface 13-1 having a + X axis port and the crossbar interface 13-5 having a + Z axis port may be connected by a bypass route.

  FIG. 9 is a diagram illustrating an example of the crossbar interface. For convenience of explanation, it is assumed that there is one bypass route 14 connected to the crossbar interface 13 shown in FIG. The crossbar interface 13 includes a crossbar reception unit 131, an external interface 132, a header analysis unit 133, and a crossbar transmission unit 134 which are connected as shown in FIG.

  A packet from the crossbar switch 12 and a packet from the bypass route 14 are input to the crossbar receiving unit 131. Since exclusive control for selecting any one of the packet via the crossbar switch 12 or the bypass route 14 according to the communication protocol to be used is performed in advance on the crossbar interface 13, the crossbar receiver 131 supplies a packet from the crossbar switch 12 or a packet from the bypass route 14 to the external interface 132.

  The external interface 132 is connected to the node 50. The node 50 is a calculation node or an I / O node. The external interface 132 outputs the packet from the crossbar reception unit 131 to the node 50 and supplies the packet from the node 50 to the header analysis unit 133. The node 50 may be a CPU mounted on a system board (not shown) that forms, for example, a parallel computer together with a memory (not shown). The node 50 may be an I / O interface mounted on an I / O board separate from the system board.

  The header analysis unit 133 should recognize the target (or destination) node coordinates based on the routing information included in the packet header from the external interface 132, that is, the packet destination information, and transfer the packet. Determine the X and Y coordinates of the port. The routing information included in the header may include packet issuer information (for example, source address) in addition to packet destination information (for example, destination address).

  When the crossbar transmission unit 134 issues a request and receives a grant granting the packet transmission from the crossbar switch 12, the crossbar transmission unit 134 outputs the packet obtained from the external interface 132 via the header analysis unit 133 to the crossbar switch 12. To do. On the other hand, if a grant is not given from the crossbar switch 12 even if a request is issued, the crossbar transmission unit 134 bypasses the packet obtained from the external interface 132 via the header analysis unit 133 without outputting the packet to the crossbar switch 12. 14 to output.

  The crossbar transmission unit 134 may have a configuration in which a plurality of buffers (not shown) formed by FIFO (First-In-First-Out) or the like are connected in parallel. In this case, the crossbar transmission unit 134 can hold the packet in the buffer until a grant is given from the crossbar switch 12 to the issued request. Thus, when the crossbar interface 13 has a virtual channel using a buffer, the data passing through the bypass route 14 and the data passing through the other crossbar switch 12 may be transferred simultaneously, that is, in parallel. Yes, the bandwidth can be substantially increased.

  Needless to say, when there are two or more bypass routes connected to the crossbar interface, the same configuration as that of FIG. 9 is provided for each bypass route.

  A parallel computer generally has a network port and a CPU port, and in some cases, an I / O node port. Here, for convenience of explanation, the CPU port names are CPU0 and CPU1, and the I / O node port names are IO0 and IO1. When dimensional order routing (DOR) is adopted, the CPU ports CPU0 and CPU1 are likely to communicate with the + X-axis and -X-axis ports, so that CPU0 and + X as in the case of FIG. 5 or FIG. A bypass route can be provided by combining the port of the axis, the CPU 1 and the port of the −X axis. In this case, it is more effective to add an algorithm that causes the CPU output to the CPU port CPU0 to be output to the + X axis port.

  When dimensional order routing (DOR) is adopted, the I / O node is likely to communicate with the Z-axis port. Thus, a bypass route can be provided by combining IO0 and + Z-axis ports and IO1 and −Z-axis ports.

  Needless to say, the network system of the above embodiment is not applicable only to communication of parallel computers, and can be used for general purposes.

  FIG. 10 is a flowchart for explaining the operation of the crossbar switch, that is, the arbitration process. Here, for convenience of explanation, the operation of the crossbar switch 12 shown in FIG. 5 will be described as an example.

  In FIG. 10, step S21 confirms the request (request) from the ports of + X, -X, + Y, and -Y axes, and step S22 is one of the ports of + X, -X, + Y, and -Y axes. Determine whether a packet is received from the axis. The request indicates a port (output port) to which the crossbar switch 12 should output a packet received from the port (input port). If the decision result in the step S22 is YES, the process advances to a step S34 without giving a grant permitting packet transmission to the ports of the + X, -X, + Y, and -Y axes. In step S34, it is determined whether or not the received packet is completed. If the determination result is YES, the process returns to step S21.

  If the decision result in the step S22 is NO, a step S24 decides whether or not there is a request from the + X axis port. If the decision result is YES, the process advances to a step S25, and the determination result is NO. If so, the process proceeds to step S26. In step S25, a grant is given to the + X-axis port, and the process proceeds to step S33 described later. In step S26, it is determined whether or not there is a request from the -X axis port. If the determination result is YES, the process proceeds to step S27, and if the determination result is NO, the process proceeds to step S28. In step S27, a grant is given to the port on the -X axis, and the process proceeds to step S33 described later. Step S28 determines whether or not there is a request from the + Y axis port. If the determination result is YES, the process proceeds to step S29, and if the determination result is NO, the process proceeds to step S30. In step S29, a grant is given to the + Y-axis port, and the process proceeds to step S33 described later. In step S30, it is determined whether or not there is a request from the -Y axis port. If the determination result is YES, the process proceeds to step S31, and if the determination result is NO, the process proceeds to step S32. In step S31, a grant is given to the port on the -Y axis, and the process proceeds to step S33.

  In step S33, it is determined whether or not the processing of the request has been completed. If the determination result is YES, the processing returns to step S21. Further, after step S32, the process returns to step S21.

  In this way, the crossbar switch 12 grants a grant to the source of this request when a request is received when no packet is received. The arbitration process can be executed at the output port in the crossbar switch 12.

The following additional notes are further disclosed with respect to the embodiment including the above examples.
(Appendix 1)
Crossbar switch,
A plurality of crossbar interfaces having ports connected to the crossbar switch;
A network system comprising a bypass route for directly connecting crossbar interfaces forming a set of ports having a usage frequency equal to or higher than a predetermined value among the plurality of crossbar interfaces.
(Appendix 2)
The network system according to appendix 1, wherein the crossbar interface directly connected by the bypass route is determined based on a communication route selection algorithm.
(Appendix 3)
The network system according to appendix 2, wherein the communication path selection algorithm is dimension order routing, and a crossbar interface directly connected by the bypass route forms a port coaxial with a node coordinate serving as a data destination.
(Appendix 4)
The network system according to appendix 2, wherein the crossbar interface directly connected by the bypass route forms a port having an axis different from the node coordinate serving as a data destination.
(Appendix 5)
The network system according to any one of appendices 1 to 4, wherein each crossbar interface is connected between the crossbar switch and a processor or an input / output node.
(Appendix 6)
Each crossbar interface has a crossbar transmitter connected to the crossbar switch and the bypass route,
The crossbar transmission unit issues a request and outputs a packet from the processor or an input / output node to the crossbar switch when a grant for permitting packet transmission is given from the crossbar switch, and issues the request. 6. The network system according to appendix 5, wherein when no grant is given from the crossbar switch, a packet from the processor or an input / output node is output to the bypass route without being output to the crossbar switch.
(Appendix 7)
A first computation node that performs a first computation and transmits a packet;
A first crossbar interface connected to the first computing node and forwarding a packet transmitted by the first computing node;
A crossbar switch that receives a packet from the connected first computing node and switches a path of the packet;
A second crossbar interface connected to the crossbar switch and the first crossbar interface and transferring packets from the crossbar switch or the first crossbar interface;
An information processing apparatus having a second calculation node that receives a packet from the connected second crossbar interface and performs a second calculation.
(Appendix 8)
The information processing apparatus according to appendix 7, wherein the second crossbar interface simultaneously receives a packet from the crossbar switch and a packet from the first crossbar interface.
(Appendix 9)
The second crossbar interface has a crossbar transmitter connected to the crossbar switch and the second crossbar interface,
When the crossbar transmission unit issues a packet transmission request and is permitted to transmit a packet from the crossbar switch, the crossbar transmission unit outputs the packet from the calculation node to the crossbar switch and issues the request. The information processing apparatus according to appendix 7, wherein when the permission is not given from the crossbar switch, the crossbar switch outputs to the first crossbar interface.
(Appendix 10)
Crossbar switch,
Multiple nodes,
A plurality of crossbar interfaces having ports and connected between the crossbar switch and the plurality of nodes;
Among the plurality of crossbar interfaces, comprising a bypass route for directly connecting crossbar interfaces that form a set of ports whose use frequency is a predetermined value or more,
The information processing apparatus, wherein the plurality of nodes are formed of at least one computation node and at least one input / output node.
(Appendix 11)
The information processing apparatus according to appendix 10, wherein the crossbar interface directly connected by the bypass route is determined based on a communication route selection algorithm.
(Appendix 12)
The information processing apparatus according to appendix 11, wherein the communication path selection algorithm is dimension order routing, and the crossbar interface directly connected by the bypass route forms a port coaxial with a node coordinate serving as a data destination.
(Appendix 13)
The information processing apparatus according to appendix 11, wherein the crossbar interface directly connected by the bypass route forms a port having an axis different from a node coordinate serving as a data destination.
(Appendix 14)
Each crossbar interface has a crossbar transmitter connected to the crossbar switch and the bypass route,
The crossbar transmission unit issues a request and outputs a packet from the node to the crossbar switch when a grant for permitting packet transmission is given from the crossbar switch, and issues the request from the crossbar switch. 14. The information processing apparatus according to any one of appendices 10 to 13, wherein if no grant is given, the packet from the node is output to the bypass route without being output to the crossbar switch.
(Appendix 15)
Each crossbar interface has a crossbar receiver connected to the crossbar switch and the bypass route,
The crossbar receiving unit receives a packet from the crossbar switch and a packet from the crossbar interface, and selectively outputs one of the packets by exclusive control according to a communication protocol to be used. Information processing device.
(Appendix 16)
Each crossbar interface has a virtual channel and a crossbar receiver connected to the crossbar switch and the bypass route,
14. The information processing apparatus according to appendices 10 to 13, wherein the crossbar receiving unit inputs a packet from the crossbar switch and a packet from the crossbar interface at the same time and transfers both data in parallel using a virtual channel.
(Appendix 17)
A first computing node performing a first computation transmitting a packet;
A first crossbar interface connected to the first computing node transfers a packet transmitted by the first computing node;
A crossbar switch receiving a packet from the first computing node connected to the crossbar switch and switching a path of the packet;
A second crossbar interface connected to the crossbar switch and the first crossbar interface transfers a packet from the crossbar switch or the first crossbar interface;
A method of controlling a network system, comprising: a second computing node that performs a second computation receives a packet from the second crossbar interface connected to the second computing node.
(Appendix 18)
The network system control method according to supplementary note 17, wherein the second crossbar interface simultaneously receives a packet from the crossbar switch and a packet from the first crossbar interface.
(Appendix 19)
The second crossbar interface has a crossbar transmitter connected to the crossbar switch and the second crossbar interface,
When the crossbar transmission unit issues a packet transmission request and is permitted to transmit a packet from the crossbar switch, the crossbar transmission unit outputs the packet from the calculation node to the crossbar switch and issues the request. 18. The network system control method according to appendix 17, wherein when the permission is not given from the crossbar switch, the crossbar switch outputs to the first crossbar interface.
(Appendix 20)
Forwarding the packet received by the first crossbar interface to the crossbar switch;
The crossbar switch switching the packet path from the first crossbar switch to a path determined based on a communication path selection algorithm and transferring the packet path;
And a second crossbar interface connected to the crossbar switch and the first crossbar interface receives a packet from the crossbar switch or a packet from the first crossbar interface via a bypass route. How to control the system.
(Appendix 21)
When a request is issued from the first crossbar interface and a grant permitting packet transmission is given from the crossbar switch, the packet received by the first crossbar interface is output to the crossbar switch and the request is issued. And outputting a packet received by the first crossbar interface to the second crossbar interface via the bypass route without outputting the packet to the crossbar switch unless a grant is given from the crossbar switch. The network system control method according to appendix 20.
(Appendix 22)
The second crossbar interface inputs a packet from the crossbar switch and a packet from the crossbar interface, and one of the packets is connected to the second crossbar interface by exclusive control according to a communication protocol to be used. The network system control method according to appendix 20, comprising a step of selectively outputting to a node.
(Appendix 23)
The second crossbar interface simultaneously inputs a packet from the crossbar switch and a packet from the first crossbar interface via the bypass route, and uses the virtual channel to transmit both data to the second crossbar interface. The network system control method according to appendix 20, wherein the network system is transferred in parallel to nodes connected to the network.

  Although the disclosed network system and information processing apparatus have been described with the embodiments, it is needless to say that the present invention is not limited to the above-described embodiments, and various modifications and improvements can be made within the scope of the present invention. Yes.

11 Network system 12 Crossbar switch 13-1 to 13-4 Crossbar interface 14-1, 14-2 Bypass route 50, 50-1 to 50-6 Node

Claims (8)

A first computing node that transmits a packet based on a result of the first computation;
A first analysis unit connected to the first calculation node and analyzing a header included in a packet from the first calculation node;
Connected to the first analysis unit and outputs a first request, and a packet from the first computing node is input to a first buffer until a first permission for the output first request is input. And holding the first permission, based on the header analysis result by the first analysis unit, based on the packet from the first calculation node held in the first buffer, A first transmitter for transmitting one packet and a second packet;
Based on the first request input from the first transmitter and connected to the first transmitter, the first permission is output, and the first packet from the first transmitter is A crossbar switch that receives and switches the path of the received first packet;
A second receiver connected to the crossbar switch and the first transmitter for receiving in parallel the first packet from the crossbar switch and the second packet from the first transmitter;
An information processing apparatus having a second calculation node that performs calculation based on the first packet and the second packet received from the connected second receiving unit.   The information processing apparatus according to claim 1, wherein the second reception unit receives a first packet from the crossbar switch and a second packet from the first transmission unit simultaneously. The second calculation node further transmits a packet based on the result of the second calculation,
The information processing apparatus is further connected to the second calculation node and analyzes a header included in a packet from the second calculation node;
The second analysis unit is connected to the second analysis unit and outputs a second request, and a packet from the second calculation node is input to a second buffer until a second permission for the output second request is input. And holding the second permission, based on the header analysis result by the second analysis unit, based on the packet from the second calculation node held in the second buffer, A second transmitter for transmitting the third packet and the fourth packet;
Based on the second request input from the second transmitter, the second permission is output, the third packet from the second transmitter is received, and the received third packet The first reception is connected to the crossbar switch for switching the route and the second transmission unit, and receives the third packet from the crossbar switch and the fourth packet from the second transmission unit in parallel. And
The information processing apparatus according to claim 1, wherein the first calculation node further performs calculation based on a third packet and a fourth packet received from the connected first reception unit.   The information processing apparatus according to claim 3, wherein the first reception unit receives a third packet from the crossbar switch and a fourth packet from the second transmission unit simultaneously. In the control method of the information processing apparatus,
The first calculation node of the information processing apparatus transmits a packet based on the result of the first calculation,
The information processing apparatus having a first analysis unit connected to the first computing node analyzes the previous SL header included in the packet from the first computing node,
A first transmission unit connected to the first analysis unit included in the information processing apparatus outputs a first request,
The crossbar switch connected to the first transmission unit of the information processing device outputs a first permission based on the first request input from the first transmission unit,
The first transmission unit holds the packet from the first computing node in a first buffer until the first permission for the output first request is input, and the first permission is granted. When input, the first packet and the second packet are determined based on the packet from the first calculation node held in the first buffer according to the header analysis result by the first analysis unit. Send
The crossbar switch receives the first packet from the first transmitter, and switches the path of the received first packet;
A second reception unit connected to the crossbar switch and the first transmission unit included in the information processing apparatus includes a first packet from the crossbar switch and a second packet from the first transmission unit. Receive packets in parallel,
A control method for an information processing apparatus, in which a second calculation node included in the information processing apparatus performs a calculation based on a first packet and a second packet received from the connected second reception unit.   The method according to claim 5, wherein the second reception unit receives the first packet from the crossbar switch and the second packet from the first transmission unit at the same time. The second calculation node further transmits a packet based on the result of the second calculation,
A second analysis unit connected to the second calculation node of the information processing apparatus analyzes a header included in a packet from the second calculation node;
A second transmission unit connected to the second analysis unit of the information processing apparatus outputs a second request,
The crossbar switch outputs a second permission based on the second request input from the second transmitter;
The second transmission unit holds the packet from the second computing node in a second buffer until the second permission for the output second request is input, and the second permission is granted. When input, the third packet and the fourth packet are determined based on the packet from the second calculation node held in the second buffer according to the analysis result of the header by the second analysis unit. Send
The crossbar switch receives the third packet from the second transmitter, and switches the path of the received third packet;
A first reception unit of the information processing apparatus receives a third packet from the crossbar switch and a fourth packet from the second transmission unit in parallel;
7. The information processing apparatus control method according to claim 5, wherein the first calculation node further performs calculation based on the third packet and the fourth packet received from the connected first receiving unit. .   The control method of the information processing apparatus according to claim 7, wherein the first reception unit receives a third packet from the crossbar switch and a fourth packet from the second transmission unit simultaneously.

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