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JP5015671B2 - Probe card - Google Patents

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JP5015671B2
JP5015671B2 JP2007163232A JP2007163232A JP5015671B2 JP 5015671 B2 JP5015671 B2 JP 5015671B2 JP 2007163232 A JP2007163232 A JP 2007163232A JP 2007163232 A JP2007163232 A JP 2007163232A JP 5015671 B2 JP5015671 B2 JP 5015671B2
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probe
connection
board
connection terminals
circuit board
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JP2009002759A (en
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新一郎 古崎
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Japan Electronic Materials Corp
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Description

本発明は、半導体ウェハ上に高密度に集積されたチップデバイスの電気的特性の検査に使用されるプローブカードの構造及びそのプローブ基板の面平行度の保持方法に関するものである。   The present invention relates to a structure of a probe card used for inspecting electrical characteristics of chip devices integrated at high density on a semiconductor wafer, and a method for maintaining the plane parallelism of the probe substrate.

従来、半導体ウェハ上にあるチップデバイスの電気的特性の検査に使用されるプローブカードは、図2(a)に示すように、複数のテスタ接続端子4aが接続された回路基板4と、複数のプローブ2が装着されたプローブ基板3と、テスタ接続端子4aに接続された回路基板4の接続端子5aと各プローブ2に接続されたプローブ基板3の接続端子3aとを夫々電気的に接続するための弾性を有する中継接続ピン5群と、回路基板4の背面に装着されて機械的強度を補強する補強板7と、回路基板4及び補強板7とプローブ基板3を所定位置に保持する支持体8と支持ボルト9とから構成される。図2(b)(c)に示すように、回路基板4及びプローブ基板3の形状は所定の厚みを有する円形3−1又は方形3−2の平板である。また、中継接続ピン5群と対応する接続端子3a,5aは回路基板4及びプローブ基板3に対して平面的に秩序だって配置されている。回路基板4に固着された中継接続ピン5は弾性体であり、押圧力に比例して生ずる反力により回路基板4の中継接続ピン5の先端部と対応するプローブ基板3の接続端子3aとを圧接して電気的接続が確保される。   2. Description of the Related Art Conventionally, as shown in FIG. 2 (a), a probe card used for inspection of electrical characteristics of a chip device on a semiconductor wafer includes a circuit board 4 to which a plurality of tester connection terminals 4a are connected, and a plurality of In order to electrically connect the probe board 3 to which the probe 2 is mounted, the connection terminal 5a of the circuit board 4 connected to the tester connection terminal 4a, and the connection terminal 3a of the probe board 3 connected to each probe 2. Relay connecting pins 5 having elasticity, a reinforcing plate 7 attached to the back surface of the circuit board 4 to reinforce mechanical strength, and a support body for holding the circuit board 4, the reinforcing plate 7, and the probe board 3 in a predetermined position. 8 and a support bolt 9. As shown in FIGS. 2B and 2C, the circuit board 4 and the probe board 3 are circular 3-1 or square 3-2 flat plates having a predetermined thickness. Further, the connection terminals 3 a and 5 a corresponding to the group of relay connection pins 5 are arranged in an orderly manner with respect to the circuit board 4 and the probe board 3. The relay connection pin 5 fixed to the circuit board 4 is an elastic body, and the tip of the relay connection pin 5 of the circuit board 4 and the corresponding connection terminal 3a of the probe board 3 are connected by a reaction force proportional to the pressing force. The electrical connection is ensured by pressure welding.

こういう構造を採用したプローブカードの先行技術が開示されている(文献1)。この先行技術は、夫々二つのアームを有する構造のプローブと接続子(中継接続ピンに相当)を採用することにより、プローブと被検査体であるチップデバイスとを押圧したときに、配線基板のような支持基板に伝達させる力を低減できるというものである。
特開2004−340617号公報(〔0005〜6〕、〔0011〜13〕、図18)
Prior art of a probe card employing such a structure is disclosed (Reference 1). This prior art employs a probe and a connector (corresponding to a relay connection pin) each having a structure having two arms, so that when the probe and the chip device which is an object to be inspected are pressed, It is possible to reduce the force transmitted to the support substrate.
Japanese Patent Laying-Open No. 2004-340617 ([0005-6], [0011-13], FIG. 18)

このプローブカードでは、弾性を持つ中継接続ピンを押圧することによる反力で対応する接続端子を電気的に接続する構造であって、複数の中継接続ピンの反力の合計荷重により、プローブ基板にたわみが生じ、そのままの構造では所望の製品を作ることが困難であるという問題があった。これらの問題点を以下に詳述する。   This probe card has a structure in which corresponding connection terminals are electrically connected by a reaction force generated by pressing an elastic relay connection pin, and is applied to the probe board by a total load of reaction forces of a plurality of relay connection pins. Deflection occurred, and there was a problem that it was difficult to produce a desired product with the structure as it was. These problems are described in detail below.

この中継接続ピンは回路基板とプローブ基板との間に配置され、かつ、押圧力により両基板の電気的接続を確保する必要があるので、両基板には夫々垂直な方向に面荷重が作用する(図3のγ)。この面荷重に対して回路基板は背面に補強板を配設しているから十分対抗できるが、一方のプローブ基板は周辺部を支持体で単純支持された円板又は平板であるので、プローブ基板の中央部が大きくたわむ(図3のβライン)。その結果、プローブ基板に固着されているプローブ群の先端部が構成する面平行度(図3のαライン)を損なう問題が発生する。この図3に示すように、この変形は周辺を単純支持された円板又は平板が一様な面荷重を受けた場合のたわみ発生という力学的現象である。周辺を単純支持された円形の最大たわみWmaxと最大応力のσmaxは円板中央に発生し、数式1で与えられる。(参考文献:日本機械学会編「機械工学便覧」1984年)   This relay connection pin is arranged between the circuit board and the probe board, and it is necessary to ensure the electrical connection between the two boards by the pressing force, so that a surface load acts on each of the boards in the vertical direction. (Γ in FIG. 3). The circuit board can sufficiently counter this surface load because the reinforcing plate is provided on the back side, but one probe board is a disk or flat plate whose peripheral part is simply supported by a support. The central portion of the wire is greatly bent (β line in FIG. 3). As a result, there arises a problem of impairing the plane parallelism (α line in FIG. 3) formed by the tip of the probe group fixed to the probe substrate. As shown in FIG. 3, this deformation is a mechanical phenomenon of occurrence of deflection when a disk or flat plate simply supported at the periphery receives a uniform surface load. The maximum deflection Wmax of the circle simply supported at the periphery and σmax of the maximum stress occur at the center of the disk and are given by Equation 1. (Reference: Mechanical Engineering Handbook edited by the Japan Society of Mechanical Engineers, 1984)

Figure 0005015671
Figure 0005015671

この数式において、板の厚さがh、円形平板の直径が2a、単位当たりの荷重がp、板材料の縦弾性係数がE,そのポアソン比がνでそれぞれ表わされ、例えば、板厚4mm、直径300mm、縦弾性係数300GPa、ポアソン比0.25、面分布荷重1.55gf/mmで試算すると、円板の中央のたわみは300μm、最大応力は26MPaに達する。この物性値は強度の高いセラミック材に相当し、この面分布荷重密度は荷重10gfの中継接続ピンを2.54mmピッチで等間隔に配置することに相当する。このたわみはプローブ基板の面平行度を著しく損ない、プローブ群の先端面の平行度が保持できなくなるので、結果として平面度が保持された半導体ウエハ上に形成されたチップデバイスの電極に高精度に接触することができなくなる。 In this formula, the thickness of the plate is h, the diameter of the circular plate is 2a, the load per unit is p, the longitudinal elastic modulus of the plate material is E, and its Poisson's ratio is ν. When the diameter is 300 mm, the longitudinal elastic modulus is 300 GPa, the Poisson's ratio is 0.25, and the surface distribution load is 1.55 gf / mm 2 , the deflection at the center of the disk reaches 300 μm and the maximum stress reaches 26 MPa. This physical property value corresponds to a high-strength ceramic material, and this surface distribution load density corresponds to disposing relay connection pins with a load of 10 gf at equal intervals of 2.54 mm. This deflection significantly impairs the surface parallelism of the probe substrate, and the parallelism of the tip surface of the probe group cannot be maintained. As a result, the electrode of the chip device formed on the semiconductor wafer having the flatness is highly accurate. It becomes impossible to contact.

実際には、面分布荷重によりプローブ基板が変形すると、その変形量に応じて中継接続ピンによる荷重も幾分小さくなり、ピン荷重とプローブ基板の変形による反力が均衡する点に実際の変形は収まるので、プローブ基板の実際の変形量は前述の計算値より幾分小さくなるが、プローブ基板が変形して面平行度を劣化させるという問題は残る。また、プローブ基板の変形により中央部において中継接続ピンの荷重が小さくなると、その分だけ電気的接触の不安定さが残るので、これを回避するために中継接続ピンの荷重を増やさざるをえなくなる。このことはプローブ基板に荷重を増加させることになり、より面平行度が劣化したプローブカードを組み立てることになる問題がある。前述の先行技術においてもこの根本的問題をはらんでいる。   Actually, when the probe board is deformed by the surface distribution load, the load due to the relay connection pin is somewhat reduced according to the amount of deformation, and the actual deformation is that the pin load and the reaction force due to the deformation of the probe board are balanced. Therefore, although the actual deformation amount of the probe substrate is somewhat smaller than the above-mentioned calculated value, the problem remains that the probe substrate is deformed to deteriorate the plane parallelism. In addition, if the load of the relay connection pin is reduced in the center due to deformation of the probe board, the instability of the electrical contact remains correspondingly, so the load of the relay connection pin must be increased to avoid this. . This increases the load on the probe substrate, and there is a problem of assembling a probe card having a further deteriorated plane parallelism. The above-described prior art also has this fundamental problem.

本発明は、上記事情に鑑みて、これらの問題を解決するために成したものであって、半導体ウェハ上に高密度に集積されたチップデバイスの電気的特性の検査に使用するプローブカードにおいて、プローブ群先端部の面平行度を良好に維持できるプローブカード及びそのプローブ基板の面平行度の保持方法を提供するものである。   In view of the above circumstances, the present invention was made to solve these problems, and in a probe card used for inspection of electrical characteristics of chip devices integrated on a semiconductor wafer at a high density, The present invention provides a probe card that can favorably maintain the surface parallelism of the probe group tip and a method for maintaining the surface parallelism of the probe substrate.

前記の目的を達成するために、請求項1のプローブカードの発明は、複数のテスタ接続端子を上面に配設すると共に該テスタ接続端子に個々に接続された第1の接続端子群を下面に配設した回路基板と、該第1の接続端子に個々に対応した第2の接続端子群を上面に配設すると共に該第2の接続端子に個々に接続された複数のプローブを下面に配設したプローブ基板と、該第1の接続端子に個々に取り付けられると共に該第2の接続端子に弾性的に接触して電気的に接続する複数の弾力性のある中継接続ピンと、該プローブ基板の周縁部を支持する支持体と、該支持体と回路基板及び補強板とを結合する支持ボルトと、から構成されるプローブカードにおいて、前記複数の中継接続ピンと夫々対応する第1の接続端子と第2の接続端子を回路基板とプローブ基板の各平面に対して周辺部を密に、かつ、中央部を疎に配設することを特徴とする。   To achieve the above object, the invention of the probe card according to claim 1 is provided with a plurality of tester connection terminals on the upper surface and a first connection terminal group individually connected to the tester connection terminals on the lower surface. A circuit board and a second connection terminal group corresponding to each of the first connection terminals are disposed on the upper surface, and a plurality of probes individually connected to the second connection terminals are disposed on the lower surface. A plurality of resilient relay connection pins that are individually attached to the first connection terminals and elastically contact with and electrically connect to the second connection terminals; and In a probe card comprising a support body that supports a peripheral portion, and a support bolt that connects the support body to a circuit board and a reinforcing plate, a first connection terminal and a first connection terminal respectively corresponding to the plurality of relay connection pins Circuit with 2 connection terminals Intimately periphery for each plane of the plate and the probe substrate, and is characterized in that arranged sparsely central portion.

また、請求項のプローブカードの発明は、複数のテスタ接続端子を上面に配設すると共に該テスタ接続端子に個々に接続された第1の接続端子群を下面に配設した回路基板と、該第1の接続端子に個々に対応した第2の接続端子群を上面に配設すると共に該第2の接続端子に個々に接続された複数のプローブを下面に配設したプローブ基板と、該第2の接続端子に個々に取り付けられると共に該第1の接続端子に弾性的に接触して電気的に接続する複数の弾力性のある中継接続ピンと、該プローブ基板の周縁部を支持する支持体と、該支持体と回路基板及び補強板とを結合する支持ボルトと、から構成されるプローブカードにおいて、前記複数の中継接続ピンと夫々対応する第1の接続端子と第2の接続端子を回路基板とプローブ基板の各平面に対して周辺部を密に、かつ、中央部を疎に配設することを特徴とする。 Further, the invention of the probe card according to claim 1 includes a circuit board in which a plurality of tester connection terminals are disposed on the upper surface and a first connection terminal group individually connected to the tester connection terminals is disposed on the lower surface, A probe board in which a second connection terminal group corresponding to each of the first connection terminals is disposed on the upper surface, and a plurality of probes individually connected to the second connection terminals are disposed on the lower surface; A plurality of resilient relay connection pins that are individually attached to the second connection terminals and that are elastically contacted and electrically connected to the first connection terminals, and a support that supports the peripheral edge of the probe board And a support bolt for coupling the support and the circuit board and the reinforcing plate, the circuit board includes a first connection terminal and a second connection terminal respectively corresponding to the plurality of relay connection pins. And probe board Intimately periphery to the plane, and characterized in that arranged sparsely central portion.

また、プローブカードの発明は、請求項1のプローブカードにおいて、前記回路基板及びプローブ基板が円形又は方形の平板である。 The invention of the present probe card, the probe card according to claim 1, wherein the circuit board and the probe substrate Ru flat der circular or rectangular.

第1又は第2の接続端子に固着された複数の中継接続ピンが第2又は第1の接続端子を圧接して電気的接続を確保するために、回路基板及び補強板に支持体によって取り付けられたプローブ基板の移動により弾性体である中継接続ピン群に適度の変形を加えて、その押圧量に比例した反力による圧接力で電気的接続が達成される。この際に、中継接続ピンと対応する第1又は第2の接続端子とをプローブ基板及び回路基板の周辺部に密に、中央部を疎に配設することにより、中継接続ピンのプローブ基板への面分布荷重を周辺部より中央部をより小さくするで、プローブ基板の中央部のたわみを少なくすることができる。例えば、プローブ基板上の第2の接続端子間の配列ピッチを中央部で周辺部に比し2倍の配列ピッチを以って前記接続端子を配設すると、中央部における面分布荷重の大きさは周辺部の面分布荷重の1/4と小さくなる。これにより、プローブ基板下面に配設されたプローブ群の先端部が構成する面平行度を維持できるから、半導体ウェハ上に形成された高精度の平面度をもつデバイスの検査時にプローブ先端部とチップデバイスの電極との接触が確実に行え、正確な測定を可能にする。     A plurality of relay connection pins fixed to the first or second connection terminal are attached to the circuit board and the reinforcing plate by a support to press-contact the second or first connection terminal to ensure electrical connection. As a result of the movement of the probe substrate, the relay connection pin group, which is an elastic body, is moderately deformed, and electrical connection is achieved by a pressure contact force caused by a reaction force proportional to the pressing amount. At this time, the relay connection pins and the corresponding first or second connection terminals are densely arranged on the periphery of the probe board and the circuit board, and the center part is sparsely arranged, so that the relay connection pins are connected to the probe board. By making the surface distribution load smaller in the central portion than in the peripheral portion, the deflection of the central portion of the probe substrate can be reduced. For example, when the connection terminals are arranged with an arrangement pitch between the second connection terminals on the probe substrate at the center portion that is twice as large as that of the peripheral portion, the magnitude of the surface distribution load at the center portion Becomes as small as 1/4 of the surface distribution load of the peripheral portion. As a result, the plane parallelism formed by the tips of the probe groups arranged on the lower surface of the probe substrate can be maintained, so that the tip of the probe and the tip can be used when inspecting a device having a high degree of flatness formed on a semiconductor wafer. Contact with the electrodes of the device can be made reliably and accurate measurement is possible.

また、プローブ基板の面平行度の保持方法は、複数のテスタ接続端子を上面に配設すると共に該テスタ接続端子に個々に接続された第1の接続端子群を下面に配設した回路基板と、該第1の接続端子に個々に対応した第2の接続端子群を上面に配設すると共に該第2の接続端子に個々に接続された複数のプローブを下面に配設したプローブ基板と、該第1の接続端子に個々に取り付けられると共に該第2の接続端子に弾性的に接触して電気的に接続する複数の弾力性のある中継接続ピンと、該プローブ基板の周縁部を支持する支持体と、該支持体と回路基板及び補強板とを結合する支持ボルトと、からなるプローブカードにおいて、前記プローブ基板の面平行度の保持方法であって、前記複数の中継接続ピンと夫々対応する第1の接続端子と第2の接続端子を回路基板とプローブ基板の各平面に対して周辺部を密に、かつ、中央部を疎に配設して、複数の中継接続ピンがプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させることによりプローブ基板の面平行度を維持する。 Further, method of holding the plane parallelism of the probe substrate is a circuit board which is disposed a first connecting terminal groups, which are individually connected to the tester connection terminals on the lower surface as well as arranging a plurality of tester connection terminals on the upper surface A probe board having a plurality of probes connected individually to the second connection terminals on the lower surface, and a second connection terminal group individually corresponding to the first connection terminals; A plurality of resilient relay connection pins individually attached to the first connection terminals and elastically contacting and electrically connecting to the second connection terminals, and supporting a peripheral portion of the probe board A probe card comprising: a support body; and a support bolt that couples the support body to the circuit board and the reinforcing plate. First connection terminal The second connection terminals are arranged with a dense peripheral portion and a sparse central portion with respect to each plane of the circuit board and the probe board, and the surface distribution load density brought about by the plurality of relay connection pins on the probe board is reduced. keep the plane parallelism of the probe substrate by reducing the perimeter stepwise or continuously toward the center portion.

また、プローブ基板の面平行度の保持方法は、複数のテスタ接続端子を上面に配設すると共に該テスタ接続端子に個々に接続された第1の接続端子群を下面に配設した回路基板と、該第1の接続端子に個々に対応した第2の接続端子群を上面に配設すると共に該第2の接続端子に個々に接続された複数のプローブを下面に配設したプローブ基板と、該第2の接続端子に個々に取り付けられると共に該第1の接続端子に弾性的に接触して電気的に接続する複数の弾力性のある中継接続ピンと、該プローブ基板の周縁部を支持する支持体と、該支持体と回路基板及び補強板とを結合する支持ボルトと、からなるプローブカードにおいて、前記プローブ基板の面平行度の保持方法であって、前記複数の中継接続ピンと夫々対応する第1の接続端子と第2の接続端子を回路基板とプローブ基板の各平面に対して周辺部を密に、かつ、中央部を疎に配設して、複数の中継接続ピンがプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させることによりプローブ基板の面平行度を維持する。 Further, method of holding the plane parallelism of the probe substrate is a circuit board which is disposed a first connecting terminal groups, which are individually connected to the tester connection terminals on the lower surface as well as arranging a plurality of tester connection terminals on the upper surface A probe board having a plurality of probes connected individually to the second connection terminals on the lower surface, and a second connection terminal group individually corresponding to the first connection terminals; A plurality of resilient relay connection pins individually attached to the second connection terminals and elastically contacting and electrically connecting to the first connection terminals, and supporting a peripheral edge of the probe board A probe card comprising: a support body; and support bolts that connect the support body to the circuit board and the reinforcing plate. The probe card is a method for maintaining the surface parallelism of the probe board, and corresponds to each of the plurality of relay connection pins. First connection terminal The second connection terminals are arranged with a dense peripheral portion and a sparse central portion with respect to each plane of the circuit board and the probe board, and the surface distribution load density brought about by the plurality of relay connection pins on the probe board is reduced. keep the plane parallelism of the probe substrate by reducing the perimeter stepwise or continuously toward the center portion.

また、プローブ基板の面平行度の保持方法は、プローブ基板の面平行度の保持方法において、前記プローブ基板と対応する回路基板が円形又は方形の平板である。 Further, method of holding the plane parallelism of the probe substrate, the method of holding the plane parallelism of the probe substrate, the circuit board corresponding to the probe substrate Ru flat der circular or rectangular.

チップデバイスの検査時にプローブ先端とチップデバイスの電極との接触を確実にし、正確な測定を可能にするためには、中継接続ピン群の押圧力が負荷されているプローブ基板の面平行度を維持することが、プローブ基板のプローブ群先端部が構成する面平行度を保持することに繋がり重要である。前記中継接続ピン群による押圧力はプローブ基板と回路基板に夫々負荷されるが、回路基板は背面にある補強板で補強され、寸法的にも余裕が取れるので、たわみを生じないような構造にすることが可能であるが、これに反してプローブ基板は寸法的制約もあり、たわみに対する強度を大きくすることが難しい。また、円形又は方形形状であるプローブ基板は、周縁部を支持体により下支えに担持される構造であるから、周縁部の剛性が高い。この状況下でプローブ基板の面平行度を保持する方法として、中継接続ピン群がプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させる方法で面平行度の維持が達成可能で、具体的にはプローブ基板への押圧点を構成する中継接続ピン群と圧接する又は固着する第2の接続端子群の配置を、プローブ基板の周辺部は密に、中央部は疎に配設する方法である。   To ensure contact between the tip of the probe and the electrode of the chip device when inspecting the chip device, and to enable accurate measurement, the surface parallelism of the probe substrate loaded with the pressing force of the relay connection pins is maintained. This is important because it leads to maintaining the parallelism of the probe group tip of the probe substrate. The pressing force by the relay connecting pin group is loaded on the probe board and the circuit board, respectively, but the circuit board is reinforced by the reinforcing plate on the back surface, and there is a dimensional margin, so that the structure does not cause deflection. However, on the other hand, the probe substrate also has dimensional constraints, and it is difficult to increase the strength against bending. In addition, since the probe substrate having a circular shape or a square shape has a structure in which the peripheral portion is supported on the lower support by the support, the peripheral portion has high rigidity. As a method of maintaining the surface parallelism of the probe board under this situation, the surface parallelism can be reduced in a stepwise or continuous manner from the peripheral part to the central part by reducing the surface distribution load density that the relay connection pin group brings to the probe board. The arrangement of the second connection terminal group that can be maintained, specifically, press-contacts or adheres to the relay connection pin group that constitutes the pressing point to the probe board, the probe board has a peripheral part densely arranged in the center part Is a sparse arrangement method.

本発明による請求項1の構成のプローブカードによれば、中継接続ピン及び対応する接続端子の配置をプローブ基板の周辺部に密に、中央部を疎にすることにより、プローブ基板の中央部にかかる面分布荷重を周辺部に比べてより小さくすることで、プローブ基板の中央部のたわみを少なくできるので、プローブ基板下面に配設されたプローブ群の先端部が構成する面平行度を維持できる。これにより、チップデバイスの検査時にプローブ先端とチップデバイスの電極との接触が確実に行え、半導体ウェハの検査を的確に行うことができる。 According to the probe card of the configuration of the first aspect of the present invention, the arrangement of the relay connection pins and the corresponding connection terminals is arranged close to the peripheral part of the probe board and the central part is made sparse so that the central part of the probe board is arranged. By making the surface distribution load smaller than the peripheral portion, the deflection of the central portion of the probe substrate can be reduced, so that the surface parallelism formed by the tip portion of the probe group disposed on the lower surface of the probe substrate can be maintained. . Thereby, the contact between the probe tip and the electrode of the chip device can be reliably performed during the inspection of the chip device, and the semiconductor wafer can be inspected accurately.

本発明のプローブ基板の面平行度の保持方法によれば、中継接続ピン群がプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させる方法により、即ちプローブ基板への押圧点を構成する中継接続ピン群と圧接する又は固着する第2の接続端子群の配置を、プローブ基板の周辺部は密に、中央部は疎に配設する簡易な方法により、プローブ基板の中央部のたわみを少なくできるので、プローブ基板下面に配設されたプローブ群の先端部が構成する面平行度を保持できる。これにより、チップデバイスの検査時にプローブ先端とチップデバイスの電極との接触が確実に行え、半導体ウェハの検査を的確に行うことができる。 According to the method the holding surface parallelism of the onset Ming probe substrate, the method relay connection pin group reduces stepwise or continuously toward the center portion from the peripheral portion of the surface distributed load density to bring the probe substrate, i.e. the probe The arrangement of the second connection terminal group that is in pressure contact with or fixed to the relay connection pin group that constitutes the pressing point to the board, by a simple method in which the peripheral part of the probe board is densely arranged and the central part is sparsely arranged, Since the deflection of the central portion of the probe substrate can be reduced, the plane parallelism formed by the tip portion of the probe group disposed on the lower surface of the probe substrate can be maintained. Thereby, the contact between the probe tip and the electrode of the chip device can be reliably performed during the inspection of the chip device, and the semiconductor wafer can be inspected accurately.

以下、本発明の実施形態を図面に基いて説明する。図1は、本発明に係わるプローブカードの実施形態であって、aはプローブカードの模式的断面図、bはaにおける円形プローブ基板の接続端子の模式的平面配置図、cはaにおける方形プローブ基板の接続端子の模式的平面配置図である。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an embodiment of a probe card according to the present invention, in which a is a schematic sectional view of the probe card, b is a schematic plan view of connection terminals of a circular probe substrate in a, and c is a rectangular probe in a. It is a typical plane arrangement view of a connection terminal of a substrate.

図1(a)、(b)、(c)を用いて、本発明の実施の形態であるプローブカード1について説明すると、プローブカード1は、複数のテスタ接続端子4aを上面に配設すると共にテスタ接続端子4aに個々に接続された接続端子5a群を下面に配設した回路基板4と、接続端子5aに個々に対応した接続端子3a群を上面に配設すると共に接続端子3aに個々に接続された複数のプローブ2を下面に配設したプローブ基板3と、回路基板4の接続端子5aに根元を固着して片持ち梁状に配設された弾性を有する中継接続ピン5群と、回路基板4の背面に密着して機械的強度を補強する補強板7と、回路基板4及び補強板7とプローブ基板3を所定位置に保持する支持体8と支持ボルト9とから構成される。   The probe card 1 according to the embodiment of the present invention will be described with reference to FIGS. 1A, 1B, and 1C. The probe card 1 has a plurality of tester connection terminals 4a disposed on the upper surface. A circuit board 4 having a group of connection terminals 5a individually connected to the tester connection terminal 4a arranged on the lower surface, and a group of connection terminals 3a corresponding to the connection terminals 5a arranged on the upper surface and individually connected to the connection terminals 3a. A probe board 3 in which a plurality of connected probes 2 are arranged on the lower surface; and a group of relay connection pins 5 having elasticity arranged in a cantilever shape with a root fixed to the connection terminal 5a of the circuit board 4; The reinforcing plate 7 is in close contact with the back surface of the circuit board 4 and reinforces the mechanical strength. The circuit board 4, the reinforcing plate 7, and the support body 8 that holds the probe board 3 in a predetermined position and the support bolt 9 are included.

このプローブ基板3及び回路基板4の形状は所定の厚みを有する円形又は方形の平板である。また、前記基板3及び4は、合成樹脂製のプリント板であって、プローブ基板3では、上面にある各接続端子3aと下面の対応するプローブ接続端子3bとをプリント配線で内部接続し、一方の回路基板4でも各テスタ接続端子4aと下面の対応する接続端子5aとをプリント配線で内部接続している。円形又は方形のプローブ基板3の下面全体に、被測定物である半導体チップデバイスの電極パッドに対応するプローブ2が秩序立って配設される。これらのプローブ2は、プローブ基板3のプローブ接続端子3bに固着されて、片持ち梁状にプローブ2本体を保持して、その先にチップデバイスの電極パッド(図示しない)と接触可能な針先を有する。このプローブ2の線径は、チップデバイスの規模にもよるが、20〜200μmの範囲であり、プローブ数も数百から数万本に達する規模である。プローブ2の材料としては、通常、ニッケル合金、パラヂウム合金、ベリリウム銅合金、タングステン合金等から選択された一種類の合金が用いられる。   The probe board 3 and the circuit board 4 are circular or square flat plates having a predetermined thickness. The substrates 3 and 4 are synthetic resin printed boards. In the probe substrate 3, the connection terminals 3a on the upper surface and the corresponding probe connection terminals 3b on the lower surface are internally connected by printed wiring, Also in the circuit board 4, each tester connection terminal 4a and a corresponding connection terminal 5a on the lower surface are internally connected by printed wiring. Probes 2 corresponding to electrode pads of a semiconductor chip device, which is an object to be measured, are arranged in an orderly manner on the entire lower surface of a circular or square probe substrate 3. These probes 2 are fixed to the probe connection terminals 3b of the probe substrate 3, hold the probe 2 body in a cantilever shape, and can be contacted with an electrode pad (not shown) of the chip device on the tip thereof. Have The wire diameter of the probe 2 is in the range of 20 to 200 μm depending on the scale of the chip device, and the number of probes is on the scale of several hundred to several tens of thousands. As the material of the probe 2, one kind of alloy selected from nickel alloy, palladium alloy, beryllium copper alloy, tungsten alloy and the like is usually used.

また、補強板7は、基板6の平面度を維持するための背面を補強するために用いられる。この場合、強度が高い金属製を用い、耐熱性、耐候性、耐汚染性及び被加工性の点からステンレス鋼又はアルミニウムを用いることが望ましい。また、プローブ基板3と回路基板4の上下の間隔を調節して電気的接続を保持する中継接続ピン5の押圧力を最適に調整するために、プローブ基板3周縁部の端面下部を下支えに単純支持する金属製の支持体8が設けられ、該支持体8は補強板7及び回路基板4を貫通した支持ボルト9により位置調節することができる。   Further, the reinforcing plate 7 is used to reinforce the back surface for maintaining the flatness of the substrate 6. In this case, it is desirable to use a metal having high strength and to use stainless steel or aluminum from the viewpoint of heat resistance, weather resistance, contamination resistance and workability. Further, in order to optimally adjust the pressing force of the relay connection pin 5 that holds the electrical connection by adjusting the vertical distance between the probe board 3 and the circuit board 4, the lower end surface of the peripheral edge of the probe board 3 is simply supported. A metal support 8 to be supported is provided, and the position of the support 8 can be adjusted by a support bolt 9 penetrating the reinforcing plate 7 and the circuit board 4.

回路基板4に固着された中継接続ピン5は弾性体であり、押圧力に比例して生ずる反力により回路基板4の中継接続ピン5の先端部と、対応するプローブ基板3の接続端子3aを圧接して電気的接続が確保される。中継接続ピン5の形状は、弾性材料が圧縮に伴う押圧力により反力が生ずると共に、中継接続ピン5の固着された根元である接続端子5aと対応する接続端子3aとの水平方向の位置関係がずれなくする形状が求められるから、中継接続ピン5は片持ち梁状のカンチレバー型かコイルバネ型等がよく、製作容易の点でカンチレバー型がよい。また、中継接続ピン5の材料は、弾性があり、電気伝導性が良好な材料が望ましく、燐系銅合金、ベリリウム系銅合金、ニッケル合金等が用いられる。   The relay connection pin 5 fixed to the circuit board 4 is an elastic body, and the tip of the relay connection pin 5 of the circuit board 4 and the corresponding connection terminal 3a of the probe board 3 are connected by a reaction force proportional to the pressing force. The electrical connection is ensured by pressure welding. The shape of the relay connection pin 5 is such that a reaction force is generated by the pressing force accompanying the compression of the elastic material, and the horizontal positional relationship between the connection terminal 5a that is the root to which the relay connection pin 5 is fixed and the corresponding connection terminal 3a. Therefore, the cantilever type cantilever type or the coil spring type is preferable, and the cantilever type is preferable in terms of easy manufacture. The material of the relay connection pin 5 is preferably a material having elasticity and good electrical conductivity, and a phosphorous copper alloy, a beryllium copper alloy, a nickel alloy, or the like is used.

中継接続ピン5と対応するプローブ基板3の接続端子3aの配置は、図1(b)に示すように、円形平板のプローブ基板3−1では、接続端子3a群が略同心円状に、周辺部における隣り合う接続端子3aの配列ピッチ(間隔)p1が、中央部における隣り合う接続端子3aの配列ピッチ(間隔)p2に比べて小さく配列されている。この場合の周辺部から中央部へ向かう接続端子3aの配列ピッチは段階的に又は連続的に変化させることができる。この接続端子3aの配列位置に基いて、中継接続ピン5と中継接続ピン5の根元を固着する回路基板4の接続端子5aが配列される。また、図1(c)に示すように、方形平板のプローブ基板3−2では、接続端子3a群が概略同心円の四隅を方形に整形した形状であって、周辺部における隣り合う接続端子3aの配列ピッチ(間隔)p1が、中央部における隣り合う接続端子3aの配列ピッチ(間隔)p2に比べて小さく配列されていて、周辺部から中央部へ向かう接続端子3aの配列ピッチは段階的に又は連続的に変化させることができる。この接続端子3aの配列位置に基いて、中継接続ピン5と中継接続ピン5の根元を固着する回路基板4の接続端子5aも配列される。例えば、プローブ基板3上の接続端子3aの中央部の配列ピッチp2を周辺部の配列ピッチp1に比し2倍のピッチで接続端子3aを配設すると、中央部における中継接続ピン5による面分布荷重の大きさは周辺部の面分布荷重の1/4と小さくなる。また、前述の配列例は、プローブ基板3上の接続端子3a群の周辺部から中心部に向けての個数分布が正規分布に近似しているともいえる。このようにプローブ基板3への押圧点を構成する中継接続ピン5群と圧接する接続端子3a群の配置を、プローブ基板3の周辺部は密に、中央部は疎に配設することにより、中継接続ピン5群がプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させることで、プローブ基板3の中央部のたわみが防止でき、プローブ基板3の面平行度を維持することができる。   As shown in FIG. 1B, the arrangement of the connection terminals 3a of the probe board 3 corresponding to the relay connection pins 5 is such that the connection terminal 3a group is substantially concentric in the circular flat plate probe board 3-1. The arrangement pitch (interval) p1 of the adjacent connection terminals 3a in FIG. 3 is smaller than the arrangement pitch (interval) p2 of the adjacent connection terminals 3a in the center. In this case, the arrangement pitch of the connection terminals 3a from the peripheral part to the central part can be changed stepwise or continuously. Based on the arrangement position of the connection terminals 3a, the connection terminals 5a of the circuit board 4 to which the roots of the relay connection pins 5 and the relay connection pins 5 are fixed are arranged. Further, as shown in FIG. 1C, in the rectangular flat probe board 3-2, the connection terminal 3a group has a shape in which the four corners of the substantially concentric circles are shaped into a square, and the adjacent connection terminals 3a in the peripheral portion are formed. The arrangement pitch (interval) p1 is smaller than the arrangement pitch (interval) p2 of the adjacent connection terminals 3a in the central part, and the arrangement pitch of the connection terminals 3a from the peripheral part to the central part is stepwise or Can be changed continuously. Based on the arrangement position of the connection terminals 3a, the connection terminals 5a of the circuit board 4 for fixing the roots of the relay connection pins 5 and the relay connection pins 5 are also arranged. For example, if the connection terminals 3a are arranged at a pitch twice as large as the arrangement pitch p2 at the center of the connection terminals 3a on the probe substrate 3 as compared to the arrangement pitch p1 at the periphery, the surface distribution by the relay connection pins 5 at the center. The magnitude of the load is reduced to 1/4 of the surface distribution load in the peripheral portion. Further, in the above-described arrangement example, it can be said that the number distribution from the peripheral part to the central part of the group of connection terminals 3a on the probe substrate 3 approximates a normal distribution. In this way, the arrangement of the connection terminal 3a group that press-contacts the relay connection pin 5 group that constitutes the pressing point to the probe substrate 3 is arranged so that the peripheral portion of the probe substrate 3 is dense and the central portion is sparse. By reducing the surface distribution load density brought about by the relay connection pins 5 to the probe board stepwise or continuously from the peripheral part to the central part, the deflection of the central part of the probe board 3 can be prevented, and the plane parallel of the probe board 3 can be prevented. The degree can be maintained.

また、本発明に係わるプローブカードの別の実施形態であるプローブカード1について、図1(a)、(b)、(c)と相違する点について説明すると、プローブカード1は、複数のテスタ接続端子4aを上面に配設すると共にテスタ接続端子4aに個々に接続された接続端子5a群を下面に配設した回路基板4と、接続端子5aに個々に対応した接続端子3a群を上面に配設すると共に接続端子3aに個々に接続された複数のプローブ2を下面に配設したプローブ基板3と、プローブ基板3の接続端子3aに根元を固着して片持ち梁状に配設された弾性を有する中継接続ピン5群と、回路基板4の背面に密着して機械的強度を補強する補強板7と、回路基板4及び補強板7とプローブ基板3を所定位置に保持する支持体8と支持ボルト9とから構成される。プローブ基板3に固着された中継接続ピン5は弾性体であり、押圧力に比例して生ずる反力によりプローブ基板3の中継接続ピン5の先端部が対応する回路基板4の接続端子5aを圧接して電気的接続が確保される。この際、押圧力による中継接続ピン5の片方の反力が中継接続ピン5を固着した接続端子3aにも負荷される。したがって、前述のように、プローブ基板3への押圧点を構成する中継接続ピン5群と固着する接続端子3a群の配置を、プローブ基板3の周辺部は密に、中央部は疎に配設することにより、中継接続ピン5群がプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させることで、プローブ基板3の中央部のたわみが防止でき、プローブ基板3の面平行度を維持することができる。   In addition, the probe card 1 which is another embodiment of the probe card according to the present invention will be described with respect to differences from FIGS. 1A, 1B, and 1C. The probe card 1 is connected to a plurality of testers. A circuit board 4 having terminals 4a arranged on the upper surface and connecting terminals 5a individually connected to the tester connection terminals 4a arranged on the lower surface, and connection terminals 3a corresponding to the connection terminals 5a individually arranged on the upper surface. And a probe substrate 3 having a plurality of probes 2 individually connected to the connection terminal 3a disposed on the lower surface thereof, and an elasticity disposed in a cantilever shape with the root fixed to the connection terminal 3a of the probe substrate 3. A relay connection pin 5 group having a reinforcing plate 7 that is in close contact with the back surface of the circuit board 4 and reinforces the mechanical strength, and a support body 8 that holds the circuit board 4, the reinforcement plate 7, and the probe board 3 in a predetermined position. Support bolt 9 Et al constructed. The relay connection pin 5 fixed to the probe board 3 is an elastic body, and the tip of the relay connection pin 5 of the probe board 3 presses the corresponding connection terminal 5a of the circuit board 4 by a reaction force proportional to the pressing force. Thus, electrical connection is ensured. At this time, one reaction force of the relay connection pin 5 due to the pressing force is also applied to the connection terminal 3a to which the relay connection pin 5 is fixed. Therefore, as described above, the arrangement of the connection terminal 3a group to be fixed to the group of relay connection pins 5 constituting the pressing point to the probe board 3 is arranged with the peripheral part of the probe board 3 being dense and the central part being sparse. By doing so, the surface distribution load density brought to the probe board by the relay connection pins 5 group can be reduced stepwise or continuously from the peripheral part to the central part, so that the deflection of the central part of the probe board 3 can be prevented. 3 plane parallelism can be maintained.

本発明に係わるプローブカード1の作用の特徴は、プローブ基板3への面分布荷重を構成する中継接続ピン5群と、圧接する又は固着する接続端子3a群の配置を、プローブ基板3の周辺部は密に、中央部は疎に配設することにより、中継接続ピン5群がプローブ基板にもたらす面分布荷重密度を周辺部から中央部にかけて段階的又は連続的に減少させることができ、ひいては、プローブ基板3の中央部のたわみを防止して、プローブ基板3の面平行度を維持することができる。これにより、プローブ基板下面に配設されたプローブ群の先端部が構成する面平行度を維持できるから、チップデバイスの検査時にプローブ先端部とチップデバイスの電極との接触が確実に行え、正確な測定を可能にする。また、チップデバイスの電極へのコンタクト時の機械的衝撃等が伴う試験環境下でも、検査時におけるプローブカードの電気的接続の信頼性を維持することができるので、良品の被検査物を不良品と判定してしまうような経済的損失を回避することができる。   The feature of the action of the probe card 1 according to the present invention is that the arrangement of the relay connection pins 5 constituting the surface distribution load on the probe substrate 3 and the connection terminals 3a which are pressed against or fixed to each other is arranged in the peripheral portion of the probe substrate 3. By arranging them densely and sparsely in the central part, the surface distribution load density brought to the probe board by the group of relay connection pins 5 can be reduced stepwise or continuously from the peripheral part to the central part. Deflection of the center portion of the probe substrate 3 can be prevented, and the surface parallelism of the probe substrate 3 can be maintained. As a result, the surface parallelism formed by the tips of the probe groups disposed on the lower surface of the probe substrate can be maintained, so that the tip of the probe and the electrode of the tip device can be reliably contacted when the tip device is inspected. Enable measurement. In addition, the reliability of the electrical connection of the probe card during inspection can be maintained even in a test environment that involves mechanical shocks when contacting the electrodes of the chip device. It is possible to avoid the economic loss that would be judged.

半導体ウェハにおいて、高集積化ICチップの電気的特性の検査に使用するプローブカードに利用することができる。   In a semiconductor wafer, it can be used for a probe card used for inspection of electrical characteristics of a highly integrated IC chip.

本発明に係わるプローブカードの実施形態であって、aはプローブカードの模式的断面図、bはaにおける円形プローブ基板の接続端子の模式的平面配置図、cはaにおける方形プローブ基板の接続端子の模式的平面配置図である。1 is a schematic cross-sectional view of a probe card, b is a schematic plan view of connection terminals of a circular probe board in a, and c is a connection terminal of a rectangular probe board in a. FIG. 従来のプローブカードであって、aはプローブカードの模式的断面図、bはaにおける円形プローブ基板の接続端子の模式的平面配置図、cはaにおける方形プローブ基板の接続端子の模式的平面配置図である。A conventional probe card, wherein a is a schematic cross-sectional view of the probe card, b is a schematic plan view of connection terminals of a circular probe board in a, and c is a schematic plan view of connection terminals of a rectangular probe board in a. FIG. 図2において、中継接続ピン群により押圧力が負荷された場合のプローブカードの模式的断面図である。FIG. 3 is a schematic cross-sectional view of the probe card when a pressing force is applied by the relay connection pin group in FIG. 2.

符号の説明Explanation of symbols

1:プローブカード 2:プローブ 3:プローブ基板
3−1:円形プローブ基板 3−2:方形プローブ基板
3a:接続端子 3b:プローブ接続端子 4:回路基板
4a:テスタ接続端子 5:中継接続ピン 5a:接続端子
7:補強板 8:支持体 9:支持ボルト
α:プローブ群の先端部ライン β:プローブ基板のたわみ γ:面分布荷重
p1:周辺部における接続端子の配列ピッチ
p2:中央部における接続端子の配列ピッチ
1: Probe card 2: Probe 3: Probe board 3-1: Circular probe board 3-2: Rectangular probe board 3a: Connection terminal 3b: Probe connection terminal 4: Circuit board 4a: Tester connection terminal 5: Relay connection pin 5a: Connection terminal 7: Reinforcement plate 8: Support body 9: Support bolt
α: tip line of the probe group β: deflection of the probe substrate γ: surface distribution load p1: arrangement pitch of connection terminals in the peripheral portion p2: arrangement pitch of connection terminals in the central portion

Claims (1)

複数のテスタ接続端子を上面に配設すると共に該テスタ接続端子に個々に接続された第1の接続端子群を下面に配設した回路基板と、該第1の接続端子に個々に対応した第2の接続端子群を上面に配設すると共に該第2の接続端子に個々に接続された複数のプローブを下面に配設したプローブ基板と、該第1の接続端子又は第2の接続端子に個々に取り付けられると共に該第2の接続端子又は第1の接続端子に弾性的に接触して電気的に接続する複数の弾力性のある中継接続ピンと、該プローブ基板の周縁部を支持する支持体と、該支持体と回路基板及び補強板とを結合する支持ボルトと、から構成されるプローブカードにおいて、前記複数の中継接続ピンと夫々対応する第1の接続端子と第2の接続端子を回路基板とプローブ基板の各平面に対して周辺部を密に、かつ、中央部を疎に配設することを特徴とするプローブカード。 A circuit board having a plurality of tester connection terminals disposed on the upper surface and a first connection terminal group individually connected to the tester connection terminals disposed on the lower surface, and a first corresponding to each of the first connection terminals. Two connection terminal groups on the upper surface and a plurality of probes individually connected to the second connection terminal on the lower surface, and the first connection terminal or the second connection terminal . A plurality of elastic relay connection pins that are individually attached and elastically contact and electrically connect to the second connection terminal or the first connection terminal , and a support that supports the peripheral portion of the probe board If the support bolt for coupling the said support and said circuit board and the reinforcing plate, the probe card consists of the plurality of relay connection pins and each corresponding said first connecting terminal and said second connecting terminal the circuit board and the probe group Probe card for dense peripheral portion, characterized in that arranged sparsely central portion with respect to each plane of the.
JP2007163232A 2007-06-21 2007-06-21 Probe card Expired - Fee Related JP5015671B2 (en)

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