JP4712361B2 - Method for manufacturing thin film transistor - Google Patents

Description

The present invention relates to a method for manufacturing a wiring, a method for manufacturing a thin film transistor, and a method for manufacturing a display device using a method capable of selectively forming a pattern. In particular, the present invention uses a droplet discharge method typified by an inkjet method as a method for selectively forming a pattern, and a display device having an active element such as a transistor formed over a large area glass substrate and a method for manufacturing the display device About. The present invention also relates to a wiring, a thin film transistor, and a display device which are formed using a method capable of selectively forming a pattern.

Conventionally, a so-called active matrix liquid crystal display panel composed of thin film transistors (hereinafter also referred to as “TFTs”) on a glass substrate is a light exposure process using a photomask, as in the manufacturing technology of a semiconductor integrated circuit. Thus, it has been manufactured by patterning various thin films.

Until now, a production technique has been adopted in which a plurality of liquid crystal display panels are cut out from a single mother glass substrate and mass production is efficiently performed. The size of the mother glass substrate was increased from 300 x 400 mm of the first generation in early 1990 to the fourth generation in 2000 and increased to 680 x 880 mm or 730 x 920 mm. Production technology has progressed so that

When the size of the glass substrate or the display panel is small, the patterning process can be performed relatively easily by the exposure apparatus. However, as the substrate size increases, the entire surface of the display panel can be obtained by a single exposure process. Cannot be processed simultaneously. As a result, a method has been developed in which a region coated with a photoresist is divided into a plurality of portions, an exposure process is performed for each predetermined block region, and the entire surface of the substrate is repeatedly exposed in order (for example, patents). Reference 1).
Japanese Patent Laid-Open No. 11-326951

In addition, droplet discharge technology has been used for printing characters and images, but attempts to apply it to pattern formation in the semiconductor field have begun. For example, there has been proposed a method for improving a method for forming a film pattern such as a conductive film wiring by a so-called ink jet method by discharging droplets to a predetermined film formation region (see Patent Document 1). According to Patent Document 1, when a film pattern is formed by an ink jet method, a forming method that achieves a thick film, satisfies the demand for thinning, and does not cause problems such as disconnection or short circuit when formed into a conductive film is disclosed. ing.
Japanese Patent Laid-Open No. 2003-136991

However, the size of the glass substrate has been further increased to 1000 × 1200 mm or 1100 × 1300 mm in the 5th generation, 1500 × 1800 mm in the 6th generation, 2000 × 2200 mm in the 7th generation, or more 6 tatami mats ( (2700 × 3600 mm) size is assumed, and it has become difficult to manufacture a display panel with high productivity and low cost by a process using only a conventional patterning method. That is, if exposure processing is performed many times by continuous exposure, the processing time increases, and it has become difficult to cope with an increase in the size of the substrate.

In addition, in the method of forming various coatings on the entire surface of the substrate and removing the etching while leaving a small area, the material cost is wasted and it is required to process a large amount of waste liquid including heavy metals. The problem was inherent.

Further, as described in Patent Document 2, as the wiring becomes thicker, the step of the thin film covering the wiring has become a problem. Further, according to the above document, the wiring width is about 50 μm, which is insufficient for the wiring width of the thin film transistor used in the current high-definition display device. Further, as wiring is miniaturized, signal delay due to wiring resistance has become a problem.

Accordingly, an object of the present invention is to provide a liquid crystal display device that can be manufactured by improving the material utilization efficiency and simplifying the manufacturing process, and a manufacturing technique thereof. Another object of the present invention is to provide means for thinning the wiring by a method different from that of the above-mentioned Patent Document 2, to prevent the thin film covering the wiring from being disconnected and to eliminate signal delay due to wiring resistance.

In view of the above problems, the present invention is characterized in that a conductive film is formed in an opening of an insulating film by a “method capable of selectively forming a pattern”, and the surface of the conductive film and the insulating film has flatness. To do.
That is, in the structure of the present invention, the conductive film is provided in contact with the side surface of the insulating film.
The opening can be expressed as having a concave portion based on the upper surface of the insulating film and a convex portion based on the lower surface of the insulating film. Having flatness means forming the insulating film so that the height of the insulating film is equal to the height of the conductive film, and includes a slight shift in the manufacturing process. In addition, the thin film formed so as to cover the conductive film and the insulating film may be flat enough to prevent disconnection. Therefore, the insulating film and the conductive film have substantially the same plane. Such a structure of the present invention can be expressed as a conductive film fitted into an insulating film.

According to the present invention, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

In a specific method for manufacturing a thin film transistor of the present invention, a conductive film is formed in a concave portion by forming a first insulating film having a concave portion and a convex portion, that is, an opening, and ejecting a droplet having a conductive film material. Then, a second insulating film is formed so as to cover the first insulating film and the conductive film, a semiconductor film is formed over the second insulating film, and the surfaces of the first insulating film and the conductive film are flattened. It is characterized by forming in.

In the above process, the width of the opening is 5 μm to 100 μm, and the height difference between the concave portion and the convex portion, that is, the depth of the opening is 1 μm to 10 μm.

For example, in the case of a bottom-gate thin film transistor in which a gate electrode is formed below a semiconductor film, an insulating film having a concave portion, a convex portion, and an opening is formed, and a droplet having a conductive film material is ejected, whereby the concave portion First and second gate electrodes are formed, an insulating film is formed, a gate insulating film is formed to cover the first and second gate electrodes, and first and second semiconductor films are formed on the gate insulating film. The gate insulating film and the first and second semiconductor films are simultaneously patterned to form the source electrode and the drain electrode on the first and second semiconductor films, respectively, and the source electrode formed on the first semiconductor film Alternatively, the drain electrode and the second gate electrode are connected, and the first insulating film and the surface of the gate electrode are formed to be flat.

In the above process, the width of the opening in the region where the gate electrode is formed is 5 μm to 20 μm, and the height difference between the concave and convex portions, that is, the depth of the opening is 1.5 μm to 2.5 μm. It is formed as follows.

In the present invention, the structure of the thin film transistor is not limited to the bottom gate type. In the case of a top-gate thin film transistor in which a gate electrode is formed over a semiconductor film, an insulating film having a recess and a protrusion, that is, an opening is formed, and a droplet having a conductive film material is ejected to the recess. A source electrode and a drain electrode are formed, an insulating film is formed to cover the insulating film, the source electrode, and the drain electrode, a semiconductor film is formed on the insulating film, and a gate electrode is formed on the semiconductor film through the gate insulating film In addition, the first insulating film, the source electrode, and the drain electrode are formed so as to have flat surfaces.

In the above process, the width of the opening in the region where the source electrode and the drain electrode are formed is 10 μm to 40 μm, and the height difference between the concave and convex portions, that is, the depth of the opening is 1.5 μm to 2. It is formed so that it may become 5 micrometers.

In the present invention, the amount of droplets ejecting droplets having a conductive film material is 0.1 pl to 40 pl.

Using the thin film transistor as described above, a display device typified by a television device, a mobile phone, and other electronic devices can be manufactured. The display device includes a light-emitting device having a light-emitting element or a liquid crystal display device having a liquid crystal element.

The structure of the thin film transistor of the present invention thus formed includes a conductive film provided so as to fit in the first insulating film, and a second insulating film provided so as to cover the first insulating film and the conductive film. The semiconductor device includes a film and a semiconductor film provided over the second insulating film, and the insulating film and the conductive film have substantially the same plane.

In addition, the thin film transistor of the present invention is provided so as to cover the first insulating film having a concave portion and a convex portion, that is, an opening, the conductive film provided in the concave portion, that is, the opening, and the first insulating film and the conductive film. The second insulating film and a semiconductor film provided on the second insulating film are provided, and the height of the conductive film is equal to the height of the convex portion.

In the above structure, when the width of the opening is 5 μm to 100 μm, the line width of the conductive film is 5 μm to 100 μm.

In the case of a bottom-gate thin film transistor, a gate electrode provided so as to fit in the insulating film, a gate insulating film provided so as to cover the insulating film and the gate electrode, and a semiconductor film provided on the gate insulating film, The insulating film and the gate electrode have substantially the same plane.

The present invention also provides an insulating film having a concave portion and a convex portion, that is, an opening; a gate electrode provided in the concave portion, that is, the opening; a gate insulating film provided so as to cover the insulating film and the gate electrode; And a semiconductor film provided over the film, wherein the height of the gate electrode is aligned with the height of the convex portion.

In the above structure, when the width of the opening in the region where the gate electrode is formed is 5 μm to 20 μm, the line width of the gate electrode is 5 μm to 20 μm.

In the case of a top-gate thin film transistor, a source electrode and a drain electrode provided so as to be fitted into the first insulating film, an insulating film, a second insulating film provided so as to cover the source electrode and the drain electrode, And a semiconductor film provided over the second insulating film, and the insulating film and the source electrode and the drain electrode have substantially the same plane.

The present invention also relates to an insulating film having a recess and a protrusion, that is, an opening, a source electrode and a drain electrode provided in the recess, that is, an opening, and a gate provided to cover the insulating film, the source electrode, and the drain electrode. The semiconductor device includes an insulating film and a semiconductor film provided over the gate insulating film, and the height of the source electrode and the drain electrode is aligned with the height of the convex portion.

In the above structure, when the width of the opening in the region where the source electrode and the drain electrode are formed is 10 μm to 40 μm, the line width of the source electrode and the drain electrode is 10 μm to 40 μm.

In such a thin film transistor, the depth of the opening can be set to 1 μm to 10 μm, for example, 1.5 μm to 2.5 μm, and a thick film of the conductive film can be achieved.

A display device typified by a television device, a cellular phone, and other electronic devices each having the above thin film transistor can be obtained. The display device includes a light emitting device having a light emitting element or a liquid crystal display device having a liquid crystal element.

As a method for selectively forming a pattern, a droplet discharge method that selectively discharges (drops or jets) a droplet (also referred to as a dot) of a composition mixed with a material such as a conductive film or an insulating film. Can be used. The droplet discharge method is also called an ink jet method depending on the method.

At this time, the composition may be ejected in the form of dots or in the form of columns in which dots are connected. Further, the ejection of the composition in the form of dots or columns is simply referred to as ejection. That is, since a plurality of dots are ejected continuously, they may be ejected linearly without being recognized as dots, but are collectively referred to as ejection.

As the conductor, gold (Au), silver (Ag), copper (Cu), platinum (Pt), palladium (Pd), tungsten (W), nickel (Ni), tantalum (Ta), bismuth (Bi), Lead (Pb), indium (In), tin (Sn), zinc (Zn), titanium (Ti), or aluminum (Al), alloys made of these, dispersible nanoparticles, or silver halide fine particles Can be used. In particular, low resistance silver or copper may be used.

In addition, as a transparent conductive film, indium tin oxide (ITO), indium oxide mixed with 2-20% zinc oxide (ZnO), IZO (indium zinc oxide), indium oxide with 2-20% f silicon oxide (SiO 2) ₂ ) mixed conductive material (usually referred to as “ITO-SiOx”, but referred to herein as “ITSO” or “NITO” for convenience), organic indium, organic tin, and the like can also be used.

Note that a mixture of such conductors can also be used.

In order to efficiently disperse a material such as a conductor in the composition, the surface of the conductor to be fine particles may be coated with an organic substance or a conductor. The substance covering the surface may have a laminated structure. The substance covering the surface is preferably conductive, but even if it has an insulating material, the insulating material may be removed by heat treatment or the like. In particular, when copper is used, the surface of the copper fine particles is preferably covered with a material such as nickel (Ni) or nickel boron (NiB) in order to prevent copper from diffusing into the semiconductor film or the like.

In addition, the pattern other than the conductive film formed in the opening of the insulating film may be formed by a method capable of selectively forming a pattern by using a method capable of selectively forming a pattern. On the other hand, all patterns may be formed by a method capable of selectively forming patterns. This is because the present invention can achieve the effects of the present invention by forming a pattern between insulating films in one step of the thin film transistor.

In the liquid crystal display device which is a display device according to the present invention, a resin, that is, an insulator is formed around at least one conductor formed on one of the two substrates sandwiching the liquid crystal. It is characterized by having.

Here, the conductor means an active element typified by a semiconductor element such as a TFT used for a pixel portion or a peripheral circuit portion of an active matrix liquid crystal display device, a gate electrode, a gate wiring, a capacitor wiring, a source included in the circuit. It refers to all conductors such as an electrode, a drain electrode, a source wiring, a drain wiring, and a pixel electrode.

In addition, various materials can be selected as the conductor material according to the use, function, area, etc. of the conductor. Typical examples are silver (Ag), copper (Cu), gold ( Au), nickel (Ni), platinum (Pt), chromium (Cr), tin (Sn), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), rhenium (Re), tungsten ( W), aluminum (Al), tantalum (Ta), indium (In), tellurium (Te), molybdenum (Mo), cadmium (Cd), zinc (Zn), iron (Fe), titanium (Ti), silicon ( Si), germanium (Ge), zirconium (Zr), barium (Ba), antimony lead, tin oxide / antimony, fluorine-doped zinc oxide, carbon (C), graphite, glassyca Bonn, lithium (Li), beryllium (Be), sodium (Na), magnesium (Mg), potassium (K), calcium (Ca), scandium (Sc), manganese (Mn), zirconium (Zr), gallium (Ga ), Niobium (Nb), sodium-potassium alloy, magnesium / copper mixture, magnesium / silver mixture, magnesium / aluminum mixture, magnesium / indium mixture, aluminum / aluminum oxide mixture, lithium / aluminum mixture, silver halide fine particles, etc. Or dispersible nanoparticles, or indium tin oxide (ITO), zinc oxide (ZnO), zinc oxide added with gallium (GZO) used as a transparent conductive film, 2-20% zinc oxide mixed with indium oxide Indium Zinc Oxide (I O), in which an organic indium, organic tin, may be used titanium nitride.

In particular, for a material used as a transparent conductive film, silicon (Si) or silicon oxide (SiOx) may be contained in the conductive material. For example, a conductive material (ITSO) in which silicon oxide is contained in ITO can be used. Alternatively, a desired conductive film may be formed by stacking layers made of the above conductive materials.

Note that the conductor includes not only the above metal material but also a semiconductor material such as polysilicon. Note that in the case of a passive liquid crystal display device, electrodes arranged in a lattice (stripe), wiring, and the like are also included in the conductor.

Note that a mixture of such conductors can also be used.

In addition, as a resin, typically, a skeleton structure is formed of a bond of polyimide, acrylic, silicon, and oxygen, and a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or aromatic as a substituent A transparent photosensitive resin such as a material having at least one of hydrocarbons can be used, but the material is not limited to these as long as the material can fix the conductor pattern. Further, in a liquid crystal display device (a transmissive liquid crystal display device or a transflective liquid crystal display device) that needs to transmit light, such as a liquid crystal display with a backlight, the resin has excellent translucency. It is desirable to use a material, but in the case of a reflective liquid crystal display device using external light 191, it is not necessarily transparent. Note that a material having a color filter function may be used as the resin. For example, a material in which a resin is mixed with red (R), green (G), blue (B) pigment, dye, or the like can be used.

Note that a material having at least one of fluorine, an alkyl group, and an aromatic hydrocarbon as a material having a skeleton structure formed of a bond of silicon and oxygen and having at least hydrogen as a substituent, or siloxane as a substituent is siloxane It is a kind of heat resistant planarization film or heat resistant interlayer film (HRIL; Heat Resistant Interlayer). Hereinafter, the term “heat-resistant planarizing film, heat-resistant interlayer film, heat-resistant resin, or HRIL” includes siloxane.

In addition, in the case of an active matrix liquid crystal display device, the two substrates sandwiching liquid crystal indicate an element substrate on which an active element such as a TFT is formed and a counter substrate. In the case of a passive liquid crystal display device, it refers to a substrate on which a grid electrode is formed and a counter substrate.

Further, in the liquid crystal display device according to the present invention, a resin is formed around at least one conductor formed on one of the two substrates sandwiching the liquid crystal, It is formed in contact with a layer containing a 3d transition element or its oxide, nitride, or oxynitride. Here, as the 3d transition element, Ti (titanium), Sc (scandium), V (vanadium), Cr (chromium), Mn (manganese), Fe (iron), Co (cobalt), Ni (nickel), Cu (Copper) and Zn (zinc).

In the liquid crystal display device according to the present invention, a liquid crystal is sandwiched between a substrate having an active element and a counter substrate, and a resin is formed around at least one conductor formed on the substrate having an active element. And a channel protective film made of polyimide, acrylic, or siloxane is formed on the semiconductor film to be the channel region of the active element. Note that the conductor may be formed in contact with a layer containing a 3d transition element or an oxide, nitride, or oxynitride thereof.

In the method for manufacturing a liquid crystal display device according to the present invention, a resin for patterning the gate electrode layer is formed on the substrate, and the first conductive material is formed between the resins, that is, in the opening provided in the resin. A gate electrode layer is formed by discharging a composition containing a material, a gate insulating film is formed over the gate electrode layer, a semiconductor film is formed over the gate insulating film, and a semiconductor film containing an impurity element over the semiconductor film And a substrate having an active element manufactured by forming a source electrode layer and a drain electrode layer by discharging a composition containing a second conductive material over a semiconductor film containing an impurity element. The liquid crystal is sandwiched between the substrate and the substrate.

Here, the gate electrode layer includes a gate electrode portion and a gate wiring portion (also referred to as a scanning line), which may be formed of the same layer (same layer) or different layers. The source and drain electrode layers are also composed of a source and drain electrode portion and a source and drain wiring portion (also referred to as a 2nd wiring or a signal line), which are also formed in the same layer or in different layers. You may do it. Further, the source, drain electrode or 2nd wiring and the pixel electrode may be formed in the same layer. Similarly to the gate electrode layer, the source and drain electrode layers are formed of a resin containing a second conductive material between the resins, that is, in the openings provided in the resin after forming a resin for pattern formation. You may form by discharging a thing.

The gate electrode layer, the source electrode, and the drain electrode layer are preferably formed in advance around the resin. However, the conductive material and the resin are simultaneously formed using a droplet discharge method, or an appropriate time difference is provided. It may be provided. Moreover, although the 1st and 2nd conductive material can be suitably employ | adopted from the said conductive material, the kind may be the same or different, respectively. Also, the resins (first resin and second resin) provided in the periphery thereof may be the same or different.

Note that a droplet discharge method used for forming the conductive material typically includes an inkjet method, but is not limited thereto, and an offset printing method is used depending on the properties of the material to be formed. Alternatively, a screen printing method or the like may be employed.

In addition, a layer containing the 3d transition element or its oxide, nitride, or oxynitride may be formed before forming the conductive material. The layer may be formed before or after forming the resin around the conductive material, as long as the conductive material is not formed.

By forming the conductive film in the opening formed in the insulating film, the surfaces of the conductive film and the insulating film can be planarized. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

When a pattern such as a wiring or a mask is formed by a method capable of selectively forming a pattern, the utilization efficiency of the material is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a pattern is formed by a method capable of selectively forming a pattern, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

In addition, the liquid crystal display device according to the present invention has a configuration in which a resin is formed around at least one conductor formed on one of the two substrates holding the liquid crystal. Thus, the conductor can be easily formed by discharging between the resins by the droplet discharge method, that is, the opening provided in the resin, and the conductive material can be saved. In addition, since a dripping phenomenon of a composition containing a conductive material that easily occurs when a droplet discharge method is used can be prevented, a good conductor pattern can be formed, and a short circuit between electrodes and wiring Can be prevented. In addition, when the conductive material is discharged only by the droplet discharge method, it is difficult to increase the film thickness because the composition containing the conductive material is mainly liquid. For example, a conductor with a desired film thickness can be formed even when the droplet discharge method is used.

In addition, since the conductor is formed in contact with the layer containing the 3d transition element or its oxide, nitride, or oxynitride, the conductor, the substrate on which the layer is formed, and other thin films Therefore, it is possible to prevent the conductor from peeling off and to form a favorable conductive pattern.

In addition, the channel protective film is formed by using a heat-resistant resin such as polyimide, acrylic, or siloxane as a channel protective film provided in a channel region of a TFT mainly used in an active matrix liquid crystal display device. Since it can be easily formed by a droplet discharge method, it is not necessary to provide a resist mask during patterning as in the conventional case, and the process can be simplified. Further, by providing the channel protective film, damage to the channel region can be surely prevented, and a stable active element with high mobility can be provided. It is also effective in securing the above effect that the channel protective film has a two-layer structure or a multi-layer structure having more layers.

In addition, it is not necessary to provide a separate color filter on the TFT element substrate or on the opposite substrate by adopting a resin mixed with pigment or the like formed around the conductor and having a color filter function. The process can be simplified.

In the method for manufacturing a liquid crystal display device according to the present invention, a resin for patterning the gate electrode layer is formed on the substrate, and the first conductive material is formed between the resins, that is, in the opening provided in the resin. Since the gate electrode layer is formed by discharging the composition containing the material, the conductor is discharged between the resins, that is, into the opening provided in the resin by the droplet discharge method. Can be easily formed, and the conductive material can also be saved. In addition, since a dripping phenomenon of a composition containing a conductive material that easily occurs when a droplet discharge method is used can be prevented, a good conductor pattern can be formed, and a short circuit between electrodes and wiring Can be prevented. In addition, when the conductive material is discharged only by the droplet discharge method, it is difficult to increase the film thickness because the composition containing the conductive material is mainly liquid. For example, a conductor with a desired film thickness can be formed even when the droplet discharge method is used. The same effect can be obtained when the source, drain electrode, signal line, pixel electrode, and the like are manufactured by the above method.

Further, by forming a layer containing a 3d transition element or its oxide, nitride, or oxynitride before or after forming the resin, the conductor, the substrate on which the layer is formed, and other layers Since the adhesion with the thin film can be improved, peeling of the conductor can be prevented, and a favorable conductive pattern can be formed.

In addition, it is not necessary to provide a separate color filter on the TFT element substrate or on the opposite substrate by adopting a resin mixed with pigment or the like formed around the conductor and having a color filter function. The process can be simplified.

As described above, by using the present invention, a process can be simplified by a droplet discharge method, a material cost can be reduced, and a liquid crystal display device with high throughput and high yield can be provided. In particular, even if the size of the glass substrate is increased to 6th generation (1500 × 1800 mm), 7th generation (2000 × 2200 mm), or more than 6 tatami mats (2700 × 3600 mm), productivity A display panel can be manufactured at a low cost. Further, it is not necessary to treat a large amount of waste liquid containing heavy metal as a conductive material, and the present invention is significant from the viewpoint of environmental considerations.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

A TFT has three terminals, a gate, a source, and a drain. However, the source terminal (source electrode) and the drain terminal (drain electrode) cannot be clearly distinguished because of the structure of the transistor. Therefore, when describing connection between elements, one of a source electrode and a drain electrode is also referred to as a first electrode, and the other is also referred to as a second electrode.

(Embodiment 1)
In this embodiment, an example of a method for manufacturing a thin film transistor will be described.

First, as shown in FIG. 1A, a substrate 100 having an insulating surface is prepared. As the substrate 100, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a stainless steel substrate, a bulk semiconductor film, or the like can be used. In addition, substrates made of plastics represented by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and flexible synthetic resins such as acrylic are generally Although the heat resistant temperature tends to be lower than that of the substrate, it can be used as long as it can withstand the processing temperature in the manufacturing process. In particular, when a thin film transistor including an amorphous semiconductor film that does not require a heating step for crystallizing a semiconductor film is formed, a substrate made of a synthetic resin having flexibility is easily used.

In order to improve the flatness of the substrate, it is preferable to use after polishing the surface by a chemical or mechanical polishing method, so-called CMP (Chemical-Mechanical Polishing) method. As the CMP abrasive (slurry), for example, fumed silica particles obtained by thermally decomposing silicon chloride gas dispersed in a KOH-added aqueous solution can be used.

A base film 101 is formed on the substrate 100. The base film may have a single layer structure or a laminated structure. The base film is provided in order to prevent alkali metal such as Na or alkaline earth metal contained in the substrate from diffusing into the semiconductor film and adversely affecting the characteristics of the semiconductor element. Therefore, the base film can be formed using an insulating film such as silicon oxide, silicon nitride, silicon nitride oxide, titanium oxide, or titanium nitride that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film. . Alternatively, the base film can be formed using a conductive film such as titanium. In this case, the conductive film is oxidized by heat treatment or the like in the manufacturing process. In particular, the material of the base film is preferably selected from materials having high adhesion to the gate electrode material. For example, when Ag is used for the gate electrode, it is preferable to form a base film made of titanium oxide (TiOx). Titanium oxide has both a base film function and an adhesion improving function. As other base film materials, 3d transition elements (Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn) and oxides, nitrides, and oxynitrides thereof can be used. .

The base film is not necessarily provided as long as impurities can be prevented from diffusing into the semiconductor film. Therefore, as shown in this embodiment mode, when a semiconductor film is formed over a gate electrode with a gate insulating film interposed therebetween, the gate insulating film can function to prevent impurities from diffusing into the semiconductor film. There is no need to provide. Further, it may be preferable to provide a base film with a substrate material. In the case of using a substrate containing an alkali metal or an alkaline earth metal, such as a glass substrate, a stainless steel substrate, or a plastic substrate, it is effective to provide a base film from the viewpoint of preventing impurity diffusion. On the other hand, in the case where diffusion of impurities does not cause any problem such as a quartz substrate, it is not always necessary to provide a base film.

Next, the insulating film 102 is formed over the base film. An organic material or an inorganic material can be used for the insulating film. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Polysilazane is formed using a polymer material having a bond of silicon (Si) and nitrogen (N), that is, a liquid material containing so-called polysilazane as a starting material. As the inorganic material, silicon oxide or silicon nitride can be used. The insulating film can be formed by a plasma CVD method, a low pressure CVD method, a droplet discharge method, a spin coating method, or a dip method. In the case of using a highly viscous raw material, it is preferable to use a droplet discharge method, a spin coating method, or a dip method.

The insulating film 102 is a region (hereinafter referred to as a concave portion) 20 that can be expressed as a concave portion with reference to the upper surface of the insulating film, and a region (hereinafter referred to as a convex portion) that can be expressed as a convex portion with respect to the lower surface of the insulating film. 21). The concave portion and the convex portion can be formed into a concave portion and a convex portion by forming a desired mask after forming the insulating film and forming an opening (groove) by a dry etching method or a wet etching method. That is, the opening can be represented by the concave portion and the convex portion. Alternatively, an insulating film may be formed in a region that becomes the convex portion 21. The distance between the concave portion and the convex portion, that is, the width of the opening is formed to be 5 μm to 100 μm. In particular, when forming a wiring having a width of 5 μm to 50 μm, which is difficult to be miniaturized only by the droplet discharge method, the width of the opening is set to 5 μm to 50 μm, and the wiring is dropped by the droplet discharge method toward the opening. Thus, a miniaturized wiring can be formed. Therefore, in order to obtain a fine wiring, the present invention has a remarkable effect as the width of the opening is reduced to 5 μm to 50 μm.

Further, the height difference between the concave and convex portions, that is, the depth of the opening is formed to be 1 μm to 10 μm. In particular, when the opening is deepened, a wiring such as a scanning line or a lead-out wiring for inputting a signal from the driving circuit to each semiconductor element is preferably formed. Compared with the wiring formed only by the droplet discharge method, an opening having a depth of 1 μm to 10 μm is formed, and when the wiring is formed by the droplet discharge method toward the opening, a thick wiring of 1 μm to 10 μm is formed. Therefore, wiring resistance, heat generation due to the wiring resistance, and signal delay can be prevented, which is preferable.

In this embodiment mode, an opening is formed in a desired region by dry etching, and an insulating film having a concave portion and a convex portion is formed. The opening in the region where the gate electrode is formed has a width of 5 μm to 20 μm, the opening in the region where the scanning line is formed has a width of 10 μm to 40 μm, and the opening in the region where wiring (not shown) leading to the external terminal is formed. The part is formed to have a width of 20 μm to 100 μm. In this case, the width (channel length) of the gate electrode is 5 μm to 20 μm. The opening is formed to have a depth of 1.5 μm to 2.5 μm.

In the case where such a wiring having a line width of 5 μm to 100 μm is formed, the amount of droplets is 0.1 pl to 40 pl, and the droplets may be dropped a plurality of times so as to satisfy the depth of the opening.

As shown in FIG. 1B, a conductive film functioning as a scan line and a gate electrode (represented as a scan line and a gate electrode, respectively) is formed in the opening of the insulating film 102.

The conductive film may have either a single layer structure or a stacked structure. In the case of a stacked structure, for example, a droplet containing Ag is dropped by a droplet discharge method as a first conductive film on the lower layer side, and Cu is dropped by a droplet discharge method or a sputtering method as a second conductive film on the upper layer side. It may be formed. By forming a low resistance material such as Cu, wiring resistance can be reduced, and heat generation and signal delay associated with wiring resistance can be prevented.

Alternatively, a plating method may be used as a means for forming a gate electrode having a stacked structure. For example, the second conductive film may be formed around the first conductive film formed by a droplet discharge method by an electroplating method or an electroless plating method. Specifically, Cu can be formed around Ag formed by a droplet discharge method by performing an electroplating process. Alternatively, Cu may be formed around Ag formed by a droplet discharge method by performing an electroless plating process that does not require a current to flow. For example, as shown in FIG. 49, a particle structure in which a buffer layer 1312 made of Ni or NiB is provided between Cu 1310 and Ag 1311 in a particle in which the periphery of Cu 1310 is covered with Ag 1311 (FIG. 49A) can be given ( FIG. 49 (B)). As a result of forming a low resistance material such as Cu around Ag, wiring resistance can be reduced, and heat generation and signal delay associated with wiring resistance can be prevented.

At this time, the plating process can be performed by immersing the substrate in an aqueous solution in which a metal is dissolved. When a large mother glass substrate is used, the plating process can be performed by flowing an aqueous solution in which a metal is dissolved over the substrate. In this case, it is possible to prevent the apparatus for performing the plating process from being enlarged.

Specifically, first, a composition containing Ag is formed by discharge using a droplet discharge method. At this time, when the line width is relatively thin, such as several μm to several tens of μm, when it is desired to form a thick wiring such as a gate wiring, it is necessary to form the discharge by overlapping. However, after forming Ag, the line width can be increased by immersing the substrate on which Ag is formed in a plating solution containing Cu, or by flowing the plating solution directly on the substrate. In particular, the composition after ejection formation is easy to plate because it has many irregularities. Further, since Ag is expensive, performing Cu plating leads to cost reduction. Note that the conductive material used when forming the wiring by the method of the present embodiment is not limited to this type.

Since the surface of the conductive film has many irregularities after Cu plating, it is desirable to provide a buffer layer such as NiB for smoothing, and then form an insulating film or the like.

When the stacked structure is used in this manner, it is preferable that the first conductive film be formed to be fine because the second conductive film can reduce the wiring resistance. When a highly diffusible conductor such as Cu is formed, a barrier film may be formed so as to cover Cu in order to prevent diffusion.

In this embodiment, by using a droplet discharge method, a droplet in which a conductive material that is a material for a scan line and a gate electrode is mixed into a solvent from the nozzle 104 is dropped, and the scan line 103a and the gate electrode 103b are dropped. Form. In the present embodiment, the size of the nozzle with respect to the semiconductor film or the like is schematic and may differ from the actual size. In FIG. 1, the side surfaces of the scan line and the gate electrode may have a taper. In this case, the side surface of the opening of the insulating film may be formed so as to have a taper.

Then, tetradecane is used as a solvent, and a droplet in which fine particles of Ag ₂ O are dispersed is dropped as a conductor to be a material for the scanning line and the gate electrode. Such Ag ₂ O is an insulator, but is reduced by firing to become Ag which is a conductor.

The diameter of the nozzle 104 and the amount of droplets can be set based on the volume of the conductor, that is, the concave portion of the insulating film, the viscosity that is the material of the other droplets, and the like.

Thereafter, when it is necessary to remove the solvent in the droplets, heat treatment is performed for baking or drying. Specifically, heating may be performed at a predetermined temperature, for example, 200 ° C. to 300 ° C., and heat treatment is preferably performed in an atmosphere containing oxygen. At this time, the heating temperature is set so that the gate electrode surface is not uneven. In particular, in the case where droplets containing silver (Ag) are used as in this embodiment, heat treatment is preferably performed in an atmosphere containing oxygen and nitrogen. For example, the oxygen composition ratio is set to 10 to 25%. Then, since organic substances, such as thermosetting resins, such as an adhesive agent contained in the solvent of the droplets are decomposed, silver (Ag) that does not contain organic substances can be obtained. As a result, the flatness of the gate electrode surface can be improved and the specific resistance value can be lowered.

In addition to silver (Ag), the gate electrode can be formed using an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component. In addition to the droplet discharge method, the conductive film can be formed by a sputtering method or a plasma CVD method. As a conductive film formed by a sputtering method or a plasma CVD method, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy can be used.

At this time, it is preferable that the height of the conductive film is equal to the height of the convex portion of the insulating film. That is, it is preferable that the surfaces of the insulating film and the gate electrode be flat. Therefore, when the height of the conductor is higher than the height of the convex portion of the insulating film, planarization treatment is preferably performed. As a planarization means, surface polishing can be performed by using a CMP method so as to ensure flatness. Alternatively, the surface of the conductive film may be etched and flattened by etch back.

Further, as another planarization means, the conductive film can be planarized using a means for injecting a gas before heat treatment of the conductive film. As a means for spraying gas, for example, an air knife used for removing impurities such as a substrate can be used. As the gas, air, oxygen, or nitrogen can be used. As a result, it is possible to flatten even the micro unevenness formed on the surface of the conductive film. Thereafter, heating is performed.

As yet another means, the conductive film can be planarized by pressurization before the heat treatment of the conductive film. For example, using the principle of hot pressing, a heated plate is placed on the substrate and pressed while pressing.

On the other hand, when the volume of the conductive film shrinks due to the heat treatment and the height of the conductive film becomes lower than the height of the protrusions of the insulating film, the droplets may be dropped again.

Further, the step of forming the insulating film 102, the scanning line 103a, and the gate electrode 103b can be formed by a droplet discharge method. Detailed manufacturing steps by a droplet discharge method will be described in the following embodiments.

As shown in FIG. 1C, an insulating film functioning as the gate insulating film 106 is formed so as to cover the gate electrode.

The gate insulating film can have a stacked structure or a single layer structure. As the gate insulating film, an insulator made of an inorganic material such as silicon oxide, silicon nitride, or silicon nitride oxide, or an insulator made of an organic material such as polysilazane or polyvinyl alcohol can be used.

In the case where silver (Ag) is used as a gate electrode as in this embodiment mode, a silicon nitride film is preferably used as the gate insulating film. This is because when an insulating film containing oxygen is used, it reacts with silver (Ag), silver oxide is formed, and the gate electrode surface may be roughened.

The gate insulating film can be formed by a plasma CVD method, a low pressure CVD method, a droplet discharge method, a spin coating method, or a dip method. In the case of using a highly viscous raw material, it is preferable to use a droplet discharge method, a spin coating method, or a dip method.

At this time, since the surfaces of the insulating film 102, the scanning line 103a, and the gate electrode 103b are aligned and planarized, the gate insulating film can be formed without disconnection. In particular, when the gate is formed using a spin coating method or a dip method, the structure of this embodiment in which the surface is planarized is preferable.

As shown in FIG. 1D, a semiconductor film 108 is formed over the gate insulating film. The semiconductor film can be formed by a plasma CVD method, a sputtering method, a droplet discharge method, or the like. The film thickness of the semiconductor film is 25 to 200 nm (preferably 30 to 60 nm). Further, not only silicon but also silicon germanium can be used as a material for the semiconductor film. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%.

The semiconductor film can be an amorphous semiconductor, a semi-amorphous semiconductor in which an amorphous state and a crystalline state are mixed (also referred to as SAS), and crystal grains of 0.5 nm to 20 nm can be observed in the amorphous semiconductor. It may have any state selected from a microcrystalline semiconductor and a crystalline semiconductor. In particular, a microcrystalline state in which grains of 0.5 nm to 20 nm can be observed is called a so-called microcrystal (μc).

The SAS is a semiconductor having an intermediate structure between an amorphous structure and a crystal structure (including single crystal and polycrystal) and having a third state that is stable in terms of free energy. It also contains a crystalline region with short-range order and lattice distortion. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wave number side than 520 cm ^−1. ing. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. Further, as a neutralizing agent for dangling bonds, SAS contains 1 atomic% or more of hydrogen or halogen.

SAS can be obtained by glow discharge decomposition of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. The formation of the SAS can be facilitated by diluting the silicide gas with one or plural kinds of rare gas elements selected from hydrogen, hydrogen and helium, argon, krypton, and neon. At this time, it is preferable to dilute the silicide gas so that the dilution rate is in the range of 10 to 1000 times. Further, the SAS can be formed by using Si ₂ H ₆ and GeF ₄ and diluting with helium gas. The reaction generation of the coating by glow discharge decomposition is preferably performed under reduced pressure, and the pressure may be in the range of about 0.1 Pa to 133 Pa. The power for forming the glow discharge may be high frequency power of 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or less, and a substrate heating temperature of 100 to 250 ° C. is recommended.

The crystalline semiconductor film can be formed by crystallizing an amorphous semiconductor film by heating or laser irradiation. Alternatively, a crystalline semiconductor film may be directly formed. In this case, a crystalline semiconductor film is directly formed using heat or plasma using a fluorine-based gas such as GeF ₄ or F ₂ and a silane-based gas such as SiH ₄ or Si ₂ H _6. Can do.

In this embodiment, as the semiconductor film 108, an amorphous semiconductor film containing silicon as a main component (also referred to as amorphous silicon film or amorphous silicon) is formed by a plasma CVD method.

Next, a semiconductor film having one conductivity type is formed. Note that formation of a semiconductor film having one conductivity type is preferable because contact resistance between the semiconductor film and the electrode is reduced, but the semiconductor film may be provided as necessary. A semiconductor film having one conductivity type can be formed by a plasma CVD method, a sputtering method, a droplet discharge method, or the like. In this embodiment mode, an N-type semiconductor film 107 is formed by a plasma CVD method.

In the case where the semiconductor film 108 and the N-type semiconductor film 107 are formed by a plasma CVD method, the semiconductor film, the N-type semiconductor film, and the gate insulating film can be continuously formed. Specifically, it can be continuously formed without opening to the atmosphere by changing the supply of the source gas into the processing chamber of the plasma CVD apparatus. As a result, it is possible to prevent impurities from adhering to the interfaces of the semiconductor film, the N-type semiconductor film, and the gate insulating film.

After that, although not shown, the semiconductor film 108, the N-type semiconductor film 107, and the gate insulating film 106 are patterned into desired shapes using a mask. Therefore, a mask is formed at a desired location, and patterning is performed by dry etching or wet etching using the mask. The mask can be formed by a droplet discharge method or a photolithography method. Note that it is preferable to form a mask using a droplet discharge method because the material utilization efficiency is improved and the cost and the amount of waste liquid can be reduced. Further, when a mask is formed by a droplet discharge method, the photolithography process can be simplified. That is, photomask formation, exposure, and the like are not required, a reduction in equipment investment cost can be achieved, and a manufacturing time can be shortened.

Inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, etc.) and photosensitive or non-photosensitive organic materials (polyimide, acrylic, polyamide, polyimide amide, polyvinyl alcohol, resist, or benzocyclobutene) are used as mask materials. Can do. For example, in the case where a mask is formed using polyimide by a droplet discharge method, heat treatment may be performed at 150 to 300 ° C. in order to perform baking after discharging polyimide to a desired portion by a droplet discharge method.

After the patterning, plasma treatment is performed to remove the mask. Note that the mask can be functioned as an insulating film without being removed.

Since patterning is performed at the same time, the end portions of the semiconductor film 108, the N-type semiconductor film 107, and the gate insulating film 106 are aligned. That is, the end portions of the semiconductor film 108, the N-type semiconductor film 107, and the gate insulating film 106 are provided so as not to cross each other end portion.

As shown in FIG. 2A, a conductive film functioning as a signal line and a power supply line 109a, and a source electrode and a drain electrode 109b is formed. The signal line and power supply line 109a and the source and drain electrodes 109b are formed to have a line width of 5 μm to 100 μm. The conductive film may have either a single layer structure or a stacked structure. For the stacked structure, the description of the gate electrode can be referred to.

As the conductive film, a film made of gold, silver, copper, aluminum, titanium, molybdenum, tungsten, or silicon or an alloy film using these elements can be used. The conductive film can be formed by a droplet discharge method.

In addition to silver (Ag), the conductive film can be formed using an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component. The conductive film can be formed by a sputtering method or a plasma CVD method in addition to the droplet discharge method. As a conductive film formed by a sputtering method or a plasma CVD method, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy can be used.

In this embodiment mode, a droplet including silver (Ag) is formed by a droplet discharge method. Specifically, a signal line, a power supply line, a source electrode, and a drain electrode may be formed from the nozzle 104 similarly to the gate electrode illustrated in FIG. At this time, the line width of the source electrode and the drain electrode is 10 μm to 40 μm, the line width of the signal line or the power supply line is 5 μm to 40 μm, and the line width (not shown) routed to the external terminal is 20 μm to 100 μm. To form. Further, when a wiring having a line width of 5 μm to 100 μm is formed by the droplet discharge method as described above, the droplet amount is set to 0.1 pl to 40 pl. At this time, the droplet amount can be controlled by a control signal (for example, pulse voltage application) sent to the nozzle. For example, when the line width is 5 μm, the amount of droplets from the nozzle 104 may be controlled to be 0.1 pl. However, the wiring width can also be controlled by the contact angle between the surface on which the wiring is formed and the droplet.

In this embodiment mode, even when a signal line, a power supply line, a source electrode, and a drain electrode are formed, an opening is formed in an insulating film and a signal line is formed between the openings, similarly to a gate electrode or the like. A power supply line, a source electrode, and a drain electrode may be formed.

At this time, the scanning line 103a is formed under the signal line and the power supply line 109a. If the signal line and the power supply line 109a are directly formed, a short circuit occurs. Therefore, an insulating film 112 is formed at the intersection of the signal line, the power supply line, and the scanning line to prevent a short circuit. The insulating film can be formed in a manner similar to that of the insulating film 102. In this embodiment mode, polyimide is dropped by a droplet discharge method.

Thereafter, when it is necessary to remove the solvent of the droplets, heat treatment is performed for baking or drying.

Further, a liquid repellent treatment may be performed in order to improve the liquid repellency on the formation surface of the signal line, the power supply line, the source electrode, and the drain electrode. As the liquid repellent treatment, there is a method of applying a fluorine-based silane coupling agent or the like. As another liquid repellent treatment, plasma treatment using CHF ₃ , O ₂ mixed gas or the like may be performed.

After that, the N-type semiconductor film 107 is etched using the source electrode and the drain electrode as a mask. This is because the N-type semiconductor film prevents the source electrode and the drain electrode from being short-circuited. At this time, the semiconductor film 108 may be slightly etched.

As described above, the thin film transistors 110 and 111 provided up to the source electrode and the drain electrode are completed. At this time, in the thin film transistors 110 and 111, the source electrode or the drain electrode 109b of the thin film transistor 110 and the gate electrode of the thin film transistor 111 are directly connected without a connection wiring.

Note that the thin film transistor in this embodiment is a so-called bottom-gate thin film transistor in which a gate electrode is provided below a semiconductor film. More specifically, it is a so-called channel etch type in which the semiconductor film is slightly etched.

As described above, a conductive film or the like is formed in the opening portion of the insulating film by a droplet discharge method so as to have flatness. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

The thin film transistor described in this embodiment is characterized in that a conductive film or a mask is formed by at least a droplet discharge method. Therefore, if a droplet discharge method is used in one step of forming the conductive film or the mask, a step other than the droplet discharge method may be used for forming the other conductive film or mask. If the droplet discharge method is used in one process, the material utilization efficiency is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a mask is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 2)
In this embodiment, the case where the thin film transistor is used for a display device, for example, a pixel portion of a light-emitting device will be described.

The thin film transistor 110 functions as switching, and the thin film transistor 111 functions as a drive for controlling the light emission luminance of the electroluminescent layer. That is, a source electrode or a drain electrode of a thin film transistor (switching TFT) that functions as a switching and a gate electrode of a thin film transistor (driving TFT) that functions as a drive are connected.

Note that the thin film transistor of this embodiment mode is a channel etch type, and a substrate provided with a plurality of such thin film transistors is referred to as a TFT substrate.

As shown in FIG. 2B, an insulating film functioning as an interlayer insulating film 113, an auxiliary wiring, and a conductive film 114 functioning as a connection wiring are formed. The conductive film functioning as an auxiliary wiring is formed over the signal line, the power supply line, the source electrode, and the drain electrode. As a result, wiring resistance can be reduced, and heat generation and signal delay associated with wiring resistance can be prevented. In particular, with the miniaturization of signal lines, power supply lines, source electrodes, and drain electrodes, problems such as wiring resistance become more prominent, so it is preferable to provide auxiliary wiring. The connection wiring ensures connection between the source electrode or the drain electrode of the thin film transistor 111 and the pixel electrode. In particular, since the planarization is performed by the interlayer insulating film 113, disconnection of the pixel electrode can be prevented. As a result, the voltage applied to the electroluminescent layer can be made uniform.

The interlayer insulating film 113 can be formed using a material similar to that of the insulating film 102. The conductive film 114 can be formed using a material similar to that of the scan line and the gate electrode. For the manufacturing process of the interlayer insulating film 113 and the conductive film 114, the manufacturing process of the insulating film 102, the scan line, and the gate electrode may be referred to. For example, after forming the interlayer insulating film, a desired mask can be formed, an opening (groove) can be formed by a dry etching method or a wet etching method, and the conductive film 114 can be formed in the opening.

The step of forming the interlayer insulating film 113 and the conductive film 114 can be formed by a droplet discharge method. For example, the conductive film 114 can be formed in a column shape by a droplet discharge method, and then the interlayer insulating film 113 can be formed by a droplet discharge method. An interlayer insulating film can also be formed by a spin coating method or the like. Other detailed manufacturing steps by a droplet discharge method will be described in the following embodiments.

As shown in FIG. 3A, a pixel electrode 115 is formed so as to be connected to a source electrode or a drain electrode of the thin film transistor 111.

The pixel electrode is formed from a light-transmitting or non-light-transmitting material. For example, ITO or the like can be used when it has translucency, and a metal film can be used when it has non-translucency. Specific materials having translucency include indium tin oxide (ITO), IZO in which indium oxide is mixed with 2 to 20% zinc oxide (ZnO), and indium oxide with 2 to 20% silicon oxide (SiO _2). It is also possible to use ITSO, organic indium, organic tin, or the like mixed with). In addition to silver (Ag), an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component is used as the non-translucent material. it can. In this embodiment mode, pixel electrodes are formed using ITSO.

The pixel electrode can be formed by a sputtering method or a droplet discharge method. In the case of using a sputtering method, a pixel electrode is selectively formed using a metal mask. On the other hand, in the case of using a droplet discharge method, a pixel electrode can be selectively formed by setting a drawing region. Therefore, a metal mask can be dispensed with.

The TFT substrate provided with the pixel electrodes as described above is referred to as a module TFT substrate.

Although the structure in which the pixel electrode 115 is formed over the interlayer insulating film 113 has been described in this embodiment mode, other structures may be used. For example, a structure in which an interlayer insulating film is not formed can be employed. Specifically, after the thin film transistors 110 and 111 are formed, a pixel electrode may be formed over the source electrode or the drain electrode of the thin film transistor 111. In another structure, the thin film transistors 110 and 111 may be formed after the pixel electrode is formed over the insulating film 102. Thus, the structure in which the interlayer insulating film is not formed can achieve a reduction in the thickness of the semiconductor element. In addition, it is possible to reduce process failures and operation failures due to the interlayer insulating film.

FIG. 4 shows a top view of the structure in which up to the pixel electrode is formed. The cross-sectional views in FIGS. 1 to 3 correspond to the cross section AB in FIG. A scanning line 103 a and a gate electrode are provided in the same layer as the insulating film 102. The line width W1 of the scanning line 103a is preferably larger than the line width W2 of the gate electrode of the switching TFT. When the line width of the gate electrode W2 is 5 μm to 20 μm, the line width W1 of the scanning line is about 10 μm to 40 μm, which is about twice. Therefore, when forming by the droplet discharge method, it is preferable to change the nozzle diameter or the waveform of the applied pulse. Also, when the same applied pulse waveform is used with nozzles of the same diameter, drawing can be performed multiple times, and the line width W1 of the scanning line can be increased.

A semiconductor film or the like is provided through a gate insulating film. An insulating film 112 is provided at an intersection of the scan line, the signal line, and the power supply line 109a, and the source electrode, the drain electrode, the signal line, and the power supply line are provided in the same layer. The source electrode and the drain electrode are provided so as to cover the semiconductor film. Further, the end portions of the source electrode and the drain electrode are provided so as to overlap with the end portions of the gate electrode. The thin film transistors 110 and 111 having the gate electrode, the semiconductor film, the source electrode, and the drain electrode, specifically, the switching TFT 110 and the driving TFT 111 are completed. A pixel electrode 115 is provided so as to be connected to the source electrode of the thin film transistor 111. Light is emitted from an electroluminescent layer provided on the pixel electrode.

In this embodiment mode, since the driving TFT includes an amorphous semiconductor film, it is preferable to design the channel width (W3) of the driving TFT to be large.

In such a pixel structure, a video signal is input from the signal line, and current is supplied to the electroluminescent layer through the thin film transistors 110 and 111. The electroluminescent layer emits light with a luminance corresponding to the current.

Note that although a capacitor for holding a video signal is not provided in FIG. 4, it can be covered with a gate capacitor of a thin film transistor. In particular, since a thin film transistor is formed using an amorphous semiconductor, the gate capacitance of the thin film transistor can be used.

Since the driving TFT is a current-driven element, analog driving is preferably used when there is little variation in TFT characteristics within the pixel, particularly Vth variation. In particular, as in this embodiment mode, a TFT having an amorphous semiconductor film has low characteristic variation, and thus it is preferable to use analog driving. On the other hand, even in digital driving, a constant current value can be supplied to the light emitting element by operating the driving TFT in a saturation region (region satisfying | Vgs−Vth | <| Vds |).

As shown in FIG. 3B, an insulating film 118 that functions as a partition wall or a bank is formed so as to cover an end portion of the pixel electrode 115. The insulating film 118 includes an inorganic material (such as silicon oxide, silicon nitride, or silicon oxynitride), a photosensitive or non-photosensitive organic material (such as polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene), siloxane, or polysilazane. , And their stacked structures can be used. As the organic material, a positive photosensitive organic resin or a negative photosensitive organic resin can be used. For example, in the case where positive photosensitive acrylic is used as the organic material, an opening having a curvature can be formed at the upper end when the photosensitive organic resin is etched by an exposure process. Therefore, disconnection of an electroluminescent layer or the like to be formed later can be prevented.

After the insulating film 118 is formed, heat treatment is preferably performed under atmospheric pressure or reduced pressure. The heating temperature is 100 ° C to 450 ° C, preferably 250 ° C to 350 ° C. As a result, moisture adsorbed in or on the insulating film 118 can be removed.

Note that in the case where ITSO is used for the pixel electrode, the pixel electrode 115 is preferably formed after a silicon nitride film (not shown) is formed over the interlayer insulating film. At this time, ITSO and the silicon nitride film are formed in contact with each other. It has been found that ITSO and the silicon nitride film improve the light extraction efficiency from the electroluminescent layer.

An electroluminescent layer 119 is formed in the opening of the insulating film 118. After the heat treatment for the insulating film 118, the electroluminescent layer is preferably formed by a vacuum evaporation method or a droplet discharge method. At this time, it is preferable to perform from the heat treatment of the insulating film to the formation of the electroluminescent layer continuously without being exposed to the atmosphere. Furthermore, it is preferable to perform these steps under reduced pressure. In particular, when an electroluminescent layer is formed by a droplet discharge method, plasma treatment may be performed on the insulating film 118, particularly the opening of the insulating film, before forming the electroluminescent layer. This is because the liquid repellency or lyophilicity can be controlled as a result of the plasma treatment, so that the electroluminescent layer can be preferentially formed in the opening of the insulating film by selecting the solvent.

The material of the electroluminescent layer can be used as an organic material (including a low molecule or a polymer) or a composite material of an organic material and an inorganic material. The electroluminescent layer can be formed by a droplet discharge method, a coating method, or a vapor deposition method. The polymer material is preferably a droplet discharge method or a coating method, and the low molecular material is preferably an evaporation method, particularly a vacuum evaporation method. In this embodiment mode, a low molecular material is formed by a vacuum evaporation method as the electroluminescent layer.

Note that the type of molecular exciton formed by the electroluminescent layer can be a singlet excited state or a triplet excited state. The ground state is usually a singlet state, and light emission from the singlet excited state is called fluorescence. In addition, light emission from the triplet excited state is called phosphorescence. The light emission from the electroluminescent layer includes the case where either excited state contributes. Furthermore, fluorescence and phosphorescence may be used in combination, and either fluorescence or phosphorescence can be selected according to the emission characteristics of each RGB (emission luminance, lifetime, etc.).

The detailed electroluminescent layer is laminated in the order of HIL (hole injection layer), HTL (hole transport layer), EML (light emitting layer), ETL (electron transport layer), and EIL (electron injection layer) in this order from the pixel electrode 115 side. Has been. Note that the electroluminescent layer can have a single-layer structure or a mixed structure in addition to the stacked structure.

Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G).

Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. A benzoxazole derivative (shown as BzOS) may be used for the electron injection layer.

In this embodiment mode, a material that emits red (R), green (G), and blue (B) light is selectively formed as the electroluminescent layer 119 by an evaporation method using an evaporation mask or the like. it can. In the case of using a droplet discharge method, a material that emits red (R), green (G), or blue (B) light can be formed without using an evaporation mask.

Furthermore, when each RGB electroluminescent layer is formed, high-definition display can be performed using a color filter. This is because the color filter can correct a broad peak in the emission spectrum of each RGB so as to be sharp.

The case where the RGB electroluminescent layers are formed has been described above, but an electroluminescent layer exhibiting monochromatic light emission may be formed. In this case, full color display can be performed by combining a color filter and a color conversion layer. For example, when an electroluminescent layer that emits white or orange light is formed, full color display can be performed by providing a color filter or a combination of a color filter and a color conversion layer. For example, the color filter and the color conversion layer may be formed over a second substrate (also referred to as a sealing substrate) and attached to the substrate. Both the color filter and the color conversion layer can be formed by a droplet discharge method.

Needless to say, a monochromatic display may be performed by forming an electroluminescent layer that emits monochromatic light. For example, an area color type display can be performed using monochromatic light emission. The area color type is suitable for a passive matrix structure and can mainly display characters and symbols.

After that, as shown in FIG. 3B, a second electrode 120 of the light emitting element is formed so as to cover the electroluminescent layer 119 and the insulating film 118.

The material of the pixel electrode (referred to as the first electrode for convenience) 115 and the second electrode 120 needs to be selected in consideration of the work function. The first electrode and the second electrode can be either an anode or a cathode depending on the pixel structure. In this embodiment mode, the polarity of the thin film transistor 111 to which the first electrode is connected is an N-channel type; therefore, the first electrode is preferably a cathode and the second electrode is an anode. In the case where the polarity of the thin film transistor is a p-channel type, it is preferable that the first electrode be an anode and the second electrode be a cathode.

Below, the electrode material used for an anode and a cathode is demonstrated.

As an electrode material used as the anode, it is preferable to use a metal, an alloy, an electrically conductive compound, or a mixture thereof having a high work function (work function of 4.0 eV or more). Specific examples include ITO, IZO mixed with 2-20% zinc oxide (ZnO) in indium oxide, ITSO, gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or A metal nitride (e.g., titanium nitride) can be used.

On the other hand, as an electrode material used as a cathode, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific materials include elements belonging to Group 1 or Group 2 of the periodic table, that is, alkali metals such as lithium and cesium, and magnesium, calcium, strontium, and the like, and alloys containing them (Mg: Ag, Al: Li ) And compounds (LiF, CsF, CaF ₂ ), and transition metals including rare earth metals.

Further, in the present embodiment, when the cathode material needs to be translucent, these metals or alloys containing these metals are formed very thin, and ITO, IZO, ITSO, or other transparent conductive films (alloys are used). Including).

By making the anode material or the cathode material used as the first electrode or the second electrode light-transmitting or non-light-transmitting, the light emission direction from the electroluminescent layer can be selected. For example, in the case where the first electrode and the second electrode are formed using a light-transmitting material, a dual emission display in which light from the electroluminescent layer is emitted to the substrate side 170 and the sealing substrate side 171 is performed. be able to. At this time, light can be effectively used by using a highly reflective conductive film for a non-light-transmitting electrode provided on the side not corresponding to the light emission direction.

The first electrode and the second electrode can be formed by an evaporation method, a sputtering method, a droplet discharge method, or the like.

Moreover, when forming ITO, ITSO, or those laminated bodies as a 2nd electrode by sputtering method, there exists a possibility that an electroluminescent layer may be damaged at the time of sputtering. In order to reduce damage due to sputtering, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) is preferably formed on the uppermost surface of the electroluminescent layer. Therefore, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) or titanium oxide (TiOx) that functions as an HIL or the like is formed on the uppermost surface of the electroluminescent layer, and the EIL (electron) is sequentially formed from the first electrode side. An injection layer), an ETL (electron transport layer), an EML (light emitting layer), an HTL (hole transport layer), an HIL (hole injection layer), and a second electrode are preferably stacked in this order. That is, an electroluminescent layer in which an organic material and an inorganic material are mixed may be formed.

In particular, in this embodiment mode, since the thin film transistor 111 has an N-channel polarity, the first electrode is a cathode, an EIL (electron injection layer), an ETL (electron transport layer), an EML (electron transport layer) in consideration of the direction of electron movement. It is preferable that the light emitting layer), HTL (hole transport layer), HIL (hole injection layer), and the second electrode be the anode.

In this embodiment mode, an interlayer insulating film is formed, which has high flatness and can apply a voltage uniformly to the electroluminescent layer.

After that, an insulating film containing nitrogen, a carbon film containing nitrogen (CNx), DLC, or the like may be formed as a protective film over the second electrode by a sputtering method or a CVD method. In particular, when ITSO is used for the second electrode, it is preferable to form a silicon nitride film as the protective film. Further, a protective film made of an organic material such as styrene polymer may be laminated on the protective film made of these inorganic materials. As a result, moisture and oxygen can be prevented from entering.

As described above, a conductive film or the like is formed in the opening portion of the insulating film by a droplet discharge method so as to have flatness. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

The thin film transistor included in the pixel portion of the display device described in this embodiment is characterized in that a conductive film or a mask is formed by at least a droplet discharge method. Therefore, if a droplet discharge method is used in one step of forming the conductive film or the mask, a step other than the droplet discharge method may be used for forming the other conductive film or mask. If the droplet discharge method is used in one process, the material utilization efficiency is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a mask is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 3)
In this embodiment, an example in which a thin film transistor is manufactured by a method different from that in the above embodiment will be described. Specifically, a structure in which an insulating film is provided over a semiconductor film serving as a channel formation region is different, and the structure of other thin film transistors is the same as that in the above embodiment mode, and thus description thereof is omitted.

As shown in FIG. 10A, a base film 101 is formed over a substrate 100, an insulating film 102 is formed over the base film 101, and a scan line 103a and a gate electrode are formed as in the above embodiment mode. A gate insulating film is formed so as to cover the insulating film, the scanning line, and the gate electrode. Thereafter, a semiconductor film is formed through the gate insulating film. At this time, since the surfaces of the insulating film 102, the scanning line 103a, and the gate electrode 103b are aligned and planarized, the gate insulating film can be formed without disconnection.

After that, an insulating film 140 functioning as a protective film is formed over the semiconductor film serving as a channel formation region. As the insulating film 140, an insulating film such as silicon oxide, silicon nitride, or silicon nitride oxide can be used. The insulating film 140 can be formed by a droplet discharge method, a plasma CVD method, a sputtering method, or the like. When an insulating film is formed on the entire surface by plasma CVD or the like, it is patterned into a desired shape by a photolithography process. As a photolithography process, for example, a mask material such as a resist is applied, a gate electrode is used as a mask, exposure is performed from the back surface, a mask having a desired shape is formed, and an insulating film is patterned using the mask. it can. Thus, when the insulating film 140 is formed by plasma CVD, a semiconductor film, an insulating film functioning as a protective film, and a gate insulating film can be formed continuously.

In addition, when the insulating film 140 is formed by a droplet discharge method, the utilization efficiency of the material is improved, and the cost can be reduced and the waste liquid processing amount can be reduced. Further, when an insulating film is formed by a droplet discharge method, the photolithography process can be omitted. As a result, a photomask becomes unnecessary, and it is possible to achieve a reduction in capital investment cost and a reduction in cost. Furthermore, since the photolithography process can be omitted, the manufacturing time can be shortened. Therefore, in this embodiment mode, the insulating film 140 is formed by dropping polyimide, polyvinyl alcohol, or the like using a droplet discharge method.

After that, a semiconductor film having one conductivity type is formed over the semiconductor film with the insulating film 140 interposed therebetween. As in the above embodiment, an n-type semiconductor film is formed.

Similarly to the above embodiment mode, the signal line and the power supply line 109a are formed in the same layer as the source electrode and the drain electrode. An insulating film 112 is formed at the intersection of the signal line, the power supply line, and the scanning line to prevent a short circuit. The insulating film can be formed in a manner similar to that of the insulating film 102. In this embodiment mode, polyimide is dropped by a droplet discharge method.

Thereafter, the N-type semiconductor film is etched using the source electrode and the drain electrode as a mask. This is because the N-type semiconductor film prevents the source electrode and the drain electrode from being short-circuited. At this time, the insulating film 140 can prevent the semiconductor film from being etched.

As described above, the thin film transistors 110 and 111 provided up to the source electrode and the drain electrode are completed. At this time, in the thin film transistors 110 and 111, the structure in which the source electrode or the drain electrode 109b of the thin film transistor 110 and the gate electrode of the thin film transistor 111 are directly connected to each other without a connection wiring is the same as in the above embodiment mode. In particular, when these thin film transistors are formed in the pixel portion of the display device, the thin film transistor 110 functions as switching, and the thin film transistor 111 functions as a drive for controlling the light emission luminance of the electroluminescent layer.

The thin film transistor in this embodiment is a so-called bottom gate thin film transistor in which a gate electrode is provided below a semiconductor film. More specifically, it is a so-called channel protection type in which a protective film is provided over a semiconductor film. A substrate provided with a plurality of such thin film transistors is referred to as a TFT substrate.

After that, as in the above embodiment, an interlayer insulating film 113, a conductive film 114, and a pixel electrode 115 are formed. In this manner, a module TFT substrate provided up to the pixel electrode is completed.

Next, unlike the above embodiment, a resin 141 is formed so as to cover an end portion of the pixel electrode 115. Since the resin 141 functions as a black matrix, the resin 141 is formed of a resin having a black color, for example, chromium. The resin 141 can be formed by patterning by a photolithography method or can be formed by a droplet discharge method. In this embodiment mode, the resin 141 is formed by discharging droplets containing a mixture of resin materials by a droplet discharge method. At this time, the resin 141 can be drawn using the periphery of the pixel electrode as an alignment marker.

After that, an insulating film 118 that functions as a bank or a partition is formed over the resin 141. For the material and manufacturing process of the insulating film 118, the above embodiment mode may be referred to. In the case where the insulating film 118 is formed by a droplet discharge method, drawing can be performed using the resin 141 as an alignment marker.

Next, as in the above embodiment mode, an electroluminescent layer 119 and a second electrode 120 are formed.

In the case where the resin 141 is formed at such a height that can function as a bank or a partition, the insulating film 118 is not necessarily formed.

Further, instead of the channel protective thin film transistor, the channel etch thin film transistor described in the above embodiment may be used. Needless to say, as in the above embodiment, the insulating film 118, the electroluminescent layer 119, and the second electrode 120 may be formed without forming the resin 141. That is, this embodiment mode can be freely combined with the above embodiment modes.

As described above, a conductive film or the like is formed in the opening portion of the insulating film by a droplet discharge method so as to have flatness. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

The thin film transistor described in this embodiment is characterized in that a conductive film or a mask is formed by at least a droplet discharge method. Therefore, if a droplet discharge method is used in one step of forming the conductive film or the mask, a step other than the droplet discharge method may be used for forming the other conductive film or mask. If the droplet discharge method is used in one process, the material utilization efficiency is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a mask is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 4)
In this embodiment, an example in which a thin film transistor is manufactured by a method different from that in the above embodiment will be described. Specifically, a thin film transistor is formed without patterning the semiconductor film and the gate insulating film at the same time, and the structure and process of other thin film transistors are the same as those in the above embodiment mode, and thus description thereof is omitted.

As shown in FIG. 11A, as in the above embodiment, the base film 101 is formed over the substrate 100, the insulating film 102, the scanning line 103a, and the gate electrode are formed, and the insulating film, the scanning line, A gate insulating film is formed so as to cover the gate electrode. At this time, since the surfaces of the insulating film 102, the scanning line 103a, and the gate electrode 103b are aligned and planarized, the gate insulating film can be formed without disconnection. A semiconductor film and an N-type semiconductor film are formed through the gate insulating film. Thereafter, the semiconductor film and the N-type semiconductor film are patterned into a desired shape. At this time, the gate insulating film is controlled not to be etched.

After that, the signal line and the power supply line 109a, the source electrode, and the drain electrode are formed in the same layer. In this embodiment mode, unlike the above embodiment mode, a gate insulating film is not etched at the same time as a semiconductor film and an N-type semiconductor film. Is formed. Therefore, it is not necessary to form the insulating film 112.

Thereafter, the N-type semiconductor film is etched using the source electrode and the drain electrode as a mask. This is because the N-type semiconductor film prevents the source electrode and the drain electrode from being short-circuited. At this time, the semiconductor film 108 may be slightly etched.

As described above, the thin film transistors 110 and 111 provided up to the source electrode and the drain electrode are completed. In particular, when these thin film transistors are formed in the pixel portion of the display device, the thin film transistor 110 functions as switching, and the thin film transistor 111 functions as a drive for controlling the light emission luminance of the electroluminescent layer.

The thin film transistor in this embodiment is a so-called bottom gate thin film transistor in which a gate electrode is provided below a semiconductor film. More specifically, it is a so-called channel etch type in which the semiconductor film is slightly etched. A substrate provided with a plurality of such thin film transistors is referred to as a TFT substrate.

Instead of the channel etch thin film transistor, the channel protective thin film transistor described in the above embodiment may be used. That is, this embodiment mode can be freely combined with the above embodiment modes.

As shown in FIG. 11B, an interlayer insulating film 113 and a conductive film 114 are formed as in the above embodiment. At this time, in the thin film transistors 110 and 111, an opening is formed in the gate insulating film in order to connect the source or drain electrode 109b of the thin film transistor 110 and the gate electrode of the thin film transistor 111. A conductive film 114 is formed in the opening as a connection wiring for connecting the source or drain electrode 109 b of the thin film transistor 110 and the gate electrode of the thin film transistor 111. Further, by forming a source electrode or a drain electrode, the source or drain electrode 109b of the thin film transistor 110 may be connected to the gate electrode of the thin film transistor 111 without using a connection wiring.

After that, the pixel electrode 115 is formed as in the above embodiment. In this manner, a module TFT substrate provided up to the pixel electrode is completed.

After that, an insulating film 118 functioning as a bank or a partition, an electroluminescent layer 119, and a second electrode 120 are formed. For the materials and manufacturing steps of the insulating film, the electroluminescent layer, and the second electrode, the above embodiment mode may be referred to.

Further, as shown in the above embodiment mode, a resin functioning as a black matrix may be formed. That is, this embodiment mode can be freely combined with the above embodiment modes.

As described above, a conductive film or the like is formed in the opening portion of the insulating film by a droplet discharge method so as to have flatness. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

The thin film transistor described in this embodiment is characterized in that a conductive film or a mask is formed by at least a droplet discharge method. Therefore, if a droplet discharge method is used in one step of forming the conductive film or the mask, a step other than the droplet discharge method may be used for forming the other conductive film or mask. If the droplet discharge method is used in one process, the material utilization efficiency is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a mask is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 5)
In this embodiment, an example in which a thin film transistor is manufactured by a method different from that in the above embodiment will be described. Specifically, a structure in which a gate electrode, a source electrode, and a drain electrode are provided below the semiconductor film is different, and the structure and manufacturing process of other thin film transistors are the same as those in the above embodiment mode, and thus description thereof is omitted.

As shown in FIG. 12A, a base film 101 is formed over a substrate 100 and an insulating film 102 is formed as in the above embodiment mode. Unlike the above embodiment, a conductive film 109 that functions as a signal line and a power supply line 109 a and a source electrode and a drain electrode 109 b is formed between the insulating films 102.

In this embodiment mode, an opening is formed in a desired region by dry etching, and an insulating film having a concave portion and a convex portion is formed. In addition, the opening in the region where the source electrode and the drain electrode are formed has a width of 10 μm to 40 μm, and the opening in the region where the signal line or the power supply line is formed has a width of 5 μm to 40 μm. The opening in the region for forming the film is formed to have a width of 20 μm to 100 μm. The opening is formed to have a depth of 1.5 μm to 2.5 μm.

In the case where such a wiring having a line width of 5 μm to 100 μm is formed, the amount of droplets is 0.1 pl to 40 pl, and the droplets may be dropped a plurality of times so as to satisfy the depth of the opening.

Similarly to the above embodiment mode, it is preferable to align the height of the conductive film 109 with the height of the protrusions of the insulating film. Therefore, planarization treatment is preferably performed when the height of the conductive film 109 is higher than the height of the protrusions of the insulating film.

On the other hand, when the volume of the conductive film contracts due to the heat treatment and the height of the conductive film 109 becomes lower than the height of the convex portion of the insulating film, the droplet may be dropped again.

After that, the insulating film 136 is preferably formed so as to cover the insulating film 102 and the conductive film 109. The insulating film 136 can be formed from silicon oxide or silicon nitride. In particular, in the case where silver (Ag) is used for the conductive film 109 as in this embodiment, if an insulating film containing oxygen is used, it may react with silver (Ag) to form silver oxide and roughen the gate electrode surface. Therefore, the insulating film 136 is preferably formed from silicon nitride.

Next, a semiconductor film 108 is formed, patterned into a desired shape, and then a gate insulating film 106 is formed so as to cover the semiconductor film. The above embodiment modes can be referred to for materials and manufacturing processes of the semiconductor film and the gate insulating film.

As shown in FIG. 12B, the insulating film 136 and the gate insulating film 106 are etched to form openings. A conductive film functioning as the gate electrode 103b is formed in the opening. A conductive film functioning as the scanning line 103a is formed in the same layer as the gate electrode. These conductive films 103 can be formed with reference to the above embodiment modes.

At this time, the line width of the gate electrode is set to 5 μm to 20 μm, the line width of the scanning line is set to 10 μm to 40 μm, and the line width of the wiring (not shown) routed to the external terminal is set to 20 μm to 100 μm. In this case, the width (channel length) of the gate electrode is 5 μm to 20 μm. Further, when a wiring having a line width of 5 μm to 100 μm is formed by the droplet discharge method as described above, the droplet amount is set to 0.1 pl to 40 pl. At this time, the droplet amount can be controlled by a control signal (for example, pulse voltage application) sent to the nozzle. For example, when the line width is 5 μm, the amount of droplets from the nozzle 104 may be controlled to be 0.1 pl. However, the wiring width can also be controlled by the contact angle between the surface on which the wiring is formed and the droplet.

In this embodiment mode, even when a gate electrode and a scan line are formed, an opening is formed in the insulating film as in the case of the source electrode and the drain electrode, and the gate electrode and the scan are formed between the openings. A line may be formed.

As described above, the thin film transistors 110 and 111 provided up to the gate electrode are completed. At this time, in the thin film transistors 110 and 111, the source electrode or the drain electrode 109b of the thin film transistor 110 and the gate electrode of the thin film transistor 111 are connected to each other by a gate electrode included in the thin film transistor 111 without a connection wiring. In particular, when these thin film transistors are formed in the pixel portion of the display device, the thin film transistor 110 functions as switching, and the thin film transistor 111 functions as a drive for controlling the light emission luminance of the electroluminescent layer.

The thin film transistor of this embodiment is a so-called top gate thin film transistor in which a gate electrode is provided above a semiconductor film. A substrate provided with a plurality of such thin film transistors is referred to as a TFT substrate.

A pixel electrode 115 is formed in another opening. The pixel electrode 115 can be formed with reference to the above embodiment modes. In this embodiment mode, unlike the above embodiment mode, the interlayer insulating film 113 and the conductive film 114 are not formed. Therefore, the semiconductor element can be thinned.

Instead of the top-gate thin film transistor, as illustrated in FIG. 21, the bottom-gate thin film transistor described in the above embodiment may be used. In FIG. 21, a TFT substrate is formed using a channel etch type thin film transistor. That is, this embodiment mode can be freely combined with the above embodiment modes.

In this manner, a module TFT substrate provided up to the pixel electrode is completed.

As shown in FIG. 12C, an insulating film 118 functioning as a bank or a partition, an electroluminescent layer 119, and a second electrode 120 are formed. The insulating film, the electroluminescent layer, and the second electrode can be formed with reference to the above embodiment mode. In particular, when silver (Ag) is used as a gate electrode as in this embodiment, it is preferable to form an insulating film (not shown) made of silicon nitride so as to cover the gate electrode. This is because when the insulating film containing oxygen is in contact with the gate electrode containing silver (Ag), it reacts with silver (Ag) to form silver oxide and roughen the surface of the gate electrode.

Further, as shown in the above embodiment mode, a resin functioning as a black matrix may be formed below the insulating film 118. That is, this embodiment mode can be freely combined with the above embodiment modes.

As described above, a conductive film or the like is formed in the opening portion of the insulating film by a droplet discharge method so as to have flatness. As a result, disconnection of the thin film formed over the conductive film and the insulating film can be prevented. Further, the wiring can be miniaturized by controlling the width of the opening. Furthermore, the thickness of the wiring can be increased by controlling the depth of the opening.

The thin film transistor described in this embodiment is characterized in that a conductive film or a mask is formed by at least a droplet discharge method. Therefore, if a droplet discharge method is used in one step of forming the conductive film or the mask, a step other than the droplet discharge method may be used for forming the other conductive film or mask. If the droplet discharge method is used in one process, the material utilization efficiency is improved, and the cost and the amount of waste liquid can be reduced. In particular, when a mask is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 6)
In this embodiment, a module TFT substrate provided with a color filter will be described.

As shown in FIG. 13A, thin film transistors 110 and 111 are formed based on the first embodiment, for example. A substrate provided with a plurality of such thin film transistors is referred to as a TFT substrate.

In this embodiment mode, the color filter 135 is formed in the opening of the insulating film 102 and below the electroluminescent layer. The color filter is formed from an organic material having each RGB color. The color filter can be formed by a droplet discharge method or a photolithography method. In this embodiment mode, when the conductive film 103 is formed by a droplet discharge method, a color filter is formed by discharging droplets mixed with a color filter material.

Furthermore, when each RGB electroluminescent layer is formed, a broad peak in each RGB emission spectrum can be corrected by a color filter so as to be sharp.

Thereafter, similarly to the above embodiment, the pixel electrode 115 is formed, and the module TFT substrate is completed. Next, the electroluminescent layer and the second electrode can be formed with reference to the above embodiment mode.

FIG. 13B is different from FIG. 13A in the structure in which the color filter 135 is formed in the opening of the interlayer insulating film 113. Further, a structure in which a conductive film 114 functioning as an auxiliary wiring is formed so as to connect the source electrode or the drain electrode of the thin film transistor 110 and the gate electrode of the thin film transistor 111 is different from that in FIG. By forming the conductive film 114 over the connection region, contact defects can be reduced.

Instead of the channel etch type thin film transistor, the channel protection type or top gate type thin film transistor described in any of Embodiments 3 to 5 may be used. Further, as shown in the above embodiment mode, a resin functioning as a black matrix may be formed below an insulating film functioning as a bank or a partition. Furthermore, an insulating film functioning as a bank or a partition may be formed without forming the interlayer insulating film 113 and the conductive film 114. As a result, it is possible to reduce the thickness of the semiconductor element.

As described above, this embodiment can be freely combined with the above embodiment.

(Embodiment 7)
In this embodiment, an example of a structure for sealing the module substrate described in the above embodiment will be described.

FIG. 14A shows a cross-sectional view of a sealed module substrate. The substrate 100 and the counter substrate 151 are attached to each other with a sealant 153. The sealing agent is made of a thermosetting resin or an ultraviolet curable resin, and is heated while applying pressure or irradiated with ultraviolet rays to bond and fix the first substrate and the second substrate. For example, an epoxy resin can be used as the sealant. Spacers are mixed in the sealing agent, and a gap between the substrate 100 and the counter substrate 151, that is, a so-called gap is maintained. A spacer having a spherical or columnar shape is used as the spacer, and in this embodiment, a cylindrical spacer is used, and the diameter of the circle becomes a gap. A desiccant 152 may be provided on the counter substrate. The desiccant can prevent moisture and oxygen from entering. Furthermore, a color filter may be formed on the counter substrate. This is because the color filter can correct a broad peak to be sharp in the emission spectrum of each RGB. In the case of performing a dual emission display in which light from the electroluminescent layer is emitted to the substrate side 170 and the sealing substrate side 171, a color filter may be provided on both substrates.

When sealed with the counter substrate 151, a space is formed between the second electrode 120. The space can be filled with an inert gas, for example, nitrogen gas, or a material with high water absorption can be formed to further prevent moisture and oxygen from entering. Further, a resin having translucency and high water absorption may be formed. Even when light from the light-emitting element is emitted to the second substrate side with the light-transmitting resin, the light-transmitting resin can be formed without reducing the transmitted light.

In this embodiment mode, as described in the above embodiment mode, a thin film transistor is formed using an amorphous semiconductor film. In consideration of operation speed, the signal line driver circuit or the scan line driver circuit is an IC chip. 162. Such a driving circuit is mounted by the TAB method and by the COG method around the pixel portion. In the case where a thin film transistor is formed using SAS, only the scanning line driver circuit can be integrally formed over the substrate and the signal line driver circuit can be separately mounted as a driver IC.

Next, mounting of the signal line driver circuit 605 and the scanning line driver circuits 604a and 604b will be specifically described with reference to FIG.

As shown in FIG. 22A, a signal line driver circuit 605 and scan line driver circuits 604a and 604b are mounted around the pixel portion 603. In FIG. 22A, an IC chip 162 is mounted on the substrate 100 by a COG method as the signal line driver circuit 605 and the scan line driver circuits 604a and 604b. Then, the IC chip and an external circuit are connected via an FPC (flexible printed circuit) 161.

22B, in the case where a TFT is formed using a SAS or a crystalline semiconductor, the pixel portion 603, the scan line driver circuit 604, and the like are integrally formed over the substrate, and the signal line driver circuit 605 and the like are separately provided. It may be mounted as an IC chip. In FIG. 22B, an IC chip 162 is mounted on the substrate 100 as a signal line driver circuit 605 by a COG method. Then, the IC chip and the external circuit are connected via the FPC 161.

Further, as shown in FIG. 22C, a signal line driver circuit 605 or the like may be mounted by a TAB method instead of the COG method. Then, the IC chip and the external circuit are connected via the FPC 161. In FIG. 22C, the signal line driver circuit is mounted by a TAB method; however, the scan line driver circuit may be mounted by a TAB method.

When the IC chip is mounted by the TAB method, a pixel portion can be provided larger than the substrate, and a narrow frame can be achieved.

The IC chip is formed using a silicon wafer, but an IC (hereinafter referred to as a driver IC) in which an IC is formed on a glass substrate may be provided instead of the IC chip. Since an IC chip is taken out from a circular silicon wafer, the shape of the base substrate is limited. On the other hand, the driver IC has a mother substrate made of glass and has no restriction in shape, so that productivity can be improved. Therefore, the shape of the driver IC can be set freely. For example, when the length of the long side of the driver IC is 15 to 80 mm, the required number can be reduced as compared with the case where the IC chip is mounted. As a result, the number of connection terminals can be reduced, and the manufacturing yield can be improved.

The driver IC can be formed using a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiation with continuous wave laser light. A semiconductor film obtained by irradiating continuous wave laser light has few crystal defects and large crystal grains. As a result, a transistor having such a semiconductor film has favorable mobility and response speed, can be driven at high speed, and is suitable for a driver IC.

In this embodiment mode, the signal line driver circuit formed by the IC chip 162 is provided on the FPC 161 by the TAB method and connected to the thin film transistors 110 and 111 through the anisotropic conductive film 160. Also, when adhering the anisotropic conductive film by pressurization or heating, care is taken not to cause cracks due to the flexibility of the substrate and softening due to heating. A video signal and a clock signal are received from the IC chip thus connected.

A cross-sectional configuration in which the driver IC is mounted by COG will be described with reference to FIG. FIG. 50A shows a structure in which a driver IC 1060 is mounted on a TFT substrate 1200 using an anisotropic conductive material. The TFT substrate 1200 has a pixel region 1011 and a signal line side input terminal 1040 (the same applies to the scanning line input terminal 1103). The counter substrate 1229 is bonded to the TFT substrate 1200 with a sealant 1226, and a liquid crystal layer 1023 is formed therebetween. In the case of a light emitting device, an electroluminescent layer is formed.

An FPC 1812 is bonded to the signal line side input terminal 1040 with an anisotropic conductive material. The anisotropic conductive material is composed of resin 1815 and conductive particles 1814 having a diameter of several tens to several hundreds μm whose surface is plated with Au or the like, and wiring formed on the signal line side input terminal 1040 and the FPC 1812 by the conductive particles 1814. 1813 is electrically connected. The driver IC 1060 is also electrically connected to the TFT substrate 1200 with an anisotropic conductive material and electrically connected to the input / output terminal 1809 and the signal line side input terminal 1040 provided in the driver IC 1060 by the conductive particles 1810 mixed in the resin 1811. Connected to.

As shown in FIG. 50B, the driver IC 1060 may be fixed to the TFT substrate 1200 with an adhesive 1816, and the input / output terminal of the driver IC may be connected to the lead wire or the connection wiring by the Au wire 1817. . Then, sealing is performed with a sealing resin 1818. Note that the method for mounting the driver IC is not particularly limited, and a known COG method, wire bonding method, or TAB method can be used.

By setting the thickness of the driver IC to the same thickness as that of the counter substrate, the height between the two becomes substantially the same, which contributes to a reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

As described above, a driver circuit can be incorporated in a panel (display panel) in which a pixel portion of a display device is formed.

FIG. 14B shows a case where sealing is performed without using a counter substrate, unlike FIG. 14A. Since the other structure is the same, description is abbreviate | omitted.

In FIG. 14B, a protective film 155 is provided to cover the second electrode 120. An organic material such as an epoxy resin, a urethane resin, or a silicone resin can be used as the second protective film. Further, the second protective film may be formed by dropping a polymer material by a droplet discharge method. In this embodiment mode, the epoxy resin is discharged using a dispenser and dried. Further, a counter substrate may be provided over the protective film.

When sealing is performed without using the counter substrate in this manner, the weight, size, and thickness of the display device can be improved.

FIG. 18A shows an appearance of the sealed light-emitting device shown in FIG. 14 as viewed from above, and a control circuit 601a and a power supply circuit 602 are mounted through an FPC. A cross-sectional view taken along the line DD ′ in FIG. 18A corresponds to FIG. 14, and a pixel portion 603 in which a light-emitting element is provided in each pixel as described in the above embodiment is provided over the substrate 100. Is provided. Needless to say, a liquid crystal element may be provided instead of the light emitting element. A thin film transistor included in the pixel portion 603 can be formed as in the above embodiment mode.

In FIG. 18, a scanning line driver circuit 604 that selects a pixel included in the pixel portion 603 and a signal line driver circuit 605 that supplies a video signal to the selected pixel are formed using an IC chip and mounted by a TAB method. Yes. The long side and short side length and the number of ICs to be mounted are not limited to the present embodiment. Further, as described above, the scan line driver circuit and the signal line driver circuit can be formed integrally with the pixel portion depending on the crystal state of the thin film transistor. For example, the buffer circuit included in the scan line driver circuit can be formed over the same substrate.

The printed circuit board 607 is provided with a control circuit 601a, a power supply circuit 602, a video signal processing circuit 609a, a video RAM 610a, and an audio circuit 611a. The power supply voltage output from the power supply circuit 602 and various signals from the control circuit 601a, the video signal processing circuit 609a, the video RAM 610a, and the audio circuit 611a are sent to the scanning line drive circuit 604 and the signal line drive circuit 605 via the FPC 161. Supplied to the pixel portion 603.

The power supply voltage and various signals of the printed circuit board 607 are supplied via an interface (I / F) unit 608 in which a plurality of input terminals are arranged. The video signal processing circuit 609 a receives a signal from an interface (I / F) unit 608. Further, the video signal processing circuit 609a exchanges signals with the video RAM 610a.

In this embodiment mode, the printed circuit board 607 is mounted using the FPC 161; however, the structure is not necessarily limited thereto. The control circuit 601a and the power supply circuit 602 may be directly mounted on the substrate using a COG (Chip on Glass) method. The mounting method of the IC chip such as the signal line driver circuit and the scanning line driver circuit is not limited to this embodiment mode, and the IC chip formed on the substrate is connected to the wiring of the pixel portion by a wire bonding method. Also good.

Further, in the printed circuit board 607, noise may occur in a power supply voltage or a signal, or a signal may be slow to rise due to a capacitance formed between the routing wirings, a resistance of the wiring itself, or the like. Therefore, various elements such as a capacitor and a buffer may be provided on the printed circuit board 607 so as to prevent noise on the power supply voltage and the signal and the rise of the signal from becoming dull.

In order to enhance the contrast, it is preferable to provide a polarizing plate or a circularly polarizing plate at least in the pixel portion of the module. For example, as shown in FIG. 18B corresponding to the cross section of EE ′, when the display is recognized from the sealing substrate side, the quarter λ plate 651 and the ½λ plate 652 are sequentially formed from the sealing substrate 650. A polarizing plate 653 is preferably provided. Further, an antireflection film 654 may be provided over the polarizing plate.

Such a module can be installed in a housing of an electronic device and completed as a product. A heat sink or the like may be provided in the housing to prevent the module from generating heat.

(Embodiment 8)
In this embodiment, a method for forming an insulating film, a conductive film, and the like is described. Note that in the drawings used in this embodiment mode, the size of the nozzle with respect to the semiconductor film and the like is schematic and may differ from the actual size.

As shown in FIG. 5A, after forming the insulating film 102, an opening 130 is formed in a desired region. As in the above embodiment, the opening in the region where the gate electrode is formed has a width of 5 μm to 20 μm, and the opening in the region where the scanning line is formed has a width of 10 μm to 40 μm and is a wiring (not shown) routed to an external terminal The opening in the region for forming the film is formed to have a width of 20 μm to 100 μm. In this case, the width (channel length) of the gate electrode is 5 μm to 20 μm. In addition, the depth of the opening is commonly 1.5 μm to 2.5 μm.

FIG. 5B is a cross-sectional view taken along CD in FIG. 5A, in which the base film 101 is formed over the substrate 100 and the insulating film 102 is formed over the base film. An opening 130 is formed in the insulating film 102 by a dry etching method or a wet etching method.

Next, as shown in FIG. 5C, scanning is performed while discharging droplets having a conductive film material from the nozzle 104, whereby the scan line 103a and the gate electrode 103b are formed.

Further, as shown in FIG. 5D, when the nozzle 104 comes over the opening, the control signal is turned on and control is performed so as to discharge. As described above, when the nozzle comes to a desired position, the pattern can be selectively formed by turning on the control signal.

That is, FIG. 5 is characterized in that after an opening is formed in the insulating film, a conductive film such as a scanning line and a gate electrode is formed in the opening by a droplet discharge method.

Although FIG. 5 is described focusing on the gate electrode 103b, a manufacturing process may be used for a lead wiring or a scanning line.

Next, a case where an insulating film and a conductive film are simultaneously formed by a droplet discharge method, which is different from FIG. 5, will be described.

As shown in FIG. 6A, a droplet having an insulating film material and a droplet having a conductive film material are simultaneously discharged from a nozzle 104. Therefore, the nozzle 104 is designed to drop a droplet having an insulating film material and a conductive film material. At this time, when the nozzle comes in a desired area, each control signal is set to be on, and each pattern can be selectively formed. For example, as shown in FIG. 6B, a nozzle 104a having an insulating film material and a nozzle 104b having a conductive film material are provided in a plurality of nozzles provided in one head. When the nozzle comes to a desired area, the control signals are set to be turned on. 6B is a cross-sectional view taken along the line E-F in FIG.

Further, as shown in FIGS. 7A and 7B, two heads are installed, and the nozzles 104a and 104b of each head are exclusively used for nozzles having an insulating film material and nozzles having a conductive film material. . Note that FIG. 7B is a cross-sectional view taken along the line CD in FIG. Even in this case, the control signal is set to be turned on when the nozzle comes in a desired region.

Thus, by installing a dedicated nozzle, it is possible to freely set a region where each material is provided.

In addition, since different types of adjacent patterns are formed at the same time, the patterns can support each other and prevent pattern breakage. Therefore, when the wiring is formed, it is possible to easily form a thickened wiring as compared with the case where the wiring is formed only from the droplet discharge method.

In FIGS. 6 and 7, the gate electrode 103b has been described, but a manufacturing process may be used for the lead wiring and the scan line. Since the routing wiring and the scanning line have a wider wiring width than the gate electrode, the throughput can be improved by increasing the amount of droplets from the nozzle.

Next, a case where an insulating film and a conductive film are separately formed by a droplet discharge method, which is different from FIGS. When formed separately, either the insulating film or the conductive film may be formed first, but in this embodiment, the insulating film is formed first. As a result, compared with the case where a fine conductive film is formed first, it can be expected that the conductive film pattern is prevented from being broken.

As shown in FIG. 8A, droplets having an insulating film material are selectively discharged from a nozzle 104 onto a substrate 100 over which a base film 101 is formed. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 8B is a cross-sectional view taken along CD in FIG.

After the insulating film is formed, heat treatment is performed for baking to remove the solvent in the droplets. Specifically, heating is performed at 200 ° C to 300 ° C. This is referred to as main firing. Further, in the above heat treatment, it is only necessary to remove a certain amount of solvent and cure the shape of the insulating film as compared with immediately after landing of the droplet, and therefore, the heat treatment may be performed at a low temperature of 100 ° C. to 200 ° C. This is referred to as temporary firing. Furthermore, it may be left as it is without heating and dried. Then, the main baking may be performed simultaneously with the heating of the conductive film to be formed later.

After that, as shown in FIG. 8C, a droplet having a conductive film material is discharged from the nozzle 104. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 8C is a cross-sectional view taken along the line CD in FIG.

After the conductive film is formed, heat treatment is performed for baking to remove the solvent in the droplets. Specifically, heating is performed at 200 ° C to 300 ° C. This is referred to as main firing. Simultaneously with the main baking of this conductive film, the main baking of the insulating film can be performed. The heat treatment for the conductive film is preferably performed in an atmosphere containing oxygen. In particular, when using droplets containing silver (Ag), heat treatment should be performed in an atmosphere containing oxygen and nitrogen as described above. As a result, the flatness of the gate electrode surface can be improved and the specific resistance value can be lowered.

In addition, before forming the insulating film or the conductive film, a liquid repellent treatment or a lyophilic treatment may be performed in order to increase the landing accuracy or simplify the selective pattern formation. For example, a liquid repellent treatment or a lyophilic treatment can be performed by performing a plasma treatment using air, oxygen, or nitrogen as a treatment gas.

Whether the liquid repellent treatment or the lyophilic treatment is performed can be determined by the solvent of the droplet. In particular, when a conductive film is formed in the opening, and the solvent of the droplet having the conductive film is alcoholic, the surface of the insulating film is subjected to a liquid repellent treatment, and the opening (including the side surface of the opening) It is preferable to perform lyophilic treatment. As a result, the conductive film can be formed accurately and easily by a droplet discharge method.

In addition, by forming a thin conductive film using a droplet having liquid repellency with respect to a droplet having an insulating film material, it is possible to improve landing accuracy and simplify selective pattern formation. . Specifically, a droplet having liquid repellency with respect to a droplet having an insulating film material is used and selectively ejected thinly into a region where a conductive film is formed, thereby forming a liquid repellency region. Alternatively, it may be selectively formed only at the starting point of the pattern for forming the conductive film. A droplet that exhibits liquid repellency with respect to a droplet including an insulating film material is a droplet including a conductive film material.

Thereafter, when a droplet having an insulating film material is discharged, an insulating film is formed except for the liquid repellent region. Therefore, since the insulating film is formed so as to have an opening in a region where the conductive film is formed, the selective formation of the insulating film is simplified. In addition, even when a droplet having an insulating film material is dropped slightly, the droplet is difficult to drop into the liquid repellent region, and the droplet aggregates outside the liquid repellent region. As a result, some deviation can be corrected, and landing accuracy is improved. After that, a conductive film can be formed by discharging a droplet containing a conductive film material into the opening. A heating step may be provided between the insulating film and the conductive film as described above.

Such a liquid repellent region may be provided not in the conductive film forming region but in the insulating film forming region. In particular, the pattern may be thinly formed with respect to a pattern formation region provided later. Furthermore, you may use together with the said plasma processing.

Although FIG. 8 is described focusing on the gate electrode 103b, a manufacturing process may be used for the lead wiring and the scan line.

Next, the case where the interlayer insulating film 113 and the conductive film 114 are formed by a droplet discharge method will be described.

As shown in FIG. 9A, droplets having an interlayer insulating film material are selectively discharged from the nozzle 104 in a state where the signal lines and the power supply lines 109a are formed. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 9B is a cross-sectional view taken along the line GH in FIG.

After the interlayer insulating film is formed, heat treatment is performed for baking to remove the solvent in the droplets. Specifically, the main baking is performed at 200 ° C to 300 ° C. In the above heat treatment, it is only necessary to remove a certain amount of solvent and cure the shape of the insulating film as compared with immediately after landing of the droplet. Furthermore, it may be left as it is without heating and dried. Then, the main baking may be performed simultaneously with the heating of the conductive film to be formed later.

After that, as shown in FIG. 9C, a droplet having a conductive film material is discharged from the nozzle 104. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 9D is a cross-sectional view taken along line GH in FIG.

After the conductive film 114 is formed, heat treatment is performed for baking to remove the solvent in the droplets. Specifically, heating is performed at 200 ° C to 300 ° C. This is referred to as main firing. At the same time, the main firing of the insulating film can be performed. The heat treatment for the conductive film is preferably performed in an atmosphere containing oxygen. In particular, when using droplets containing silver (Ag), heat treatment should be performed in an atmosphere containing oxygen and nitrogen as described above. As a result, the flatness of the gate electrode surface can be improved and the specific resistance value can be lowered.

In FIG. 9, as shown in FIG. 5, an opening is formed in the interlayer insulating film 113 by a dry etching method or a wet etching method, and a droplet having a conductive film material is discharged by a droplet discharge method. Good.

In FIG. 9, as shown in FIGS. 6 and 7, the interlayer insulating film 113 and the conductive film 114 may be formed simultaneously by a droplet discharge method.

As described above, in FIGS. 5 to 9, for example, when wiring is formed in an opening having a width of 5 μm to 100 μm, the amount of liquid droplet is 0.1 pl to 40 pl, and the liquid may be dropped several times so as to satisfy the depth of the opening. At this time, the droplet amount can be controlled by a control signal (for example, pulse voltage application) sent to the nozzle.

Next, a case where the black matrix and the insulating film 118 are formed by a droplet discharge method will be described. Note that Embodiment 2 can be referred to for the structure of the thin film transistor.

As shown in FIG. 15A, droplets having a black matrix material are selectively discharged from the nozzle 104 in a state where the pixel electrode 115 is formed. At this time, it is possible to draw with the periphery of the pixel electrode as an alignment marker. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 15B is a cross-sectional view taken along line I-J in FIG.

After forming the black matrix, heat treatment may be performed for firing to remove the solvent in the droplets. Further, in the heat treatment, it is only necessary to remove a certain amount of solvent and to cure the shape of the insulating film as compared with the case immediately after landing of the droplet, and therefore, it is only necessary to perform preliminary firing at a low temperature. Furthermore, it may be left as it is without heating and dried. Then, heat treatment may be performed at the same time as an insulating film to be formed later.

After that, as shown in FIG. 15C, a droplet having an insulating film material is discharged from the nozzle 104. In the case where the insulating film 118 is formed by a droplet discharge method, drawing can be performed using the resin 141 as an alignment marker. At this time, each nozzle is set so that each control signal is turned on when the nozzle comes in a desired region. Note that FIG. 15D is a cross-sectional view taken along line I-J in FIG.

After the insulating film 118 is formed, heat treatment is performed for baking to remove the solvent in the droplets. At the same time, heat treatment of the black matrix can be performed.

As described above, a droplet discharge method can be used in the thin film transistor process. In addition, when a pattern such as a wiring is formed by a droplet discharge method, the material utilization efficiency is improved, and the cost can be reduced and the amount of waste liquid processed can be reduced. In particular, when a pattern is formed by a droplet discharge method, the process can be simplified as compared with a photolithography process. As a result, it is possible to reduce capital investment cost, cost reduction, and manufacturing time.

(Embodiment 9)
In this embodiment, a pixel circuit of the light-emitting device having the thin film transistor described in the above embodiment and an operation thereof will be described.

In the pixel shown in FIG. 16A, a signal line 410 and power supply lines 411 and 412 are arranged in the column direction, and a scanning line 414 is arranged in the row direction. The pixel further includes a switching TFT 401, a driving TFT 403, a current control TFT 404, a capacitor element 402, and a light emitting element 405.

The pixel shown in FIG. 16C is different from the pixel shown in FIG. 16A except that the gate electrode of the TFT 403 is connected to the power supply line 412 arranged in the row direction. is there. That is, both pixels shown in FIGS. 16A and 16C show the same equivalent circuit diagram. However, in the case where the power supply line 412 is arranged in the row direction (FIG. 16A) and in the case where the power supply line 412 is arranged in the column direction (FIG. 16C), each power supply line has a different layer. It is formed of a conductive film. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 403 is connected, and FIGS. 16A and 16C are shown separately to show that the layers for producing these are different.

As a feature of the pixel shown in FIGS. 16A and 16C, TFTs 403 and 404 are connected in series in the pixel. The channel length L (403), the channel width W (403) of the TFT 403, and the channel length L of the TFT 404 (404), and the channel width W (404) may be set so as to satisfy L (403) / W (403): L (404) / W (404) = 5 to 6000: 1.

Note that the TFT 403 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 405, and the TFT 404 has a role of controlling a current supply to the light emitting element 405 by operating in a linear region. Both TFTs preferably have the same conductivity type in terms of manufacturing process, and in this embodiment mode, they are formed as n-channel TFTs. The TFT 403 may be a depletion type TFT as well as an enhancement type. In the present invention having the above structure, since the TFT 404 operates in a linear region, a slight change in Vgs of the TFT 404 does not affect the current value of the light emitting element 405. That is, the current value of the light emitting element 405 can be determined by the TFT 403 operating in the saturation region. With the above structure, it is possible to provide a display device in which luminance unevenness of a light-emitting element due to variation in TFT characteristics is improved and image quality is improved.

In the pixels shown in FIGS. 16A to 16D, a TFT 401 controls input of a video signal to the pixel. When the TFT 401 is turned on, a video signal is input into the pixel. Then, the voltage of the video signal is held in the capacitor 402. Note that FIGS. 16A and 16C illustrate a structure in which the capacitor 402 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 402 is not necessarily provided.

The pixel illustrated in FIG. 16B has the same pixel structure as that illustrated in FIG. 16A except that a TFT 406 and a scanning line 416 are added. Similarly, the pixel illustrated in FIG. 16D has the same pixel structure as that illustrated in FIG. 16C except that a TFT 406 and a scanning line 416 are added.

The TFT 406 is controlled to be turned on or off by a newly arranged scanning line 416. When the TFT 406 is turned on, the charge held in the capacitor 402 is discharged, and the TFT 404 is turned off. That is, a state in which no current flows through the light emitting element 405 can be created by the arrangement of the TFT 406. Therefore, the TFT 406 can be called an erasing TFT. Accordingly, the structures in FIGS. 16B and 16D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

A pixel illustrated in FIG. 16E corresponds to the equivalent circuit of the pixel including the thin film transistor described in the above embodiment, in which a signal line 410, a power supply line 411, and a scanning line 414 are disposed in a row direction. In addition, the pixel includes a switching TFT 401, a driving TFT 403, a capacitor element 402, and a light emitting element 405. The pixel illustrated in FIG. 16F has the same pixel structure as that illustrated in FIG. 16E except that a TFT 406 and a scanning line 415 are added. Note that the duty ratio can also be improved in the structure of FIG.

In particular, when a thin film transistor including an amorphous semiconductor or the like is formed as in the above embodiment mode, it is preferable to increase the semiconductor film of the driving TFT. In this case, the aperture ratio may be reduced. Therefore, a structure shown in FIG. 16E or FIG. 16F with a small number of TFTs is preferably used.

Such an active matrix light-emitting device is considered to be advantageous because it can be driven at a low voltage because a TFT is provided in each pixel when the pixel density is increased. On the other hand, a passive matrix light-emitting device in which a TFT is provided for each column can be formed. A passive matrix light-emitting device has a high aperture ratio because a TFT is not provided for each pixel.

As described above, various pixel circuits can be employed.

(Embodiment 10)
In this embodiment mode, a droplet discharge apparatus that can be used for pattern formation in the above embodiment mode will be described. In FIG. 17, a region 830 where one panel is formed on the large substrate 100 is indicated by a dotted line.

FIG. 17 shows one mode of a droplet discharge device used for forming a pattern such as a wiring. The droplet discharge means 805 has a head 803, and the head 803 has a plurality of nozzles 204. In this embodiment, the case where there are three heads (803a, 803b, 803c) provided with ten nozzles is described. However, the number of nozzles and the number of heads are set according to the processing area, the process, and the like. Can do.

The head 803 is connected to the control unit 807, and the control unit can control the computer 810 to draw a preset pattern. The drawing timing may be performed using, for example, the marker 811 formed on the substrate 100 or the like fixed on the stage 831 as a reference point. Further, the edge of the substrate 100 may be used as a reference point. These reference points are detected by an imaging unit 804 such as a CCD, and converted into a digital signal by an image processing unit 809. The computer 810 recognizes the digitally changed signal, generates a control signal, and sends it to the control means 807. When drawing a pattern in this way, the distance between the pattern forming surface and the tip of the nozzle is 0.1 cm to 5 cm, preferably 0.1 cm to 2 cm, and more preferably around 0.1 mm. By shortening the interval in this way, droplet landing accuracy is improved.

At this time, information on the pattern formed on the substrate 100 is stored in the storage medium 808. Based on this information, a control signal is sent to the control means 807 to individually control the heads 803a, 803b, and 803c. be able to. That is, droplets having different materials can be ejected from the nozzles of the heads 803a, 803b, and 803c. For example, the nozzles of the heads 803a and 803b can discharge droplets having an insulating film material, and the nozzles of the head 803c can discharge droplets having a conductive film material.

Further, each nozzle of the head 803 can be individually controlled. Since the nozzles can be individually controlled, droplets having different materials can be discharged from a specific nozzle. For example, the same head 803a can be provided with a nozzle for discharging a droplet having a conductive film material and a nozzle for discharging a droplet having an insulating film material.

In the case where a droplet discharge process is performed on a large area as in the step of forming an interlayer insulating film, droplets having an interlayer insulating film material may be discharged from all nozzles. Furthermore, it is preferable to discharge droplets having an interlayer insulating film material from all nozzles of a plurality of heads. As a result, throughput can be improved. Of course, in the interlayer insulating film forming step, a droplet having the interlayer insulating film material may be discharged from a single nozzle and a plurality of scans may be performed to perform a droplet discharging process on a large area.

Then, the head 803 can be moved or reciprocated in a zigzag manner to form a pattern on the large mother glass. At this time, the head and the substrate may be relatively scanned a plurality of times. When scanning the head with respect to the substrate, the head may be inclined obliquely with respect to the traveling direction.

When forming a plurality of panels from a large mother glass, the width of the head 803 is preferably about the same as the width of one panel. This is because a pattern can be formed in one scan of the region 830 where one panel is formed, and high throughput can be expected.

The width of the head may be smaller than the width of the panel. At this time, a plurality of small heads may be arranged in series so as to be approximately the same as the width of one panel. By arranging a plurality of small heads in series, it is possible to prevent the occurrence of head deflection, which is a concern as the head width increases. Of course, the pattern may be formed by scanning a narrow head a plurality of times.

The step of discharging the composition droplets by such a droplet discharge method is preferably performed under reduced pressure. This is because the solvent of the composition evaporates and the steps of drying and firing the composition can be omitted before the composition is discharged and landed on the object to be processed. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. The step of dropping the composition may be performed in a nitrogen atmosphere or an organic gas atmosphere.

As a droplet discharge method, a piezo method can be used. The piezo method is also used in inkjet printers because of its excellent droplet controllability and high degree of freedom in ink selection. There are two types of piezo systems: MLP (Multi Layer Piezo) type and MLChip (Multi Layer Ceramic Hyper Integrated Piezo Segments) type. Further, depending on the solvent of the composition, a droplet discharge method using a so-called thermal method in which a heating element generates heat to generate bubbles to push out the solution may be used.

(Embodiment 11)
The thin film transistor and the display device having the same according to the present invention are preferably formed by a droplet discharge system shown in FIG. First, circuit design is performed by a circuit design tool 1100 such as CAD, CAM, CAE, etc., and an arrangement location of a desired thin film and alignment marker is determined.

Next, the thin film pattern data 1101 including the locations of the designed thin film and alignment markers is stored in a computer 1002 that controls the droplet discharge device via an information network such as a recording medium or a LAN (Local Area Network). Is input. Then, based on the thin film pattern data 1101, a composition containing a material constituting the thin film among the nozzles (a cylindrical device that ejects liquid or gas from a thin hole at the tip) of the droplet discharge means 1003. Or a nozzle having an optimal discharge port diameter connected to a tank for storing the composition is determined, and then a scanning path (movement path) of the droplet discharge means 1003 is determined. If an optimal nozzle is determined in advance, only the movement path of the nozzle need be set.

Next, an alignment marker 1017 is formed on the substrate 1004 on which the thin film is formed, using a photolithography technique or laser light. Then, the substrate on which the alignment marker is formed is placed on the stage 1016 in the droplet discharge apparatus, and the position of the alignment marker is detected by the imaging means 1005 provided in the apparatus, and the image processing apparatus 1006 is used to detect the position of the alignment marker. The position information 1007 is input to the computer 1002. In the computer 1002, the alignment of the substrate 1004 and the droplet discharge means 1003 is performed by comparing the thin film pattern data 1101 designed by CAD or the like with the position information 1007 of the alignment marker obtained by the imaging means 1005. Do.

Thereafter, the droplet discharge means 1003 or the XYθ stage 1016 controlled by the controller 1008 moves according to the determined scanning path (in the direction of the arrow), and discharges the composition from the droplet discharge means 1003, whereby a desired thin film pattern is obtained. 1109 is formed. The discharge amount of the composition can be adjusted as appropriate by selecting the diameter of the discharge port, but the moving speed of the discharge port, the interval between the discharge port and the substrate, the discharge speed of the composition, the discharge space Since it varies slightly depending on all conditions such as atmosphere, temperature and humidity of the space, it is desirable to be able to control these conditions. As for these, optimal conditions are obtained in advance by experiments and evaluations, and a database (1119) is preferably prepared for each material of the composition.

Here, examples of the thin film pattern data include circuit diagrams of module TFT substrates used in liquid crystal display devices, light emitting devices, and the like. The circuit diagram in a circle in FIG. 42 schematically shows a conductive film used for such a module TFT substrate. 1121 is a so-called gate wiring, 1122 is a source signal line (2nd wiring), and 1123 is a pixel electrode, a hole injection electrode, or an electron injection electrode. Reference numeral 1120 denotes a substrate, and 1124 denotes an alignment marker. Naturally, the thin film pattern 1109 corresponds to the gate wiring 1121 in the thin film pattern information.

Here, the droplet discharge means 1003 has a configuration in which the nozzles 1110, 1111, and 1112 are integrated, but the present invention is not limited to this. Each nozzle has a plurality of discharge ports 1013, 1114, and 1115, respectively. The thin film pattern 1109 is formed by selecting a predetermined discharge port 1013 out of the nozzles 1110.

Note that the droplet discharge means 1003 is provided with a plurality of nozzles having different discharge port diameters, discharge amounts, or nozzle pitches in order to cope with the production of thin film patterns having any line width and to improve the tact time. Is desirable. Further, it is desirable that the interval between the discharge ports is as narrow as possible. In addition, it is desirable to provide a nozzle having a length of 1 m or more in order to perform high-throughput discharge on a large area substrate having a side of 1 m or more to 6 tatami mats. Further, an expansion / contraction function may be provided so that the interval between the discharge ports can be freely controlled. In order to draw a high resolution, that is, a smooth pattern, it is desirable that the nozzle or the head be inclined obliquely. As a result, a large area such as a rectangular shape can be drawn.

Further, a head having a different nozzle pitch may be provided in parallel with one head. In this case, the discharge port diameter may be the same or different.

In addition, as described above, in the case of a droplet discharge device using a plurality of nozzles, it is necessary to provide a standby place for storing unused nozzles. In this standby place, by providing a gas supply means and a shower head, the atmosphere can be replaced with the same gas atmosphere as the solvent of the composition, so that drying can be prevented to some extent. Furthermore, you may equip with the clean unit etc. which supply clean air and reduce the dust of a working area.

However, when the interval between the discharge ports cannot be reduced due to the specification of the nozzle, the nozzle pitch may be designed to be an integer multiple of the pixels in the display device. This makes it possible to discharge the composition by shifting the nozzle.

As the imaging unit 1005, a camera using an active element that converts light intensity into an electric signal, such as a CCD (charge coupled device), may be used.

In the above-described method, the thin film pattern 1109 is formed by fixing the stage 1016 on which the substrate 1004 is mounted and scanning the droplet discharge means 1003 along the determined path. On the other hand, the thin film pattern 1109 may be formed by fixing the droplet discharge means 1003 and transporting the stage 1016 in the XYθ direction according to the path determined based on the thin film pattern data 1101. At this time, in the case where the droplet discharge means 1003 has a plurality of nozzles, the composition containing the material constituting the thin film is stored, or the optimal connection to the tank for storing the composition is made. It is necessary to determine a nozzle having a discharge port diameter.

In the above-described method, the thin film pattern 1109 is discharged and formed using only one predetermined discharge port of the nozzle 1110. However, a plurality of discharge ports are formed according to the line width and film thickness of the thin film to be formed. May be used to discharge the composition.

A plurality of nozzles may be used to provide a redundant function. For example, the composition is first ejected from the nozzle 1012 (or 1111). However, by controlling the ejection conditions so that the same composition is also ejected from the nozzle 1110, the ejection nozzle is clogged at the front nozzle 112, etc. Even if the hindrance is caused, since the composition can be discharged from the nozzle 1110 on the rear side, it is possible to prevent at least disconnection of the wiring.

Further, by controlling the discharge conditions so that the composition is discharged from a plurality of nozzles having different discharge port diameters, a flat thin film can be formed with a shortened tact time. This method is particularly suitable for forming a thin film having a large discharge area of the composition and requiring flatness, such as a pixel electrode in an LCD.

Furthermore, by controlling the ejection conditions so that the composition is ejected from a plurality of nozzles having different ejection port diameters, patterns having different line widths of wiring can be formed at a time.

Furthermore, by controlling the discharge conditions so that the composition is discharged from a plurality of nozzles having different discharge port diameters, the composition can be filled into the opening portion having a high aspect ratio provided in a part of the insulating film. it can. According to this method, a flattened wiring can be formed without generating a void (a worm-like hole generated between the insulating film and the wiring).

In a droplet discharge system used for forming a thin film or wiring, as described above, for inputting a data indicating a thin film pattern and discharging a composition containing a material constituting the thin film based on the data A setting means for setting the movement path of the nozzle, an imaging means for detecting an alignment marker formed on the substrate, and a control means for controlling the movement path of the nozzle, It is necessary to accurately control the movement path of the nozzle or the substrate during droplet discharge. By reading a composition discharge condition control program into a computer that controls the droplet discharge system, the nozzle or substrate moving speed, the discharge amount of the composition, the injection distance, the injection speed, Various conditions such as the atmosphere / temperature / humidity of the discharge environment and the substrate heating temperature can be controlled accurately.

As a result, a thin film or wiring having a desired thickness, thickness, and shape can be accurately produced at a desired location under a short tact time and a high throughput. The production yield of an active element such as a TFT manufactured in this way, a liquid crystal display (LCD) manufactured using the active element, a light emitting device such as an organic EL display, LSI, or the like can be improved. In particular, by using the present invention, a thin film or wiring pattern can be formed at an arbitrary location, and the thickness, thickness, and shape of the pattern to be formed can be adjusted. It can be manufactured with good yield.

(Embodiment 12)
In the present embodiment, an embodiment using the above-described droplet discharge system will be described with reference to FIGS.

43A and 43B show a method for manufacturing a gate electrode layer using a continuous discharge nozzle 1204 and an intermittent discharge nozzle 1209. First, a relatively thick wiring such as a gate wiring and a capacitor wiring is formed using the continuous ejection nozzle 1204. Here, since the first insulating layer 1028 is formed over the substrate 1201, the moving path of the stage 1020 or the nozzle on which the substrate is mounted so that the composition containing the conductive material is discharged into the gap. To control. For example, the stage 1020 is controlled to move in the arrow direction. By using the continuous ejection nozzle 1204, the wiring portion 1205 can be formed in a noodle shape, and the tact time can be shortened. The conductive material discharged from both nozzles may be the same or different.

As shown in FIG. 43B, after the wiring portion 1205 is formed, the electrode portion 1208 is formed using the intermittent discharge nozzle 1209. At this time, for example, the stage 1020 is controlled to move in the direction of the arrow. Note that before the electrode portion 1208 is formed, the wiring portion 1205 is irradiated with UV light 1210, thereby facilitating discharge formation of a cross line (electrode portion).

FIG. 44 shows a method of simultaneously forming the wiring portion 1206 and the electrode portion 1208 using the nozzle 1231 in which the intermittent discharge port 1232a and the continuous discharge port 1232b are combined. Note that, here, a movable nozzle is shown and the nozzle 1231 moves in the direction of the arrow, but the stage 1020 may move.

FIG. 45 shows a method of simultaneously forming the gate electrode layer and the first insulating layer using the combined continuous discharge nozzle 1222 and intermittent discharge nozzle 1225. Here, a composition containing a conductive material that forms the wiring portion is discharged from the nozzle 1222a, and a resin that forms the first insulating layer is discharged from the nozzle 1222b. In addition, a composition containing a conductive material that is the same as or different from the conductive material constituting the wiring portion is discharged from the intermittent discharge nozzle 1225 to form an electrode portion. Here, it is assumed that the nozzle is a movable nozzle and the nozzles 1222 and 1225 move in the direction of the arrow, but the stage 1020 may be moved.

46A and 46B show a method of forming the wiring portion 1206 and the electrode portion 1208 by using one fixed nozzle 1233. First, the stage is conveyed in a fixed direction (arrow direction), and the wiring portion 1206 is formed by discharge by continuous discharge. Next, as shown in FIG. 46B, the stage is rotated as indicated by an arrow, the stage is conveyed in a fixed direction (arrow direction), and an electrode portion 1208 is formed by intermittent discharge. As described above, the fixed nozzle 1233 needs to be designed so that continuous discharge and intermittent discharge can be performed.

47A and 47B, an interlayer insulating film or a planarizing film (third insulating layer) is formed by a continuous discharge nozzle 1211 except for a contact hole portion, and contact is made by an intermittent discharge nozzle 1214. A method for forming a conductor in a hole portion is shown. When the insulating layer is formed except for the contact hole portion by using the continuous discharge nozzle 1211, it is necessary to control the discharge port corresponding to the contact hole portion to be closed. Note that, here, a movable nozzle is shown, and the nozzles 1211 and 1214 move in the direction of the arrow, but the stage 1020 may move.

As another method for forming a conductor in the contact hole portion, as shown in FIG. 48C, the contact hole is detected using the opening portion detecting means 1216, the CPU 1217, and the controller 1218, and the position information is obtained. Originally, the nozzle 1019 may be controlled to discharge the conductive material. Moreover, you may repair the disconnection part of a wiring part or an electrode part using the same principle.

After a conductor is formed in the contact hole, a pixel electrode is formed by continuous discharge or intermittent discharge (FIG. 48D). Here, a movable nozzle is used and the nozzle 1021 is shown to move in the direction of the arrow, but the stage 1020 may be moved.

In this way, by using a nozzle capable of continuous discharge or intermittent discharge, or a combination of these nozzles and controlling them, it is shortened regardless of the difference in the composition to be discharged and the difference in the discharge timing. A desired pattern can be formed with a short tact time. Further, when the substrate has a large area, it is possible to form a desired pattern with a shorter tact time by designing the nozzles so as to be movable at a plurality of locations on the substrate. Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 13)
FIG. 39 is a top view of a pixel portion of an active matrix liquid crystal display device using the present invention. The gate electrode 1014 of the thin film transistor 1230 is connected to the scanning line 1202, the source electrode 1219 is connected to the signal line 1221, and the drain electrode 1220 is connected to the pixel electrode 1224. 23 and 24 are process diagrams as seen from the CD cross section of FIG. 39, and shows a case where a channel protection type TFT is used as the thin film transistor 1230. FIG.

First, base pretreatment is performed on at least a portion of the substrate 1000 where the gate electrode layer is formed. Here, a titanium (Ti) film was formed in a thickness of 1 to 5 nm (10 to 50 mm) and then baked at 230 ° C. in a nitrogen atmosphere to obtain a titanium oxide film 1001 (FIG. 23A). The firing conditions are not limited to this. In addition to Ti, Sc (scandium), V (vanadium), Cr (chromium), Mn (manganese), Fe (iron), Co (cobalt), Ni (nickel), Cu (copper), Zn (zinc) So-called 3d transition elements such as W (tungsten), Al (aluminum), Ta (tantalum), Zr (zirconium), Hf (hafnium), Ir (iridium), Nb (niobium), Pd (palladium), Pt An oxide, nitride, or oxynitride of (platinum) can also be used. When these metals are directly formed, it is necessary to insulate them by removing or oxidizing, nitriding, and oxynitriding other than the portion where the gate electrode layer is formed. A material or an oxynitride may be directly formed on the entire surface of the substrate by spraying or the like. Titanium oxide is a material also known as a photocatalytic substance. In addition, strontium titanate (SrTiO ₃ ), cadmium selenide (CdSe), potassium tantalate (KTaO ₃ ), cadmium sulfide (CdS), Photocatalytic substances such as zirconium oxide (ZrO ₂ ), niobium oxide (Nb ₂ O ₅ ), zinc oxide (ZnO), iron oxide (Fe ₂ O ₃ ), and tungsten oxide (WO ₃ ) may be formed. In addition to materials containing these metals as main components, a heat-resistant resin such as polyimide, acrylic, or siloxane may be formed, or plasma treatment (preferably atmospheric pressure plasma) may be performed. By these base pretreatments, adhesion between the substrate 100 and the gate electrode layer can be improved. In particular, when titanium oxide is formed, the light transmittance can be improved. Note that the above-described base pretreatment can be omitted, but is preferably performed as much as possible in order to improve the adhesion between the substrate and the conductive film.

Next, a first wiring for patterning the gate wiring 1103, the gate electrode 1104, and the capacitor wiring 1105 is formed on the substrate 1000 or above the portion where the base pretreatment has been performed. An insulating layer (resin pattern) 1102 is formed (FIG. 23A). Here, a transparent photosensitive resin such as photosensitive polyimide, photosensitive acrylic, or photosensitive siloxane is applied to the entire surface of the substrate by spin coating, dipping, spraying, or the like, solidified by a baking process, and then exposed and developed. Then, the insulating layer 1102 is formed. The transparent photosensitive resin is not limited to the above materials, but it is desirable that the transparent photosensitive resin also has heat resistance so that it can withstand the drying and firing temperatures after the conductive material is formed.

Even when a transparent resin having no photosensitivity is used, after applying the transparent resin to the entire surface of the substrate in advance, a photoresist is formed, and an exposure and development process is performed to form the first insulating layer 1102. May be. In the case of a structure in which light does not pass through the first insulating layer 1102, for example, in the case of a reflective liquid crystal display device using external light incident from above the TFT, the resin may not be transparent. For example, the first insulating layer 1102 may be formed by forming a photoresist on the entire surface of the substrate and then performing exposure and development processes. In addition, as a photoresist, it is possible to use both a negative type (an exposed part remains as a pattern after development) and a positive type (a non-exposed part remains as a pattern after development). Note that a transparent or opaque inorganic film that can be patterned can be used instead of the insulating layer 1102.

Next, a composition containing the first conductive material is discharged into the gap between the first insulating layers 1102, whereby the gate wiring 1103, the gate electrode 1104, and the capacitor wiring 1105 (hereinafter collectively referred to as “gate electrode layer”). ”(FIG. 23B). After discharging the composition, the gate electrode layer is dried at 100 ° C. for 3 minutes, and further fired at 200 to 350 ° C. for 15 to 30 minutes in a nitrogen or oxygen atmosphere. However, it is not limited to this condition.

As the first conductive material, various materials can be selected depending on the function of the conductive film. Typical examples are silver (Ag), copper (Cu), gold (Au), nickel. (Ni), platinum (Pt), chromium (Cr), tin (Sn), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), rhenium (Re), tungsten (W), aluminum (Al), tantalum (Ta), indium (In), tellurium (Te), molybdenum (Mo), cadmium (Cd), zinc (Zn), iron (Fe), titanium (Ti), silicon (Si), germanium (Ge), zirconium (Zr), barium (Ba), antimony lead, tin oxide / antimony, fluorine-doped zinc oxide, carbon, graphite, glassy carbon, lithium, Lilium, sodium, magnesium, potassium, calcium, scandium, manganese, zirconium, gallium, niobium, sodium, sodium-potassium alloy, magnesium / copper mixture, magnesium / silver mixture, magnesium / aluminum mixture, magnesium / indium mixture, aluminum / oxidation Aluminum mixture, lithium / aluminum mixture, etc., silver halide fine particles, etc., or dispersible nanoparticles, or oxidation with addition of indium tin oxide (ITO), ITSO, zinc oxide (ZnO), gallium used as transparent conductive film Zinc (GZO), indium zinc oxide mixed with 2 to 20% zinc oxide in indium oxide (IZO), organic indium, organic tin, titanium nitride, or the like can be used.

Note that although the gate wiring 1103, the gate electrode 1104, and the capacitor wiring 1105 are formed using the same material here, the materials may be appropriately changed depending on the line width and length thereof. For example, a relatively large area such as the gate wiring 1103 or the capacitor wiring 1105 (corresponding to 1202 and 1204 in FIG. 39) is made of an inexpensive material such as Cu or Al, and the gate electrode 1104 is low. Resistive Ag can be used.

Note that although the gate electrode layer is formed after the first insulating layer 1102 is formed here, the first insulating layer 1102 and the gate electrode layer are formed at the same time by a droplet discharge method. May be. Alternatively, the composition constituting the first insulating layer 1102 is discharged, and before it is dried and solidified (or after pre-baking), the composition constituting the gate electrode layer is discharged, and finally both May be dried and fired. In this case, since exposure and development processes can be reduced, the process can be significantly shortened. When both are formed at the same time, as shown in FIG. 45, a method of simultaneously discharging from a plurality of nozzles having different discharge port diameters and different material types can be used.

Here, the first insulating layer 1102 is formed after the titanium oxide film 1001 is formed. However, as shown in FIG. 56, the titanium film 1092 is formed after the first insulating layer 1102 is formed. After the gate electrode layer is formed using the nozzle 1091 used for the droplet discharge means, the titanium film 1092 is removed by etching (FIG. 56A), or a portion other than the gate electrode layer of the titanium film 1092 is oxidized and insulated. (FIG. 56B). Here, in the case of FIG. 56B, the titanium film 1092 is baked to form the titanium oxide film 1194, and at the same time, the gate electrode layer can be baked, and the gate electrode layer can be planarized and smoothed. it can. This method can also be adopted when forming another conductive film.

Here, the diameter of the nozzle used in the above-described droplet discharge means is set to 0.1 to 50 μm (preferably 0.6 to 26 μm), and the discharge amount of the composition discharged from the nozzle is set to 0.8. Set to 00001pl to 50pl (preferably 0.0001 to 40pl). This discharge amount increases in proportion to the size of the nozzle diameter. Further, the distance between the object to be processed and the nozzle outlet is preferably as close as possible in order to drop it at a desired location, and is preferably set to about 0.1 to 2 mm. In addition, the ejection amount can be controlled by changing the pulse voltage applied to the piezoelectric element without changing the nozzle diameter. These discharge conditions are preferably set so that the line width is about 10 μm or less.

In addition, it is preferable to use what dissolved or disperse | distributed the material of either gold | metal | money, silver, and copper in the solvent considering the specific resistance value as the composition discharged from a discharge outlet. More preferably, low resistance silver or copper may be used. However, when copper is used, a barrier film may be provided as a countermeasure against impurities. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone may be used. Here, as a barrier film in the case of using copper as a wiring, an insulating or conductive material containing nitrogen such as silicon nitride, silicon oxynitride, aluminum nitride, titanium nitride, or tantalum nitride (TaN) is used. These may be formed by a droplet discharge method.

The viscosity of the composition used for the droplet discharge method is 300 mPa · s or less, preferably 50 mPa · s or less, which prevents drying and allows the composition to be smoothly discharged from the discharge port. Because. Note that the viscosity, surface tension, and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, ITSO, organic indium, and organic tin are dissolved or dispersed in a solvent is 5 to 50 mPa · s (preferably 15 to 20 mPa · s), and silver is dissolved or dispersed in the solvent. The viscosity of the composition is 5 to 20 mPa · s, and the viscosity of the composition in which gold is dissolved or dispersed in a solvent is 10 to 20 mPa · s.

Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductive material particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.5 to 10 μm. However, when formed by the gas evaporation method, the nanoparticles protected with the dispersant are as fine as about 7 nm. When the nanoparticles are covered with a coating agent, the nanoparticles are aggregated in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

Alternatively, the gate electrode layer may be formed by discharging a composition containing particles in which one conductive material is covered with another conductive material. At this time, it is desirable to provide a buffer layer between the two conductive materials. For example, as shown in FIG. 49, a particle structure in which a buffer layer 1312 made of Ni or NiB (nickel boron) is provided between Cu 1310 and Ag 1311 in a particle in which the periphery of Cu 1310 is covered with Ag 1311 (FIG. 49A). (FIG. 49B).

Note that, in the firing step of the composition containing the conductive material, by using a gas mixed with 10 to 30% oxygen in a partial pressure ratio, the resistivity of the conductive film forming the gate electrode layer is reduced, and The conductive film can be made thin and smooth. Here, how the conductive film changes before and after the firing will be briefly described. A composition containing a conductive material such as Ag (also referred to as a nanopaste) is obtained by dispersing or dissolving a conductive material in an organic solvent. In addition, a dispersant or a thermosetting resin called a binder is used. include. In particular, the binder has a function of preventing occurrence of cracks and uneven baking during firing. Then, by the drying or firing step, evaporation of the organic solvent, decomposition removal of the dispersant, and curing shrinkage by the binder proceed simultaneously, whereby the nanoparticles are fused and the nanopaste is cured. At this time, the nanoparticles grow to several tens to one hundred and several tens of nanometers, and are fused together and chained together to form a metal chain. On the other hand, most of the remaining organic components (about 80 to 90%) are pushed out of the metal chain, and as a result, a conductive film containing the metal chain and a film made of organic components covering the outside are formed. The The film made of organic components reacts with oxygen contained in the gas and carbon, hydrogen, etc. contained in the film made of organic components when the nanopaste is baked in an atmosphere containing nitrogen and oxygen. This can be removed. In the case where oxygen is not contained in the firing atmosphere, a film made of an organic component can be separately removed by oxygen plasma treatment or the like. In this way, since the film made of organic components is removed by baking the nanopaste in an atmosphere containing nitrogen and oxygen or treating it with oxygen plasma after drying, smoothing of the conductive film containing the remaining metal chain is removed. Reduction, thinning, and low resistance can be achieved. Note that since the solvent in the composition is volatilized by discharging the composition containing the conductive material under reduced pressure, the time for subsequent heat treatment (drying or baking) can be shortened.

In addition to the drying and firing steps, a treatment for further smoothing and flattening the surface may be performed. A typical example of the processing is shown in FIG. In FIG. 38A, the conductive film is planarized by the press mechanism 1300, and it is preferable to perform the heating while heating with the heater 1301. In FIG. 38B, planarization is performed by conveying a stage 1304 on which a substrate is placed in a roller 1302 provided with a fine brush 1303 in the direction of the arrow, but the roller itself may be moved. FIG. 38C is a schematic diagram of the CMP method, in which a polishing solvent called slurry (1307) is supplied into the polishing pad 1308, and pressure is applied by rotation of the wafer carrier 1306 and rotation of a turntable called platen. Then, planarization is performed by polishing the polishing pad. For metals, an acidic solution in which fine alumina powder is mixed, and an insulator in which alkaline colloidal silica is mixed are mainly used. Although not shown, an etch back method, a reflow method, or the like can also be employed. The planarization treatment is effective not only for the conductive film but also for an insulating film, a semiconductor film, or the like formed by a droplet discharge method.

Note that as the substrate, a glass substrate, a quartz substrate, a substrate formed of an insulating material such as alumina, a plastic substrate having heat resistance that can withstand a processing temperature in a later process, or the like can be used. In this case, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), etc. (x, y = 1, 2,... ), A base insulating film for preventing diffusion of impurities and the like from the substrate side may be formed. In addition, a substrate in which an insulating film such as silicon oxide or silicon nitride is formed on the surface of a metal such as stainless steel or a semiconductor substrate can also be used.

Next, a gate insulating film 1106 is formed over the gate electrode layer (FIG. 23C). The gate insulating film is preferably formed using a thin film formation method such as a plasma CVD method or a sputtering method, and a film containing silicon nitride, silicon oxide, silicon nitride oxide, or silicon oxynitride is formed as a single layer or a stacked layer. In the case of stacking, for example, a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film is preferable from the substrate side.

Next, a semiconductor film 1107 is formed over the gate insulating film 1106 (FIG. 23C). The semiconductor film is formed using an amorphous semiconductor, a crystalline semiconductor, or a semi-amorphous semiconductor. In any case, a semiconductor film containing silicon, silicon germanium (SiGe), or the like as a main component can be used. The semiconductor film can be formed by a plasma CVD method or the like. Note that the thickness of the semiconductor film is desirably 10 to 100 nm.

Here, a manufacturing method of SAS (semi-amorphous silicon) among the semi-amorphous semiconductors will be briefly described. SAS can be obtained by glow discharge decomposition of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. The formation of the SAS can be facilitated by diluting the silicide gas with one or plural kinds of rare gas elements selected from hydrogen, hydrogen and helium, argon, krypton, and neon. It is preferable to dilute the silicide gas at a dilution ratio in the range of 10 times to 1000 times. Of course, the reaction of the coating by glow discharge decomposition is performed under reduced pressure, but the pressure may be in the range of about 0.1 Pa to 133 Pa. The power for forming the glow discharge may be high frequency power of 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or less, and a substrate heating temperature of 100 to 200 ° C. is recommended.

Further, a carbide gas such as CH ₄ and C ₂ H ₆ and a germanium gas such as GeH ₄ and GeF ₄ are mixed in the silicide gas, and the energy band width is 1.5 to 2.4 eV, or 0.8. You may adjust to 9-1.1 eV.

SAS exhibits weak n-type conductivity when an impurity element for the purpose of valence electron control is not intentionally added. This is because oxygen is easily mixed into the semiconductor film because glow discharge with higher power is performed than when an amorphous semiconductor is formed. Therefore, for the first semiconductor film provided with the channel formation region of the TFT, the threshold value is controlled by adding an impurity element imparting p-type at the same time as or after the film formation. Is possible. The impurity element imparting p-type is typically boron, and an impurity gas such as B ₂ H ₆ or BF ₃ may be mixed into the silicide gas at a rate of 1 ppm to 1000 ppm. For example, when boron is used as the impurity element imparting p-type conductivity, the concentration of boron is preferably 1 × 10 ^{14 to} 6 × 10 ¹⁶ atoms / cm ³ . A field effect mobility of 1 to 10 cm ² / V · sec can be obtained by forming a channel formation region using the SAS.

As for the crystalline semiconductor film, after processing the amorphous semiconductor film with a solution containing a catalyst such as nickel, a crystalline silicon semiconductor film is obtained by a thermal crystallization process at 500 to 750 ° C., and further crystallized by laser crystallization. It can be obtained by improving the sex.

A crystalline semiconductor film can also be obtained by directly forming a polycrystalline semiconductor film by LPCVD (low pressure CVD) as a source gas of disilane (Si ₂ H ₆ ) and germanium fluoride (GeF ₄ ). it can. The gas flow ratio is Si ₂ H ₆ / GeF ₄ = 20 / 0.9, the film forming temperature is 400 to 500 ° C., and He or Ar is used as the carrier gas, but the present invention is not limited to this.

Next, a channel protective film 1108 is formed over a portion to be a channel region of the semiconductor film 1107 (FIG. 23C). The channel protective film 1108 is preferably formed selectively by a droplet discharge method. As a composition to be discharged, a heat-resistant resin such as siloxane, acrylic, benzocyclobutene, polyamide, polyimide, benzimidazole, or polyvinyl alcohol is used. A material having etching resistance and insulating property is selected. Preferably, siloxane or polyimide is used. In addition, in order to protect the channel region from over-etching, the thickness of the channel protective film 1108 is desirably 100 nm or more, preferably 200 nm or more.

Although not shown, the channel protective film may have a stacked structure of a film formed by a thin film formation method such as a silicon nitride film, such as a CVD method or a sputtering method, and the organic resin formed by a droplet discharge method. . For example, after the semiconductor film 1107 is formed, a silicon nitride film is formed over the entire surface by a CVD method, a sputtering method, or the like, and above the portion that becomes the channel region of the semiconductor film 1107 and on the silicon nitride film. A channel protective film (organic resin) is formed by a droplet discharge method. The organic resin functions to protect the channel region and functions as a mask for patterning the silicon nitride film. As a composition to be discharged, heat-resistant resin such as siloxane, acrylic, benzocyclobutene, polyamide, polyimide A material having etching resistance and insulating properties such as benzimidazole or polyvinyl alcohol is selected. Preferably, siloxane or polyimide is used. In order to protect the channel region from over-etching, the total thickness of the silicon nitride film and the organic resin is 100 nm or more, preferably 200 nm or more. Thereafter, the silicon nitride film is removed by etching using the organic resin as a mask to form a channel protective film having a laminated structure. Here, plasma etching is employed, and as the etching gas, chlorine gas such as Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. are representative. fluorine-based gas, or with O _2, but is not limited thereto. The etching may use atmospheric pressure plasma. When the channel protective film has two layers, the function as the channel protective film can be improved, damage to the channel region can be surely prevented, and a stable active element with high mobility can be provided. Moreover, it is good also as a structure of three or more layers. Further, the lower layer is not limited to the silicon nitride film, and other insulating films containing silicon may be used. Alternatively, a film that can be formed by a droplet discharge method, such as a channel protective film 1108, may be selectively stacked.

Next, an n-type semiconductor film 1109 is formed over the semiconductor film 1107. Here, arsenic (As) or phosphorus (P) can be used as the n-type impurity element. For example, when forming an n-type semiconductor film, an n-type (n +) silicon film is formed by glow discharge decomposition of a mixed gas of SiH ₄ , H ₂ , and PH ₃ (phosphine) using a plasma CVD method. Can be formed. Further, a semiconductor film containing a p-type impurity element such as boron (B) may be used instead of the n-type semiconductor film 1109.

Next, a resist mask 1110 is provided over the semiconductor film 1107 and the n-type semiconductor film 1109 and etched to form an island-shaped semiconductor film 1127 and an island-shaped n-type semiconductor film 1128 (FIG. 23D). As an etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl ₄ , a fluorine-based gas typified by CF ₄ , SF ₆ , NF ₃ , CHF ₃ , or the like, or O ₂ is used. Although used, it is not limited to these. The etching may use atmospheric pressure plasma.

Next, a second insulating layer 1111 for patterning the source electrode 1112 and the drain electrode 1113 is formed over the gate insulating film 1106 and the island-shaped n-type semiconductor film 1109 (FIG. 23E). The second insulating layer 1111 can be manufactured using a material and a method similar to those of the first insulating layer 1102.

Next, a source electrode 1112 and a drain electrode 1113 are formed by discharging a composition containing a second conductive material into the gap between the second insulating layers 1111 (FIG. 23E). The second conductive material, conductive particle structure, discharge conditions, drying, firing conditions, and the like can be appropriately selected from those shown in the first conductive material. The first and second conductive materials and particle structures may be the same or different.

Note that here, the source electrode 1112 and the drain electrode 1113 are formed to be embedded after the second insulating layer 1111 is formed; however, the second insulating layer 1111, the source electrode 1112, and the like are formed using a droplet discharge method. The drain electrode 1113 may be formed at the same time. Alternatively, the composition constituting the second insulating layer 1111 is discharged, and before it is dried and solidified (or after pre-baking), the composition constituting the gate electrode layer is discharged, and finally both May be dried and fired. In this case, since exposure and development processes can be reduced, the process can be significantly shortened. When both are formed at the same time, as shown in FIG. 45, a method of simultaneously discharging from a plurality of nozzles having different discharge port diameters and different material types can be used.

Note that although not illustrated, before discharging the composition containing the second conductive material, these films, the source electrode 1112, and the drain electrode 1113 are formed over the gate insulating film 1106 and the island-shaped n-type semiconductor film 1128. You may perform the base | substrate pretreatment for improving adhesiveness. For this, a method similar to the base pretreatment when forming the gate electrode layer can be employed.

Next, the second insulating layer 1111 is removed by O ₂ ashing, etching, atmospheric pressure plasma, or the like, and further, the island-shaped n-type semiconductor film 1128 is etched using the source electrode 1112 and the drain electrode 1113 as a mask to form a source region. A drain region 1115 and a drain region 1115 are formed (FIG. 24F). Here, plasma etching is employed, and as the etching gas, chlorine gas such as Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. are representative. fluorine-based gas, or with O _2, but is not limited thereto. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. Here, since the channel protective film 1108 is formed over the channel region, the channel region is not damaged by over-etching when the island-shaped n-type semiconductor film 1128 is etched. A TFT having high mobility can be obtained.

Next, the source electrode 1112 and the drain electrode 1113 are irradiated with UV light 1134 to modify the electrode surface (FIG. 24F). Accordingly, adhesion with the source wiring 1117 and the drain wiring 1118 formed so as to intersect with the electrodes can be improved. In addition, as long as adhesiveness can be improved, you may perform processes other than UV light irradiation. For example, you may perform the base | substrate pre-processing mentioned above using the material which can ensure conduction | electrical_connection. The electrode surface modification treatment can be omitted. Further, the UV light irradiation can be performed at the time of forming the gate electrode layer.

Next, a third insulating layer 1116 for patterning the source wiring 1117 and the drain wiring 1118 is formed (FIG. 24G). The third insulating layer 1116 can be manufactured using a material and a method similar to those of the first insulating layer 1102. Note that the third insulating layer 1116 also functions as a planarization film or an interlayer insulating film.

Next, a source wiring 1117 and a drain wiring 1118 are formed by discharging a composition containing a third conductive material into the gap between the third insulating layers 1116 (FIG. 24G). The third conductive material, the conductive particle structure, the discharge conditions, the drying, the firing conditions, and the like can be appropriately adopted from those shown in the first conductive material. It may be the same as or different from the second one.

Note that although the source wiring 1117 and the drain wiring 1118 are formed after the third insulating layer 1116 is formed here, the third insulating layer 1116 and the source wiring 1117 are formed using a droplet discharge method. The drain wiring 1118 may be formed at the same time. Alternatively, the composition that forms the third insulating layer 1116 is discharged, and before the composition is dried and solidified (or after calcination), the composition that forms the gate electrode layer is discharged, and finally both May be dried and fired. In this case, since exposure and development processes can be reduced, the process can be significantly shortened. When both are formed at the same time, as shown in FIG. 45, a method of simultaneously discharging from a plurality of nozzles having different discharge port diameters and different material types can be used.

Next, the pixel electrode 1126 is formed over the drain wiring 1118 (or the source wiring 1117), whereby the TFT substrate is completed (FIG. 24G). As the pixel electrode, the above conductive material can be used. In the case of a transmissive liquid crystal display device (see FIG. 27A), indium tin oxide (ITO), ITSO, zinc oxide used as a transparent conductive film is used. In the case of a reflective liquid crystal display device using (ZnO), zinc oxide added with gallium (GZO), indium oxide mixed with 2-20% zinc oxide indium oxide (IZO), organic indium, organic tin, etc. It is desirable to use reflective conductive materials such as Al, magnesium / silver mixture, magnesium / aluminum mixture, magnesium / indium mixture, aluminum / aluminum oxide mixture, and lithium / aluminum mixture. In the case of a transflective liquid crystal display device (see FIG. 27B), the light-transmitting pixel electrode 1153 and the reflective pixel electrode 1152 can be used in combination. The pixel electrode 1126 may be selectively formed by a droplet discharge method, or may be formed by patterning after being formed by a sputtering method or the like as usual. Although not shown, before the pixel electrode 1126 is formed, the above-described base pretreatment and UV light irradiation are performed to improve adhesion with the source and drain electrodes and the interlayer insulating film (third insulating layer 1116). You may let them.

Next, a counter substrate 1119 on which a black matrix 1120, a color filter 1121, a transparent resin 1122, a counter electrode 1123, and an alignment film 1124 are formed is prepared, and a liquid crystal is formed between the counter substrate 1119 and the TFT substrate on which the alignment film 1129 is formed. The layers 1125 are attached so as to sandwich each other (FIG. 24H). The black matrix 1120 and the color filter 1121 can be formed by a spin coating method, a dip method, an overlay method, or the like, but may be formed by a droplet discharge method. At this time, it is possible to form both of them simultaneously by a droplet discharge method, or after selectively forming one through a droplet discharge method or a conventional patterning process and embedding the other by a droplet discharge method. It is also possible. Thus, by actively using the droplet discharge method, the photolithography process can be omitted. Conventionally, four photolithography processes are required to form the light shielding film (black matrix) and the RGB color filter. Compared to the need for the process, the process can be greatly reduced. If the display is not a full color display, it is not necessary to provide a color filter.

The transparent resin 1122 can be applied and formed by a spin coating method, a dip method, or the like, and the counter electrode can be formed by a droplet discharge method, a sputtering method, or the like. In addition, the alignment film formed on both the substrates can also be formed using a droplet discharge method.

Note that the liquid crystal layer 1125 is obtained by bonding both substrates through a sealant, then immersing one side of the liquid crystal injection port provided in the bonded substrate (cell) in the liquid crystal, and injecting the cell into the cell by capillary action. Liquid crystal is dropped from a nozzle (dispenser) 1326 onto one substrate 1321 provided with a sealing agent 1328 and a barrier layer 1329 arranged on a stage 1320 as shown in FIG. The other substrate 1330 can be formed by using a so-called liquid crystal dropping method in which the substrates 1330 are bonded as shown by arrows. In particular, the liquid crystal dropping method is an effective means when the substrate size is increased. Note that the barrier layer 1329 in FIG. 41 is provided to prevent a chemical reaction between the liquid crystal molecules 1327 and the sealant 1328. When both substrates are bonded together, the alignment marker 1322 or 1331 formed on both substrates in advance is detected by the imaging means 1323, and the stage on which both substrates are arranged is controlled via the CPU 1324 and the controller 1325. To do.

FIG. 27 is a diagram showing a state in which the backlight (light source) unit 1141 is installed on the liquid crystal panel completed through the above steps. The backlight unit 1141 includes a cold cathode tube (fluorescent lamp) 1142 that emits fluorescence 1090, a lamp reflector 1143 that efficiently guides the fluorescence to the light guide plate 1144, and a guide that guides light to the entire liquid crystal panel while the fluorescence is totally reflected. The light plate 1144 includes a diffuser plate 1145 for reducing unevenness in brightness, and a reflector plate 1146 for reusing light leaked under the light guide plate 1144. A polarizing plate 1140 is provided between the liquid crystal panel and the backlight unit and on the opposite side.

FIG. 27A illustrates a transmissive liquid crystal display panel. Since the backlight unit 1141 is provided on the lower side of the TFT substrate, the gate electrode 1104 needs to be made of a reflective material so that light does not strike the channel region of the TFT. On the other hand, when the backlight unit 1141 is provided on the upper side of the TFT substrate (not shown), since the black matrix 1120 exists, the TFT channel region is not exposed to light.

FIG. 27B illustrates a transflective liquid crystal display panel, which has both a reflective function and a transmissive function. Here, the pixel electrode 1153 has a light-transmitting property and can transmit fluorescence from the backlight unit 1141. The pixel electrode 1152 has reflectivity and can reflect light from the external light 1191. The cold cathode tubes are provided side by side as shown in FIG. 27 for reducing the thickness (side light system), but the cold cathode tubes are provided so as to be positioned at the lower or upper portion of the liquid crystal panel. Can also be increased.

In the liquid crystal display device described in this embodiment, when forming a gate electrode layer, a source electrode, a drain electrode, a source wiring, and a drain wiring, an insulating layer is formed around them, and a conductor is interposed between the insulating layers. By using the embedding method using the droplet discharge method, these electrodes and wirings can be accurately formed in a desired pattern, and the conductive material can be saved. In addition, since a dripping phenomenon of a composition containing a conductive material that easily occurs when a droplet discharge method is used can be prevented, a good conductor pattern can be formed, and a short circuit between electrodes and wiring Can be prevented. In addition, when the conductive material is discharged only by the droplet discharge method, it is difficult to increase the film thickness because the composition containing the conductive material is mainly liquid. For example, even when the droplet discharge method is used, an electrode or a wiring having a desired film thickness can be formed.

Therefore, by using the present invention, a process can be simplified by a droplet discharge method, a material cost can be reduced, and a liquid crystal display device with high throughput and yield can be provided. In particular, even if the size of the glass substrate is increased to 6th generation (1500 × 1800 mm), 7th generation (2000 × 2200 mm), or more than 6 tatami mats (2700 × 3600 mm), productivity A display panel can be manufactured at a low cost. Further, it is not necessary to treat a large amount of waste liquid containing heavy metal as a conductive material, and the present invention is significant from the viewpoint of environmental considerations.

In this embodiment, when forming the gate electrode layer, the source electrode, the drain electrode, the source wiring, and the drain wiring, an insulating layer is formed around them, and a conductor is discharged between the insulating layers by a droplet discharge method. Although the method of embedding using is used, it is not necessary to apply to all of them. For example, a buried method may be used for the gate electrode layer, and the source electrode, the drain electrode, the source wiring, and the drain wiring may be selectively formed by a droplet discharge method. Alternatively, patterning may be performed after forming by sputtering.

Further, the source electrode and the source wiring, and the drain electrode and the drain wiring may be formed in the same layer. In this case, one of the second and third insulating layers is not necessary. Further, the source electrode (wiring) or the drain electrode (wiring) may be formed so as to also serve as the pixel electrode. Note that in the case where an interlayer insulating film or a planarizing film is not formed, a pixel electrode may be formed over a gate insulating film in advance and then connected to a source, a drain electrode, or a source or drain wiring.

(Embodiment 14)
FIG. 25 is a process view as seen from the CD cross section of FIG. 39 and shows a case where a channel etch type TFT is used as the thin film transistor 1230. First, the steps until the source electrode 1112 and the drain electrode 1113 are formed can be performed in the same manner as in the above embodiment except that the step of forming a channel protective film is unnecessary (FIGS. 25A to 25D). C)).

After that, the second insulating layer 1111 is removed by O ₂ ashing, etching, atmospheric pressure plasma, or the like, and the island-shaped n-type semiconductor film 1128 is etched using the source electrode 1112 and the drain electrode 1113 as masks, and the source and drain A region is formed (FIG. 25D). Here, plasma etching is employed, and as the etching gas, chlorine gas such as Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. are representative. fluorine-based gas, or with O _2, but is not limited thereto. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. Note that in the case where the same semiconductor material is used for the n-type semiconductor film and the semiconductor film, the island-shaped semiconductor film 1127 is also etched away when the island-shaped n-type semiconductor film 1128 is etched. And you need to be careful about time.

After that, the step of patterning the source wiring 1117 and the drain wiring 1118 and the step of forming the pixel electrode over the source electrode 1112 and the drain electrode 1113 can be performed in the same manner as in Embodiment Mode 1 (FIG. 25D). . Although not shown, a liquid crystal dropping or injecting step, a substrate bonding step, a backlight unit attaching step, and the like can be performed in the same manner as in the thirteenth embodiment. Note that the source electrode and the source wiring, and the drain electrode and the drain wiring may be formed in the same layer. In this case, one of the second and third insulating layers is not necessary. Further, the source electrode (wiring) or the drain electrode (wiring) may be formed so as to also serve as the pixel electrode.

(Embodiment 15)
FIG. 26 is a process diagram seen from the CD cross section of FIG. 39, and shows a case where a mixed type TFT of channel etch type and channel protection type is used as the thin film transistor 1230. First, the steps until the n-type semiconductor film 1109 is formed can be performed in the same manner as in the above embodiment mode except that the step of forming the channel protective film is unnecessary (FIG. 26A).

After that, metal masks 1130 and 1131 are formed in portions to be the source and drain regions of the semiconductor film 1107 (FIG. 26A). The metal masks 1130 and 1131 function not only as masks when the n-type semiconductor film 1109 and the semiconductor film 1107 are etched, but also function as source and drain electrodes. As a conductive material used for the metal masks 1130 and 1131, the same material as that of the gate electrode layer or the like can be used. However, it is desirable to use a material having high etching resistance. In addition, it is desirable to form selectively using a droplet discharge method.

Next, the n-type semiconductor film 1109 is etched using the metal masks 1130 and 1131 as masks to form source and drain regions (FIG. 26B). Here, plasma etching is employed, and as the etching gas, chlorine gas such as Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. are representative. fluorine-based gas, or with O _2, but is not limited thereto. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. Note that in the case where the same semiconductor material is used for the n-type semiconductor film and the semiconductor film, the island-shaped semiconductor film 1127 is also etched away when the island-shaped n-type semiconductor film 1128 is etched. And you need to be careful about time. However, as shown in FIG. 26B, even if part of the semiconductor film 1107 is etched, the thickness of the semiconductor film in the channel region is 5 nm (50 mm) or more, preferably 10 nm (100 mm) or more, and more preferably If the thickness is 50 nm (500 mm) or more, there is no problem in the function of the TFT.

Next, an insulating film 1132 is formed over a portion to be a channel region of the semiconductor film 1107 (FIG. 26B). Since the insulating film 1132 functions as a channel protective film, a material having etching resistance and insulating properties such as a heat-resistant resin such as siloxane, acrylic, benzocyclobutene, polyamide, polyimide, benzimidazole, or polyvinyl alcohol is selected. It is desirable to form selectively using a droplet discharge method. Preferably, siloxane or polyimide is used. In order to protect the channel region from over-etching, the thickness of the insulating film 1132 is desirably 100 nm or more, preferably 200 nm or more. Therefore, the insulating film 1132 may be formed on the metal masks 1130 and 1131 as shown in FIG. By setting the thickness of the insulating film 1132 to 100 nm or more, the function as a channel protective film can be improved, damage to the channel region can be surely prevented, and a stable active element with high mobility can be provided. . In addition, the insulating film 1132 having a stacked structure is also effective in securing the above effect. For example, as shown in the above embodiment, a configuration composed of silicon nitride and an organic resin can be employed.

Next, the semiconductor film 1107 is etched using the metal masks 1130 and 1131 and the insulating film 1132 as masks to form island-shaped semiconductor films 1127 (FIG. 26C). Here, plasma etching is employed, and as the etching gas, chlorine gas such as Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. are representative. fluorine-based gas, or with O _2, but is not limited thereto. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. Note that since the insulating film 1132 (corresponding to a channel protective film) is formed above the channel region in the island-shaped semiconductor film, the etching process does not cause damage due to overetching. As a result, a channel protection type (channel stopper type) TFT having stable characteristics and high mobility can be manufactured without using any resist mask.

Next, an insulator 1133 (also referred to as an edge cover or the like) for improving step coverage is formed over the gate insulating film 1106 and at least on the side surface of the island-shaped semiconductor film 1127 (FIG. 26C )). Further, a source electrode 1112 and a drain electrode 1113 are formed in contact with the metal masks 1130 and 1131. At this time, since the edge cover exists under the source and drain electrodes, the wiring can be smoothly formed with good coverage, and disconnection and the like can be prevented.

After that, the step of patterning the source wiring 1117 and the drain wiring 1118 and the step of forming the pixel electrode over the source electrode 1112 and the drain electrode 1113 can be performed in the same manner as in the above embodiment (FIG. 26D). . Although not shown, a liquid crystal dropping or injecting step, a substrate bonding step, a backlight unit attaching step, and the like can also be performed in the same manner as in the above embodiment. Note that the source electrode and the source wiring, and the drain electrode and the drain wiring may be formed in the same layer. In this case, one of the second and third insulating layers is not necessary. Further, the source electrode (wiring) or the drain electrode (wiring) may be formed so as to also serve as the pixel electrode.

As described above, in the present invention, after forming the metal masks 1130 and 1131 that also serve as the source and drain electrodes, the portion to be the channel region is covered with the insulating film 1132 that functions as a channel protective film, thereby forming an island-shaped semiconductor film. Therefore, it is not necessary to provide a resist mask, and the process can be simplified. As described above, in this embodiment, the n-type semiconductor film is removed using a metal mask to form the source region and the drain region, and the channel region is prevented from being removed thereafter. It is characterized by having a new type active element forming means mixed with a channel protection type specific method of forming a channel protection film for the purpose. And by providing the said structure, an active element can be produced only with a metal mask, without using a resist mask at all. As a result, the cost can be greatly reduced by simplifying the process and saving materials, and even when an active element is manufactured using a large-area substrate, low cost, high throughput, high yield, and shortening are achieved. In addition, a highly stable active element can be manufactured with a short tact time.

(Embodiment 16)
In this embodiment mode, a case where an insulating layer having a color filter function is formed as an interlayer insulating film or a planarizing film will be described with reference to FIGS. First, steps up to the step of forming source and drain electrodes can be performed in the same manner as in the above embodiment (FIG. 28A).

Thereafter, pigments or dyes of red (R), green (G), and blue (B) that have been shown as materials for the first insulating layer of the above embodiment, such as photosensitive polyimide, photosensitive acrylic, and photosensitive siloxane. The third insulating layers 1160 and 1161 for patterning the source wiring 1117 and the drain wiring 1118 are formed using a mixture of the above (FIG. 28A). Accordingly, the third insulating layers 1160 and 1161 can have a function as a color filter in addition to a function as an interlayer insulating film or a planarization film. Note that the third insulating layer 1116 may be made of a resin not mixed with pigments or dyes, or may be mixed with Cr (chromium) or the like to have a black matrix function. Further, a non-photosensitive resin (polyimide or the like) may be used to provide a black matrix function. In the case where the third insulating layer 1116 has a black matrix function, the black matrix 1120 illustrated in FIG. 28B can be omitted.

Next, a source wiring 1117 and a drain wiring 1118 are formed by discharging a composition containing a third conductive material into gaps between the third insulating layers 1116, 1160, and 1161 (FIG. 28A). The third conductive material, the conductive particle structure, the discharge conditions, the drying, the firing conditions, and the like can be appropriately adopted from those shown in the first conductive material. It may be the same as or different from the second one.

Note that here, the third insulating layer 1116, 1160, and 1161 are formed, and then the source wiring 1117 and the drain wiring 1118 are embedded. However, the third insulating layer 1116 and the third insulating layer 1116 are formed using a droplet discharge method. The source wiring 1117 and the drain wiring 1118 may be formed at the same time. Alternatively, the composition that forms the third insulating layer 1116 is discharged, and before the composition is dried and solidified (or after calcination), the composition that forms the gate electrode layer is discharged, and finally both May be dried and fired. In this case, since exposure and development processes can be reduced, the process can be significantly shortened. When both are formed at the same time, as shown in FIG. 45, a method of simultaneously discharging from a plurality of nozzles having different discharge port diameters and different material types can be used.

Thereafter, a process for forming a pixel electrode, a liquid crystal dropping or injection process, a substrate bonding process, a backlight unit attaching process, and the like can be performed in the same manner as in Embodiment 13 (FIG. 28B). Note that the source electrode and the source wiring, and the drain electrode and the drain wiring may be formed in the same layer. In this case, one of the second and third insulating layers is not necessary. Further, the source electrode (wiring) or the drain electrode (wiring) may be formed so as to also serve as the pixel electrode. Further, this embodiment can be freely combined with other embodiments.

(Embodiment 17)
In this embodiment, the case where an insulating layer that also functions as a color filter is formed as the first insulating layer will be described with reference to FIGS. First, the base pretreatment process can be performed in the same manner as in the above embodiment (FIG. 29A). The base pretreatment can be omitted.

Next, a first wiring for patterning the gate wiring 1103, the gate electrode 1104, and the capacitor wiring 1105 is formed on the substrate 100 or above the portion where the base pretreatment is performed. An insulating layer (resin pattern) is formed. At this time, at least a portion of the first insulating layer through which light passes is mixed with a pigment or dye of red (R), green (G), or blue (B), and the first insulating layer is used. 1162 and 1163 are formed (FIG. 29A). Accordingly, the first insulating layers 1162 and 1163 can have a function as a color filter in addition to a function of a partition wall (also referred to as a bank or a bank) for patterning the gate electrode layer. Note that the first insulating layer 1102 may be made of a resin not mixed with a pigment or a dye, or may have a black matrix function by mixing Cr (chromium) or the like. Further, a non-photosensitive resin (polyimide or the like) may be used to provide a black matrix function. In the case where the first insulating layer 1102 has a black matrix function, the black matrix 1120 illustrated in FIG. 29C can be omitted.

Thereafter, a TFT substrate manufacturing process, a pixel electrode forming process, a liquid crystal dropping or injection process, a substrate bonding process, a backlight unit mounting process, and the like can be performed in the same manner as in the above embodiment (FIG. 29B). (C)). Note that the source electrode and the source wiring, and the drain electrode and the drain wiring may be formed in the same layer. In this case, one of the second and third insulating layers is not necessary. Further, the source electrode (wiring) or the drain electrode (wiring) may be formed so as to also serve as the pixel electrode. Further, this embodiment can be freely combined with other embodiments.

(Embodiment 18)
In this embodiment, a method for connecting a TFT substrate and a pixel electrode using the present invention will be described with reference to FIGS.

In the first method, as shown in FIG. 30A, a planarization film 1170 is selectively formed by a droplet discharge method on a TFT manufactured using the present invention, and the planarization film 1170 is formed. In this method, a source wiring 1171 and a drain wiring 1172 connected to the source electrode and the drain electrode are formed in a region not formed by a droplet discharge method. Note that the source or drain wiring in the pixel TFT can also serve as a pixel electrode as shown in FIG. Of course, a pixel electrode may be separately formed and connected to the source or drain wiring. Note that the source, the drain electrode, the source, and the drain wiring may all be formed using the same conductive material or different conductive materials.

Although this method does not use the concept of forming a contact hole in the planarization film, it looks like a contact hole is formed in appearance, so it is called a loose contact or the like. Note that the planarizing film is preferably formed using an organic resin such as acrylic, polyimide, or polyamide, or an insulating film containing siloxane.

An alignment film 173 is formed on the TFT substrate and a rubbing process is performed. The alignment film 1173 is desirably formed selectively using a droplet discharge method.

In the second method, as shown in FIG. 30B, a columnar conductor 1174 (also called a pillar, a plug, or the like) is dropped on the source and drain electrodes of a TFT manufactured using the present invention. It is a method of forming by a discharge method. As the conductive material of the pillar, the same material as the gate electrode layer described above can be used. Further, a planarization film 1175 is formed over the columnar conductor 1174 by a droplet discharge method or the like. As the planarization film, an insulating film containing an organic resin such as acrylic, polyimide, or polyamide, or siloxane is preferably formed selectively by a droplet discharge method.

When a planarizing film is formed on the pillar, the surface of the planarizing film and the pillar is etched by an etch back method, and a pillar with a flat surface is formed as shown in FIG. 30B. Obtainable. Furthermore, a source wiring and a drain wiring connected to the source electrode and the drain electrode are formed on the planarization film by a droplet discharge method. Thereafter, a pixel electrode is formed and connected to the source or drain wiring. Note that the source, drain electrode, pillar, source, and drain wiring may all be formed using the same conductive material or different conductive materials.

An alignment film 1178 is formed on the TFT substrate and a rubbing process is performed. The alignment film 1173 is desirably formed selectively using a droplet discharge method.

In the third method, as shown in FIG. 31, columnar insulators 1179 (pillars) having liquid repellency with respect to the material of the planarization film 1180 are formed on the source and drain electrodes of the TFT manufactured using the present invention. (Also referred to as an insulator) is formed by a droplet discharge method, and a planarization film 1180 is formed therearound. As the material of the pillar insulator, a water-soluble organic resin such as PVA (polyvinyl alcohol) that is subjected to CF ₄ plasma or the like to impart liquid repellency can be used. As the planarization film, an insulating film containing an organic resin such as acrylic, polyimide, or polyamide, or siloxane is preferably formed selectively by a droplet discharge method. After the planarization film 1180 is formed around the pillar insulator 1179, the pillar insulator 1179 can be easily removed by washing treatment, etching, or the like. At this time, when removing by etching, it is desirable to use anisotropic etching in order to prevent the contact hole shape from becoming a reverse taper shape. Here, since a pillar insulator such as PVA has an insulating property, even if a part of the pillar insulator remains on the side wall of the contact hole, no particular problem occurs.

Thereafter, source wirings and drain wirings 1182 and 1183 connected to the source electrode and the drain electrode through contact holes are further formed on the planarization film by a droplet discharge method. Note that the source or drain wiring in the pixel TFT can also serve as a pixel electrode as shown in FIG. Of course, a pixel electrode may be separately formed and connected to the source or drain wiring. Note that the source, the drain electrode, the source, and the drain wiring may all be formed using the same conductive material or different conductive materials. In the case where the shape of the contact hole becomes an inversely tapered shape due to the removal process of the pillar insulator, a composition including a conductive material is formed on the pillar by a droplet discharge method when forming the source and drain wirings. The contact holes may be formed by laminating the layers.

An alignment film 1184 is formed on the TFT substrate and a rubbing process is performed. The alignment film 1173 is desirably formed selectively using a droplet discharge method.

In the fourth method, as shown in FIG. 32, a liquid repellent material 1186 is applied to the material of the planarization film 1189 on the source and drain electrodes of a TFT manufactured using the present invention by the droplet discharge method, spin A mask 1187 made of PVA, polyimide, or the like is formed at a location where a contact hole is to be formed by a coating method, a spray method, etc., and the liquid repellent material 1186 is removed using PVA or the like as a mask, and the remaining liquid repellent material In this method, a planarizing film 1189 is formed around the substrate. As a material for the liquid repellent material 1186, a fluorine-based silane coupling agent such as FAS (fluoroalkylsilane) can be used. The mask 1187 such as PVA or polyimide may be selectively discharged by a droplet discharge method. The liquid repellent material 1186 can be removed by O ₂ ashing or atmospheric pressure plasma. Further, the mask 1187 can be easily removed by a water washing process in the case of PVA and an N300 stripping solution in the case of polyimide.

A planarization film 1170 is formed by a droplet discharge method, a spin coating method, or the like with the liquid repellent material 1186 remaining in a place where a contact hole is to be formed (FIG. 32B). At this time, since the liquid repellent material 1186 is present at the position where the contact hole is formed, the planarizing film is not formed thereon. Further, there is no possibility that the contact hole shape is reversely tapered. As the planarizing film, an insulating film containing Si—O bonds and Si—CH _X crystal hands formed using organic resins such as acrylic, polyimide, polyamide, or siloxane-based materials as the starting material is selected by the droplet discharge method. Preferably, it is formed. After the planarization film 1189 is formed, the liquid repellent material 1182 is removed by O ₂ ashing or atmospheric pressure plasma.

Here, since the passivation film 1185 for protecting the TFT is provided, the surface of the source and drain electrodes is exposed by etching at the same time as or after removing the liquid repellent material 1182. The passivation film 1185 is desirably formed as much as possible in order to protect the TFT from diffusion of impurities and the like.

Thereafter, a source wiring and a drain wiring 1190 connected to the source electrode and the drain electrode through contact holes are further formed on the planarization film by a droplet discharge method. Further, a pixel electrode 1192 is formed and connected to the source or drain wiring. Note that the source, the drain electrode, the source, and the drain wiring may all be formed using the same conductive material or different conductive materials.

An alignment film 1193 is formed on the TFT substrate and a rubbing process is performed. The alignment film 1173 is desirably formed selectively using a droplet discharge method.

Although not shown in FIGS. 30 to 32, the first and fourth methods may be provided with a TiOx film or the like by pretreatment between the substrate and the gate electrode layer to enhance adhesion. This can also be employed when forming source, drain wiring, pillars, pixel electrodes, conductors 1172, 1173, and the like. What is necessary is just to employ | adopt what was shown to the said embodiment for pre-processing.

The liquid crystal dropping or injection process, the substrate bonding process, the backlight unit mounting process, and the like after the TFT substrate is manufactured through the first to fourth methods can be performed in the same manner as in the above embodiment. Further, this embodiment can be freely combined with other embodiments.

(Embodiment 19)
In this embodiment mode, a method for manufacturing an active matrix LCD panel using the present invention will be described with reference to FIGS. Here, FIGS. 33 to 35 are process diagrams seen from the AB and CD cross sections of FIG.

First, after forming the titanium oxide 1601 over the substrate 1600, the first insulating layer 1602 is formed, and the gate electrodes of the driving circuit TFTs 1652 and 1653 provided in the driving circuit portion 1657 are formed in the gap between the first insulating layers 1602. The wirings 1606 connected to the layers 1603a and 1603b, the gate electrode layer 1604 of the pixel TFT 1654 provided in the pixel portion 1658, the capacitor electrode 1605 of the storage capacitor portion 1655, and the FPC of the terminal portion 1651 are formed (FIG. 33A).

Next, a gate insulating film 1607 is formed, a semiconductor film 1608 is formed, and then a channel protective film 1609 is formed (FIG. 33B).

Next, after an n-type semiconductor film is formed on the entire surface of the substrate, etching is performed using a photoresist 1611 provided over a region where the n-channel TFTs 1652 and 1654 and the storage capacitor 1655 are formed as a mask. A film 1612 is formed (FIG. 33C). Note that the photoresist 1611 is desirably formed selectively by a droplet discharge method.

Next, a p-type semiconductor film is formed on the entire surface of the substrate with the photoresist 1611 left, and then etched using the photoresist 1614 provided over the region where the p-channel TFT 1653 is formed as an island shape. A p-type semiconductor film 1615 and an island-shaped semiconductor film are formed (FIG. 34D). Note that the photoresist is also preferably formed selectively by a droplet discharge method. Note that a p-type semiconductor film may be formed in the storage capacitor portion without forming the n-type semiconductor film.

Next, after the photoresists 1611 and 1614 are removed by O ₂ ashing, atmospheric pressure plasma, or the like to form the second insulating layer 1616, source and drain electrodes 1617 to 1621 are formed in the gaps of the second insulating layer 1616. Then, the counter electrode 1622 of the storage capacitor portion is formed (FIG. 34E).

Next, after the second insulating layer 1616 is removed, channel etching is performed to form source and drain regions. Further, after the third insulating layer 1626 is formed, source, drain wirings 1627 to 1631 and a capacitor wiring 1632 are formed in the gap between the third insulating layer 1626 (FIG. 34F).

Next, using the third insulating layer 1626 as a mask, the first insulating layer 1602 and the gate insulating film 1607 formed in the terminal portion are removed by etching to expose a portion of the wiring 1606 connected to the FPC (FIG. 35 (G)). Plasma etching is used, and the etching gas is a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., or a fluorine-based gas typified by CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. Although gas or O ₂ is used, it is not limited to these. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. O ₂ ashing may be used. Further, the first insulating layer 1602 and the gate insulating film 1607 may be removed separately by combining these methods. Note that the first insulating layer 1602 is not necessarily removed if the wiring 1606 is exposed. After that, the pixel electrode 1633 is formed so as to be connected to the source wiring or the drain wiring of the pixel TFT (FIG. 35G).

After that, a state where the liquid crystal layer 1635 is sandwiched between the TFT substrate and the counter substrate 1636 and bonded with a sealant 1640 is shown. A columnar spacer 1639 is formed on the TFT substrate. The columnar spacer 1639 is preferably formed in accordance with a recess of a contact portion formed over the pixel electrode. Although the columnar spacer 1639 depends on the liquid crystal material to be used, it is desirable to form it with a height of 3 to 10 μm. Since the concave portion corresponding to the contact hole is formed in the contact portion, disorder of the alignment of the liquid crystal can be prevented by forming a spacer in accordance with this portion.

An alignment film 1634 is formed on the TFT substrate and a rubbing process is performed. A transparent conductive film 1637 and an alignment film 1638 are formed over the counter substrate 1636. After that, the TFT substrate and the counter substrate 1636 are attached to each other with a sealant, and liquid crystal is injected to form a liquid crystal layer 1635. As described above, an active matrix driving liquid crystal display device can be completed. Note that the liquid crystal layer 1635 may be formed by dropping liquid crystal as illustrated in FIG. This is an effective means particularly when a liquid crystal display device is manufactured using a large area active matrix substrate.

Note that the alignment films 1634 and 1638 and the columnar spacer 1639 may be selectively formed by a droplet discharge method. This is an effective means particularly when a liquid crystal display device is manufactured using a large area active matrix substrate.

Next, the terminal portion will be described. As can be seen from FIGS. 33 and 34, since the gate insulating film remains in the terminal portion, the contact for connecting the wiring 1606 formed simultaneously with the gate electrode layer and the FPC (Flexible Print Circuit) 1643 It is necessary to open holes or to remove the gate insulating film 1607. Here, as described above, the first insulating layer 1602 and the gate insulating film 1607 are removed by etching using the third insulating layer 1626 as a mask. Furthermore, the wiring 1606 and the FPC 1643 can be connected to each other by attaching the wiring 1606 and the FPC 1628 to the terminal electrode 1641 by a known method using an anisotropic conductive film 1642. Note that the terminal electrode 1641 is preferably formed using a transparent conductive film.

As another method for opening a contact hole, the periphery of a portion where a contact hole is to be formed is covered with a conductor formed by a droplet discharge method, and the contact hole is formed using the conductor as a mask. You can also. Further, a plug-like conductor can be formed on the gate insulating film by discharging a conductor that is the same as or different from the conductor into the contact hole by a droplet discharge method and embedding the conductor. Further, the wiring 1606 and the FPC 1643 can be connected to each other by attaching the plug-like conductor and the FPC 1643 to the terminal electrode 1641 with an anisotropic conductive film 1642 by a known method. At this time, the contact hole opening of the FPC portion may be performed at the time of manufacturing the TFT, or may be performed by forming a plug-like conductor at the same time as forming the source and drain wirings. One of the advantages of the droplet discharge method is that the composition can be selectively discharged to a desired location. Therefore, it is desirable that one step can be combined with a plurality of conventional steps.

Note that when the island-shaped semiconductor film or the island-shaped n-type semiconductor film is formed by etching, the gate insulating film is also removed at the same time, so that contact hole opening at the time of FPC connection becomes unnecessary. However, since all the gate insulating film other than the TFT portion is removed, an insulator is separately formed by a droplet discharge method or the like in the storage capacitor portion or the intersection between the scanning line and the signal line. There is a need.

Further, when forming the gate insulating film, the gate insulating film may be formed by using a linear plasma method except for the peripheral portion of the substrate which becomes the FPC connection region.

Through the above steps, an active matrix LCD panel using the TFT manufactured according to the present invention is completed. The TFT can be manufactured using the method of the above embodiment mode. Here, one transistor is used for each pixel, but a multi-gate structure may be used by using two or more transistors. The polarity of the TFT can be either n-type or p-type. Alternatively, a CMOS structure including an n-type TFT and a p-type TFT may be used. In the case of a CMOS structure, the wiring connecting each TFT can be formed by selectively forming the planarizing film and then discharging a composition containing a conductive material in the opening by a droplet discharge method. it can.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 20)
In this embodiment mode, another method for manufacturing an active matrix LCD panel using the present invention will be described with reference to FIGS. Here, FIGS. 36 to 37 are process diagrams viewed from the AB and CD cross sections of FIG. 39. First, steps up to forming the channel protective film and forming the island-shaped semiconductor film 1661 can be performed in a manner similar to that of the other embodiments (FIG. 36A).

Next, after removing the photoresist 1660 when the island-shaped semiconductor film 1661 is formed, a dopant source 1662 containing n-type impurities is formed on the island-shaped semiconductor films of the n-channel TFTs 1652 and 1654. A dopant source 1663 including a p-type impurity is selectively formed over the island-shaped semiconductor film by a droplet discharge method or the like (FIG. 36B).

Next, by irradiating the substrate with a laser 1664 (referred to as laser doping), dopant sources 1662 and 1663 are introduced into the island-like semiconductor film 1661 to form source and drain regions 1665 to 1670 ( FIG. 36 (C)). Here, as the laser 1664, excimer, Nd: YAG, CO ₂ , ruby, alexandrite, or the like can be used. In particular, the excimer laser emits a short wavelength and short pulse light in the ultraviolet region, so that the penetration depth into the semiconductor substrate is small and the thermal action time is short. Therefore, it is suitable for forming a very shallow doping layer. In addition, as the dopant source, a solid or liquid material formed by a droplet discharge method is adopted here, but a gas may be used. In this case, it is necessary to change the atmosphere for each n-type and p-type. When a solid or liquid dopant source is employed, there is an advantage that an impurity region can be formed by a single laser irradiation. Further, by using the laser doping method, the channel etching process can be omitted, and the process can be simplified greatly.

Next, after forming the second insulating layer 1616, the source and drain electrodes 1617 to 1621 and the counter electrode 1622 of the storage capacitor portion are formed in the gap between the second insulating layers 1616 (FIG. 36D). FIG. 37 (E)).

Next, using the third insulating layer 1626 as a mask, the first insulating layer 1602 and the gate insulating film 1607 formed in the terminal portion are removed by etching to expose a portion of the wiring 1606 connected to the FPC (FIG. 37 (G)). Plasma etching is used, and the etching gas is a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., or a fluorine-based gas typified by CF ₄ , SF ₆ , NF ₃ , CHF _3, etc. Although gas or O ₂ is used, it is not limited to these. The etching can also be performed using atmospheric pressure plasma. At this time, a mixed gas of CF ₄ and O ₂ is preferably used as the etching gas. O ₂ ashing may be used. Further, the first insulating layer 1602 and the gate insulating film 1607 may be removed separately by combining these methods. After that, a pixel electrode 1633 is formed so as to be connected to the source wiring or drain wiring of the pixel TFT (FIG. 37G).

After that, a state where the liquid crystal layer 1635 is sandwiched between the TFT substrate and the counter substrate 1636 and bonded with a sealant 1640 is shown. A columnar spacer 1639 is formed on the TFT substrate. The columnar spacer 1639 is preferably formed in accordance with a recess of a contact portion formed over the pixel electrode. Although the columnar spacer 1639 depends on the liquid crystal material to be used, it is desirable to form it with a height of 3 to 10 μm. Since the concave portion corresponding to the contact hole is formed in the contact portion, disorder of the alignment of the liquid crystal can be prevented by forming a spacer in accordance with this portion.

An alignment film 1634 is formed on the TFT substrate and a rubbing process is performed. A transparent conductive film 1637 and an alignment film 1638 are formed over the counter substrate 1636. After that, the TFT substrate and the counter substrate 1636 are attached to each other with a sealant, and liquid crystal is injected to form a liquid crystal layer 1635. As described above, an active matrix driving liquid crystal display device can be completed. Note that the liquid crystal layer 1635 may be formed by dropping liquid crystal as illustrated in FIG. This is an effective means particularly when a liquid crystal display device is manufactured using a large area active matrix substrate.

Note that the alignment films 1634 and 1638 and the columnar spacer 1639 may be selectively formed by a droplet discharge method. This is an effective means particularly when a liquid crystal display device is manufactured using a large area active matrix substrate.

Note that the terminal portion can be formed in the same manner as in the nineteenth embodiment.

Through the above steps, an active matrix LCD panel using the TFT manufactured according to the present invention is completed. The TFT can be manufactured using the method of the above embodiment mode. Here, one transistor is used for each pixel, but a multi-gate structure may be used by using two or more transistors. The polarity of the TFT can be either n-type or p-type. Alternatively, a CMOS structure including an n-type TFT and a p-type TFT may be used. In the case of a CMOS structure, the wiring connecting each TFT can be formed by selectively forming the planarizing film and then discharging a composition containing a conductive material in the opening by a droplet discharge method. it can.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 21)
In this embodiment, a liquid crystal television receiver using the liquid crystal display panel manufactured in the above embodiment is described. FIG. 55 is a block diagram showing a main configuration of the liquid crystal television receiver. In the liquid crystal display panel, when (1) only the pixel portion 1401 is formed and the scanning line side driver circuit 1403 and the signal line side driver circuit 1402 are mounted by the TAB method, (2) the pixel portion 1401 and the periphery thereof When the scanning line side driving circuit 1403 and the signal line side driving circuit 1402 are mounted by a COG method, (3) a TFT is formed by SAS, and the pixel portion 1401 and the scanning line side driving circuit 1403 are integrally formed on the substrate. The signal line side driver circuit 1402 may be separately mounted as a driver IC, but any form may be employed.

As other external circuit configurations, on the input side of the video signal, among the signals received by the tuner 1404, the video signal amplification circuit 1405 that amplifies the video signal, and the signal output from the video signal amplification circuit 1405 is each color of red, green, and blue And a control circuit 1407 for converting the video signal into the input specifications of the driver IC. The control circuit 1407 outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit 1408 may be provided on the signal line side so that an input digital signal is divided into m pieces and supplied.

Of the signals received by the tuner 1404, the audio signal is sent to the audio signal amplifier circuit 1409, and the output is supplied to the speaker 1413 through the audio signal processing circuit 1410. The control circuit 1411 receives control information on the receiving station (reception frequency) and volume from the input unit 1412 and sends a signal to the tuner 1404 and the audio signal processing circuit 1410.

(Embodiment 22)
In this embodiment, a state in which the LCD panel of the above embodiment is modularized will be described with reference to FIG.

In the module illustrated in FIG. 40A, a driver IC in which a driver circuit is formed around the pixel portion 1701 is mounted by a COG (Chip On Glass) method. Of course, the driver IC may be mounted by the TAB (Tape Automated Bonding) method.

The substrate 1700 is fixed by a counter substrate 1703 and a sealant 1702. The pixel portion 1701 may use a liquid crystal as a display medium as described in the above embodiment, or may use a light emitting element as a display medium. As the driver ICs 1705a and 1705b and the driver ICs 1707a, 1707b, and 1707c, an integrated circuit formed using a single crystal semiconductor or a polycrystalline semiconductor can be used. Signals and power are supplied to the driver ICs 1705a, 1705b and the driver ICs 1707a, 1707b, 1707c via the FPCs 1704a, 1704b, 1704c or the FPCs 1706a, 1706b.

In the module shown in FIG. 40B, a gate driver 1712 is formed over a substrate 1700 and connected to an FPC 1710. The gate driver 1712 is preferably manufactured using semi-amorphous silicon (SAS) with high mobility. In addition, the source driver 1709 was separately formed using polycrystalline silicon, and was attached in a stick shape and connected to the FPC 1711. Note that the gate driver 1712 may be formed separately using polycrystalline silicon and divided into sticks. In this way, by forming the driver (drive circuit) part integrally on the substrate or in the form of a stick, the process can be simplified compared to the method of attaching a large number of IC chips, and the board space is effectively used. can do.

(Embodiment 23)
In this embodiment, one mode in which protective diodes are provided in the scan line side input terminal portion and the signal line side input terminal portion will be described with reference to FIGS. In FIG. 51A, the pixel 1022 is provided with a TFT 1260. This TFT has a configuration similar to that of the above embodiment.

Protection diodes 1261 and 1262 are provided at the signal line side input terminal portion. This protective diode is manufactured in the same process as the TFT, and operates as a diode by connecting the gate and one of the drain and the source. An equivalent circuit diagram of the top view shown in FIG. 51A is shown in FIG.

The protection diode 1261 includes a gate electrode layer 1250, a semiconductor layer 1251, a channel protection insulating layer 1252, and a wiring layer 1253. The TFT 1262 has a similar structure. The common potential lines 1254 and 1255 connected to the protection diode are formed in the same layer as the gate electrode layer. Therefore, in order to be electrically connected to the wiring layer 1253, a contact hole needs to be formed in the gate insulating layer.

The contact hole for the gate insulating layer may be etched by forming a mask layer by a droplet discharge method. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

The protective diode 1261 or 1262 is formed in the same layer as the source and drain wiring layer 1219 in the TFT 1260, and has a structure in which the signal wiring layer 1256 connected thereto is connected to the source or drain side.

The input terminal portion on the scanning signal line side has the same configuration. Thus, according to the present invention, the protection diode provided in the input stage can be formed simultaneously. Note that the position at which the protective diode is inserted is not limited to this embodiment mode, and can be provided between the driver circuit and the pixel. Further, this embodiment can be freely combined with other embodiments.

(Embodiment 24)
In this embodiment, the case where the driver circuit on the scan line side is formed over the substrate 100 by forming the semiconductor layer using SAS will be described.

FIG. 52 shows a block diagram of a scanning line side driving circuit constituted by an n-channel TFT using SAS capable of obtaining a field effect mobility of 1 to 15 cm ² / V · sec.

In FIG. 52, a block denoted by 1500 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. Reference numeral 1501 denotes a buffer circuit to which a pixel 502 is connected.

FIG. 53 shows a specific configuration of the pulse output circuit 1500, and the circuit is configured by n-channel TFTs 1601 to 1612. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

A specific configuration of the buffer circuit 1501 is shown in FIG. Similarly, the buffer circuit includes n-channel TFTs 1620 to 1636. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 to 1800 μm.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 25)
As an electronic device in which the module described in the above embodiment is mounted, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, an audio playback device (car audio, audio component, etc.), a notebook type personal computer, Reproducing a recording medium such as a game machine, a portable information terminal (mobile computer, cellular phone, portable game machine, electronic book, etc.), an image reproducing apparatus (specifically, Digital Versatile Disc (DVD)) equipped with a recording medium, And a device provided with a display capable of displaying the image). In particular, it is desirable to use the droplet discharge method described in the above embodiment mode for a large television having a large screen. Specific examples of these electronic devices are shown in FIGS.

FIG. 19A illustrates a large EL television device which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video signal input terminal 2005, and the like. The display portion 2003 is provided with a module having a pixel portion and a driver circuit portion. The pixel portion includes a light emitting element and includes a TFT formed by a droplet discharge method described in the above embodiment mode. The display devices include all information display devices for personal computers, for receiving TV broadcasts, for displaying advertisements, and the like.

In order to increase the contrast, at least the pixel portion may include a polarizing plate or a circular polarizing plate. For example, a quarter λ plate, a ½ λ plate, and a polarizing plate may be provided on the sealing substrate in this order. Further, an antireflection film may be provided on the polarizing plate.

FIG. 19B is a block diagram illustrating a main structure of an EL television device. In the display panel, a pixel portion 603 is formed as the structure described in the above embodiment mode.

As the structure of the external circuit, on the video signal input side, among the signals received by the tuner 904, the video signal amplification circuit 905 that amplifies the video signal, and the signal output from the signal corresponds to each color of red, green, and blue A video signal processing circuit 906 for converting the video signal into a color signal, and a control circuit 907 for converting the video signal into an input specification of the driver IC. Signals are output from the control circuit 907 to the signal line driver circuit 605, respectively, to the scan line driver circuits 604a and 604b. In the case of digital driving, a signal dividing circuit 908 may be provided between the control circuit and the signal line driving circuit, and the input digital signal may be divided into m pieces and supplied.

As shown in FIG. 19B, it is preferable to provide two scan line driver circuits 604a and 604b because a signal delay or signal rounding of the scan line which occurs as the display panel is enlarged can be prevented. Further, the number of scanning line driving circuits is not limited to two, and one scanning line driving circuit or two or more scanning line driving circuits may be provided. Similarly, one or more signal line driver circuits may be provided.

Of the signals received by the tuner 904, the audio signal is sent to the audio signal amplifier circuit 909, and the output is supplied to the speaker 913 via the audio signal processing circuit 910. The control circuit 911 receives control information on the receiving station (reception frequency) and volume from the input unit 912 and sends a signal to the tuner 904 and the audio signal processing circuit 910.

A display device in which such an external circuit is incorporated can be incorporated in the housing 2001 to complete the television device. Other accessory equipment includes a speaker 2004, a video signal input terminal 2005, an operation switch, and the like. Thus, an EL television device can be completed according to the present invention.

Of course, the present invention is not limited to a television device, but can be applied to various uses such as a monitor for a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do. In addition, a television device including a liquid crystal element can be formed.

FIG. 20A illustrates a mobile phone among mobile terminals, which includes a main body 2101, a housing 2102, a display portion 2103, an audio input portion 2104, an audio output portion 2105, operation keys 2106, an antenna 2107, and the like. The display portion 2103 is provided with a module having a pixel portion and a driver circuit portion. The pixel portion includes a light-emitting element or a liquid crystal element, and includes a TFT formed by the droplet discharge method described in the above embodiment mode. Furthermore, the cost of the mobile phone can be reduced by forming the display portion 2103 from a large mother glass substrate.

FIG. 20B illustrates a sheet-type mobile phone, which includes a main body 2301, a display portion 2303, an audio input portion 2304, an audio output portion 2305, a switch 2306, an external connection port 2307, and the like. A separately prepared earphone 2308 can be connected through the external connection port 2307. A touch panel display screen including a sensor is used for the display portion 2303, and a series of operations can be performed by touching a touch panel operation key 2309 displayed on the display portion 2303. The display portion 2303 is provided with a module having a pixel portion and a driver circuit portion. The pixel portion includes a light-emitting element or a liquid crystal element, and includes a TFT formed by the droplet discharge method described in the above embodiment mode. Further, by forming the display portion 2303 from a large mother glass substrate, the cost of the sheet-type mobile phone can be reduced.

FIG. 20C illustrates a portable book (electronic book), which includes a main body 3101, display portions 3102 and 3103, a storage medium 3104, operation switches 3105, an antenna 3106, and the like. The display portions 3102 and 3103 are provided with modules each having a pixel portion and a driver circuit portion. The pixel portion includes a light-emitting element or a liquid crystal element, and includes a TFT formed by the droplet discharge method described in the above embodiment mode. Further, by forming the display portion 2303 from a large mother glass substrate, the cost of the sheet-type mobile phone can be reduced.

Even in such a small electronic device, by forming the display portion using the present invention, it is possible to form multiple surfaces from a large mother glass substrate and reduce costs.

It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. It is a top view of the thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. It is a figure showing a manufacturing process of a thin film transistor of the present invention. It is a figure showing a pixel circuit of a display device of the present invention. It is the figure which showed the droplet discharge apparatus of this invention. It is the figure which showed the module which mounts the power supply circuit of this invention. It is a figure showing a television apparatus of the present invention. It is the figure which showed the electronic device of this invention. FIG. 11 is a diagram illustrating a manufacturing process of a display device of the present invention. It is the figure which showed the mounting process of the drive circuit in this invention. It is a manufacturing process figure of the active element (channel protection type) using this invention. It is a manufacturing process figure of the active element (channel protection type) using this invention. It is a manufacturing process figure of an active element (channel etch type) using the present invention. It is a manufacturing process diagram of an active element (channel protection / etch mixed type) using the present invention. It is a completion figure of the liquid crystal display device using this invention. It is process drawing of the liquid crystal display device which has an interlayer insulation film provided with the color filter function of this invention. It is process drawing of the liquid crystal display device which has transparent resin provided with the color filter function of this invention. It is explanatory drawing of the contact method between FT and pixel electrode of this invention. It is explanatory drawing of the contact method between TFT of this invention, and a pixel electrode. It is explanatory drawing of the contact method between TFT of this invention, and a pixel electrode. It is a manufacturing process figure (drive circuit CMOS) of the liquid crystal display device using this invention. It is a manufacturing process figure (drive circuit CMOS) of the liquid crystal display device using this invention. It is a manufacturing process figure (drive circuit CMOS) of the liquid crystal display device using this invention. It is a manufacturing process figure (laser doping) of the liquid crystal display device using this invention. It is a manufacturing process figure (laser doping) of the liquid crystal display device using this invention. It is a figure explaining the planarization processing method of the conductive layer of this invention. It is a top view of the pixel region of the present invention. It is explanatory drawing of the liquid crystal module of this invention. It is explanatory drawing of the liquid crystal dropping method of this invention. It is explanatory drawing of the droplet discharge system of this invention. It is explanatory drawing of the discharge method of the same material which combined continuous discharge and intermittent discharge which are this invention. It is explanatory drawing of the discharge method using the compound nozzle which is this invention. It is explanatory drawing of the method of discharging the different material which is this invention continuously. It is explanatory drawing of embodiment which rotates the substrate stage which is this invention, and discharge-forms a conductive layer. Explanatory drawing of the discharge method of the different material which combined continuous discharge and intermittent discharge which is the present invention It is explanatory drawing of the discharge method of the different material which combined the continuous discharge and intermittent discharge which are this invention. It is explanatory drawing of the structure of the electrically-conductive particle of this invention. It is a figure explaining the mounting method of the drive circuit part of the liquid crystal display panel using this invention. It is a top view containing the protection circuit part of the liquid crystal display panel using this invention. It is a figure explaining the circuit structure in the case of forming the scanning line side drive circuit by TFT in the liquid crystal display panel using this invention. FIG. 11 is a diagram (shift register circuit) illustrating a circuit configuration when a scanning line side driving circuit is formed of TFTs in a liquid crystal display panel using the present invention. FIG. 10 is a diagram (buffer circuit) illustrating a circuit configuration when a scanning line side driving circuit is formed of TFTs in a liquid crystal display panel using the present invention. It is a block diagram which shows the main structures of the liquid crystal television receiver using this invention. It is a figure which shows the method of forming the titanium film or titanium oxide film which is this invention.

Claims (13)

Ejecting a composition having an insulating film material to form a first insulating film having an opening;
By ejecting a composition having a conductive film material, a conductive film is formed in the opening,
Forming a second insulating film covering the first insulating film and the conductive film;
Forming a semiconductor film on the second insulating film;
A method for manufacturing a thin film transistor, wherein the depth of the opening and the height of the conductive film are uniform. Ejecting a composition having an insulating film material to form a first insulating film having an opening;
By ejecting a composition having a conductive film material, a conductive film is formed in the opening,
Forming a second insulating film covering the first insulating film and the conductive film;
Forming a semiconductor film on the second insulating film;
Patterning the second insulating film and the semiconductor film simultaneously;
A method for manufacturing a thin film transistor, wherein the depth of the opening and the height of the conductive film are uniform. Ejecting a composition having an insulating film material to form a first insulating film having an opening;
By ejecting a composition having a conductive film material, a conductive film is formed in the opening,
Forming a second insulating film covering the first insulating film and the conductive film;
Forming a semiconductor film on the second insulating film;
Patterning the second insulating film and the semiconductor film simultaneously;
The depth of the opening is the same as the height of the conductive film, and the end of the second insulating film is provided so as not to exceed the end of the semiconductor film. Method. In any one of Claims 1 thru | or 3,
By simultaneously ejecting the composition having the insulating film material and the composition having the conductive film material, the first insulating film having the opening and the conductive film are formed in the opening. A method for manufacturing a thin film transistor. In any one of Claims 1 thru | or 3,
Said composition having an insulating film material ejected, even after the formation of the first insulating film having the opening, before jetting a composition having the conductive film material, first with the opening A method for manufacturing a thin film transistor, wherein the insulating film is heated. In any one of Claims 1 thru | or 5,
The method for manufacturing a thin film transistor, wherein the conductive film formed in the opening is a gate electrode. In any one of Claims 1 thru | or 6,
A method for manufacturing a thin film transistor is characterized in that the means for ejecting the composition is an inkjet method. In any one of Claims 1 thru | or 7,
A method for manufacturing a thin film transistor, wherein a conductive film is formed in the opening so that a surface of the first insulating film and a surface of the conductive film are flush with each other. A composition having an insulating film material is ejected to form an insulating film having a plurality of openings,
By ejecting a composition having a conductive film material, first and second gate electrodes are respectively formed in the plurality of openings,
Forming a gate insulating film covering the insulating film and the first and second gate electrodes;
Forming first and second semiconductor films on the gate insulating film;
Patterning the gate insulating film and the first and second semiconductor films simultaneously;
Forming a source electrode and a drain electrode on the first and second semiconductor films, respectively;
Wherein the first semiconductor film on the formed the source electrode or the drain electrode, wherein the second gate electrode a electrically connected to a manufacturing method of a thin film transistor,
The method for manufacturing a thin film transistor, characterized in that the depth of the plurality of openings is equal to the height of the first and second gate electrodes. A composition having an insulating film material is ejected to form an insulating film having a plurality of openings,
By ejecting a composition having a conductive film material, first and second gate electrodes are respectively formed in the plurality of openings,
Forming a gate insulating film covering the insulating film and the first and second gate electrodes;
Forming first and second semiconductor films on the gate insulating film;
Patterning the first and second semiconductor films;
A source electrode and a drain electrode are formed on the first and second semiconductor films, respectively.
Etching the gate insulating film using the source electrode and the drain electrode,
By forming the conductive film in the opening of the gate insulating film is etched, the first semiconductor film and the source electrode or the drain electrode is formed on, electrically and said second gate electrode A method of manufacturing a thin film transistor to be connected,
The method for manufacturing a thin film transistor, characterized in that the depth of the plurality of openings is equal to the height of the first and second gate electrodes. In claim 9 or 10,
The first and second gate electrodes are formed in the plurality of openings, respectively, so that the surface of the insulating film and the surfaces of the first and second gate electrodes are flush with each other. A method for manufacturing a thin film transistor. In any one of Claims 9 thru | or 11,
Each of the plurality of openings in which the first and second gate electrodes are formed has a width of 5 μm to 20 μm,
A method of manufacturing a thin film transistor, wherein the insulating film is formed so that the depths of the plurality of openings are 1.5 μm to 2.5 μm, respectively. In any one of Claims 1 thru | or 12 ,
The method for manufacturing a thin film transistor is characterized in that the amount of the composition having the conductive film material ejected is 0.1 pl to 40 pl.

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