JP4637199B2 - Image processing apparatus, image processing method, and program - Google Patents

Description

  The present invention provides an image processing apparatus and an image processing method suitable for generating images at high speed using hardware, system calls, and libraries for drawing tiled images side by side, and for realizing them by a computer. Related to the program.

  Conventionally, a tile-shaped image (hereinafter referred to as “tile image”) of a certain size (hereinafter referred to as “w” and height “h”) is prepared in advance, and an image to be displayed on the screen is stored. By preparing an image buffer to be used and specifying which position of the tiled image is to be drawn in the image buffer in a library such as a hardware, system call, or BIOS (Basic Input Output System), An image processing apparatus that generates an image has been proposed.

  For example, in a map display in RPG (Roll Playing Game) or the like, one tile image representing grassland, one tile image representing sand, and one tile image representing a road are prepared, and these tile images are prepared. By arranging them appropriately, it is possible to generate an image of “a map in which roads are arranged in grassland and sand”.

Such image generation techniques are disclosed in the following documents, for example.
Japanese Patent No. 3270928

  Here, in [Patent Document 1], a technique is disclosed in which a map is divided into blocks, and tile images assigned to the blocks are deformed to make the boundary lines of the tile images more natural and complex.

For example, many computers for game devices can draw tile images in an image buffer by designating the following three pieces of information to a drawing unit such as hardware, system call, or library.
(A) Tile image identification number id. In general, since tile images are stored in a predetermined tile image storage area, the id and the address at which the tile image having the id is stored can be associated on a one-to-one basis.
(B) Position (x, y) at which the tile image is drawn in the image buffer. When one tile image is drawn, the pixels in the regions (x, y) to (x + w-1, y + h-1) in the image buffer change.
(C) The number n of tile images to be drawn. N tile images having identification numbers id, id + 1, id + 2,..., Id + n−1 are to be drawn.

Therefore, when such a triplet is designated, identification numbers id to id + n− are assigned to areas (x, y) to (x + n × w−1, y + h−1) in the image buffer. One tile image is drawn in order. That is,
(1) The tile image with the identification number id is drawn in the region (x, y) to (x + w-1, y + h-1),
(2) The tile image with the identification number id + 1 is drawn in the region (x + w, y) to (x + 2 × w-1, y + h-1),
(3) The tile image with the identification number id + 2 is drawn in the region (x + 2 × w, y) to (x + 3 × w-1, y + h-1),
...
(N) The tile image with the identification number id + n−1 is drawn in the region (x + (n−1) × w, y) to (x + n × w−1, y + h−1). .

  Conventionally, when an RPG map or the like is displayed using such a tile image drawing function, the entire map (generally, an area wider than the display screen) is represented by a two-dimensional array, and each element of the array Is the area that can be displayed on the current screen in the map array (generally the area centered on the player character, and when the area moves in the map, In this case, each of the elements is sequentially read out, and a display image is generated by designating the identification number, the position in the image buffer, and the number 1 in the drawing unit. It was common to do.

  However, in general, there is a call overhead when calling a drawing unit by giving a triplet. Therefore, there is a desire to reduce the number of calls as much as possible so that drawing can be performed at high speed.

  The present invention solves the above-described problems. An image processing apparatus and image processing suitable for generating images at high speed using hardware, system calls, and libraries that draw tiled images side by side. It is an object of the present invention to provide a method and a program for realizing these by a computer.

  In order to achieve the above object, the following invention is disclosed in accordance with the principle of the present invention.

  An image processing apparatus according to a first aspect of the present invention includes a tile image storage unit, a drawing unit, an order storage unit, a maximum length acquisition unit, and a control unit, and is configured as follows.

  That is, the tile image storage unit stores a column of tile images of a predetermined size.

  As described above, when identification numbers that do not overlap each other are attached to the tile images, it can be considered that the columns are configured in the order of the numbers.

  On the other hand, when a triplet of the position in the image to be displayed on the screen, the order in the stored column, and the number to be displayed is specified, the drawing unit starts from the specified order in the image. A column of tile images having a specified number of lengths is drawn at the specified position.

  As described above, the drawing unit generally executes the processing of the drawing unit when a library such as a hardware, a system call, or a BIOS is called. At that time, a triple of position, order (which means an identification number of the tile image), and number is designated as a parameter.

  Further, the order storage unit corresponds, for each partition that divides the virtual space into the predetermined size, the order in the column in which tile images to be drawn in the partition are stored and the position of the partition. Add and remember.

  For example, when an image of a virtual space map is drawn according to the present invention, the order storage unit is a two-dimensional array, and the order of tile images, that is, the identification number of the tile image is stored in each element. It will be. Each section means an area where one tile image is pasted.

  Further, when any of the sections is designated, the maximum length acquisition unit determines the order of the tile images to be drawn in a row of sections arranged in a predetermined direction from the section for the designated section. , To obtain the maximum length that matches the order of the stored columns.

  Various specific methods for obtaining the maximum length are conceivable, and are realized by, for example, the following preferred embodiments.

Further, the control unit, for all of the sections to be drawn in the image, if the section is not yet drawn in the image,
(A) a position associated with the section;
(B) the order stored in association with the section;
(C) a maximum length obtained by designating the section as a maximum length acquisition unit;
Are specified in the drawing section.

  For example, in the case of RPG map display, only a part of the map of the entire virtual space is displayed on the screen. Therefore, only the section corresponding to a part of the two-dimensional array representing the map is to be drawn and displayed. Each of the target sections is a “section to be drawn in the image”. Typically, since an image to be displayed is generated in an image buffer secured in a RAM (Random Access Memory) or the like, each section is drawn in the image buffer.

  Since the maximum length acquisition unit acquires the number of tile images that can be drawn collectively in one process of the drawing unit, drawing is performed for one or more sections when the control unit performs drawing once. . For this reason, if it is going to perform said process about all the divisions which should be drawn, it may arise that the said division has been drawn previously. In this case, it is not necessary to draw for the section.

  As described above, according to the present invention, when the tile images to be drawn are continuous, the number of calls of the drawing unit is suppressed by drawing all at once in one process, It is possible to generate an image faster than drawing one tile image at a time.

  The image processing apparatus of the present invention further includes a maximum length storage unit and can be configured as follows.

  That is, the maximum length storage unit sets, for each of the sections, the maximum length at which the order of tile images to be drawn in the section columns arranged in a predetermined direction from the section matches the order of the stored columns. The maximum length acquisition unit stores the maximum length stored in the maximum length storage unit for the given partition as a result of the acquisition.

  As described above, assuming that the map is composed of a two-dimensional array and the order (identification number) of tile images is stored as elements, the maximum length storage unit is also a two-dimensional array having the same number of elements as the map. Typically, it is configured.

  In this case, the elements in the map are sequentially scanned from the element of the map corresponding to each element of the maximum length storage unit, and the number of elements whose identification number is successively increased by 1 is the number of elements, Are stored in advance in the relevant element of the maximum length storage unit.

  The present invention relates to a preferred embodiment of the above-described invention. By examining and storing in advance the number of parameters designated for the drawing unit, high-speed drawing can be performed.

  In the image processing apparatus of the present invention, the maximum length acquisition unit is configured to scan the order storage unit and the tile image storage unit and acquire the maximum length when the section is given. Can do.

  In the above invention, the number of consecutive identification numbers (maximum length) is checked in advance and stored in the maximum length storage unit. However, in the present invention, each time an attempt is made to draw, an array of maps (order storage unit) And the number of consecutive identification numbers (maximum length) is acquired.

  The present invention relates to a preferred embodiment of the above invention, and the memory usage can be suppressed by omitting the maximum length storage unit.

  Further, in the image processing apparatus of the present invention, among the sections, the section to be drawn is a partial area of the virtual space, and the control unit changes to the three sets of (a), (b), and (c). And

  (A ′) the relative position in the region of the partition determined from the position stored in association with the partition and the position of the region in the virtual space;

  (B ′) the order stored in association with the section;

(C ′) the number of tile images included in the area of the maximum length tile image sequence acquired for the section starting from the section;
Can be configured to be designated in the drawing unit.

  The present invention specifically considers the case of drawing only a part of a two-dimensional map. That is, the parameter “number” specified in the drawing unit does not specify the acquired maximum length as it is, but adjusts it to be appropriately reduced depending on the relative position with respect to the drawing target area.

  According to the present invention, when an image for a partial region of the virtual space is generated, the image can be drawn at high speed.

  The image processing apparatus of the present invention further includes a display unit, and the display unit can be configured to display the image on the screen when all the sections included in the region are drawn. .

  The present invention relates to a preferred embodiment of the above-described invention, and each time an entire image is generated, the generated image is displayed on the screen, so that necessary information can be provided to the user.

  In addition, the image processing apparatus of the present invention includes an area moving unit, and the area moving unit can be configured to move the area in the virtual space in response to a user instruction input.

  The present invention relates to a preferred embodiment of the above invention. For example, in a game such as RPG, a player character moves in a virtual space section according to a user instruction, and the section where the player character is arranged is a screen. , A scroll process may be performed to move the display area so that the player character is in the center of the screen.

  According to the present invention, an image can be generated at high speed in a display device that performs such scroll processing.

  An image processing method according to another aspect of the present invention is executed by an image processing apparatus including a tile image storage unit, a drawing unit, an order storage unit, a maximum length acquisition unit, and a control unit, and is configured as follows.

  That is, the tile image storage unit stores a sequence of tile images of a predetermined size.

  On the other hand, in the order storage unit, for each of the sections that divide the virtual space into the predetermined size, the order in the column in which tile images to be drawn in the section are stored and the positions of the sections are stored in the sections. Correspondingly stored.

  Furthermore, in the drawing process, when the drawing unit specifies a triplet of the position in the image to be displayed on the screen, the order in the stored column, and the number to be displayed, the specified in the image A column of tile images of the specified number of lengths starting from the order is drawn at the specified position.

  Then, in the maximum length acquisition step, when any of the sections is designated, the maximum length acquisition unit draws the designated section in a row of sections arranged in a predetermined direction from the section. The maximum length in which the order of the power tile images matches the order of the stored columns is acquired.

On the other hand, in the control process, the control unit, for all of the sections to be drawn in the image, is not drawn in the image,
(A) a position associated with the section;
(B) the order stored in association with the section;
(C) a maximum length obtained by designating the section in the maximum length acquisition step;
Are specified in the drawing section.

  A program according to another aspect of the present invention is configured to cause a computer to function as each unit of the above-described image processing apparatus and to cause the computer to execute each step of the above-described image processing method.

  The program of the present invention can be recorded on a computer-readable information storage medium such as a compact disk, flexible disk, hard disk, magneto-optical disk, digital video disk, magnetic tape, and semiconductor memory.

  The above-mentioned program is independent of a computer that executes the program, and an electronic device such as an FPGA (Field Programmable Gate Array) or DSP (Ditigal Signal Processor) that is reconfigured by the program and forms an electronic circuit. It can be distributed and sold via the network. The information storage medium can be distributed and sold independently from the computer.

  According to the present invention, an image processing apparatus and an image processing method suitable for generating images at high speed using hardware, a system call, and a library that draw tiled images side by side, and these are realized by a computer. A program can be provided.

  Embodiments of the present invention will be described below.

  FIG. 1 is a schematic diagram illustrating a schematic configuration of a typical information processing apparatus in which the image processing apparatus according to the present embodiment is realized. Hereinafter, a description will be given with reference to FIG.

  The information processing apparatus 100 includes a CPU (Central Processing Unit) 101, a ROM 102, a RAM (Random Access Memory) 103, an interface 104, a controller 105, an external memory 106, an image processing unit 107, and a DVD-ROM. (Digital Versatile Disc ROM) drive 108, NIC (Network Interface Card) 109, audio processing unit 110, and microphone 111.

  When the DVD-ROM storing the program and data is loaded into the DVD-ROM drive 108 and the information processing apparatus 100 is turned on, the program is executed and the image processing apparatus of the present embodiment is realized.

  The CPU 101 controls the overall operation of the information processing apparatus 100 and is connected to each component to exchange control signals and data. Further, the CPU 101 uses arithmetic operations such as addition / subtraction / multiplication / division, logical sum, logical product, etc. using an ALU (Arithmetic Logic Unit) (not shown) for a storage area called a register (not shown) that can be accessed at high speed. , Logic operations such as logical negation, bit operations such as bit sum, bit product, bit inversion, bit shift, and bit rotation can be performed. In addition, the CPU 101 itself is configured so that saturation operations such as addition / subtraction / multiplication / division for multimedia processing, vector operations such as trigonometric functions, etc. can be performed at a high speed, and those provided with a coprocessor. There is.

  The ROM 102 records an IPL (Initial Program Loader) that is executed immediately after the power is turned on, and when this is executed, the program recorded on the DVD-ROM is read out to the RAM 103 and execution by the CPU 101 is started. The The ROM 102 stores an operating system program and various data necessary for operation control of the entire information processing apparatus 100.

  The RAM 103 is for temporarily storing data and programs, and holds programs and data read from the DVD-ROM and other data necessary for game progress and chat communication. Further, the CPU 101 provides a variable area in the RAM 103 and performs an operation by directly operating the ALU on the value stored in the variable, or temporarily stores the value stored in the RAM 103 in the register. Perform operations such as performing operations on registers and writing back the operation results to memory.

  The controller 105 connected via the interface 104 receives various operation inputs performed by the user when the game is executed, for example, operation inputs for moving an area to be displayed on the screen in the virtual space.

  The external memory 106 detachably connected via the interface 104 stores data indicating game play status (past results, etc.), data indicating game progress, and log of chat communication in the case of a network match ( Data) is stored in a rewritable manner. The user can record these data in the external memory 106 as appropriate by inputting an instruction via the controller 105.

  A DVD-ROM mounted on the DVD-ROM drive 108 stores a program for realizing the game and image data and audio data associated with the game. Under the control of the CPU 101, the DVD-ROM drive 108 performs a reading process on the DVD-ROM loaded therein, reads out necessary programs and data, and these are temporarily stored in the RAM 103 or the like.

  The image processing unit 107 processes the data read from the DVD-ROM by an image arithmetic processor (not shown) included in the CPU 101 or the image processing unit 107, and then processes the processed data on a frame memory ( (Not shown). The image information recorded in the frame memory is converted into a video signal at a predetermined synchronization timing and output to a monitor (not shown) connected to the image processing unit 107. Thereby, various image displays are possible.

  The image calculation processor can execute a two-dimensional image overlay calculation, a transmission calculation such as α blending, and various saturation calculations at high speed.

  Also, polygon information arranged in the virtual three-dimensional space and added with various texture information is rendered by the Z buffer method, and the polygon arranged in the virtual three-dimensional space from the predetermined viewpoint position is determined in the direction of the predetermined line of sight It is also possible to perform high-speed execution of operations for obtaining rendered images.

  In addition, it is also possible to generate an image using a tile image by calling a library such as the hardware, system call, and BIOS described above.

  Further, the CPU 101 and the image arithmetic processor operate in a coordinated manner, so that a character string can be drawn as a two-dimensional image in a frame memory or drawn on the surface of each polygon according to font information that defines the character shape. is there.

  The NIC 109 is used to connect the information processing apparatus 100 to a computer communication network (not shown) such as the Internet, and is based on the 10BASE-T / 100BASE-T standard used when configuring a LAN (Local Area Network). To connect to the Internet using an analog modem, ISDN (Integrated Services Digital Network) modem, ADSL (Asymmetric Digital Subscriber Line) modem, cable television line A cable modem or the like and an interface (not shown) that mediates between these and the CPU 101 are configured.

  The audio processing unit 110 converts audio data read from the DVD-ROM into an analog audio signal and outputs the analog audio signal from a speaker (not shown) connected thereto. Further, under the control of the CPU 101, sound effects and music data to be generated during the progress of the game are generated, and sound corresponding to this is output from the speaker.

  When the audio data recorded on the DVD-ROM is MIDI data, the audio processing unit 110 refers to the sound source data included in the audio data and converts the MIDI data into PCM data. If the compressed audio data is in ADPCM format or Ogg Vorbis format, it is expanded and converted to PCM data. The PCM data can be output by performing D / A (Digital / Analog) conversion at a timing corresponding to the sampling frequency and outputting it to a speaker.

  Furthermore, a microphone 111 can be connected to the information processing apparatus 100 via the interface 104. In this case, the analog signal from the microphone 111 is subjected to A / D conversion at an appropriate sampling frequency so that processing such as mixing in the sound processing unit 110 can be performed as a PCM format digital signal.

  In addition, the information processing apparatus 100 uses a large-capacity external storage device such as a hard disk so as to perform the same function as the ROM 102, the RAM 103, the external memory 106, the DVD-ROM mounted on the DVD-ROM drive 108, and the like. You may comprise.

  The information processing apparatus 100 described above corresponds to a so-called “consumer video game apparatus”, but the present invention can be realized as long as it performs image processing to display a virtual space. Therefore, the present invention can be realized on various computers such as a mobile phone, a portable game device, a karaoke apparatus, and a general business computer.

  For example, a general computer, like the information processing apparatus 100, includes an image processing unit that includes a CPU, RAM, ROM, DVD-ROM drive, and NIC and has simpler functions than the information processing apparatus 100. In addition to having a hard disk as an external storage device, a flexible disk, a magneto-optical disk, a magnetic tape, and the like can be used. Further, not the controller 105 but a keyboard or a mouse is used as an input device.

  FIG. 2 is a schematic diagram illustrating a schematic configuration of the image processing apparatus according to the present embodiment. Hereinafter, a description will be given with reference to FIG.

  An image processing apparatus 201 according to the present embodiment includes a tile image storage unit 202, a drawing unit 203, an order storage unit 204, a maximum length acquisition unit 205, and a control unit 206. Further, depending on the embodiment, the maximum length storage unit 207, the display unit 208, and the area moving unit 209 may be provided.

  FIG. 3 is a flowchart showing a flow of image processing control executed by the image processing apparatus 201 according to the present embodiment. Hereinafter, a description will be given with reference to FIG.

  When this processing is started, the CPU 101 transfers a predetermined size (hereinafter, referred to as a tile image storage unit 202 secured in the RAM 103 from a DVD, a ROM cassette, the external memory 106, or the like mounted on the DVD-ROM drive 108). , Horizontal w dots, and vertical h dots) are read out, and the tile image to be drawn in each partition is stored in the order storage unit 204 for each partition that divides the virtual space into the predetermined size. The order in the columns to be processed and the position of the section are read in association with the section, and initialization is performed (step S301).

  In the “tile image sequence” read out to the tile image storage unit 202, a plurality of tile images are typically stored in order at consecutive addresses. As will be described later, one tile image pixel is stored. Is also included in which the information is stored in a jumping address with a certain rule. Therefore, the “column of tile images” includes all modes in which the tile images included can be ordered numerically, such as “XXth tile image”.

  FIG. 4 is an explanatory diagram illustrating a state of a plurality of tile image rows read out to the tile image storage unit 202. FIG. 5 is an explanatory diagram showing a state of a tile image in which a frame line and a number are clearly shown. Hereinafter, description will be given with reference to these drawings.

  In the examples shown in these figures, the columns of the tile images 401 are arranged in a checkered pattern, and each of the tile images 401 has a square shape with horizontal w = 8 dots and vertical h = 8 dots. . In this drawing, the dots are displayed in black and white, but each dot has a pixel value obtained by selecting one of the colors from the 256-color palette. Therefore, one tile image is represented by 64 bytes.

  FIG. 4 is a diagram in which tile images are arranged and displayed so as to form a single image as a whole. In FIG. 5, for ease of understanding, the tile lines of the tile images are compared with the example shown in FIG. And some of the numbers representing the order are shown.

  As shown in the figure, the tile images 401 are arranged in a horizontal A = 25 and a vertical B = 16, and 400 tiles from 0 to 399 are prepared as a whole.

  Therefore, the entire image in which the tile images 401 are arranged can be considered as an image of 200 dots wide and 128 dots long, and the whole image is expressed by an array of Aw × Bh = 200 × 128 bytes.

  When considering the x coordinate from the left to the right and the y coordinate from the top to the bottom, the pixel value for the coordinate (x, y) is expressed by the (A × w × y + x) th element in the array.

On the other hand, if the quotient obtained by dividing a by b is a div b, and the remainder obtained by dividing a by b is a mod b, the nth tile image 401 is
x coordinate (a mod b) x w to (a mod b) x w + w-1;
y coordinate (a div b) x h to (a div b) x h + h-1
From these coordinate values, the location where the pixel value is stored in the image array can be uniquely determined.

  In addition to arranging the tile images 401 so as to form a single image as a whole, considering the arrangement of w × h byte tile images 401, the pixels of the nth tile image are set to w × h × n bytes. ~ W × h × (n + 1) − A mode in which the first byte is arranged may be assumed.

  In this way, the tile image 401 is stored in the tile image storage unit 202 so as to be uniquely associated with the order.

  FIG. 6 is an explanatory diagram illustrating a display example of a map image formed by arranging tile images 401. FIG. 7 is an explanatory diagram illustrating an example of a map image with a frame line of the tile image 401. Hereinafter, description will be given with reference to these drawings.

  The map image 701 is an image displayed on a display device such as a monitor or a liquid crystal display, and is an image that can be actually viewed by the user. In this embodiment, horizontal J = 24 columns and vertical K = 16 rows. This is configured by fitting one of the tile images 401 prepared in advance into a total of 384 square-shaped sections. At this time, the same tile image may be fitted in a plurality of places.

  The map image 701 represents a part of the order storage unit 204 that is a larger map arrangement. The array of the order storage unit 204 is a two-dimensional array S of P in the horizontal direction and Q in the vertical direction, and the element stores any numerical value from 0 to A × B −1, that is, the order of the tile image 401. Has been.

  The map image 701 is an image formed by extracting a J × K array that is a part of the map image 701 from the P × Q array, and fitting the tile image 401 in the order stored in each element at that position. It is.

  In FIG. 7, some tile images 401 are surrounded by a white frame. Hereinafter, these areas will be described.

  FIG. 8 is an explanatory diagram in which a part of the map image 701 (tile image 401 surrounded by a white frame) is enlarged and attached with a frame line, and FIG. 9 is a tile image fitted in the enlarged region. It is explanatory drawing which specified the frame line and number of 401. FIG. Hereinafter, a description will be given with reference to FIG.

As shown in the figure, ten tile images 401 (not shown in the figure) are arranged in the enlarged area, and the numerical values of the order of the tile images are as follows.
37, 42, 50, 51, 52, 53, 54, 55, 39, 43
It has become.

  Thus, in the map image 701, there may be a portion where the order of the tile images 401 is continuous, such as 50 to 55. This is because, when designing the tile image 401, after drawing a picture of a large structure, the tile image 401 is often cut into grid-like sections.

  In the present embodiment, the drawing process is speeded up by performing a special process on the portion in which the order of the tile images 401 continues in this way.

  Next, the CPU 101 acquires the position (X, Y) of the J × K array representing the map image to be displayed on the screen from the P × Q array of the order storage unit 204 (step S302).

  The coordinates (X, Y) are initialized together with the initialization in step S301 so that the area moving unit 209 such as the controller 105 receives an instruction operation by the user and the value is appropriately changed according to the instruction operation. It is common to configure.

  Further, the CPU 101 initializes the variable y prepared in the RAM 103 with 0 (step S303), and repeats the processing up to step S314 while y <K (step S304; Yes).

  That is, the CPU 101 initializes the variable x prepared in the RAM 103 with 0 (step S305), and repeats the processing up to step S313 while x <J (step S306; Yes).

  First, the CPU 101 sets the sequence number S [X + x, Y + y] of the tile image 401 at the currently focused location (X + x, Y + y) as a variable p prepared in the RAM 103. Substitute (step S307).

  Next, the counter variable c prepared in the RAM 103 is initialized with 0 (step S308). If x + c + 1 <J (step S309; Yes), the sequence number S [X + of the tile image 401 is set. It is checked whether x + c + 1, Y + y] is equal to p + 1 (step S310).

  If they are equal (step S310; Yes), S [X + x + c + 1, Y + y] is substituted for p (step S311), the value of c is incremented by 1 (step S312), and the process returns to step S309.

  On the other hand, if they are not equal (step S310; No), the value of c is increased by 1 (step S313), and the process proceeds to step S314.

  On the other hand, if x + c + 1 <J is not satisfied (step S309; No), the process proceeds to step S314.

By this calculation process, (x, y) in FIG.
(1) When pointing to the section of order “37”, c = 1,
(2) If it points to the section of order “42”, c = 1.
(3) When pointing to the section of order “50”, c = 6,
(4) When pointing to the section of order “51”, c = 5,
(5) When pointing to the section of order “52”, c = 4,
(6) When pointing to the section of order “53”, c = 3,
(7) c = 2 when pointing to a block of order “54”,
(8) When pointing to the section of order “55”, c = 1,
(9) When pointing to the section of order “39”, c = 1,
(10) c = 1 when pointing to the section of order “43”.

  That is, c is a value obtained by calculating how many tile images 401 have consecutive sequence numbers from the currently focused section, and is arranged in any given section (position (x, y)). The order of the tile images 401 to be drawn in the rows of the compartments arranged in a predetermined direction (lateral direction) from the compartment corresponds to the maximum length that matches the order of the stored rows.

  Therefore, the CPU 101 functions as the maximum length acquisition unit 205 in cooperation with the RAM 103.

Next, the CPU 101 uses the library such as hardware, system call, and BIOS to store the following triplet (a) coordinates corresponding to the currently focused partition (x, y). Value (x × w, y × h);
(B) Order S [X + x + c, Y + y] stored in association with the currently focused section;
(C) Maximum length c obtained
Is specified, and c columns of tile images 401 are drawn in the image buffer prepared in the RAM 103 (step S314).

  Therefore, the image processing unit 107 functions as the drawing unit 203.

  Next, the value of x is increased by c (step S315), and the process returns to step S306.

  When executed using a simple loop (conventional method), this always corresponds to the case where c = 1, but in general, the drawing unit 203 is called using hardware, a system call, a library such as BIOS, or the like. Therefore, calculation time may be required for the pre-processing and post-processing.

  In the present embodiment, when the tile images 401 are continuously arranged, the drawing unit 203 is called using the maximum value c that can be drawn, so that the number of calls of the drawing unit 203 generally decreases. It will be. Therefore, according to the present embodiment, even if processing for obtaining the maximum length c is added, high-speed drawing can be performed.

  In step S306, when x ≧ J (step S306; No), drawing for one line is completed, so the value of y is increased by 1 (step S316), and the process returns to step S304.

  In step S304, when y ≧ K (step S304; No), drawing for one screen is completed. Therefore, the CPU 101 functions as the control unit 206 in cooperation with the RAM 103 and the like.

  When drawing for one screen is completed, the CPU 101 waits for a vertical synchronization interrupt (step S317). When the interrupt occurs, the image processing unit 107 displays the image stored in the image buffer in the RAM 103. An instruction is given to display on a monitor, a liquid crystal display, or the like (step S318), and the process returns to step S304.

  Therefore, under the control of the CPU 101, a monitor, a liquid crystal display, and the like function as the display unit 208 in cooperation with the image processing unit 107.

  It should be noted that other processing may be executed as appropriate during standby in step S315 or before returning from step S316 to step S304.

  In the above description, the maximum length acquisition unit 205 scans the order storage unit 204 and calculates the maximum length c every time drawing is performed. However, in the following, it is considered that this process is performed at higher speed.

  That is, a P × Q-dimensional array R is prepared in advance in the RAM 103 and functions as the maximum length storage unit 207.

  Then, each element of the array R is initialized as follows.

  FIG. 10 is a flowchart showing a control flow of initialization processing of the maximum length storage unit 207. Hereinafter, a description will be given with reference to FIG.

  That is, the CPU 101 initializes the variable y prepared in the RAM 103 with 0 (step S901), and repeats the processing up to step S919 while y <Q (step S902; Yes).

  Here, the CPU 101 initializes the variable x prepared in the RAM 103 with 0 (step S903), and repeats the processing up to step S913 while x <P (step S904; Yes).

  That is, the CPU 101 substitutes the sequence number S [x, y] of the tile image 401 at the currently focused location (x, y) into the variable p prepared in the RAM 103 (step S905).

  Next, the counter variable c prepared in the RAM 103 is initialized with 0 (step S906). If x + c + 1 <P (step S907; Yes), the sequence number S [x + of the tile image 401 is set. It is checked whether c + 1, y] is equal to p + 1 (step S908).

  If they are equal (step S908; Yes), S [x + c + 1, y] is substituted for p (step S909), the value of c is incremented by 1 (step S910), and the process returns to step S907.

  On the other hand, if they are not equal (step S908; No), the value of c is increased by 1 (step S911), the value of c is substituted into R [x, y] (step S912), and the value of x is increased by 1. (Step S913), the process returns to Step S904.

  On the other hand, if x + c + 1 <P is not satisfied (step S907; No), the process proceeds to step S912.

  In step S904, when x ≧ P (step S904; No), the value of y is increased by 1 (step S919), and the process returns to step S902.

  On the other hand, in step S902, when y ≧ Q (step S902; No), this process ends.

  The initialization process including the array R may be performed in advance, and the generated array R value itself may be stored in a DVD-ROM, a ROM cassette, or the like, and loaded in step S301.

  The values stored in the array R in this manner serve as candidates for the maximum length c in consideration of changes in the area displayed on the screen as described above.

  Then, the following processing is performed in place of steps S307 to S313 in the flowchart in FIG. FIG. 11 is a partial extraction diagram of a flowchart showing a flow of control of the replaced image processing. Hereinafter, a description will be given with reference to FIG.

  That is, after it is determined in step S306 that x <J (step S306; Yes), instead of proceeding to step S307, the CPU 101 determines the element at the target position of the array R forming the maximum length storage unit 207. R [X + x, Y + y] is acquired in the variable c (step S951).

  Then, it is checked whether or not c <J-x (step S952). If so (step S952; Yes), the process proceeds to step S314.

  Otherwise (step S952; No), J-x is substituted for c (step S953), and the process proceeds to step S314.

  J-x is the number of undrawn tile images 401 counted in the horizontal direction and cannot be drawn further in the horizontal direction. Therefore, the value stored in the maximum length storage unit 207 is adjusted by making the above determination.

  According to the present embodiment, by calculating the maximum length in advance, it is possible to perform drawing processing at higher speed.

  As described above, according to the present invention, an image processing apparatus, an image processing method, and an image processing apparatus suitable for generating images at high speed using hardware, system calls, and libraries that draw tiled images side by side, and A program for realizing these by a computer can be provided.

It is a mimetic diagram showing the outline composition of the typical information processor with which the image processing device concerning this embodiment is realized. 1 is a schematic diagram illustrating a schematic configuration of an image processing apparatus according to the present embodiment. It is a flowchart which shows the flow of control of the image processing performed with the image processing apparatus which concerns on this embodiment. It is explanatory drawing which shows the mode of the row | line | column of the several tile image read to a tile image storage part. It is explanatory drawing which shows the mode of the tile image which specified the frame line and the number. It is explanatory drawing which shows the example of a display of the map image formed by arranging the tile image. It is explanatory drawing which shows the example of the map image which attached the frame line of the tile image. It is explanatory drawing which expanded the partial tile image of the map image, and attached the frame line. It is explanatory drawing which specified the frame line and number of the tile image inserted by the expanded area | region. It is a flowchart which shows the flow of control of the initialization process of a maximum length memory | storage part. It is a partial extraction figure of the flowchart which shows the flow of control of the said replaced image processing.

Explanation of symbols

100 Information processing apparatus 101 CPU
102 ROM
103 RAM
104 Interface 105 Controller 106 External Memory 107 Image Processing Unit 108 DVD-ROM Drive 109 NIC
DESCRIPTION OF SYMBOLS 110 Audio | voice processing part 111 Microphone 201 Image processing apparatus 202 Tile image memory | storage part 203 Drawing part 204 Order memory | storage part 205 Maximum length acquisition part 206 Control part 207 Maximum length memory | storage part 208 Display part 209 Area movement part 401 Tile image 701 Map image

Claims (8)

A tile image storage unit for storing a sequence of tile images of a predetermined size;
When a triplet of the position in the image to be displayed on the screen, the identification number indicating the order in the column stored in the tile image storage unit, and the number to be displayed is designated, the designation is made in the image. A drawing unit that draws a column of tile images of the designated number of lengths starting from the position of the order represented by the identification number at the designated position;
For each of the sections that divide the virtual space into the predetermined size, an identification number that represents the order of the tile images to be drawn in the section in the column stored in the tile image storage unit, and the position of the section, An order storage unit for storing in association with the section;
When any one of the sections is designated, an identification number of a tile image to be drawn in a row of sections arranged in a predetermined direction from the section for the designated section is stored in the tile image storage unit. A maximum length acquisition unit for acquiring a maximum length that matches an identification number representing an order in a stored column;
For all of the sections to be drawn in the image, if the section is not yet drawn in the image,
(A) a position associated with the section;
(B) an identification number stored in association with the section;
(C) a maximum length obtained by designating the section as the maximum length acquisition unit;
An image processing apparatus comprising: a control unit that designates the triplet as the drawing unit. The image processing apparatus according to claim 1,
For each of the sections, the maximum length for which the identification number of the tile image to be drawn in the section row aligned in a predetermined direction from the section matches the identification number indicating the order in the stored column is set in the section. A maximum length storage unit for storing the information in association;
The maximum length acquisition unit uses the maximum length stored in the maximum length storage unit for the given section as a result of the acquisition. The image processing apparatus according to claim 1,
The maximum length acquisition unit, when the section is given, scans the order storage unit and the tile image storage unit to acquire the maximum length. The image processing apparatus according to any one of claims 1 to 3,
Among the sections, the section to be drawn is a partial area of the virtual space,
The control unit is changed to the triple of (a), (b) and (c),
(A ′) the relative position in the region of the partition determined from the position stored in association with the partition and the position of the region in the virtual space;
(B ′) an identification number stored in association with the section;
(C ′) the number of tile images included in the region in the column of tile images of the maximum length acquired for the partition starting from the partition;
An image processing apparatus characterized by designating the triplet to the drawing unit. The image processing apparatus according to claim 4,
An image processing apparatus, further comprising: a display unit configured to display the image on a screen when all the sections included in the region are drawn. The image processing apparatus according to claim 5,
An image processing apparatus, further comprising: a region moving unit that moves the region in the virtual space in response to a user instruction input. An image processing method executed by an image processing apparatus having a tile image storage unit, a drawing unit, an order storage unit, a maximum length acquisition unit, and a control unit,
The tile image storage unit stores a column of tile images of a predetermined size,
In the order storage unit, for each of the sections that divide the virtual space into the predetermined size, an identification number that represents the order in the column stored in the tile image storage unit of tile images to be drawn in the section, and The position of the section is stored in association with the section,
When the drawing unit designates a triple of a position in an image to be displayed on the screen, an identification number indicating an order in a column stored in the tile image storage unit, and the number to be displayed, the image A drawing step of drawing a column of tile images of the specified number of lengths starting from the position in the order represented by the specified identification number at the specified position;
When any one of the sections is designated by the maximum length acquisition unit, the identification number of the tile image to be drawn in the row of the sections arranged in a predetermined direction from the section for the designated section. A maximum length acquisition step of acquiring a maximum length that matches an identification number representing an order in a column stored in the tile image storage unit ;
The control unit, for all of the sections to be drawn in the image, the section is not yet drawn in the image,
(A) a position associated with the section;
(B) an identification number stored in association with the section;
(C) a maximum length obtained by designating the section in the maximum length acquisition step;
An image processing method comprising: a control step of designating the triplet to the drawing unit. Computer
A tile image storage unit for storing a sequence of tile images of a predetermined size;
When a triplet of the position in the image to be displayed on the screen, the identification number indicating the order in the column stored in the tile image storage unit, and the number to be displayed is designated, the designation is made in the image. A drawing unit that draws a column of tile images of the designated number of lengths starting from the position of the order represented by the identification number at the designated position;
For each of the sections that divide the virtual space into the predetermined size, an identification number that represents the order of the tile images to be drawn in the section in the column stored in the tile image storage unit, and the position of the section, An order storage unit for storing in association with the section;
When any one of the sections is designated, an identification number of a tile image to be drawn in a row of sections arranged in a predetermined direction from the section is stored in the tile image storage unit. A maximum length acquisition unit for acquiring a maximum length that matches an identification number representing an order in a stored column;
For all of the sections to be drawn in the image, if the section is not yet drawn in the image,
(A) a position associated with the section;
(B) an identification number stored in association with the section;
(C) a maximum length obtained by designating the section as the maximum length acquisition unit;
A program for causing the triple to function as a control unit for designating the drawing unit.

Images