JP4424014B2 - Semiconductor device with built-in thermoelectric element - Google Patents

Description

  The present invention relates to a semiconductor device incorporating a thermoelectric element. In particular, the present invention relates to a technique for enabling a desired heat flow path to be designed in a plane of a semiconductor substrate and realizing a high-performance semiconductor device that has been difficult in the past due to a thermal problem of a semiconductor circuit.

Conventionally, thermoelectric elements that exhibit thermoelectric effects such as Seebeck effect, Peltier effect, or Thomson effect have been put into practical use using bulk thermoelectric materials.
In particular, a Peltier element using a bulk thermoelectric material is well known as a cooling mechanism for electronic products. This type of bulk Peltier device is used by being attached to the outer surface of an object to be cooled (such as an IC package) via a paste having high thermal conductivity.

On the other hand, as disclosed in Patent Document 1, there is also disclosed one in which a Peltier element is formed in a thin film structure on an insulating substrate such as sapphire or glass.
JP-A-63-76463 (FIGS. 1 and 2)

  Since the conventional Peltier element is produced by cutting out a bulk type thermoelectric material, the size becomes large. For this reason, even when cooling a small object to be cooled, the size of the Peltier element is large, so that there is a problem that the entire product cannot be reduced in size.

  Moreover, the conventional Peltier device indirectly cools the heat generation location in the inner back of the IC by being attached to the outer surface of the IC package. Therefore, the heat generation part inside the IC could not be directly cooled, and the cooling efficiency was low.

  Furthermore, in the conventional Peltier device, in order to sufficiently cool the inner part of the IC, the outer surface of the package that comes into contact with the outside air must be cooled strongly, and there is a problem such as condensation on the cooled outer surface. It was easy.

On the other hand, in the thin film type Peltier device of Patent Document 1, a thermoelectric material such as Bi is formed as a thin film on an insulating substrate such as sapphire or glass. Therefore, a process different from a general semiconductor manufacturing process is required.
Furthermore, it is difficult to securely attach a minute object to be cooled to this thin film type Peltier element, and problems such as “reliable bonding method”, “mechanical distortion and mechanical strength of the bonded portion”, and “bonding cost”. Had to solve.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a thermoelectric element technology that efficiently exerts a thermoelectric effect on a semiconductor device.

<Claim 1>
According to another aspect of the present invention, a semiconductor device includes a semiconductor substrate and a plurality of thermoelectric elements formed on the semiconductor substrate and thermally connected in cascade .
The thermoelectric element includes a first conductivity type region formed in a semiconductor substrate, a primary electrode electrically connected to one end of the first conductivity type region, and an electrical connection to the other end of the first conductivity type region. A secondary electrode that is electrically connected to the secondary electrode and is formed between the first conductivity type region and the second conductivity type region. A trench structure having a function of separating and a tertiary electrode electrically connected to the second conductivity type region are provided. In the semiconductor device having such a configuration, a temperature difference is generated by a current flowing between the primary electrode and the secondary electrode or between the primary electrode and the tertiary electrode . Using this temperature difference, at least a part of the semiconductor substrate can be cooled, heated, heat flow generated, or temperature controlled.

<Claim 2 >
According to a second aspect of the present invention, in the semiconductor device of the first aspect, a plurality of thermoelectric elements are formed in the surface direction of the semiconductor substrate, and the plurality of thermoelectric elements are thermally transmitted via a heat conducting portion extending in the surface direction. It is characterized by cascade connection.

<Claim 3 >
According to a third aspect of the present invention, in the semiconductor device of the second aspect , at least one semiconductor circuit thermally connected to the thermoelectric element is formed on the semiconductor substrate. The semiconductor circuit is subjected to cooling, heating, heat flow generation, or temperature control using the temperature difference generated by the thermoelectric element.

<Claim 4 >
The invention of claim 4 includes a semiconductor substrate, a plurality of thermoelectric elements formed on the semiconductor substrate and thermally cascade-connected, and at least one semiconductor circuit formed on the semiconductor substrate and thermally connected to the thermoelectric element ; a temperature sensor that measures the temperature of the semiconductor substrate, by changing the current applied to the thermoelectric element in accordance with the measured temperature of the temperature sensor, Ru and a temperature control circuit for controlling the temperature of the semiconductor circuit.
The thermoelectric element includes a first conductivity type region formed in a semiconductor substrate, a primary electrode electrically connected to one end of the first conductivity type region, and an electrical connection to the other end of the first conductivity type region. Secondary electrode. In the semiconductor device having such a configuration, it is possible to perform cooling, heating, heat flow generation, or temperature control on the semiconductor circuit using a temperature difference generated by the thermoelectric element.

<Claim 5 >
According to a fifth aspect of the present invention, in the semiconductor device according to the third or fourth aspect , the semiconductor circuit is an imaging element circuit including a light shielding film, wherein the thermoelectric element is thermally connected to the light shielding film, and the light shielding film is interposed therebetween. The imaging device circuit is cooled, heat flow is generated, or temperature is controlled.

<Claim 6>
A sixth aspect of the present invention is the semiconductor device according to any one of the first to fifth aspects, further comprising a heat output terminal for discharging an unnecessary amount of heat generated in the thermoelectric element to the outside of the semiconductor substrate. And

  In the present invention, a first conductivity type region, a primary electrode, and a secondary electrode are formed on a semiconductor substrate. The basic thermoelectric element structure is formed on the semiconductor substrate by electrically connecting the primary electrode to one end of the first conductivity type region and electrically connecting the secondary electrode to the other end.

  By forming the thermoelectric element directly on the semiconductor substrate in this way, the heat transfer loss due to the thermal resistance between the semiconductor substrate and the thermoelectric element is reduced, and the thermoelectric effect is “high-speed” and “efficient” with respect to the semiconductor substrate. It becomes possible to affect.

  Further, by forming the thermoelectric element directly on the semiconductor substrate, it becomes easier to downsize the entire product than externally attaching a bulk type Peltier element.

  Furthermore, by forming the thermoelectric element directly on the semiconductor substrate (destination of the thermoelectric action), the bonding step of attaching an object to be cooled later as in Patent Document 1 becomes unnecessary. Furthermore, combined with the use of a general semiconductor manufacturing process, it becomes easier to keep the manufacturing cost lower than the thin film type Peltier device of Patent Document 1.

  In addition, by directly forming the thermoelectric element on the semiconductor substrate, it becomes possible to positively design the heat flow of the semiconductor substrate. As a result, it becomes easy to improve adverse effects (for example, thermal noise and reduction in maximum absolute rating) due to unnecessary heat flow and heat storage in the semiconductor device.

<< First Embodiment >>
FIG. 1 is a plan view of a thermoelectric element 2 in the first embodiment.
FIG. 2A is a cross-sectional view taken along the line DD ′ shown in FIG.
2B is a cross-sectional view taken along the line EE ′ shown in FIG.
FIG. 2C is a cross-sectional view of the FF ′ portion shown in FIG.
Hereinafter, the structure of the thermoelectric element 2 will be described based on these drawings.
First, a P-type well 3 is formed in an N-type semiconductor substrate 1 such as silicon. An N + type impurity region 4 is formed in the region of the P type well 3. On the other hand, a P + type impurity region 5 is formed outside the region of the P type well 3 so as to be parallel to the N + type impurity region 4.
The upper surfaces of the impurity regions 4 and 5 are covered with the insulating layer 15. The primary electrode 7 is in ohmic contact with one end of the N + type impurity region 4 through a contact hole 6 provided in the insulating layer 15. Further, the secondary electrode 9 is in ohmic contact with the other end of the N + type impurity region 4 through the contact hole 8 of the insulating layer 15. The secondary electrode 9 is in ohmic contact with one end of the P + type impurity region 5 through the contact hole 10 of the insulating layer 15. Further, the other end of the P + type impurity region 5 is in ohmic contact with the tertiary electrode 12 through the contact hole 11 of the insulating layer 15.
In addition, as a material of the electrodes 7, 9, and 12, aluminum, copper, tungsten, titanium, and alloys and compounds thereof are preferable.

[Correspondence with Invention]
The correspondence relationship between the invention and this embodiment will be described below. Note that the correspondence relationship here illustrates one interpretation for reference, and does not limit the present invention.
The semiconductor substrate recited in the claims corresponds to the N-type semiconductor substrate 1.
The thermoelectric element described in the claims corresponds to the thermoelectric element 2.
The first conductivity type region described in the claims corresponds to the N + type impurity region 4.
The primary electrode recited in the claims corresponds to the primary electrode 7.
The secondary electrode described in the claims corresponds to the secondary electrode 9.
The second conductivity type region described in the claims corresponds to the P + type impurity region 5.
The tertiary electrode recited in the claims corresponds to the tertiary electrode 12.
The junction isolation described in the claims corresponds to a PN junction between the N + type impurity region 4 and the P type well 3.

[Heat flow generation operation by thermoelectric element 2]
When a heat flow is generated in the N-type semiconductor substrate 1 using the thermoelectric element 2 configured as described above, a voltage V having a polarity in which the primary electrode 7 is positive and the tertiary electrode 12 is negative is used as a current source circuit or a voltage source. It is applied from a drive unit such as a circuit or a temperature control circuit.
At this polarity voltage V, the PN junction between the N + type impurity region 4 and the P type well 3 is reverse-biased and electrically separated. Then, the PNPN thyristor structure existing between the P + type impurity region 5 and the N + type impurity region 4 is stabilized in the reverse blocking state. As a result, almost no leakage current flows between the impurity regions.
Therefore, when the voltage V having the polarity is applied, a current flows along the following path.

(Primary electrode 7)-(N + type impurity region 4)-(Secondary electrode 9)-(P + type impurity region 5)-(Tertiary electrode 12)

By this current path, electrons, which are majority carriers in the N + type impurity region 4, move from the secondary electrode 9 side toward the primary electrode 7 side. Further, the holes which are majority carriers in the P + type impurity region 5 move from the secondary electrode 9 side toward the tertiary electrode 12 side.
With such carrier movement, a heat flow is forcibly generated in the N-type semiconductor substrate 1 with the secondary electrode 9 side as the heat absorption side and the primary electrode 7 and the tertiary electrode 12 side as the heating (heat radiation) side. To do. That is, the thermoelectric element 2 works as if it is a heat pump (heat pump).

  Thus, by disposing the thermoelectric element 2 as a heat pump in a desired path in the N-type semiconductor substrate 1, it is possible to design the heat flow path in the N-type semiconductor substrate 1 locally and freely. Become.

  For example, the secondary electrode 9 is disposed in the vicinity of a semiconductor circuit (such as an output stage amplifier of an image sensor) serving as a heat source in the N-type semiconductor substrate 1 to forcibly heat the primary electrode 7 and the tertiary electrode 12 side. Can be applied. In this case, a high S / N semiconductor device with extremely little thermal noise can be realized by arranging the heat flow path by the thermoelectric element 2 so as to avoid a place (such as a light receiving pixel portion of the imaging element) where thermal noise adversely affects.

  Further, by arranging the heat flow path in this case so as to avoid a location where destruction or malfunction due to heat is a problem, the maximum absolute rating is increased, and a highly reliable semiconductor device can be realized.

  Furthermore, the thermoelectric element 2 and the semiconductor circuit can be formed on the same N-type semiconductor substrate 1 by the same process. Therefore, compared with the conventional form which adhere | attaches a Peltier device later, the thermal resistance interposed between both becomes very small. In this case, a “fast” and “efficient” cooling action (or heating action) can be exerted on the semiconductor circuit by simply passing a relatively small amount of current through the thermoelectric element 2.

  Furthermore, since the leakage current in the thermoelectric element 2 is suppressed by a general semiconductor structure such as junction separation, it is not necessary to select the type of the semiconductor substrate, and the thermoelectric element 2 can be manufactured at low cost.

  Moreover, in this embodiment, since the connection location of an electrode and an impurity region is made low resistance by ohmic contact, generation | occurrence | production of Joule heat in a connection location is small, and high thermoelectric efficiency can be obtained.

  For these reasons, in this embodiment, fine heat flow design on a semiconductor substrate, which has been impossible in the past, becomes possible. Therefore, unnecessary heat flow on the semiconductor substrate and adverse effects of heat storage (for example, thermal noise, a decrease in maximum absolute rating, and malfunction due to heat) can be improved. As a result, semiconductor devices such as “high S / N”, “high withstand voltage”, and “high reliability” that have been difficult in the past can be realized more easily.

[Power generation operation by thermoelectric element 2]
When generating “energy conversion from heat to electricity” in the thermoelectric element 2 configured as described above, the secondary electrode 9 may be disposed on the low temperature side, and the primary electrode 7 and the tertiary electrode 12 side may be disposed on the high temperature side. . Due to the heat flow generated by this temperature difference, electrons which are majority carriers in the N + type impurity region 4 are diffused and moved from the primary electrode 7 side to the secondary electrode 9 side. On the other hand, holes which are majority carriers in the P + type impurity region 5 also diffuse and move from the tertiary electrode 12 side to the secondary electrode 9 side. Along with such charge transfer, a potential difference is generated with the primary electrode 7 being positive and the tertiary electrode 12 (secondary electrode 9) being negative.

  Due to such a potential difference in polarity, the PN junction between the N + type impurity region 4 and the P type well 3 is reverse-biased and electrically separated. Then, the PNPN thyristor structure existing between the P + type impurity region 5 and the N + type impurity region 4 is stabilized in the reverse blocking state. As a result, almost no leakage current flows between the impurity regions, and the potential difference can be taken out efficiently.

By detecting the potential difference of the thermoelectric element 2 in this way, it is possible to measure the local-local temperature difference on the semiconductor substrate.
In addition, by using this potential difference as a driving voltage or a reference voltage for a semiconductor circuit, it is possible to save power in the semiconductor device.

<< Second Embodiment >>
FIG. 3 is a plan view of the thermoelectric element 22 in the second embodiment.
4A is a cross-sectional view taken along the line HH ′ shown in FIG.
FIG. 4B is a cross-sectional view taken along a line II ′ shown in FIG.
FIG. 4C is a cross-sectional view of the JJ ′ portion shown in FIG.
Hereinafter, the structure of the thermoelectric element 22 will be described based on these drawings.
First, the thermoelectric element 22 is formed on the SOI semiconductor substrate 21. Here, a UNIBOND (registered trademark) wafer manufactured by Shin-Etsu Chemical Co., Ltd. is used as the SOI semiconductor substrate 21. The wafer is provided with a buried insulating layer 34 under the surface, and a silicon single crystal surface layer is provided on the buried insulating layer 34.

In this SOI semiconductor substrate 21, a trench structure 31 reaching the buried insulating layer 34 is formed in a “Japanese character” shape. The trench structure 31 electrically isolates the N-type impurity compartment 42 and the P-type impurity compartment 43.
Further, in the present embodiment, an insulating film 31a such as silicon oxide is provided on the inner wall and bottom of the trench structure 31, and the trench is filled with polysilicon or the like.

The N-type impurity section 42 includes an N-type impurity region 32 and an N + -type impurity region 4 having a higher impurity concentration provided at the center thereof.
On the other hand, the P-type impurity section 43 includes a P-type impurity region 33 and a P + -type impurity region 5 having a higher impurity concentration provided at the center thereof.
The upper surfaces of the impurity compartments 42 and 43 are covered with the insulating layer 15. The primary electrode 7 is in ohmic contact with one end of the N + type impurity region 4 through a contact hole 6 provided in the insulating layer 15. Further, the secondary electrode 9 is in ohmic contact with the other end of the N + type impurity region 4 through the contact hole 8 of the insulating layer 15. The secondary electrode 9 is in ohmic contact with one end of the P + type impurity region 5 through the contact hole 10 of the insulating layer 15. Further, the other end of the P + type impurity region 5 is in ohmic contact with the tertiary electrode 12 through the contact hole 11 of the insulating layer 15.

[Correspondence with Invention]
The correspondence relationship between the invention and this embodiment will be described below. Note that the correspondence relationship here illustrates one interpretation for reference, and does not limit the present invention.
The semiconductor substrate recited in the claims corresponds to the SOI semiconductor substrate 21.
The thermoelectric element described in the claims corresponds to the thermoelectric element 22.
The first conductivity type region described in the claims corresponds to the N + type impurity region 4 or the N type impurity section 42.
The primary electrode recited in the claims corresponds to the primary electrode 7.
The secondary electrode described in the claims corresponds to the secondary electrode 9.
The second conductivity type region described in the claims corresponds to the P + type impurity region 5 or the P type impurity section 43.
The tertiary electrode recited in the claims corresponds to the tertiary electrode 12.
The trench structure described in the claims corresponds to the trench structure 31.

[Heat flow generation operation by thermoelectric element 22]
Similarly to the first embodiment, the thermoelectric element 22 also generates a heat flow in the SOI semiconductor substrate 21 with the secondary electrode 9 as the cooling side and the primary electrode 7 and the tertiary electrode 12 as the heating (heat radiation) side. be able to. Therefore, the same effect as that of the first embodiment described above can be obtained.

  Further, in the thermoelectric element 22, since the leakage current is prevented by the trench structure 31, it is possible to flow a current from the tertiary electrode 12 toward the primary electrode 7. In this case, a reverse heat flow can be generated in the SOI semiconductor substrate 21 with the secondary electrode 9 as the heating (heat dissipation) side and the primary electrode 7 and the tertiary electrode 12 as the cooling side. As a result, the thermoelectric element 22 can freely switch between cooling and heating by changing the direction of the heat flow, thereby enabling more flexible temperature control.

  Furthermore, the degree of thermal conduction to the periphery of the thermoelectric element 22 is positively controlled by changing the thermal conductivity of the filling material of the trench structure 31 partially or entirely from the structural characteristics of the thermoelectric element 22. It becomes possible. As a result, a more precise heat flow design on the SOI semiconductor substrate 21 becomes possible.

  For example, by making the inside of the trench of the trench structure 31 have a low thermal conductivity such as air or vacuum, the entire thermoelectric element 22 can be brought close to the heat insulating structure. In this case, heat leakage to the vicinity is reduced. As a result, it becomes easy to control the temperature locally in a more limited range.

[Power generation operation by thermoelectric element 22]
Similarly to the first embodiment, the thermoelectric element 22 can generate a potential difference by giving a temperature difference. Therefore, the same effect as that of the first embodiment described above can be obtained.
Furthermore, in the thermoelectric element 22, the leakage current is prevented by the trench structure 31, so that even if a potential difference is generated with the tertiary electrode 12 side being positive and the primary electrode 7 side being negative, the thermoelectric element 22 has leakage current. Does not occur.
Therefore, the secondary electrode 9 can be arranged on the high temperature side, and the primary electrode 7 and the tertiary electrode 12 side can be arranged on the low temperature side, and a positive / negative temperature difference can be detected.

<< Third Embodiment >>
FIG. 5 is a plan view of the thermoelectric module 50 according to the third embodiment.
6 is a cross-sectional view taken along the line AA ′ shown in FIG.
Hereinafter, the structure of the thermoelectric module 50 will be described based on these drawings.
First, the thermoelectric module 50 includes the same type of thermoelectric elements 51 to 53 as the thermoelectric element 22 described above.
Among these, the thermoelectric element 51 and the thermoelectric element 52 are electrically connected in series by using the adjacent tertiary electrode and primary electrode as one electrode 54. When a current is passed from the electrodes 55 or 56 at both ends in this series connection, the heat flows of the thermoelectric elements 51 and 52 are generated close to each other in substantially the same direction, and a wide heat flow is generated.

Further, a thermoelectric element 53 that is thermally cascade-connected is provided upstream of the heat flow. The primary electrode 57 of the thermoelectric element 53 extends in the surface direction by a heat conducting portion 58 such as a metal film, and is thermally connected to the secondary electrode 70 of the thermoelectric element 51 through the insulating film 59. Further, the tertiary electrode 71 of the thermoelectric element 53 extends in the surface direction by a heat conducting portion 72 such as a metal film, and is thermally connected to the secondary electrode 73 of the thermoelectric element 52 through the insulating film 59.
The secondary electrode 74 of the thermoelectric element 53 located at the uppermost stream of this heat flow is thermally connected to the heat conducting portion 75 such as a metal film via the insulating film 59. The heat conducting portion 75 extends in the surface direction and is thermally connected to the semiconductor circuit Z that is the object of temperature control.

  A trench structure 77 is formed in the semiconductor substrate 60 so as to cover these thermoelectric elements 51 to 53. When this trench structure 77 reaches the buried insulating layer 34 of the semiconductor substrate 60, the impurity sections of the thermoelectric elements 51 to 53 are electrically separated from each other except for the connection portion by the electrodes.

[Heat flow path pattern design]
In the present embodiment, the heat conducting portions 58 and 72 are extended in the surface direction of the semiconductor substrate 60 and partially overlapped with the electrodes 57, 70, 71, and 73 of the thermoelectric element, so A dimensional cascade connection is realized.

  Conventionally, in a bulk-type Peltier element, three-dimensional cascade connection has been performed by stacking elements in the bulk thickness direction. When a similar three-dimensional structure is formed on the semiconductor substrate 60, the number of semiconductor layers must be increased as it is in proportion to the number of stages of cascade connection, and the number of manufacturing process steps becomes unrealistic. It will increase.

  However, in the two-dimensional cascade connection structure of this embodiment, as shown in FIG. 6, even if the number of stages of cascade connection is further increased, the number of semiconductor layers does not increase, and the number of steps in the manufacturing process increases significantly. Absent. Therefore, the two-dimensional cascade connection of the present embodiment has a very excellent rational structure in forming the cascade connection on the semiconductor substrate.

  Furthermore, by freely combining this thermal two-dimensional cascade connection and the above-described electrical series connection of thermoelectric elements, it is possible to form a two-dimensional heat flow path pattern in a flexible shape.

  In the heat flow path pattern formed in this way, thermoelectric elements 51 to 53 which are heat pumps are provided in various places. Therefore, it is possible to propagate heat more reliably than the structure in which a simple radiating fin is provided as in Patent Document 1.

  Furthermore, by arranging the thermoelectric elements 51 to 53 in a divergent shape (or pyramid shape) as shown in FIG. 5, the width of the heat flow can be gradually increased toward the downstream. In such a divergent shape, the stagnation and back flow of the heat flow are reduced on the downstream side, so that the heat flow can flow smoothly to the downstream side. As a result, the upstream cooling (or heating) action can be further enhanced.

  Moreover, in this embodiment, the width | variety of a heat flow path pattern can also be changed freely by changing freely the serial connection number, width | variety, etc. of a thermoelectric element. As a result, the width of the heat flow path pattern can be flexibly changed so as to fit in the gap between the circuit patterns on the semiconductor substrate 60. In addition, when the location (neck location) where the width | variety of a heat flow path pattern is narrow is made, it is preferable to increase the electric current amount of the thermoelectric element of the location. By such current adjustment, it is possible to increase the propagation speed of the heat flow at the neck portion and prevent the stagnation of the heat flow at the neck portion.

<< Fourth Embodiment >>
FIG. 7 is an external view of an image sensor 130 incorporating a thermoelectric element in the fourth embodiment.
FIG. 8 is a plan view showing the semiconductor substrate 120 of the image sensor 130.
Hereinafter, the structure of the image sensor 130 will be described with reference to these drawings.
First, on the semiconductor substrate 120, an image sensor circuit 100 including a light receiving element group and a transfer circuit is formed. A light shielding film 110 such as a metal film is patterned so as to cover the imaging element circuit 100. The light shielding film 110 blocks extra incident light such as a transfer circuit.

  A plurality of thermoelectric modules 101 and 102 are arranged around the light shielding film 110. Each of these thermoelectric modules 101 and 102 has a structure in which the above-described thermoelectric module 50 is expanded. The cooling side of the thermoelectric modules 101 and 102 is thermally connected to the light shielding film 110.

  A temperature sensor D such as a diode is provided in the vicinity of the image sensor circuit 100. The temperature sensor D is connected to the temperature control circuit 105. The temperature control circuit 105 feeds back an error between the “measured temperature of the temperature sensor D” and the “predetermined cooling target temperature (Vref)” to determine the amount of current and the direction of current flowing through the thermoelectric modules 101 and 102. The circuit to be adjusted. Due to the action of the temperature control circuit 105, the temperature of the image sensor circuit 100 is substantially maintained at the cooling target temperature. By this cooling action, thermal noise of the image sensor circuit 100 is suppressed, and an image sensor 130 having a high S / N is realized.

  On the other hand, thermal output terminals 111 and 112 are provided on the heat radiation side of the thermoelectric modules 101 and 102. These thermal output terminals 111 and 112 are thermally connected to a thermal output terminal 133 outside the package 132 through a frame portion of a lead frame that fixes the semiconductor substrate 120, one or more bonding wires, and the like. Is done. When heat is output through the frame portion of the lead frame, a heat insulating member is sandwiched between the lead frame and the semiconductor substrate 120 to prevent the output heat from flowing back to the semiconductor substrate 120 as much as possible. preferable.

  In such a configuration, the image sensor circuit 100 being cooled is firmly sealed by the package 133 and the filter cover 131. Therefore, there is little possibility that the outside air is cooled by the cooled imaging element circuit 100. Therefore, compared with the conventional case where a Peltier element is adhered to the outside of the package, the possibility that the package 133 and the filter cover 131 are condensed is extremely reduced.

Furthermore, in this embodiment, the exhaust heat of the semiconductor substrate 120 is effectively used to positively prevent condensation. That is, part of the output heat of the heat output terminal 133 (condensation prevention heat Tb shown in FIG. 7) is transmitted to the filter cover 131 of the image sensor 130 via the heat transfer plate 134 for preventing condensation. With this configuration, it is possible to adequately warm the filter cover 131 while sufficiently cooling the imaging element circuit 100. As a result, it is possible to reliably prevent the problem that the outside water vapor is condensed on the filter cover 131.
Note that the excess Ta of the output heat from the heat output terminal 133 is exhausted to the outside through the casing of the electronic camera, the radiation fins, the radiator, the cooling mechanism, and the like.

<< Supplementary items etc. >>
In the embodiment described above, the conductivity type and the direction of current are specified for the sake of simplicity. However, the present invention is not limited to these conductivity types and current directions. Of course, the conductivity type and the direction of the current may be changed.

  In the above-described embodiment, the case where a local temperature difference is created on the semiconductor substrate using the thermoelectric elements 2 and 22 and the thermoelectric module 50 has been described. However, the present invention is not limited to this. For example, one of the temperature differences generated by the thermoelectric elements 2 and 22 and the thermoelectric module 50 may be output outside the package of the semiconductor device via the thermal output terminal. In this case, unnecessary heat in the N-type semiconductor substrate 1 can be positively exhausted from the heat output terminal by the thermoelectric action of the thermoelectric element 2. Further, the thermal output terminal is thermally connected to a radiator, or further cooled by an external Peltier element, a liquid cooling mechanism, or an air cooling mechanism, thereby further effectively cooling the N-type semiconductor substrate 1 in the inner part of the package. It becomes possible to do.

  In the first embodiment described above, the leakage current in the thermoelectric element 2 is reduced by setting the PNPN thyristor existing between the N + type impurity region 4 and the P + type impurity region 5 in a stable reverse blocking state. It is preventing. However, the present invention is not limited to this. For example, the PNPN thyristor can be maintained in the OFF state by applying a negative potential to the P-type well 3 while applying a voltage with the tertiary electrode 12 being positive and the primary electrode 7 being negative. Even in this state, the leakage current in the thermoelectric element 2 can be prevented. In this case, the secondary electrode 9 can be the heat generation side, and the primary electrode 7 and the tertiary electrode 12 can be the heat absorption side.

  In the third and fourth embodiments described above, the thermoelectric modules 50, 101, 102 are configured with the thermoelectric element 22 as a basic unit. However, the present invention is not limited to this. A thermoelectric module may be configured with the thermoelectric element 2 as a basic unit.

  In the third and fourth embodiments described above, the heat conducting unit and the electrode are electrically insulated by an insulating film. However, the present invention is not limited to this. If there is no hindrance in the electrical connection, the heat conduction efficiency between the two can be further increased by directly connecting the electrode and the heat conducting part.

  In the above-described fourth embodiment, the case where the light shielding film 110 and the imaging element circuit 100 are cooled using the two thermoelectric modules 101 and 102 has been described. However, the present invention is not limited to this. For example, it is preferable that as many thermoelectric elements (thermoelectric modules) are installed as to surround the light shielding film 110 so that the entire area of the light shielding film 110 is cooled as uniformly as possible.

  In the fourth embodiment described above, the image sensor circuit 100 is cooled by cooling the light shielding film 110. However, the present invention is not limited to this. In general, it is preferable to cool a pattern or a region that is provided so as to cross the imaging element circuit 100 and has as high a heat conduction efficiency as possible. For example, in a CCD imaging device, the CCD transfer electrode may be thermally connected to a thermoelectric device (thermoelectric module). Further, for example, in an XY address type image sensor, a vertical readout line, a ground line, and a vertical transfer control line may be thermally connected to a thermoelectric element (thermoelectric module). Further, by combining the cooling of these layers, it is possible to cool the imaging device more uniformly.

  Note that the semiconductor device incorporating the thermoelectric element described above may be employed as a component of an exposure apparatus (semiconductor exposure apparatus, liquid crystal exposure apparatus, head exposure apparatus, etc.) or an electronic camera. In such an exposure apparatus and electronic camera, it is possible to omit or simplify the external cooling mechanism for the component parts, and to further improve the processing performance by increasing the S / N ratio of the component parts.

  For example, the aberration measurement of the exposure apparatus may be performed using the high S / N image sensor according to the present invention. In this case, the accuracy of aberration correction of the projection optical system can be improved with a simple structure without subjecting the image sensor to extensive external cooling. As a result, the sharpness and contrast of the exposure pattern in the exposure apparatus can be further enhanced.

  Further, for example, the alignment measurement of the exposure apparatus may be performed using the high S / N image sensor according to the present invention. In this case, the accuracy of alignment measurement can be improved with a simple structure without performing extensive external cooling on the image sensor. As a result, the alignment accuracy between the exposure pattern (or reticle or mask) and the exposure object in the exposure apparatus can be increased.

  Further, for example, by mounting a high S / N image pickup device according to the present invention on an electronic camera, it is possible to pick up a high S / N image signal with a simple structure without subjecting the image pickup device to extensive external cooling. Can do.

  Further, for example, the present invention may be applied to a semiconductor device that cannot achieve a practical life due to thermal destruction. In such a case, it is possible to reliably prevent thermal destruction by directly cooling a heat generation location or a heat-sensitive location inside the semiconductor device, thereby achieving a long life of the semiconductor device.

  As described above, the present invention is a technique that can be used for commercializing a semiconductor device incorporating a thermoelectric element (or thermoelectric module).

3 is a plan view of a thermoelectric element 2. FIG. 3 is a cross-sectional view of a thermoelectric element 2. FIG. 3 is a plan view of a thermoelectric element 22. FIG. 3 is a cross-sectional view of a thermoelectric element 22. FIG. 3 is a plan view of a thermoelectric module 50. FIG. 2 is a cross-sectional view of a thermoelectric module 50. FIG. It is an external view of the image pick-up element 130 which incorporated the thermoelectric element. 3 is a plan view showing a semiconductor substrate 120 of the image sensor 130. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 N type semiconductor substrate 2 Thermoelectric element 3 P type well 4 N + type impurity region 5 P + type impurity region 6, 8, 10, 11 Contact hole 7 Primary electrode 9 Secondary electrode 12 Tertiary electrode 15 Insulating layer 21 SOI semiconductor substrate 22 thermoelectric element 31 trench structure 31a insulating film 32 N-type impurity region 33 P-type impurity region 34 buried insulating layer 42 N-type impurity partition 43 P-type impurity partition 50 thermoelectric module 51, 52, 53 thermoelectric element 57 primary electrode 58, 72, 75 Thermal conduction part 59 Insulating film 60 Semiconductor substrate 70, 73, 74 Secondary electrode 77 Trench structure 100 Image sensor circuit 101, 102 Thermoelectric module 105 Temperature control circuit 110 Light shielding film 111, 112 Thermal output terminal 120 Semiconductor substrate 130 Imaging Element 131 Filter cover 133 Thermal output terminal Z Semiconductor circuit D Temperature sensor

Claims (6)

A semiconductor substrate;
A plurality of thermoelectric elements formed on the semiconductor substrate and thermally connected in cascade ;
The thermoelectric element is
A first conductivity type region formed in the semiconductor substrate;
A primary electrode electrically connected to one end of the first conductivity type region;
A secondary electrode electrically connected to the other end of the first conductivity type region ;
A second conductivity type region electrically connected to the secondary electrode and formed in the semiconductor substrate;
A trench structure provided between the first conductivity type region and the second conductivity type region and having an electrically separating function;
A tertiary electrode electrically connected to the second conductivity type region ;
Cooling at least a portion of the semiconductor substrate using a temperature difference generated by a current flowing between the primary electrode and the secondary electrode or between the primary electrode and the tertiary electrode ; A semiconductor device with a built-in thermoelectric element, wherein heating, heat flow generation, or temperature control is performed. The semiconductor device according to claim 1,
The plurality of thermoelectric elements are formed in the surface direction of the semiconductor substrate ,
A thermoelectric element built-in semiconductor device , wherein the plurality of thermoelectric elements are thermally cascade-connected through a heat conducting portion extending in the surface direction . The semiconductor device according to claim 2,
At least one semiconductor circuit thermally connected to the thermoelectric element is formed on the semiconductor substrate,
A semiconductor device with a built-in thermoelectric element , wherein cooling, heating, heat flow generation, or temperature control is performed on the semiconductor circuit using a temperature difference generated by the thermoelectric element. A semiconductor substrate ;
A plurality of thermoelectric elements formed on the semiconductor substrate and thermally connected in cascade;
At least one semiconductor circuit formed on the semiconductor substrate and thermally connected to the thermoelectric element;
A temperature sensor for measuring the temperature of the semiconductor substrate;
A temperature control circuit for controlling a temperature of the semiconductor circuit by changing a current flowing through the thermoelectric element according to a measured temperature of the temperature sensor;
The thermoelectric element is
A first conductivity type region formed in the semiconductor substrate;
A primary electrode electrically connected to one end of the first conductivity type region;
A secondary electrode electrically connected to the other end of the first conductivity type region;
Have
A semiconductor device with a built-in thermoelectric element , wherein cooling, heating, heat flow generation, or temperature control is performed on the semiconductor circuit using a temperature difference generated by the thermoelectric element. In the semiconductor device according to claim 3 or 4 ,
The semiconductor circuit is an image sensor circuit having a light-shielding film on a light-receiving surface ,
Thermally connecting the thermoelectric element to the light shielding film;
Through said light-shielding film, the imaging element cooling circuit, heat flow occurs, or a thermoelectric element internal semiconductor device, wherein you temperature control. The semiconductor device according to any one of claims 1 to 5,
A semiconductor device with a built-in thermoelectric element, comprising a heat output terminal for discharging an unnecessary amount of heat generated in the thermoelectric element to the outside of the semiconductor substrate .

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