JP4335178B2 - Multilayer electronic components and multilayer ceramic capacitors - Google Patents

Description

  The present invention relates to a multilayer electronic component and a multilayer ceramic capacitor.

As this type of multilayer electronic component, one having a laminate in which a plurality of internal circuit element conductors and ceramic layers are laminated is known (for example, see Patent Document 1 and Patent Document 2). A multilayer electronic component (multilayer ceramic capacitor) described in Patent Document 1 includes an inner layer portion in which internal circuit element conductors (internal electrodes) and ceramic layers are alternately stacked, and an outer layer portion in which ceramic layers are stacked. Prepare. In the multilayer electronic component (multilayer ceramic electronic component) described in Patent Document 2, the ceramic layer includes oxide glass.
JP-A-9-129486 JP-A-8-191031

  An object of the present invention is to provide a multilayer electronic component and a multilayer ceramic capacitor in which firing unevenness is suppressed.

  As a result of intensive studies on multilayer electronic components that can suppress firing unevenness, the present inventors have newly found the following facts.

  Patent Document 1 describes a multilayer electronic component having an inner layer portion and an outer layer portion. The present inventors have found that when such a multilayer electronic component is fired, the inner layer portion is sintered at a lower temperature than the outer layer portion, and as a result, uneven firing occurs in the multilayer electronic component.

  The above-described firing unevenness occurs even when firing is performed at a temperature matched with the inner layer portion or when firing is performed at a temperature matched with the outer layer portion. That is, when firing is performed at a temperature matched to the inner layer portion, the outer layer portion is not sufficiently sintered. On the other hand, if firing is performed at a temperature matched to the outer layer portion, the inner layer portion is excessively fired. If the inner layer portion is excessively fired, the ceramic layer of the inner layer portion has a problem of being made into a semiconductor, and the inner circuit element conductor has a problem of lowering the coverage due to spheroidization.

  The present inventors have examined that the inner layer portion is sintered at a lower temperature than the outer layer portion, and the inner circuit element conductor laminated alternately with the ceramic layer in the inner layer portion is compared with the ceramic layer of the inner layer portion during firing. I thought that it might function as a sintering aid. In recent years, with the miniaturization of electronic devices, it has been required to reduce the thickness of multilayer electronic components mounted in electronic devices. Therefore, according to this consideration, it is considered that the influence of the internal circuit element conductor on each ceramic layer in the inner layer portion increases due to the thinning, and the problem of firing unevenness becomes more remarkable.

  Patent Document 2 describes a multilayer electronic component including a ceramic layer containing oxide glass, but the sintering temperature of the inner layer portion and the outer layer portion is not studied.

  Based on such examination results, the multilayer electronic component according to the present invention includes an inner layer portion in which a plurality of first ceramic layers and a plurality of internal circuit element conductors are alternately stacked, and a plurality of layers so as to sandwich the inner layer portion. And a pair of outer layer parts each laminated with a second ceramic layer, wherein the first and second ceramic layers include a glass component, and the second ceramic layer includes The melting point of the glass component contained is lower than the melting point of the glass component contained in the first ceramic layer.

  By including a glass component in the ceramic layer, the sintering temperature of the ceramic layer can be lowered. In this multilayer electronic component, since the melting point of the glass component contained in the second ceramic layer is lower than the melting point of the glass component contained in the first ceramic layer, the second ceramic layer is compared with the first ceramic layer. This lowers the sintering temperature. On the other hand, in the first ceramic layers alternately laminated with the internal circuit element conductors, it is considered that the sintering temperature is substantially lowered due to the influence of the internal circuit element conductors. Thereby, since sintering temperature will fall in both an inner layer part and an outer layer part, the difference of sintering temperature between an inner layer part and an outer layer part becomes small. Therefore, the outer layer portion can be sufficiently sintered even if firing is performed in accordance with the sintering temperature of the inner layer portion. As a result, firing unevenness can be suppressed. Further, since the difference in sintering temperature between the inner layer portion and the outer layer portion is reduced, the difference in shrinkage between the inner layer portion and the outer layer portion is reduced, so that the occurrence of cracks is also suppressed.

The first ceramic layer contains Ba-Ca-Si-O glass as a glass component, and the second ceramic layer contains Ba-Ca-B-Si-O glass as a glass component. Is preferred. Ba-Ca-B-Si-O glass has a lower melting point than Ba-Ca-Si-O glass because B ₂ O ₃ is added to Ba-Ca-Si-O glass. . Therefore, the sintering temperature of the second ceramic layer is lower than the sintering temperature of the first ceramic layer. Since the sintering temperature of the first ceramic layer is substantially lowered due to the influence of the internal circuit element conductor, the sintering temperature between the second ceramic layer that is the outer layer portion and the first ceramic layer that is the inner layer portion. The difference between is small. Therefore, it is possible to suppress firing unevenness.

  Further, the first ceramic layer and the second ceramic layer both contain Ba—Ca—Si—O glass as a glass component, and Ba—Ca—Si—O glass contained in the second ceramic layer. The amount of Si is preferably larger than that of the Ba—Ca—Si—O-based glass contained in the first ceramic layer. Ba—Ca—Si—O based glass with a large amount of Si has a lower melting point than Ba—Ca—Si—O based glass with a small amount of Si. Therefore, the sintering temperature of the second ceramic layer is lower than the sintering temperature of the first ceramic layer. Since the sintering temperature of the first ceramic layer is substantially lowered due to the influence of the internal circuit element conductor, the sintering temperature between the second ceramic layer that is the outer layer portion and the first ceramic layer that is the inner layer portion. The difference between is small. Therefore, it is possible to suppress firing unevenness.

  The inner layer portion is located in the same layer as the internal circuit element conductor, and a third ceramic layer formed so as to absorb a step due to the thickness of the internal circuit element conductor is formed in a region where the internal circuit element conductor is not formed. Preferably, the third ceramic layer contains a glass component, and the melting point of the glass component contained in the third ceramic layer is preferably lower than the melting point of the glass component contained in the first ceramic layer.

  By having the third ceramic layer formed so as to absorb the step due to the thickness of the internal circuit element conductor, in this multilayer electronic component, the occurrence of delamination is suppressed. Moreover, since the melting point of the glass component contained in the third ceramic layer is lower than the melting point of the glass component contained in the first ceramic layer, the sintering temperature of the third ceramic layer is higher than that of the first ceramic layer. Lower. In the first ceramic layer, since the sintering temperature is substantially lowered due to the influence of the internal circuit element conductor, the difference in the sintering temperature between the third ceramic layer and the first ceramic layer becomes small. Therefore, it is possible to suppress uneven firing in the inner layer portion.

  The first ceramic layer contains Ba—Ca—Si—O glass as a glass component, and the second ceramic layer and the third ceramic layer contain Ba—Ca—B—Si—O glass as a glass component. It preferably contains glass. Ba-Ca-B-Si-O glass has a lower melting point than Ba-Ca-Si-O glass. Therefore, the sintering temperature of the second ceramic layer and the third ceramic layer is lower than the sintering temperature of the first ceramic layer. Since the sintering temperature of the first ceramic layer is substantially low, the difference in sintering temperature between the second ceramic layer and the third ceramic layer and the first ceramic layer is small. As a result, it is possible to suppress firing unevenness between the outer layer portion and the inner layer portion and within the inner layer portion.

  The first ceramic layer, the second ceramic layer, and the third ceramic layer each contain Ba—Ca—Si—O-based glass as a glass component, and the second ceramic layer and the third ceramic layer are included. The Ba—Ca—Si—O-based glass contained in the layer preferably has a larger amount of Si than the Ba—Ca—Si—O-based glass contained in the first ceramic layer. Ba—Ca—Si—O based glass with a large amount of Si has a lower melting point than Ba—Ca—Si—O based glass with a small amount of Si. Therefore, the sintering temperature of the second ceramic layer and the third ceramic layer is lower than the sintering temperature of the first ceramic layer. Since the sintering temperature of the first ceramic layer is substantially low, the difference in sintering temperature between the second ceramic layer and the third ceramic layer and the first ceramic layer is small. As a result, it is possible to suppress firing unevenness between the outer layer portion and the inner layer portion and within the inner layer portion.

  The thickness of the internal circuit element conductor is preferably 1.5 μm or less, and the thickness of the first ceramic layer is preferably 1.5 times or less of the thickness of the internal circuit element conductor. In this case, the requirements for downsizing and thinning can be satisfied, and excessive firing of the outer layer portion can be suppressed.

  The multilayer ceramic capacitor according to the present invention includes an inner layer portion in which a plurality of first ceramic layers and a plurality of internal electrodes are alternately stacked, and a plurality of second ceramic layers so as to sandwich the inner layer portion. A laminated ceramic capacitor comprising a pair of outer layer portions, wherein the first and second ceramic layers contain a glass component, and the melting point of the glass component contained in the second ceramic layer is the first. It is characterized by being lower than the melting point of the glass component contained in the ceramic layer.

  In this multilayer ceramic capacitor, the difference in sintering temperature between the outer layer portion and the inner layer portion can be reduced, and firing unevenness can be suppressed.

  According to the present invention, it is possible to provide a multilayer electronic component and a multilayer ceramic capacitor in which firing unevenness is suppressed.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  First, based on FIG. 1, FIG. 2, the structure of the multilayer ceramic capacitor C1 which concerns on this embodiment is demonstrated. FIG. 1 is a cross-sectional view of a multilayer ceramic capacitor according to this embodiment. FIG. 2 is an exploded perspective view of the multilayer ceramic capacitor according to the present embodiment.

  As shown in FIG. 1, the multilayer ceramic capacitor C <b> 1 includes an inner layer portion 10 and a pair of outer layer portions 20 positioned with the inner layer portion 10 interposed therebetween. The multilayer ceramic capacitor C1 according to the present embodiment has a so-called 1005 type multilayer ceramic in which the length in the longitudinal direction is set to 1.0 mm, the width is set to 0.5 mm, and the height is set to 0.5 mm. It is a capacitor. A terminal electrode 30 is formed on the outer surface of the multilayer ceramic capacitor C1.

The inner layer portion 10 includes a plurality of (13 layers in this embodiment) first ceramic layers 12, a plurality (12 layers in this embodiment) of internal circuit element conductors 14, and a plurality (12 layers in this embodiment). And a third ceramic layer 16. The first ceramic layers 12 and the internal circuit element conductors 14 are alternately stacked. A third ceramic layer 16 is formed in a region of the same layer as the internal circuit element conductor 14 where the internal circuit element conductor 14 is not formed. The third ceramic layer 16 has substantially the same thickness as the internal circuit element conductor 14, thereby absorbing the step generated by the internal circuit element conductor 14. The third ceramic layer 16 includes a glass component having a melting point lower than that of the first ceramic layer 12. More specifically, the first ceramic layer 12 includes Ba—Ca—Si—O-based glass, and the third ceramic layer 16 includes Ba—Ca—B—Si—O-based glass. The Ba—Ca—B—Si—O-based glass contained in the third ceramic layer 16 is obtained by adding B ₂ O ₃ to a Ba—Ca—Si—O-based glass.

  The internal circuit element conductor 14 contains Ni as a main component and functions as an internal electrode. The thickness of the internal circuit element conductor 14 is 1.5 μm or less. On the other hand, the thickness of the first ceramic layer 12 is 1.5 times or less the thickness of the internal circuit element conductor 14.

The outer layer portion 20 is configured by laminating a plurality of (in this embodiment, five) second ceramic layers 22. The second ceramic layer 22 includes a glass component having a melting point lower than that of the first ceramic layer 12. More specifically, the second ceramic layer 22 includes Ba—Ca—B—Si—O-based glass. The Ba—Ca—B—Si—O-based glass contained in the second ceramic layer 22 is obtained by adding B ₂ O ₃ to a Ba—Ca—Si—O-based glass.

  As described above, in the multilayer ceramic capacitor C1 according to this embodiment, the first ceramic layer 12, the second ceramic layer 22, and the third ceramic layer 16 all contain a glass component. Therefore, the sintering temperature of each ceramic layer is lowered. As a result, the temperature for firing the multilayer ceramic capacitor C1 can be lowered.

In the multilayer ceramic capacitor C1 according to the present embodiment, the first ceramic layer 12 includes Ba—Ca—Si—O-based glass, and the second ceramic layer 22 includes Ba—Ca—B—Si—O-based glass. It is out. Ba-Ca-B-Si-O glass has a lower melting point than Ba-Ca-Si-O glass because B ₂ O ₃ is added to Ba-Ca-Si-O glass. . Therefore, the sintering temperature of the second ceramic layer 22 is lower than the sintering temperature of the first ceramic layer 12. On the other hand, since the first ceramic layers 12 are alternately laminated with the internal circuit element conductors 14, the first ceramic layers 12 are affected by the internal circuit element conductors 14. Due to the influence of the internal circuit element conductor 14, the sintering temperature of the first ceramic layer 12 is substantially lowered. Therefore, in both the first ceramic layer 12 and the second ceramic layer 22, the sintering temperature is lowered. Thereby, the difference in sintering temperature between the inner layer portion 10 including the first ceramic layer 12 and the outer layer portion 20 including the second ceramic layer 22 is reduced. Since the difference in sintering temperature between the inner layer portion 10 and the outer layer portion 20 is small, the inner layer portion 10 is excessively fired even when the multilayer ceramic capacitor C1 is fired at a temperature matched to the outer layer portion 20. Disappears. As a result, it is difficult to cause uneven firing in the multilayer ceramic capacitor C1, and a highly reliable multilayer ceramic capacitor in which the outer layer portion 20 and the inner layer portion 10 are sufficiently sintered can be obtained. In addition, the semiconductor layer of the first ceramic layer 12 and the spheroidization of the internal circuit element conductors 14 caused by excessive firing of the inner layer portion 10 are suppressed. Furthermore, since the difference between the sintering temperature of the inner layer portion 10 and the sintering temperature of the outer layer portion 20 is reduced, the difference between the shrinkage ratio of the inner layer portion 10 and the shrinkage rate of the outer layer portion 20 is also reduced. Is suppressed.

  In the multilayer ceramic capacitor C1 according to this embodiment, the third ceramic layer 16 is formed in a region where the internal circuit element conductor 14 is not formed. Since the third ceramic layer 16 has substantially the same thickness as the internal circuit element conductor 14, the internal circuit element conductor 14 and the third ceramic layer 16 constitute a flat plane. As a result, it is possible to suppress the occurrence of delamination between the inner layer portion 10 and the outer layer portion 20 or in the inner layer portion 10. The third ceramic layer 16 includes Ba—Ca—B—Si—O-based glass. For this reason, in the 3rd ceramic layer 16, sintering temperature becomes lower than the 1st ceramic layer 12 containing Ba-Ca-Si-O type glass. As a result, uneven firing within the inner layer portion 10 can be suppressed.

  In the multilayer ceramic capacitor C1 according to this embodiment, the thickness of the internal circuit element conductor 14 is 1.5 μm or less. Therefore, the multilayer ceramic capacitor C1 can be thinned, and can be downsized and further multilayered. Further, the thickness of the first ceramic layer 12 is not more than 1.5 times the thickness of the internal circuit element conductor 14. Here, for example, consider a case where the thickness of the first ceramic layer 12 is greater than 1.5 times the thickness of the internal circuit element conductor 14. In this case, since the distance between the first ceramic layer 12 and the internal circuit element conductor 14 is increased, the influence of the internal circuit element conductor 14 on the first ceramic layer 12 is reduced. As a result, the sintering temperature of the first ceramic layer 12 does not substantially decrease, and only the sintering temperature of the second ceramic layer 22 decreases. If only the sintering temperature of the second ceramic layer 22 is lowered, only the outer layer portion 20 may be burned too much when the multilayer ceramic capacitor C1 is fired. In the multilayer ceramic capacitor C1 according to the present embodiment, the thickness of the first ceramic layer 12 is 1.5 times or less the thickness of the internal circuit element conductor 14, thereby suppressing overburning of the outer layer portion 20. Yes.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the above embodiment. For example, in the above-described embodiment, an example in which the present invention is applied to a multilayer ceramic capacitor is shown. However, the present invention is not limited to this, and can be applied to multilayer electronic components such as inductors, varistors, and thermistors.

  In the multilayer ceramic capacitor C1 described above, the first ceramic layer 12 includes Ba—Ca—Si—O-based glass as a glass component, and the second ceramic layer 22 and the third ceramic layer 16 include Ba as a glass component. -Ca-B-Si-O glass is included. As for this, the 1st ceramic layer 12, the 2nd ceramic layer 22, and the 3rd ceramic layer 16 may each contain Ba-Ca-Si-O system glass as a glass ingredient. In this case, the Ba—Ca—Si—O based glass contained in the second ceramic layer 22 and the third ceramic layer 16 is more than the Ba—Ca—Si—O based glass contained in the first ceramic layer 12. It is assumed that the amount of Si is large. Ba—Ca—Si—O based glass with a large amount of Si has a lower melting point than Ba—Ca—Si—O based glass with a small amount of Si. Therefore, the sintering temperature of the second ceramic layer and the third ceramic layer 16 is lower than the sintering temperature of the first ceramic layer. As a result, only the first ceramic layer 12 is not fired excessively, and firing unevenness is less likely to occur in the multilayer ceramic capacitor C1.

  In the above-described multilayer ceramic capacitor C1, the main component of the internal circuit element conductor 14 is Ni, but it may be Cu, for example. Although the thickness of the internal circuit element conductor 14 is 1.5 μm or less, it may exceed 1.5 μm. Although the thickness of the first ceramic layer 12 is 1.5 times or less the thickness of the internal circuit element conductor 14, it may be more than 1.5 times.

1 is a cross-sectional view of a multilayer ceramic capacitor according to an embodiment. 1 is an exploded perspective view of a multilayer ceramic capacitor according to an embodiment.

Explanation of symbols

  C1 ... multilayer ceramic capacitor, 10 ... inner layer part, 12 ... first ceramic layer, 14 ... internal circuit element conductor, 16 ... third ceramic layer, 20 ... outer layer part, 22 ... second ceramic layer, 30 ... terminal electrode.

Claims (7)

An inner layer portion in which a plurality of first ceramic layers and a plurality of internal circuit element conductors are alternately stacked;
A multilayer electronic component comprising a pair of outer layer parts each having a plurality of second ceramic layers laminated so as to sandwich the inner layer part,
The first and second ceramic layers include a glass component;
The second melting point of the glass component contained in the ceramic layer, rather lower than the melting point of the glass component contained in the first ceramic layer,
While the thickness of the internal circuit element conductor is 1.5 μm or less,
The multilayer electronic component according to claim 1, wherein a thickness of the first ceramic layer is 1.5 times or less of a thickness of the internal circuit element conductor . The first ceramic layer contains Ba-Ca-Si-O-based glass as the glass component,
2. The multilayer electronic component according to claim 1, wherein the second ceramic layer includes Ba—Ca—B—Si—O-based glass as the glass component. The first ceramic layer and the second ceramic layer each contain Ba—Ca—Si—O-based glass as the glass component,
The Ba—Ca—Si—O-based glass contained in the second ceramic layer has a larger amount of Si than the Ba—Ca—Si—O-based glass contained in the first ceramic layer. The multilayer electronic component according to claim 1. The inner layer portion is located in the same layer as the internal circuit element conductor, and a third ceramic layer formed so as to absorb a step due to the thickness of the internal circuit element conductor in a region where the internal circuit element conductor is not formed. Have
The third ceramic layer includes a glass component;
The multilayer electronic component according to claim 1, wherein the melting point of the glass component contained in the third ceramic layer is lower than the melting point of the glass component contained in the first ceramic layer. The first ceramic layer contains Ba-Ca-Si-O-based glass as the glass component,
5. The multilayer electronic component according to claim 4, wherein the second ceramic layer and the third ceramic layer contain Ba—Ca—B—Si—O-based glass as the glass component. The first ceramic layer, the second ceramic layer, and the third ceramic layer each contain Ba—Ca—Si—O-based glass as the glass component,
The Ba—Ca—Si—O-based glass contained in the second ceramic layer and the third ceramic layer is more Si than the Ba—Ca—Si—O-based glass contained in the first ceramic layer. The multilayer electronic component according to claim 4, wherein the multilayer electronic component is a large amount. An inner layer portion in which a plurality of first ceramic layers and a plurality of internal electrodes are alternately stacked;
A multilayer ceramic capacitor comprising a pair of outer layer portions each having a plurality of second ceramic layers laminated so as to sandwich the inner layer portion,
The first and second ceramic layers include a glass component;
The second melting point of the glass component contained in the ceramic layer, rather lower than the melting point of the glass component contained in the first ceramic layer,
While the thickness of the internal electrode is 1.5 μm or less,
The multilayer ceramic capacitor according to claim 1, wherein the thickness of the first ceramic layer is 1.5 times or less the thickness of the internal electrode .

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