JP3976764B2 - Semiconductor disk device - Google Patents

Description

  The present invention relates to a semiconductor disk device such as a semiconductor disk card using a flash memory as a storage medium.

  Today, when storing a relatively large amount of data in the field of personal computers, magnetic storage media such as hard disk drives are often used. This is because the power consumption is large but the cost performance is very good.

  On the other hand, a semiconductor disk device that operates a semiconductor memory such as a flash memory like the hard disk device has appeared. Unlike the above hard disk device, this semiconductor disk device does not have a mechanical part such as a motor. Therefore, the cost performance lags behind the magnetic storage medium, but it is widely used in portable information terminals by taking advantage of low power consumption and high reliability. It's getting on.

  The features of the flash memory are as follows. The first is a nonvolatile memory capable of electrically writing and erasing data. Second, data cannot be overwritten on a memory cell in which data has already been written (thus, an erasing operation is always performed). Third, the data erasure unit is several K to several tens of KBytes. Fourth, there is a limit on the number of writing and erasing.

  The configuration of a conventional semiconductor disk device will be described with reference to FIGS. 14, 15, 16 and 17. FIG. FIG. 14 is a block diagram showing the overall configuration of a conventional semiconductor disk device. FIG. 15 is a diagram showing an internal configuration of the address conversion table of FIG. FIG. 16 is a diagram showing an internal configuration of the flash memory of FIG. FIG. 17 is a diagram showing an internal configuration of the erase block of FIG.

  As shown in FIG. 14, the conventional semiconductor disk device 2 includes an interface circuit 3, a CPU 4, an address conversion table 5, a flash control circuit 6, a data input / output sector buffer 7, and a flash memory 8.

  Typical examples of the host 1 connected to the semiconductor disk device 2 are a notebook personal computer and a portable information terminal. At present, the removable type semiconductor disk device 2 is mainly a card type. The interface circuit 3 exchanges information with the host 1. The CPU 4 outputs data and inputs / outputs instructions to the flash memory 8.

  The logical sector / physical sector address conversion table 5 is a table for converting a logical sector address into a physical sector address. A logical sector address (LSA) is a sector address designated by the host 1 to the semiconductor disk device 2. The physical sector address (PSA) is an address of the flash memory 8 used in the semiconductor disk device 2.

  The flash control circuit 6 performs data processing of the flash memory 8 that is not complicated. Simple data transfer or the like is performed by the flash control circuit 6, and other processing is performed by the CPU 4. The data input / output sector buffer 7 is used when outputting data from the flash memory 8 through the interface circuit 3 or inputting data into the flash memory 8 through the interface circuit 3.

  In FIG. 15, the address conversion table 5 includes a logical sector address (LSA) storage unit and a physical sector address (PSA) storage unit.

  A logical sector address is stored in the LSA storage unit. The content is fixed. Actually, when a logical sector address is sent from the host 1, a voltage is applied to the address pin of the volatile RAM for the conversion table based on the logical sector address data, and PSA data is output. For ease of explanation, it is assumed that there is an LSA storage unit corresponding to the PSA storage unit. An arbitrary sector number of the flash memory 8 (1 to n in the figure) is stored in the PSA storage unit. By using this address conversion table 5, data can be stored at a physical sector address convenient for internal management regardless of the logical sector address designated by the host 1. Since this address conversion table 5 is frequently written and erased, it is generally composed of a volatile RAM such as SRAM or DRAM.

The capacity of the address conversion table 5 is as follows under the following conditions. When the 20 megabyte (MByte) flash memory 8 is used and the data input / output unit (sector) is 512 bytes (Byte), the number of sectors in the semiconductor disk device 2 is as follows.
Number of sectors in the semiconductor disk device 2 = 20 megabytes / 512 bytes = 40960 sectors

Next, the number of bits required to represent “40960” in binary is:
ln40960 ÷ ln2 = 15.3
16 digits are required.

As a result, the required capacity of the address translation table 5 is
40960 × 16 = 655360 bits,
Finally, 80 kilobytes (KByte) are required.

  In FIG. 16, the flash memory 8 includes a plurality of erase blocks 9 and a plurality of spare erase blocks 9.

  The flash memory 8 is an electrically writable / erasable nonvolatile memory. Since it is non-volatile, there is no need for battery backup as in DRAM / SRAM, and data can be erased electrically, so that data can be changed without removing it from the board unlike EPROM. Since 1-bit data can be stored in one cell, a memory can be manufactured at a lower cost than EERROM. The above points are the advantages of the flash memory 8. Disadvantages are that the number of erasures has an upper limit of about 10,000 to 100,000 times, and that an erasing operation is always required at the time of writing (for this reason, it is not possible to overwrite a cell in which data has already been written). Possible), the erase unit is a block unit of several kilobytes to several tens of kilobytes.

  In FIG. 17, one erase block 9 has an erase block information storage area 10, a plurality of data storage areas 11, and an LSA storage area 12 for each data storage area 11 at the head.

  The current block erase count is stored in the erase block information storage area 10. The data storage area 11 is usually 512 bytes (= 1 sector). The LSA storage area 12 exists for each sector, and stores the LSA designated by the host 1 when writing data. This is because when the logical sector / physical sector address conversion table 5 is composed of a volatile RAM, data is erased at the same time as the power is turned off. This is used when the LSA storage area 12 of all sectors is searched and the volatile RAM table 5 is reconstructed when the power is turned on.

  Next, the operation of the conventional semiconductor disk device will be described with reference to FIGS. FIG. 18 is a diagram for explaining a read operation of a conventional semiconductor disk device. 19 and 20 are diagrams for explaining a write operation of a conventional semiconductor disk device.

  Unlike the hard disk device, the semiconductor disk device 2 using the flash memory 8 cannot overwrite data. Therefore, the logical sector address of the data sent from the host 1 and the address conversion table 5 indicating to which physical sector address of the flash memory 8 the data is written are stored in the volatile RAM. By using this address conversion table 5, the storage area of the flash memory 8 can be used effectively without being influenced by the LSA.

  First, a data read operation from the semiconductor disk device 2 will be described with reference to FIG. The host 1 sends the sector address of the data to be read to the semiconductor disk device 2. There are two types of address data sent from the host 1. LSA format and CHS format. In the LSA format, sectors are specified by serial numbers from 1 to n, whereas in the CHS format, a data area is specified by a combination of three data such as a cylinder, a head, and a sector used in a hard disk device. Since the LSA / PSA address conversion table 5 is used in the semiconductor disk device 2, when data in the CHS format is input from the host 1, it is converted to LSA in the interface circuit, for example, and the next operation is started.

  The CPU 4 converts the LSA designated by the host 1 into a PSA using the address conversion table 5. Finally, data is read from the flash memory 8 corresponding to the PSA.

  For example, when the LSA designated by the host 1 is “2”, it is converted into a PSA “6” by the address conversion table 5. As a result, data “A” is read as shown in FIG. The LSA storage area 12 stores “2” which is LSA.

  Next, the data writing operation to the semiconductor disk device 2 will be described with reference to FIGS. A state in which data “A”, “B”, and “C” are stored in “1”, “3”, and “7” of the PSA is an initial state. It should be noted when writing data that the flash memory 8 cannot rewrite data. In the case of the initial state, the areas of PSA “1”, “3”, and “7” are applicable.

  When the host 1 designates an LSA to which no data has been written, the CPU 4 determines that an appropriate free area (PSA “2”, “4” to “6”, “8” to “12”) in the flash memory 8. ) To update the data in the address conversion table 5. FIG. 19 shows an example in which the host designates writing of data “D” to LSA “4”. The data “D” and the LSA designated by the host 1 are written in the free area PSA “4”, and the PSA value “4” is written in the PSA portion corresponding to the LSA “4” in the address conversion table 5.

  Even when the host 1 requests rewriting to an area where data has already been written (for example, overwriting and saving a file with the same name), the rewritten data is written to an empty area of the flash memory 8 to convert the address. Update table 5. FIG. 20 shows a result when the data of LSA “2” is rewritten. The update data “B ′” is written into the empty area PSA “5”, and the PSA corresponding to the LSA “2” in the address conversion table 5 is updated to “5”. Note that the CPU 4 in the card must recognize that the PSA “3” is used data.

JP-A-5-27924

  In the conventional semiconductor disk device as described above, since the address conversion table 5 requires a memory area for storing one PSA for each sector (minimum unit of data management), the address becomes larger as the flash memory 8 becomes larger in capacity. There is a problem that the conversion table 5 also has a large capacity.

  The present invention has been made to solve the above-described problems, and can maintain the performance of the conventional apparatus, that is, the reading speed substantially equal to the reading speed, and can reduce the capacity of the address conversion table for memory management. An object is to obtain a semiconductor disk device.

Semiconductor disk device according to the present invention includes a flash memory having a plurality of blocks includes multiple sectors corresponding to logical sector address, and the address conversion table for converting the logical sector address inputted from the outside to the block number, the By converting the logical sector address input from the outside into a block number based on the address conversion table, and comparing the logical sector address of the block corresponding to the converted block number with the logical sector address input from the outside And a control means for selecting a data storage area corresponding to the logical sector address inputted from the outside and accessing the data corresponding to the logical sector address inputted from the outside .

  The semiconductor disk device according to the present invention has an effect that the address conversion table for data management can be reduced.

Embodiment 1 FIG.
Hereinafter, the configuration of the first embodiment of the present invention will be described with reference to FIG. 1, FIG. 2, FIG. 3, and FIG. FIG. 1 is a block diagram showing the overall configuration of Embodiment 1 of the present invention. FIG. 2 is a diagram showing an internal configuration of the address conversion table of FIG. FIG. 3 is a diagram showing an internal configuration of the flash memory of FIG. FIG. 4 is a diagram showing an internal configuration of the erase block of FIG. In addition, in each figure, the same code | symbol shows the same or equivalent part.

  1, the semiconductor disk device 2A according to the first embodiment includes an interface circuit 3, a CPU 4, an address conversion table 5A, a flash control circuit 6A, a data input / output sector buffer 7, and a flash memory 8A. Is provided.

  The difference from the conventional semiconductor disk device 2 is that the capacity of the address conversion table 5A is small, and the flash memory 8A can be enlarged accordingly. The flash control circuit 6A includes a hardware logical sector address comparison circuit 61 in addition to the functions of the conventional flash control circuit 6. Further, the CPU 4 performs data management on the flash memory 8A using the read and write address pointers. That is, by using the logical sector address comparison circuit 61 and the address pointer, the semiconductor disk device 2A can reduce the capacity of the address conversion table 5A while maintaining substantially the same performance as the conventional one. In the first embodiment, the control means according to the present invention includes a CPU 4 using read and write address pointers, a flash control circuit 6A including a logical sector address comparison circuit 61, and a data input / output sector buffer 7. It consists of.

  The address conversion table 5A is a table for converting a logical sector address into a physical erase block number. The physical erase block number (PBN: Physical Block Number) is a block address of the flash memory 8A used in the semiconductor disk device 2A.

  In FIG. 2, the address conversion table 5A includes a logical sector address (LSA) storage unit and a physical erase block number (PBN) storage unit.

  A logical sector address is stored in the LSA storage unit. The content is fixed. Actually, when a logical sector address is sent from the host 1, a voltage is applied to the address pin of the volatile RAM for the conversion table based on the logical sector address data, and PBN data is generated. For ease of explanation, it is assumed that there is an LSA storage unit corresponding to the PBN storage unit. A physical erase block number of an arbitrary flash memory 8A is stored in the PBN storage unit. By using this address conversion table 5A, data can be stored in a physical erasure block convenient for internal management regardless of the logical sector address designated by the host 1. Since this address conversion table 5A is frequently written and erased, it is generally composed of a volatile RAM such as SRAM or DRAM.

  However, in this address conversion table 5A, unlike the prior art, only PBN can be obtained from LSA data. For example, when a flash memory having an erase block size of 64 kilobytes is used, there are about 100 sectors (= 512 bytes) inside (maximum if there is no erase block information storage area 10, LSA storage area 12, etc. There are 128 sectors). For this reason, a device for searching for target data is required. This will be described later.

The capacity of this address conversion table 5A is as follows. If a 20-megabyte flash memory 8A is used and one sector is 512 bytes, the number of sectors in the semiconductor disk device 2A is 40960 as in the prior art. However, since the block number is stored in the PBN storage section of the address conversion table 5A, the number of blocks in the semiconductor disk device 2A is as follows when one block (erase block) is 64 kilobytes.
Number of blocks in the semiconductor disk device 2A = 20 megabytes / 64 kilobytes = 320 blocks

  Next, the number of bits required to represent “320” in binary is ln320 ÷ ln2 = 8.3, which requires nine digits. As a result, the required capacity of the address conversion table 5A is 40960 × 9 = 368640 bits, and finally 45 kilobytes are required. This is about 1/2 of the conventional one.

  In FIG. 3, the flash memory 8A includes a plurality of erase blocks 9A and a plurality of spare erase blocks 9A. Since the size of the target block for data (memory) management is the same as the erase unit, it is called an erase block. As the flash memory 8A used for the main memory, a block erase type flash memory (erased block unit of several K to several tens of K bytes) is used as in the prior art.

  In FIG. 4, one erase block 9A has an erase block information storage area 10, a plurality of data storage areas 11, an LSA (logical sector address) storage area 12 for each data storage area 11, and a data storage area 11 at the head. And a valid data confirmation flag 13 for each. Except for the valid data confirmation flag 13, it is the same as the conventional one. The valid data confirmation flag 13 is used to distinguish whether the CPU 4 is valid data or invalid data that can be deleted at any time. Valid data is represented by “FF” (11111111), and invalid data is represented by “00” (00000000). The reverse expression may be used. When the data is overwritten or erased, the CPU 4 rewrites the valid data confirmation flag 13 corresponding to the data storage area 11 that is no longer necessary from “FF” to “00”.

  Next, the operation of the first embodiment will be described with reference to FIGS. 5 to 8 are diagrams for explaining the write operation according to the first embodiment. 9 and 10 are diagrams for explaining the read operation of the first embodiment. 11 and 12 are flowcharts showing the read operation of the first embodiment. FIG. 13 is a flowchart showing the write operation of the first embodiment.

  First, a data write operation to the semiconductor disk device 2A will be described with reference to FIGS. The difference from the prior art is that data is not written to other erase blocks until all sectors (data storage area 11) in one erase block have been written. Data is written continuously from the top to the bottom of the erase block (not randomly written). This uses the “write address pointer” and updates (increments) one by one for each write. Here, the “address pointer” is for storing an arbitrary physical sector address (PSA). In the first embodiment, one “read address pointer” and “write address pointer” are used when reading and writing data, respectively.

  The description of the operation proceeds from a state in which there is no data in the flash memory 8A in the semiconductor disk device 2A. At this time, the write address pointer points to “1”. When writing data, first, data to be written and a write address are sent from the host 1. Since the address may be in the CHS format, all addresses are converted to the LSA format as in the conventional case. Since the address format information is also sent from the host 1, the semiconductor disk device 2A can easily distinguish between the CHS format and the LSA format.

  Even if the LSA is sent at random, as shown in FIG. 5, the writing is performed from PBN “1”. For example, when there is a write request for the data “A” from the host 1 to the LSA “3”, the CPU 4 writes the data “A” in the first data storage area 11 of the PBN “1” according to the write address pointer. LSA “3” is written in the logical sector address storage area 12 to be executed. Then, the write address pointer is updated. That is, the write address pointer is set to “2”. Further, “1” is written in the PBN storage unit corresponding to LSA “3” in the address conversion table 5A. 5 to 9, the erase block 9A of the flash memory 8A has three data storage areas 11 for easy explanation.

  FIG. 6 shows a state in which a clean erase block has become one block. At this time, the write address pointer is updated as “1” → “2” → “3” → “...” → “8” → “9”, and is the top data storage area 11 of PBN “4”. “10” is indicated. Here, if more data is written, a clean erase block cannot be secured, so the erase block of the flash memory 8A is cleaned.

  The CPU 4 confirms the state in all the erase blocks and determines the optimum block for erasure. The optimum block is an erase block based on the valid data confirmation flag 13 where there is not much valid data, an erase block based on the contents of the erase block information storage area 10 and having a small number of erases. In FIG. 6, the erase count of each erase block is “0”, which is the same, and PBN “1” has less valid data, that is, data “A ′” of PBN “1” is overwritten with data “A”. This means that this block is erased and a clean sector is secured.

  First, as shown in FIG. 7, valid data is saved in clean PBN “4”, and then the address conversion table 5A is updated. After that, as shown in FIG. 8, PBN “1” is erased as a block, and the number of block erases is increased by “1”. By this work, one clean block and one clean sector are secured. At this time, the write address pointer points to “12”.

  Next, a data read operation from the semiconductor disk device 2A will be described with reference to FIGS. First, the address sent from the host 1 is unified into the LSA format. Next, the PBN is determined from the LSA using the address conversion table 5A.

  Next, the LSAs stored in the logical sector address storage area 12 in the obtained PBN are confirmed in order from the bottom. At this time, as shown in FIG. 10, in the logical sector address comparison circuit 61 in the flash control circuit 6A, the LSA sent from the host 1 and the LSA stored in the logical sector address storage area 12 in the corresponding PBN Compare The contents of the data storage area 11 (sector) when they match are data to be read. At this time, a value plus 1 is set to the PSA when it matches the read address pointer. When the read data is a plurality of sectors, the data is read from the sector address indicated by the read address pointer at the next read time.

  For example, when data with LSA “2” is sent from the host 1, as shown in FIG. 9, PBN “3” is obtained from the address conversion table 5A. Next, the logical sector addresses in the erase block of PBN “3” are confirmed in order from the bottom. Not applicable because the bottom LSA is “6”. Next, since the next LSA is “2”, there is a match. Therefore, the data to be read is “H”. At this time, the read address pointer is “9”.

  Unlike the prior art, if the erase block becomes large, it takes time to search. However, in general, since the data has a size of 512 bytes (1 sector) or more, the first data search has a data area of about 100 sectors in one erase block. Although it is necessary, it is very likely that there is data in the sector next to the sector read last time after the second time, so by storing the address of the sector next to the sector read last time in the read address pointer The number of searches can be greatly reduced.

  Next, the data read operation from the semiconductor disk device 2A will be described with reference to the flowcharts of FIGS. When a file (data) consisting of one to several tens of sectors is handled, since the read address pointer is not determined when reading the first sector of the file, the search process of FIG. 11 is performed. Since the read address pointer is set when reading the data of the next sector of the file, the processing of FIG. 12 is performed. The difference from the search process of FIG. 11 is that the process of FIG. 12 receives the address (LSA) of the data to be read from the host 1, but reads the data without using the LSA from the host 1. The search process of FIG. 11 is performed not only when the data of the first sector of the file is read but also when the read address pointer reaches the last sector address in the erase block. This is because an erase block having a sector to be read next cannot be understood. The CPU 4 recognizes the beginning and other parts of the file based on the file name and the like, and recognizes the final sector address based on the block size and the like.

  First, sector information of data to be read is received from the host 1 (step 20). This is sent in LSA format or CHS format. If it is sent in the CHS data format to unify it into the LSA format, it is converted to the LSA format (steps 21 to 22). For this conversion, the CPU 4 in the semiconductor disk device 2A may be used, or a dedicated circuit may be provided inside the semiconductor disk device.

  Next, LSA is converted into PBN (step 23). This uses the address conversion table 5A. Next, the LSA stored in the logical sector address storage area 12 in the determined PBN is read. The read LSA and the LSA from the host 1 are compared by the logical sector address comparison circuit 61. If they do not match, the LSA stored in the next logical sector address storage area 12 is read and the above PBN is searched from below. The same comparison is performed until they match. Note that the search direction may be performed from the top in some cases (steps 24-26).

  If the LSAs match, the data is read from the corresponding data storage area 11 (step 27). Then, the next sector address from which the above data has been read is set in the read address pointer (step 28).

  Next, when reading the data of the next sector address, it is as follows. Steps 40 to 42 are the same as steps 20 to 22 described above. This is because the LSA from the host 1 must be received and processed in order to maintain interface compatibility.

  Next, data is read from the sector address indicated by the read address pointer (step 43). Then, "1" is added to the read address pointer and updated. When reading a single file, the conventional semiconductor disk device refers to the address conversion table 5 by the number of sectors constituting the file. However, in the first embodiment, although it takes time to search for data in the first erase block, since the data is read according to the read address pointer for the subsequent sectors, the conventional apparatus is used for the second and subsequent sectors. It can process faster than.

  Further, when the read speed is sacrificed and the reliability of data read is increased, the LSA received from the host 1 and the LSA in the LSA storage area 12 of the sector indicated by the read address pointer are obtained after step 43. Compare and confirm. If there is a mismatch, the search processing from step 23 onward is performed.

  Subsequently, a data write operation to the semiconductor disk device 2A will be described with reference to a flowchart of FIG. Steps 30 to 32 in FIG. 13 are the same as steps 20 to 22 in FIG. First, an empty sector is confirmed based on the instruction of the write address pointer (step 33).

  If there is an empty sector, data is written there and the address conversion table 5A is updated (steps 34 to 35). That is, the PBN in which the data is written is stored in the PBN storage unit of the corresponding LSA.

  In step 34, if there is no empty sector based on the write address pointer, the following processing is performed (steps 36 to 38). First, a block to be erased is determined based on the number of erases, the number of invalid data, and the like. Next, valid data is copied to an empty block. Thereafter, the determined block is erased, and the erase count of the erased block is updated. Then, the process proceeds to step 35.

  In the case of data update, the valid data confirmation flag 13 of the old data is updated from “FF” to “00”. Further, the write address pointer is updated (step 39). In the first embodiment, since data is continuously written, the write address pointer indicates the next sector address after the data writing is completed. When all the sectors in one erase block are filled with data, the CPU 4 determines an erase block to be written next, and determines a sector address indicating it. For example, when there are a plurality of empty (clean) erase blocks, the CPU 4 determines an empty erase block to be written next based on the number of times of erasure.

  In the first embodiment, the address conversion table 5A is obtained by using the read and write address pointers and the logical sector address comparison circuit 61 without reducing the performance such as the read speed of the conventional semiconductor disk card (device). The capacity of can be reduced. By reducing the capacity of the address conversion table 5A, the capacity of the semiconductor disk card can be increased without difficulty. When the conventional address conversion table 5 is used, a size of 80 KB is required for a 20 MB semiconductor disk, and a size of 160 KB (1.25 Mbit) is required for a 40 MB semiconductor disk. If this is reduced to about half the size, the cost of the volatile RAM can be reduced, and the flash memory can be additionally installed in the space where the volatile RAM memory for the address conversion table is installed. Therefore, the capacity of the semiconductor disk device can be increased.

It is a block diagram which shows the whole structure of Embodiment 1 of this invention. It is a figure which shows the structure of the address conversion table of Embodiment 1 of this invention. It is a figure which shows the structure of the flash memory of Embodiment 1 of this invention. It is a figure which shows the internal structure of the erase block of Embodiment 1 of this invention. It is a figure for demonstrating the data write-in operation | movement of Embodiment 1 of this invention. It is a figure for demonstrating the data write-in operation | movement of Embodiment 1 of this invention. It is a figure for demonstrating the data write-in operation | movement of Embodiment 1 of this invention. It is a figure for demonstrating the data write-in operation | movement of Embodiment 1 of this invention. It is a figure for demonstrating the data read-out operation | movement of Embodiment 1 of this invention. It is a figure for demonstrating the data read-out operation | movement of Embodiment 1 of this invention. It is a flowchart which shows the data read-out operation | movement of Embodiment 1 of this invention. It is a flowchart which shows the data read-out operation | movement of Embodiment 1 of this invention. It is a flowchart which shows the data write-in operation | movement of Embodiment 1 of this invention. It is a block diagram which shows the whole structure of the conventional semiconductor disk device. It is a figure which shows the structure of the address conversion table of the conventional semiconductor disc device. It is a figure which shows the structure of the flash memory of the conventional semiconductor disk device. It is a figure which shows the structure of the erase block in the flash memory of the conventional semiconductor disk device. It is a figure for demonstrating the data read-out operation | movement of the conventional semiconductor disc device. It is a figure for demonstrating the data write-in operation | movement of the conventional semiconductor disc device. It is a figure for demonstrating the data write-in operation | movement of the conventional semiconductor disc device.

Explanation of symbols

  1 host, 2A semiconductor disk device, 3 interface circuit, 4 CPU, 5A address conversion table, 6A flash control circuit, 61 logical sector address comparison circuit, 7 data input / output sector buffer, 8A flash memory.

Claims (3)

A flash memory having a plurality of blocks including a plurality of sectors corresponding to logical sector addresses;
An address conversion table for converting an externally input logical sector address into a block number;
The logical sector address input from the outside is converted into a block number based on the address conversion table, and the logical sector address of the block corresponding to the converted block number is compared with the logical sector address input from the outside. And a control means for selecting a data storage area corresponding to the logical sector address inputted from the outside and accessing the data corresponding to the logical sector address inputted from the outside. apparatus. The semiconductor disk device according to claim 1, wherein the address conversion table is stored in a volatile memory. 3. The semiconductor disk device according to claim 1 , wherein the block is a data erasing unit .

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