JP3864021B2 - Video camera - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a video camera using a solid-state image sensor, and more particularly to a video camera having a function of identifying and correcting a flawed portion of a solid-state image sensor.
[0002]
[Prior art]
In recent years, video cameras and digital still cameras using solid-state imaging devices such as CCD imaging devices and CMOS imaging devices have been commercialized as devices for imaging images.
[0003]
In a solid-state imaging device used for these products, in order to obtain an image with good image quality, it is important that all pixels on the solid-state imaging device have no defect or defect.
[0004]
This is because when a pixel has a defect or defect, regardless of the type and brightness of the subject, the pixel always has a white spot or black spot, a so-called white spot or black spot phenomenon occurs, and the video quality This is to cause a significant decrease in.
[0005]
However, due to the increase in the number of pixels of the solid-state image sensor and the reduction in the size of the solid-state image sensor itself, the density of each pixel has increased, and the probability of pixel defects and defects during manufacturing has increased. Yield is also low. This has been a cause of increasing the cost of equipment using a solid-state imaging device.
[0006]
Various proposals have been made to solve these problems. In the “CCD video camera system (Japanese Patent Laid-Open No. 7-58987)”, in a video camera system using a CCD image pickup device in which a defective pixel exists at a flaw, a signal value of a neighboring pixel close to the defective pixel is used. Have proposed a method capable of maintaining video quality by estimating and compensating the signal value of the defective pixel.
[0007]
In addition, in the “defective pixel detection device (Japanese Patent Laid-Open No. 9-102912)”, a defective pixel is detected by integrating the image signal obtained from the image sensor a predetermined number of times and comparing the value with a predetermined threshold value. Proposes a detection method.
[0009]
[Problems to be solved by the invention]
  By the way, it is generally required to configure a video camera with an inexpensive circuit and reduce production costs.In the proposal of Japanese Patent Laid-Open No. 9-102912, it is possible to deal with defective pixels generated after manufacturing.On the other hand,Since the signal value is integrated a predetermined number of times and compared with a threshold value, a storage device for storing the integrated values for all the pixels is required, and a significant increase in cost is inevitable..
[0010]
  Therefore, the present invention has been made to solve such a problem, and the object thereof is a video camera using a solid-state image sensor., CheapWith an inexpensive circuitDefective pixels of solid-state image sensorIt is to provide a video camera that can be corrected.
[0026]
[Means for Solving the Problems]
  This inventionOneA video camera according to one aspect includes a solid-state imaging device that includes a plurality of pixels each corresponding to one type of color information of RGB, a defective pixel recording unit that records defective pixels of the solid-state imaging device, and a plurality of pixels Among defective pixels recorded in the defective pixel recording means, correction means for correcting one type of corresponding color information, and a color signal for interpolating two types of missing information for each of the plurality of pixels A color signal interpolating means for performing an interpolation process; and a first plurality of line memories for recording pixels of the first plurality of lines output from the solid-state imaging device in time series. Correction is performed using pixel data stored in a plurality of line memories, and the color signal interpolation means uses pixel data recorded in a second plurality of line memories of the first plurality of line memories. The Perform color signal interpolation.
[0027]
Therefore, according to the video camera, the interpolation circuit that interpolates the color information of the defective pixel and the color signal interpolation circuit that compensates for the missing color information share the line memory. Therefore, the circuit area is greatly reduced.
[0028]
Preferably, the apparatus further includes coordinate counting means for calculating the coordinates of the pixels output from the solid-state image sensor, and the defective pixel recording means records or records the coordinates of the defective pixels in the order of the pixels output from the solid-state image sensor. The coordinates of the defective pixels to be read are read out in the order of the pixels output from the solid-state imaging device, and the correcting means corrects when the output of the coordinate counting means coincides with the coordinates read from the defective pixel recording means. carry out.
[0029]
Therefore, according to the video camera, correction can be performed according to the order of the pixels output from the solid-state imaging device, so that the circuit configuration can be simplified.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the video camera according to the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same symbols or the same reference numerals, and the description thereof is omitted.
[0031]
FIG. 1 is a block diagram showing an outline of the configuration of a video camera system according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes illumination for shining light on a subject when the subject is dark. Reference numeral 2 denotes a lens protection shutter for protecting a lens, which will be described later, and shielding light incident on the CCD image sensor 6. The lens protection shutter 2 is opened and closed by control from the microcomputer 8. Reference numeral 3 denotes a focus driving device for driving the focus of the lens. Reference numeral 4 denotes a lens unit including a lens capable of focus adjustment for condensing light from the subject on the CCD image sensor 6. Reference numeral 5 denotes a CCD drive circuit for driving the CCD image sensor 6. Reference numeral 6 denotes a CCD image sensor that converts light from a subject condensed by the lens 4 into an electrical signal. Reference numeral 7 denotes a flash memory for recording flaw coordinate data indicating the position of a known flaw on the CCD image sensor 6 and data necessary for video signal processing. Reference numeral 8 denotes a microcomputer for controlling the operation of the entire video camera including the illumination 1, the focus driving device 3, the CCD driving circuit 5, and the like. Reference numeral 9 denotes a CDS / AGC / AD circuit that amplifies an analog electric signal output from the CCD image pickup device 6 and converts it into a digital signal.
[0032]
Reference numeral 10 denotes a black defect level register for storing a signal level that is regarded as a black defect due to a pixel defect on the CCD image sensor 6. 11 compares the digital video signal output from the CDS / AGC / AD circuit 9 with the value of the black scratch level register 10 to determine whether or not the pixel currently being processed has black scratches. This is a black scratch determination circuit.
[0033]
Reference numeral 12 denotes a white defect level register for storing a signal level regarded as a white defect due to a pixel defect on the CCD image pickup device 6. 13 compares the digital video signal output from the CDS / AGC / AD circuit 9 with the value of the white defect level register 12 to determine whether or not the pixel currently being processed is white defect. This is a white scratch determination circuit.
[0034]
Reference numeral 14 denotes a coordinate count circuit for counting the coordinates of the pixel currently being processed. No. 15 recognizes that the pixel currently being processed is a defective pixel having white or black flaws when a flaw coordinate recorded in a flaw coordinate recording memory 16 to be described later matches the coordinate of the coordinate count circuit 14. This is a defect correction circuit that estimates and corrects the signal level of the defective pixel based on the signal level of the peripheral pixel of the defective pixel. Reference numeral 16 denotes a scratch coordinate recording memory for recording the coordinate data of a pixel determined to be a defective pixel by the black scratch determination circuit 11 or the white scratch determination circuit 13. Reference numeral 17 denotes a video signal processing circuit for performing processing such as color signal interpolation and gamma correction on the scratch-corrected signal output from the scratch correction circuit 15 to generate a final output video signal. Reference numeral 30 denotes a power supply that supplies a power supply voltage to each circuit included therein or stops the supply in response to an ON / OFF signal.
[0035]
Next, the movement of the video camera according to the present invention during normal operation will be described with reference to FIG. FIG. 2 is a flowchart for explaining the flow of processing during normal operation of the video camera according to the present invention. During normal operation, when the power of the video camera 30 is turned on (ON), the video camera is initialized by control from the microcomputer 8. In the initial setting, the focus drive device 3 (step S1), the CCD drive circuit 5 (step S2), the CDS / AGC / AD circuit 9 (step S3), and the video signal processing circuit 17 (step S4) are initialized. Is done.
[0036]
Next, the known scratch coordinate data on the CCD video device 6 recorded in the flash memory 7 is read (step S5). Then, the read known scratch coordinate data is written into the scratch coordinate recording memory 16 via the microcomputer 8 (step S6). When these initializations are completed, the microcomputer 8 instructs the lens protection shutter 2 to open the shutter (step S7). As a result, light from the subject enters the lens of the lens unit 4.
[0037]
After the shutter is opened, in accordance with an instruction from the microcomputer 8, focus adjustment by the focus driving device 3 (step S10), automatic gain adjustment by the CDS / AGC / AD circuit 9 (step S11), and electronic shutter control by the CCD driving circuit 5 are performed. (Step S12) In the video signal processing circuit 17, video signal processing and video adjustment (step S13) are performed. In addition, it is determined whether or not illumination is necessary (step S8). When the subject is dark and illumination is necessary, the illumination 1 is turned on to illuminate the subject (step S9).
[0038]
The processes in steps S8 to S13 are sequentially repeated, and control is performed so as to obtain an optimal image with respect to the change of the subject.
[0039]
Next, the signal flow during normal operation will be described. Light from the subject incident on the lens is focused on the CCD image sensor 6. The CCD image pickup device 6 is driven by a CCD drive circuit 5, and the collected light is converted into an analog electric signal. An analog electric signal output from the CCD image sensor 6 is input to the CDS / AGC / AD circuit 9. The CDS / AGC / AD circuit 9 performs analog / digital conversion through signal sampling and gain control processing according to an instruction from the microcomputer 8, and outputs a digital signal. An output signal from the CDS / AGC / AD circuit 9 is input to the coordinate count circuit 14 and the defect correction circuit 15. The coordinate count circuit 14 counts the horizontal and vertical lines of the pixels output from the CDS / AGC / AD circuit 9.
[0040]
The horizontal line count is reset every horizontal line, and the vertical line count is reset every frame. These count values are sent to the scratch correction circuit 15 and compared with the scratch coordinates recorded in the scratch coordinate memory 16. If the count value of the coordinate count circuit 14 and the scratch coordinate recorded in the scratch coordinate memory 16 do not match, the pixel corresponding to the coordinate is regarded as normal, and the CDS / AGC / AD circuit 9 to the scratch correction circuit 15 The signal input to is sent to the video signal processing circuit 17 at the subsequent stage as it is.
[0041]
When the count value of the coordinate count circuit 14 matches the scratch coordinate recorded in the scratch coordinate memory 16, the pixel corresponding to the coordinate is regarded as a defective pixel, and the signal input to the scratch correction circuit 15 is detected. After the correction processing is performed, it is sent to the video signal processing circuit 17 at the subsequent stage.
[0042]
An example of a defective pixel correction method by the defect correction circuit 15 is shown in FIGS. FIG. 3 is a conceptual diagram for explaining a correction method when a defective pixel is easily corrected without using a line memory or the like. In FIG. 3, (X-6) to (X + 5) represent horizontal pixel positions, and (Y-2) to Y represent vertical pixel positions. A pixel located at the coordinates (X, Y) is defined as a defective pixel.
[0043]
When all pixels are read out in the all-pixel readout mode with the primary color filter CCD image sensor, a line that repeats green (G) → blue (B) → green (G) → blue (B) and red (R) → green (G) → red (R) → green (G) and repeated lines appear alternately. In the correction method shown in FIG. 3, for the red defective pixel at coordinates (X, Y), the coordinates (X−2, Y) and coordinates (X + 2, Y) in the vicinity of the defective pixel are the same red pixels. Are added and divided by 2, and the calculated value is used as a defect pixel correction signal.
[0044]
This correction method is realized with a simple circuit because it does not use a line memory or the like. However, since the correction is performed only in the horizontal direction, it may not be appropriately corrected when a pattern in the vertical direction is imaged. On the same horizontal line, when pixels of the same color that are close to each other are defective pixels, a correction signal is created using the signal of the defective pixel, and thus appropriate correction cannot be performed.
[0045]
On the other hand, a correction method using a line memory for four lines will be described with reference to FIGS. 4 and 5 are conceptual diagrams for explaining a correction method using a line memory for four lines. 4 corresponds to the case where the defective pixel is a green pixel, and FIG. 5 corresponds to the case where the defective pixel is a red pixel. 4 to 5, (X-6) to (X + 5) represent horizontal pixel positions, and (Y-2) to (Y + 2) represent vertical pixel positions. A pixel located at the coordinates (X, Y) is defined as a defective pixel.
[0046]
The correction method shown in FIGS. 4 to 5 uses pixel data for a total of five lines, that is, pixel data for four lines stored in four line memories and pixel data for one line that is directly input. .
[0047]
In the correction shown in FIG. 4, for the green defective pixel at coordinates (X, Y), the coordinates (X−1, Y−1), coordinates (X + 1, Y-1), coordinates (X-1, Y + 1), and coordinates (X + 1, Y + 1) are added and divided by 4, and the calculated value is used as a correction signal for defective pixels.
[0048]
In the correction shown in FIG. 5, with respect to a red defective pixel at coordinates (X, Y), coordinates (X−2, Y−2) and coordinates (X, Y) in the vicinity of the defective pixel with the same red pixel. Y-2), coordinates (X + 2, Y-2), coordinates (X-2, Y), coordinates (X + 2, Y), coordinates (X-2, Y + 2), coordinates (X, Y + 2) and coordinates (X + 2, Y + 2) is added and divided by 8, and the calculated value is used as a defective pixel correction signal.
[0049]
In the above-described example, the case where the defective pixel is a red pixel has been described. However, the same correction can be made when the defective pixel is a pixel of another color.
[0050]
In the correction method using the line memory for four lines shown in FIGS. 4 and 5, since the horizontal line and the vertical line are taken into consideration, it is possible to perform appropriate correction as compared with the case where the line memory is not used. it can. Even when pixels of the same color are continuously defective pixels, a certain amount of correction is possible as long as defective pixels are not concentrated in one place.
[0051]
The signal that has passed through the defect correction circuit 15 shown in FIG. 1 is sent to the video signal processing circuit 17, and after being subjected to processing such as gamma correction, white balance adjustment, and color signal interpolation processing, is output to the outside as a video signal.
[0052]
Next, a detailed description will be given of the operation for automatically determining the white scratch coordinates. FIG. 6 is a flowchart for explaining the white scratch determination operation according to the embodiment of the present invention. When determining white scratches, the lens protection shutter 2 is first closed (step S21), and the light incident on the CCD image sensor 6 is shielded. Next, the focus driving device 3 is operated to set the focus to the telephoto side (step S22). In this way, by deliberately shifting the focus, it is possible to remove high-frequency components of the image due to external light leakage, etc., and it is possible to easily distinguish between normal pixels and pixels with white flaws. It becomes. Although the focus is set to the telephoto side here, it is possible to determine the white scratch by setting the focus to the wide angle side depending on the conditions of the lens and the like.
[0053]
Next, the electronic shutter of the CCD image sensor 6 is fixed (step S23), and the auto gain adjustment setting of the CDS / AGC / AD circuit 9 is fixed (step S24).
[0054]
This is because when the electronic shutter and auto gain adjustment are operating, the shutter speed changes and it is difficult to perform white defect determination. Moreover, since the light is blocked by the lens protection shutter 2, the gain of the automatic gain adjustment is increased to prevent the noise from being easily applied. For this reason, it is appropriate to set the speed of the electronic shutter to a low speed and the auto gain adjustment value to such an extent that no noise is superimposed on the video.
[0055]
Next, the microcomputer 8 sets the white scratch level register 12 (step S25). The white scratch level register 12 stores the signal level of the pixel output from the CDS / AGC / AD circuit 9 and the threshold set in the white scratch level register 12 in the white scratch determination circuit 13 when white scratch determination is performed. In comparison, if the pixel signal level is higher, a threshold value for determining white scratches is set. Since the threshold value is related to the setting values of the electronic shutter speed and auto gain adjustment, it is determined in accordance with these setting values. By steps S21 to S25, the initial setting for performing white scratch determination is completed.
[0056]
Next, white scratch determination is performed. The white scratch determination is performed for one frame from the start of the next frame after completion of the initial setting (step S26). The pixel signal level output from the CDS / AGC / AD circuit 9 is compared with the threshold value set in the white defect level register 12 (step S27). If the pixel signal level is lower, a normal pixel is detected. Then, the next pixel is determined. If the signal level of the pixel is higher than the threshold value, it is determined as white scratch, and the coordinate data that is the count value of the coordinate count circuit 14 is written in the scratch coordinate recording memory 16 (step S28), and the next pixel Judgment is made. The above operation is repeated for one frame, and the determination operation is completed.
[0057]
Next, the white scratch coordinate data registered in the scratch coordinate recording memory 16 is read by the microcomputer 8 (step S29) and written into the flash memory 7 (step S30). With this operation, even if the power supply 30 is turned off (turned off), the information on the white flaw coordinates remains, so that it is not necessary to re-determine the coordinate position of the white flaws at the next power-on (ON).
[0058]
Thus, the white scratch automatic determination operation is terminated and the normal operation is resumed. This white scratch automatic determination operation is performed when the video camera is manufactured. Note that it is possible to request the microcomputer 8 to perform the above-described white flaw determination process (or black flaw determination process described later) from the outside at an arbitrary timing. When receiving a scratch determination instruction from the outside, the microcomputer 8 executes a scratch determination process shown in FIG. 6 (including FIGS. 7 and 8 described later).
[0059]
Thereby, even after manufacturing, even when the user discovers a new white scratch, the above-described processing can be performed at an arbitrary timing. Therefore, even if white scratches increase due to the influence of cosmic rays after manufacture, white scratch determination processing can be performed and correction for the white scratches can be performed according to the determination result. In addition, depending on the device, it is possible to perform white scratch determination every time at a constant cycle or every time the power is turned on.
[0060]
Next, detailed description will be given of the operation for automatically determining the black scratch coordinates. FIG. 7 is a flowchart for explaining the black scratch determination operation according to the embodiment of the present invention. When black defect determination is performed, the lens protection shutter 2 is opened (step S41). Next, the focus driving device 3 is operated to set the focus most deviated (step S42). This is because high-frequency components are removed from the subject and external light images generated by opening the lens protection shutter 2 by shifting the focus.
[0061]
Next, the electronic shutter of the CCD image pickup device 6 is fixed (step S43), and the setting value for auto gain adjustment of the CDS / AGC / AD circuit 9 is fixed (step S44). Also in the case of black defect determination, as in the case of white defect determination, it is appropriate to set the electronic shutter speed to a low speed and the auto gain adjustment value to such an extent that no noise is added to the image.
[0062]
This is because the output of the CCD image sensor 6 is used near saturation by turning on the illumination 1 and lowering the electronic shutter speed of the CCD image sensor 6.
[0063]
However, in the case of using the illumination 1 that is lit only at the moment, such as a flash, it is necessary to set the electronic shutter speed below the lighting time. Further, when black scratches are determined, it is more preferable to make the subject a white wall or use a reflecting plate in order to use the output of the CCD image pickup device 6 near saturation.
[0064]
Next, the microcomputer 8 sets the black scratch level register 10 (step S45). The black scratch level register 10 stores the pixel level output from the CDS / AGC / AD circuit 9 in the black scratch determination circuit 11 and the threshold set in the black scratch level register 10 when the black scratch determination is performed. In comparison, if the signal level of the pixel is lower, a threshold value for determining black scratches is set. Since the threshold value is related to the setting values of the electronic shutter speed and the auto gain adjustment value, it is necessary to determine the threshold value according to these setting values.
[0065]
Next, the illumination 1 is turned on (step S46). When the lighting 1 that is turned on only at the moment, such as a flash, is used, it is necessary to turn on the lighting at the frame start time of the video. Through steps S41 to S46, the initial setting for black defect determination ends.
[0066]
Next, actual black scratch determination is performed. Black scratch determination is performed for one frame from the start of the next frame after completion of the initial setting. The signal level of the pixel output from the CDS / AGC / AD circuit 9 is compared with the threshold value of the black defect level register 10 (step S48), and if the pixel signal level is higher, it is determined as a normal pixel. Then, the next pixel is determined.
[0067]
If the signal level of the pixel is lower than the threshold value, the pixel is regarded as a black scratch, and the coordinate data which is the count value of the coordinate count circuit 14 is written into the scratch coordinate recording memory 16. (Step S49), the next pixel is determined. The above operation is repeated for one frame, and the determination work is finished (step S47).
[0068]
Next, the microcomputer 8 reads out the black scratch coordinate data registered in the scratch coordinate recording memory 16 (step S50) and writes it into the flash memory 7 (step S51). With this operation, the information on the black scratch coordinates remains even when the power is turned off. Therefore, it is not necessary to re-determine the coordinate position of the black scratches when the power is turned on next time.
[0069]
The black scratch automatic determination operation is thus completed, and the normal operation is resumed. This black scratch automatic determination operation is performed when the video camera is manufactured. As described above, it is also possible to input a request for executing the black flaw determination to the microcomputer 8 at an arbitrary timing from the outside. Thereby, even if a user discovers a new black scratch after manufacturing, the black scratch determination process can be performed at an arbitrary timing. Therefore, even if black scratches increase due to the influence of cosmic rays after manufacturing, black scratch determination processing can be performed and corrected according to the determination result.
[0070]
In the embodiment of the present invention, the illumination 1 used in the normal operation is used for the black scratch automatic determination operation. However, as shown in FIG. May be separately attached, and black scratch determination may be performed by the attached illumination 32. FIG. 8 shows an automatic black scratch determination operation using the black scratch determination illumination 32 attached in the lens barrel 31 that encloses the lens 33.
[0071]
In this case, when the black scratch is determined, the lens protection shutter 2 is closed (step S61), and the focus is set to the telephoto side (step S62). Further, the electronic shutter of the CCD image pickup device 6 is fixed (S63), and the set value for the automatic gain adjustment of the CDS / AGC / AD circuit 9 is fixed (step S64). It is appropriate to set the electronic shutter at a low speed and the auto gain adjustment value so that no noise is added to the image. The illumination 32 is turned on under the control of the microcomputer 8 (step S66). Thereafter, in steps S67 to S71, the same processing as in steps S47 to S51 in FIG. 7 is executed.
[0072]
By operating in this way, it is possible to automatically determine black scratches every time the device is started up, and in combination with the above-described automatic scratch scratch detection operation, complete white scratches and black scratches that do not bother the user. A video camera that realizes automatic scratch detection is realized.
[0073]
Next, detailed description will be given of writing and reading operations to / from the scratch coordinate recording memory 16 in the video camera shown in FIG. In the embodiment of the present invention, the scratch is determined in the order of the pixels output from the CCD image sensor 6 from the start of the frame in both the white scratch determination and the black scratch determination. Accordingly, the scratch coordinate recording memory 16 records the scratch coordinates in the order of the pixels output from the CCD image pickup device 6.
[0074]
FIG. 9 is a conceptual diagram for explaining a recording state in the scratch coordinate recording memory 16. In FIG. 9, n scratch coordinates are recorded. In the scratch coordinate recording memory 16, the coordinate data counted by the coordinate counting circuit 14 is written from the address AD0 in the order in which the scratch coordinate is determined, that is, in the order in which the CCD image pickup device 6 outputs the pixel signal. . More specifically, coordinate data A0 (X0, Y0), coordinate data A1 (X1, Y1),..., Coordinate data An (Xn, Yn) are written to address AD0,. . The following conditions are satisfied for the coordinate data.
(Xn, Yn)> ...> (X3, Y3)> (X2, Y2)> (X1, Y1)> (X0, Y0) ... (1)
Next, an example of reading coordinate data from the scratch coordinate recording memory 16 is shown in FIG. 10A shows pixel data before defect correction, FIG. 10B shows read data from the defect coordinate recording memory 16, and FIG. 10C shows pixel data after defect correction in time series. .
[0075]
Of the pixel data (pixel P0, pixel P1,..., Pixel P9,...) Before defect correction in FIG. 10A, the pixel P2, the pixel P4, the pixel P5, and the pixel P8 are defective pixels. In the scratch coordinate recording memory 16, the coordinate data A0, the coordinate of the pixel P2, the coordinate data A1, the coordinate of the pixel P4, the coordinate data A2, the coordinate of the pixel P5, and the coordinate data A3 include the pixel. The coordinates of P8 are recorded.
[0076]
From the scratch coordinate recording memory 16, the coordinate data A0 recorded at the address AD0 is first read out and compared with the count value of the coordinate count circuit 14. At this time, the relationship of scratch coordinate data ≦ count value always holds between the scratch coordinate data and the count value of the coordinate count circuit 14.
[0077]
When the flaw coordinate data and the count value match, the flaw correction circuit 15 corrects the pixel P2 which is the matched defective pixel. Then, the coordinate data A1 recorded at the address AD1, which is the next coordinate data, is read from the scratch coordinate recording memory 16 and compared with the count value of the coordinate count circuit 14. Thereafter, the same operation is repeated for one frame.
[0078]
When the processing for one frame is completed, the address is reset, and the coordinate data of the address AD0 is read again. When both the white defect correction and the black defect correction are performed, when the microcomputer 8 records the coordinate data in the flash memory 7 after the determination of the white defect and the black defect, the white defect coordinate and the black defect are corrected. Record separately from scratch coordinates.
[0079]
Then, when the device is initialized, the white flaw coordinates and the black flaw coordinates recorded in the flash memory 7 may be read sequentially and written in the flaw coordinate recording memory 16 in ascending order of the coordinates.
[0080]
Normally, when the configuration according to the embodiment of the present invention is not taken, the coordinate data is written once from the memory in which the scratch coordinates are recorded into a register configured with a high-speed readable circuit prepared for the number of scratches, It is necessary to compare the coordinate count value with the coordinate data in the comparison circuit prepared for the number of coordinate data, which greatly increases the circuit scale and increases the cost. However, with the configuration according to the embodiment of the present invention, white scratches and black scratches can be determined with one register and one comparison circuit regardless of the number of scratches. Scratch determination can be performed.
[0081]
In the embodiment of the present invention, after the white defect correction and the black defect correction are performed by the defect correction circuit 15, the video signal processing such as the color signal correction process is performed by the video signal processing circuit 17. By sharing the line memory used in the signal interpolation processing circuit between the defect correction circuit and the interpolation processing circuit, the circuit scale can be reduced.
[0082]
FIG. 11 is a block diagram showing a configuration when the line memory is shared between the color separation interpolation circuit and the defect correction circuit. In FIG. 11, each of 18, 19, 20, and 21 is a line memory for delaying pixel data by one horizontal line. Reference numeral 22 denotes a flaw correction circuit for performing white flaw correction and black flaw correction. A color separation interpolation circuit 23 separates red, green, and blue color signals and performs color signal interpolation. Reference numeral 16 denotes a scratch coordinate recording memory for recording the coordinates of white scratches and black scratches. Reference numeral 14 denotes a coordinate count circuit that counts the coordinates of pixels.
[0083]
Pixel data is delayed by four horizontal lines while passing from the line memory 18 to the line memory 21. Therefore, the pixel data for a total of five lines including the line memories 18 to 21 and the lines directly input from the CDS / AGC / AD circuit 9 are input to the defect correction circuit 22. More specifically, the scratch correction circuit 22 is connected to the Nth line and the line memory 20 from the line memory 21, the (N + 1) th line and the line memory 19, the (N + 2) th line and the line memory 18. The pixel data of the (N + 3) th line is received from the CDS / AGC / AD circuit 9 as the pixel data of the (N + 4) th line.
[0084]
The pixel data of the (N + 2) th line of the line memory 19 is interpolated using the pixel data of the Nth, N + 1, N + 3, and N + 4th lines. That is, the flaw correction circuit 22 performs white flaw correction and black flaw correction using pixel data for five lines. The correction method shown in FIGS. 4 and 5 is applied to the correction example of the defect correction circuit 22.
[0085]
The color separation / interpolation circuit 23 includes pixel data for one line corrected by the defect correction circuit 22, pixel data for one line output from the line memory 20, and pixel data for one line output from the line memory 21. Interpolation is performed using pixel data for a total of three lines.
[0086]
A color signal interpolation method in the color separation / interpolation circuit 23 shown in FIG. 11 will be described with reference to FIGS. FIG. 12 is an example of color signals before color signal interpolation input to the color separation interpolation circuit 23. 13 to 15 are conceptual diagrams for explaining a method of separating and interpolating the green signal, the red signal, and the blue signal in the color separation interpolation circuit 23. FIG. 12 to 15, the green signal of the coordinates (X, Y) is represented by green X # Y, the blue signal is represented by blue X # Y, and the red signal is represented by red X # Y.
[0087]
As shown in FIG. 12, the screen is a line in which pixels having a green signal and pixels having a blue signal are repeated, such as green 0 # 0 → blue 0 # 1 → green 0 # 2 → blue 0 # 3. And red 1 # 0 → green 1 # 1 → red 1 # 2 → green 1 # 3, and so on, pixels having red signals and lines having green signals are alternately included.
[0088]
In the color separation / interpolation circuit 23, a red signal and a blue signal are applied to a pixel having a green signal, and a red signal and a green signal are applied to a pixel having a red signal. Therefore, the green signal and the blue signal are interpolated.
[0089]
As shown in FIG. 13, the green signals at coordinates (a, b) are interpolated using the green signals at coordinates that are adjacent vertically and horizontally. The green signal interpolation equation follows equation (2).
[0090]
Green a # b = [Green (a−1) # b + Green (a + 1) # b + Green a # (b−1) + Green a # (b + 1)] ÷ 4 (2)
However, in the formula (2), when a is an even number, b represents an odd number, and when a is an odd number, b represents an even number.
[0091]
As shown in FIG. 14, the red signal is interpolated by two red signals positioned up and down, two red signals positioned right and left, or four red signals positioned diagonally. The interpolation formula of the red signal at the coordinates (a, b) follows equations (3) to (5).
[0092]
Red a # b = [Red (a-1) # b + Red (a + 1) #b] / 2 (3)
Red a # b = [Red (a-1) # (b-1) + Red (a-1) # (b + 1) + Red (a + 1) # (b-1) + Red (a + 1) # (b + 1)] ÷ 4 ... (4)
Red a # b = [Red a # (b-1) + Red a # (b + 1)] / 2 (5)
However, Formula (3) shows that when a is an odd number and b is an even number, Formula (4) shows that when a is an even number and b is an odd number, and Formula (5) further shows that a and b are even numbers. It corresponds to each case.
[0093]
As shown in FIG. 15, the blue signal is interpolated using two blue signals positioned in the vertical direction, two blue signals positioned in the horizontal direction, or four blue signals positioned in the diagonal direction. The color interpolation formula of the blue signal follows formulas (6) to (8).
[0094]
Blue a # b = [Blue (a-1) # b + Blue (a + 1) #b] / 2 (6)
Blue a # b = [Blue (a-1) # (b-1) + Blue (a-1) # (b + 1) + Blue (a + 1) # (b-1) + Blue (a + 1) # (b + 1)] ÷ 4 ... (7)
Blue a # b = [Blue a # (b-1) + Blue a # (b + 1)] / 2 (8)
However, Formula (6) is when a and b are even numbers, Formula (7) is when a is odd and b is even, and Formula (8) is when a and b are odd. It corresponds to each.
[0095]
In any of the signals, the color signal is interpolated using the data for three lines obtained by delaying the missing color signal by the line memories 20 and 21.
[0096]
As described above, by sharing the line memory used for white defect correction and black defect correction and the line memory used for color signal interpolation, the line memory normally required for 7 lines is used for only 4 lines. White defect correction, black defect correction, and color signal correction can be realized. As a result, the cost of the circuit can be greatly reduced.
[0097]
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiment but by the scope of the claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of the claims.
[0099]
【The invention's effect】
  The present inventionThe coordinates of the defective pixels are recorded in the memory in the order of the pixels output from the solid-state image sensor, and the coordinates of the defective pixels are read out from the memory in the order of the pixels output from the solid-state image sensor. The circuit for determining whether or not is a defective pixel can be greatly simplified.
[0100]
In addition, by sharing the line memory between the color separation interpolation circuit and the defect correction circuit, the circuit can be greatly simplified.
[0101]
Furthermore, it is possible to automatically determine a defective pixel and perform automatic correction at any timing, when the power is turned on, or at regular intervals. Therefore, even if a defect occurs later, it can be corrected.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a main part of a video camera according to an embodiment of the present invention.
FIG. 2 is a flowchart showing a flow of processing during normal operation of the video camera according to the embodiment of the present invention.
FIG. 3 is a conceptual diagram for explaining a defective pixel correction method;
FIG. 4 is a conceptual diagram for explaining a defective pixel correction method using a line memory for four lines.
FIG. 5 is a conceptual diagram for explaining a defective pixel correction method using a line memory for four lines.
FIG. 6 is a flowchart for explaining a white scratch determination operation according to the embodiment of the present invention.
FIG. 7 is a flowchart for explaining a black scratch determination operation according to the embodiment of the present invention;
FIG. 8 is a flowchart for explaining a black scratch determination operation using illumination provided in a lens barrel that encloses a lens.
FIG. 9 is a conceptual diagram for explaining a recording situation in a scratch coordinate recording memory 16;
FIG. 10 is a conceptual diagram for explaining reading of coordinate data from a scratch coordinate recording memory 16;
FIG. 11 is a block diagram when a line memory is shared by the color separation interpolation circuit 23 and the defect correction circuit 22;
12 is a conceptual diagram for explaining a signal example of an input pixel to the color separation interpolation circuit 23. FIG.
FIG. 13 is a conceptual diagram for explaining a green signal interpolation method;
FIG. 14 is a conceptual diagram for explaining a red signal interpolation method;
FIG. 15 is a conceptual diagram for explaining a blue signal interpolation method;
FIG. 16 is a conceptual diagram for explaining an illumination 32 attached in a lens barrel 31 that encloses a lens 33;
[Explanation of symbols]
1, 32 illumination, 2 lens protection shutter, 3 focus drive device, 4 lens unit, 5 CCD drive circuit, 6 CCD image sensor, 7 flash memory, 8 microcomputer, 9 CDS / AGC / AD circuit, 10 black scratch level register, 11 black scratch determination circuit, 12 white scratch level register, 13 white scratch determination circuit, 14 coordinate count circuit, 15 scratch correction circuit, 16 scratch coordinate recording memory, 17 video signal processing circuit, 18, 19, 20, 21 line memory, 22 Scratch correction circuit, 23 color separation interpolation circuit, 30 power supply, 31 lens barrel, 33 lens.

Claims (2)

A solid-state imaging device each composed of a plurality of pixels corresponding to one type of color information of RGB;
Defective pixel recording means for recording defective pixels of the solid-state imaging device;
Correction means for correcting the corresponding one type of color information for the defective pixels recorded in the defective pixel recording means among the plurality of pixels;
Color signal interpolation means for performing color signal interpolation processing for interpolating two types of missing information for each of the plurality of pixels;
A first plurality of line memories that record the pixels of the first plurality of lines output from the solid-state imaging device in time series;
The correction means includes
Correction is performed using pixel data stored in the first plurality of line memories,
The color signal interpolation means includes
A video camera that performs the color signal interpolation processing using pixel data recorded in a second plurality of line memories of the first plurality of line memories. Further comprising coordinate counting means for calculating the coordinates of the pixels output from the solid-state imaging device;
The defective pixel recording means includes:
The coordinates of the defective pixels are recorded in the order of pixels output from the solid-state image sensor, or the coordinates of the defective pixels to be recorded are read in the order of pixels output from the solid-state image sensor,
The correction means includes
Wherein an output of the coordinate counting means, when the coordinates and matches to be read from the defective pixel recording means, carrying out said correction, the video camera according to claim 1.

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