JP3596572B2 - Board connection method - Google Patents
Board connection method Download PDFInfo
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- JP3596572B2 JP3596572B2 JP8814796A JP8814796A JP3596572B2 JP 3596572 B2 JP3596572 B2 JP 3596572B2 JP 8814796 A JP8814796 A JP 8814796A JP 8814796 A JP8814796 A JP 8814796A JP 3596572 B2 JP3596572 B2 JP 3596572B2
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- 238000000034 method Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims description 58
- 239000002245 particle Substances 0.000 claims description 35
- 239000000853 adhesive Substances 0.000 claims description 22
- 230000001070 adhesive effect Effects 0.000 claims description 22
- 239000012790 adhesive layer Substances 0.000 claims description 18
- 238000010438 heat treatment Methods 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 9
- 239000011521 glass Substances 0.000 description 13
- 229910052737 gold Inorganic materials 0.000 description 7
- 238000003825 pressing Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 239000011162 core material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- Connecting Device With Holders (AREA)
- Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
- Wire Bonding (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、基板間の電気的な接続方法に関するもので、例えばAuバンプを有するICチップと接続端子を形成した基板の接続に関するものである。
【0002】
【従来の技術】
従来より集積回路類の配線基板への接続、表示素子類と配線基板への接続などのように、接続端子が相対峙して細かいピッチで形成されている場合の接続方法として、相対峙する接続端子間に金属粒子等の導電性粒子と接着剤成分からなる異方導電性の接続部材層を設け、加圧または加熱加圧手段を講じることによって、回路間の電気接続と同時に隣接回路間に絶縁性を付与し、相対峙する回路を接着固定する方法が用いられている。
しかしながら、これらの方法においては、導電性粒子を分散させた異方導電性の接続部材層を流動させながら接続するので、相対峙する電極間に配置される導電性の粒子は、接着剤と共に流動しながら電極間に挟み込まれる。電極間の導通は主として複数個の導電材料によって得られるものであり、狭ピッチ、微小電極の接続において電極上に複数個の導電性粒子材料を分布させ、かつ隣接する電極間の絶縁を維持することが困難になってきている。
【0003】
【発明が解決しようとする課題】
本発明はかかる状況に鑑みなされたもので、さらに微細な電極の接続を達成すべく検討の結果本発明に達したものであり、接続部の電気特性の向上した微細電極の接続方法を提供することを目的とするものである。
【0004】
【課題を解決するための手段】
本発明は、突起電極を有する第1の基板と、前記突起電極と相対峙する突起電極を有する第2の基板上の少なくとも一方の突起電極面に絶縁性の接着剤を突起電極の高さと同じまたは突起電極の高さより厚く配置するとともに、前記第1の基板と前記第2の基板の間に絶縁性を有する接着剤中に導電性の粒子が分散された異方導電性接着剤を配置し、加圧または加圧加熱することにより、前記第1の基板と前記第2の基板の相対峙する突起電極が、導電性の粒子に接触することにより電気的に接続され、隣接する突起電極間は絶縁されて固定されることを特徴とする基板間の接続方法に関する。更に、本発明は、絶縁性を有する接着剤層が突起電極の高さと同じまたは突起電極の高さより厚く、かつ基板の突起電極部分を除いた形状であり、当該絶縁性接着剤層を異方導電性接着剤層の少なくとも片面に配置してなる多層接着剤を、突起電極を有する第1の基板と、前記突起と相対峙する導電性の突起を有する第2の基板間に配置し、加圧または加圧加熱することにより、前記第1の基板と前記第2の基板の相対峙する導電性の突起が、導電性の粒子に接触することにより電気的に接続され、隣接する突起電極間は絶縁されて固定されることを特徴とする基板間の接続方法に関する。
【0005】
【発明の実施の形態】
本発明にかかる電極の接続プロセスを、実施例を示した図面を用いて以下に説明する。図1は、接続プロセスを示す模式図である。図1において2は第1の基板に設けられた突起電極であり、これに絶縁性の接着剤層3および異方導電性接着剤層5を配置し、もう一方の基板6の接続用突起電極7面にも同様に絶縁性の接着剤層3を設ける。両基板の導電性の突起が相対峙するように位置合わせを行い加熱、加圧することにより接着剤は流動し複数の導電性の粒子8が、突起電極2と突起電極7の間に接触固定することにより、充分な接触面積が得られる。
また、図2(a)において2は第1の基板に設けられた突起電極であり、これに突起電極2の部分を除く形状とした絶縁性の接着剤層3を加圧または加圧加熱により第1の基板1に転写し、さらに全面に異方導電性接着剤層5を転写する。もう一方の第2の基板6にも同様に突起電極7の部分を除く形状とした絶縁性の接着剤層3を転写する。
両基板の突起電極が相対峙するように位置合わせを行い加熱、加圧することにより接着剤は流動し複数の導電性の粒子8が、突起電極2及び7に接触することにより、両基板の電気的接続がはかられる。
図2(b)は別の実施例を示したもので、突起電極部分を除く形状とした絶縁性の接着剤層3を異方導電性の接着剤層5の両面に貼りあわせた多層接着剤層とし、これを突起電極同士を相対峙するように両基板間に配置し、加熱、加圧することにより接続するようにしてもよい。
【0006】
第1の基板の材料としては、例えばICチップ類のシリコン、ガリウムヒ素等がある。これらICチップは例えば、導電性の突起電極としてAl等の電極上にCu、Ni、Au、はんだ等の突起(バンプ)を設けたものであり、これらのバンプの表面にはSn、Au、はんだ等の表面層を形成することもできる。
酸化シリコン、ホウケイ酸ガラス、チッ化けい素、チッ化アルミニウム、チッ化ホウ素、ポリイミド、テフロン等の絶縁層が突起電極以外を覆っていることが、導電性の粒子とICチップの素子との接触を完全に防止できるので好ましい。第2の基板としては、例えばガラス基板またはセラミック基板、ポリイミド等のフィルム基板やガラスエポキシ基板等の配線板の表面に、突起電極としてITO、Al、Ni、Au等の薄膜電極やCu箔や、Ag、Ni等を含む導電性ペースト類の電極を設けたものであり、これら電極の表面にはSn、Au、はんだ等の表面層を形成することもできる。また、これらの電極は基板面より凸状であることが導電性の粒子と電極との接触の点で好ましく、電極の高さは後述する導電性の粒子の径よりも大きな2μm以上が好ましく、電極表面には凹凸があることから3μm以上がより好ましい。電極の高さばらつきは導電性の粒子の粒径よりも小さい方が好ましく、導電性の粒子に均一に圧力を加えるためには、3μm以下がより好ましい。
【0007】
異方導電性接着剤の導電性の粒子は、例えばAu、Ag、Cuやはんだ等の金属の粒子であり、ポリスチレン等の高分子の球状の核材にNi、Cu、Au、はんだ等の導電層を設けたものがより好ましい。さらに導電性の粒子の表面にSn、Au、はんだ等の表面層を形成することもできる。粒径は基板の隣接する電極の最小の間隔よりも小さいことが必要で、電極の高さばらつきがある場合、高さばらつきよりも大きいことが好ましく、3〜5μmが好ましい。また、加圧または加熱加圧により変形する方がより好ましい。絶縁性の接着剤層は、突起電極の高さと同じか厚くし、導電性の粒子を分散した絶縁性の接着剤の厚みは、導電性の粒子の直径の2倍以内が好ましく、導電性の粒子の直径と同じであることがより好ましい。接着剤は、加圧または加圧加熱時に流動することが必要である。さらに熱または光等で反応するエポキシ、アクリル樹脂等の反応性樹脂が好ましい。
【0008】
【実施例】
実施例1
以下に、本発明の実施例を図に基づいて説明する。図3は、本発明に関する基板間の接続プロセスを示す模式図である。ICチップとガラス基板の接続に適用した場合を示す。
ICチップ11(バンプ高さ15μm)の表面にエポキシ樹脂を主体とした絶縁性の接着剤層13(膜厚20μm)を、加圧加熱(90℃、1Mpa)により転写し、ガラス基板16にエポキシ樹脂を主体とした絶縁性接着剤中に導電性の粒子を分散した異方導電性接着剤層15(膜厚7μm)を加圧加熱(90℃、1Mpa)により転写した。次いでICチップ11のバンプ12とガラス基板16の透明電極17との位置合わせを行い、加圧加熱(180℃、100Mpa、20秒)することにより接続した。
ガラス基板側からバンプ上に配置された導電粒子を顕微鏡で観察、粒子数を計測した。
【0009】
実施例2
図4は、ICチップとガラス基板の接続に適用した場合を示す模式図である。ガラス基板36にエポキシ樹脂を主体とした絶縁性接着剤中に導電性の粒子を分散した異方導電性接着剤層35(膜厚7μm)を加圧加熱(90℃、1Mpa)により転写する。さらにICチップ31(バンプ高さ15μm)のバンプ32を除くICチップ内部に配置できるように切断したエポキシ樹脂を主体とした絶縁性の接着剤層33(膜厚20μm)を、ICチップ31のバンプ32の相対峙するガラス基板36の透明電極37部分以外に加圧(1Mpa)転写する。ICチップ31側に転写してもよい。
ICチップ31のバンプ32とガラス基板36の透明電極37との位置合わせを行い、加圧加熱(180℃、100Mpa)し接続した。ガラス基板側からバンプ上に配置された導電粒子を顕微鏡で観察、粒子数を計測した。
なお、本実施例に用いたICチップの突起電極のピッチは80μmでバンプ1個あたりの面積は0.045mm2である。
一方、従来の異方導電性接着剤(膜厚25μm)のみを用い、実施例1と同じ接続条件で接続したものとのバンプ上の粒子数を比較した結果を次に示す。
【0010】
【発明の効果】
本発明によれば、相対峙する微細な突起電極間の多数の接続を一括して行え、導電性の粒子が接続時の樹脂の流動初期に突起電極に挟まれ微小電極上に数多く配置でき、かつ隣接する電極間の導電性の粒子は、接続時の樹脂の流動により分散されるので、接続抵抗が低く、電気特性に優れた微細電極の電気的接続が行える。
【図面の簡単な説明】
【図1】本発明の接続プロセスを示す模式図である。
【図2】本発明の実施例であるICチップとガラス基板の接続プロセスを示す模式図である。
【図3】本発明の別の実施例であるICチップとガラス基板の接続プロセスを示す模式図である。
【図4】本発明の別の実施例であるICチップとガラス基板の接続プロセスを示す模式図である。
【符号の説明】
1 第1の基板 2 突起電極
3 絶縁性接着剤 4 セパレータ
5 異方導電性接着剤 6 第2の基板
7 突起電極 8 導電性の粒子[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electrical connection method between substrates, for example, to a connection between an IC chip having Au bumps and a substrate on which connection terminals are formed.
[0002]
[Prior art]
Conventionally, as a connection method when connection terminals are formed at a fine pitch facing each other, such as a connection of an integrated circuit to a wiring board, a connection between a display element and a wiring board, etc. By providing an anisotropic conductive connecting member layer composed of conductive particles such as metal particles and an adhesive component between terminals, and by applying pressure or heating / pressing means, electrical connection between circuits can be performed simultaneously between adjacent circuits. A method has been used in which insulation is imparted and opposing circuits are bonded and fixed.
However, in these methods, since the anisotropic conductive connection member layer in which the conductive particles are dispersed is connected while flowing, the conductive particles disposed between the opposing electrodes flow together with the adhesive. While being sandwiched between the electrodes. The conduction between the electrodes is mainly obtained by a plurality of conductive materials, and a plurality of conductive particle materials are distributed on the electrodes in the connection of the fine pitch and minute electrodes, and the insulation between the adjacent electrodes is maintained. Things are getting harder.
[0003]
[Problems to be solved by the invention]
The present invention has been made in view of such circumstances, and has been accomplished as a result of studies to achieve connection of finer electrodes. The present invention provides a method of connecting fine electrodes with improved electrical characteristics of a connection portion. It is intended for that purpose.
[0004]
[Means for Solving the Problems]
According to the present invention, an insulating adhesive is applied to at least one of the first substrate having the protruding electrodes and the second substrate having the protruding electrodes opposed to the protruding electrodes at the same height as the height of the protruding electrodes. Alternatively, an anisotropic conductive adhesive in which conductive particles are dispersed in an adhesive having an insulating property is disposed between the first substrate and the second substrate while being disposed thicker than the height of the protruding electrode. By pressurizing or heating, the opposing protruding electrodes of the first substrate and the second substrate are electrically connected to each other by contacting conductive particles. The present invention relates to a method for connecting substrates, which is insulated and fixed. Furthermore, the present invention, the adhesive layer having an insulating property is greater than the height of the same or protruding electrodes and the height of the bump electrode, and a shape excluding the protruding electrode portion of the substrate, anisotropic said insulating adhesive layer a conductive adhesive multilayer adhesive formed by arranging at least one side of the layer, disposed between the second substrate having a first substrate having a protruding electrode, a conductive protrusion of the projection and faced each other, pressurizing When pressure or pressure is applied, the opposing conductive protrusions of the first substrate and the second substrate are electrically connected to each other by contacting conductive particles, and are electrically connected between adjacent protrusion electrodes. The present invention relates to a method for connecting substrates, which is insulated and fixed.
[0005]
BEST MODE FOR CARRYING OUT THE INVENTION
An electrode connection process according to the present invention will be described below with reference to the drawings showing examples. FIG. 1 is a schematic diagram showing the connection process. In FIG. 1,
In FIG. 2A,
By positioning and heating and applying pressure so that the protruding electrodes of both substrates face each other, the adhesive flows and a plurality of conductive particles 8 come into contact with the protruding
FIG. 2B shows another embodiment, in which a multi-layer adhesive in which an insulating
[0006]
Examples of the material for the first substrate include silicon and gallium arsenide of IC chips. These IC chips are, for example, provided with protrusions (bumps) of Cu, Ni, Au, solder, etc. on electrodes of Al or the like as conductive protrusion electrodes, and Sn, Au, solder on the surface of these bumps. Etc. can be formed.
The contact between the conductive particles and the IC chip element is that the insulating layer of silicon oxide, borosilicate glass, silicon nitride, aluminum nitride, boron nitride, polyimide, Teflon, etc. covers other than the protruding electrodes. This is preferable since it is possible to completely prevent As the second substrate, for example, a glass substrate or a ceramic substrate, a thin film electrode such as ITO, Al, Ni, Au or the like, a Cu foil, An electrode of a conductive paste containing Ag, Ni, or the like is provided, and a surface layer of Sn, Au, solder, or the like can be formed on the surface of these electrodes. Further, these electrodes are preferably convex from the substrate surface in terms of contact between the conductive particles and the electrodes, and the height of the electrodes is preferably 2 μm or more, which is larger than the diameter of the conductive particles described below, Since the electrode surface has irregularities, it is more preferably 3 μm or more. The height variation of the electrode is preferably smaller than the particle size of the conductive particles, and more preferably 3 μm or less in order to uniformly apply pressure to the conductive particles.
[0007]
The conductive particles of the anisotropic conductive adhesive are, for example, metal particles such as Au, Ag, Cu, and solder, and the conductive particles such as Ni, Cu, Au, and solder are attached to a polymer spherical core material such as polystyrene. Those having a layer are more preferred. Further, a surface layer of Sn, Au, solder or the like can be formed on the surface of the conductive particles. The particle size needs to be smaller than the minimum distance between adjacent electrodes on the substrate, and when there is a height variation of the electrodes, it is preferably larger than the height variation, and more preferably 3 to 5 μm. Moreover, it is more preferable to deform by pressurization or heat and pressure. Insulating adhesive layer is either equal to the height of the bump electrode thickness comb, the thickness of the conductive insulating adhesive in which particles are dispersed, the conductive is preferably within 2 times the diameter of the particles, the conductive More preferably, it is the same as the diameter of the particles. The adhesive needs to flow when pressed or heated under pressure. Further, a reactive resin such as an epoxy resin or an acrylic resin which reacts by heat or light is preferable.
[0008]
【Example】
Example 1
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a schematic diagram showing a connection process between substrates according to the present invention. This shows a case where the present invention is applied to connection between an IC chip and a glass substrate.
An insulating adhesive layer 13 (film thickness: 20 μm) mainly composed of epoxy resin is transferred to the surface of the IC chip 11 (bump height: 15 μm) by pressurizing and heating (90 ° C., 1 Mpa), and epoxy-coated on a
The conductive particles placed on the bumps from the glass substrate side were observed under a microscope, and the number of particles was counted.
[0009]
Example 2
FIG. 4 is a schematic diagram showing a case where the present invention is applied to a connection between an IC chip and a glass substrate. An anisotropic conductive adhesive layer 35 (7 μm thick) in which conductive particles are dispersed in an insulating adhesive mainly composed of an epoxy resin is transferred to a
The
The pitch of the projecting electrodes of the IC chip used in this example was 80 μm, and the area per bump was 0.045 mm 2 .
On the other hand, the results of comparing the number of particles on the bumps with those connected under the same connection conditions as in Example 1 using only the conventional anisotropic conductive adhesive (film thickness 25 μm) are shown below.
[0010]
【The invention's effect】
According to the present invention, a large number of connections between opposing fine projection electrodes can be collectively performed, and a large number of conductive particles can be arranged on the microelectrodes sandwiched between the projection electrodes in the initial flow of the resin at the time of connection, In addition, since the conductive particles between the adjacent electrodes are dispersed by the flow of the resin at the time of connection, a fine electrode having low connection resistance and excellent electrical characteristics can be electrically connected.
[Brief description of the drawings]
FIG. 1 is a schematic diagram showing a connection process of the present invention.
FIG. 2 is a schematic view illustrating a process of connecting an IC chip and a glass substrate according to an embodiment of the present invention.
FIG. 3 is a schematic view showing a process of connecting an IC chip and a glass substrate according to another embodiment of the present invention.
FIG. 4 is a schematic view showing a process of connecting an IC chip and a glass substrate according to another embodiment of the present invention.
[Explanation of symbols]
REFERENCE SIGNS LIST 1
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8814796A JP3596572B2 (en) | 1996-04-10 | 1996-04-10 | Board connection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8814796A JP3596572B2 (en) | 1996-04-10 | 1996-04-10 | Board connection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09283566A JPH09283566A (en) | 1997-10-31 |
| JP3596572B2 true JP3596572B2 (en) | 2004-12-02 |
Family
ID=13934830
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8814796A Expired - Fee Related JP3596572B2 (en) | 1996-04-10 | 1996-04-10 | Board connection method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3596572B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6396712B1 (en) * | 1998-02-12 | 2002-05-28 | Rose Research, L.L.C. | Method and apparatus for coupling circuit components |
| JP4179312B2 (en) | 2004-09-15 | 2008-11-12 | セイコーエプソン株式会社 | Semiconductor device mounting method, semiconductor device |
| JP4930712B2 (en) * | 2007-05-21 | 2012-05-16 | ソニーケミカル&インフォメーションデバイス株式会社 | Anisotropic conductive film |
| JP5965185B2 (en) * | 2012-03-30 | 2016-08-03 | デクセリアルズ株式会社 | Circuit connection material and method of manufacturing semiconductor device using the same |
| DE102020116531A1 (en) * | 2020-06-23 | 2021-12-23 | Preh Gmbh | Input device with movable handle on a capacitive detection surface and capacitive coupling devices |
-
1996
- 1996-04-10 JP JP8814796A patent/JP3596572B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09283566A (en) | 1997-10-31 |
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