JP3231832B2 - Semiconductor disk using flash memory as storage medium - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor disk using a flash memory as a storage medium, and more particularly to a method for extending the life of a semiconductor disk.

[0002]

2. Description of the Related Art Conventionally, as a medium of a semiconductor disk, D
RAM and SRAM are used. DRAM or S
A semiconductor disk using a RAM is faster than a magnetic disk and can be easily reduced in size. However,
Both DRAM and SRAM are volatile memories and need battery backup. DRAM requires memory refresh, which complicates control.
M has low power consumption but is not popular because it is expensive. However, when a flash memory is used as a storage medium for a semiconductor disk, a battery backup is unnecessary because it is a non-volatile memory, and since the structure is simple and the chip area can be smaller than that of a DRAM, it can be mass-produced and inexpensive. It is expected as a storage medium.

[0003]

In a flash memory, data can be read in small data units such as bytes or words in the same manner as in a DRAM or SRAM. However, the number of times of rewriting is limited. The unit is a block unit such as 512 bytes, and the number of rewrites is reduced.

In addition, data must be erased before rewriting due to its structure. For this reason, some flash memories have a command processing function such as erasing.

However, when a flash memory is used as a storage medium for a semiconductor disk, the most problematic is the limitation on the number of rewrites. For example, an area such as a directory or a FAT area has a larger number of rewrites than other areas, so that only a specific block of the flash memory used for the directory or the FAT area may exceed the limit of the number of rewrites of the flash memory. high. Therefore, even if only a specific block becomes abnormal, all the semiconductor disks cannot be used, and the reliability is low.

An object of the present invention is to extend the life of a semiconductor disk using a flash memory as a storage medium.

[0007]

To achieve the above object, in a semiconductor disk using a flash memory as a storage medium, the flash memory has a data memory area for storing data and an error in the data memory. An alternative memory area for replacing an area, and an error memory area having, as error information, an address of an alternative memory of the data memory in which the error has occurred among the data memories, wherein the data memory area, the alternative memory area, and the error memory area And a memory controller for reading from and writing to the memory.

[0008]

In a semiconductor disk using a flash memory as a storage medium, a memory controller reads error information in an error memory area. Next, according to the error information, reading or writing is performed to the data memory area when the data memory area is normal, and to the alternative memory area when the data memory area is abnormal. If an error occurs at the time of writing, an empty area in the alternative memory area is searched for, data is written to the empty area, and the error information of the memory area where the error matches is updated.

[0009]

FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a semiconductor disk which is connected to a host bus 3 of a host system 2. The semiconductor disk 1 includes a microcomputer 4, a memory controller 5, a buffer memory 6, an error memory 7, and a data memory 8. Buffer memory 6
Is the data to be written to the data memory 8 and the error memory 7,
Alternatively, an SRAM that temporarily stores read data and that is easy to read and write is used. Data memory 8 is 2
It has 16 M-byte flash memories. Therefore, the storage capacity of the semiconductor disk is 32 Mbytes.
The error memory 7 uses a 512-kbyte flash memory and stores error information of the data memory 8 and data of a block of the data memory 8 in which an error has occurred. It is assumed that both the data memory 8 and the error memory 7 perform writing in 512-byte blocks. Microcomputer 4
Receives an instruction from the host bus 3 and controls the memory controller 5 according to the instruction. The memory controller 5 reads and writes the buffer memory 6, error memory 7, and data memory 8 at address 9, data 10,
Control is performed using the control signal 11. The error memory 7
Since the data memory 8 also needs to be erased, this is also controlled.

FIG. 2 shows an example of a memory map of the error memory 7. The areas are an error information area 71 and a use information area 7
2. It is composed of three areas of the alternative memory area 73. These areas need to be divided according to the write block boundaries. The error information area 71 is an area for storing error information corresponding to each block of the data memory 8, and the error information is represented by FFFFh when there is no error in the block,
In the case of an error, it indicates the block number of the alternative memory to be replaced. The usage information area 72 is an area for storing usage information corresponding to each replacement block of the replacement memory area 73. One bit of usage information is allocated to each substitute block. When the substitute block is used as a substitute, it is represented by 1; when not used, it is represented by 0. An empty block in the alternative memory area 73 can be found by searching for a 0 bit in this area. The replacement memory area 73 is the data memory 8
Is an area for replacing the block in which the error has occurred, and is composed of 512-byte blocks similar to the data memory 8, and each block is sequentially numbered from address 20,000h.

Next, the operation of the semiconductor disk 1 of this embodiment will be described. First, it is assumed that a file data read command is received from the host bus 3. In this case, first, the microcomputer 4 processes this command, but the control content differs depending on how the command is given. For example, when the allocation information of the file data to be read is given by a sector number or a track number similarly to a magnetic disk or the like, it needs to be converted into a physical address of the data memory 8. In this example, the allocation information from the host bus 3 is a block number of the data memory 8 for simplification. The block number corresponds to the upper bits of the physical address. FIG. 3 shows a processing procedure at the time of reading by the microcomputer 4.
First, at 100, the error information of the block number given from the host bus 3 is read from the error information area 71 of the error memory 7. For example, when reading block 1, address 00002h of error memory 7 and block 2 are 00
The error information at address 004h is read. Next, whether or not the block is normal is checked from the error information read in 101. In the case of reading the block 1, the error information is FFFFh, so that the block 1 is normal, and in the case of the block 2, the error information is 0000h, which means that the error is abnormal. If the data is normal as in the block 1, in step 102, 512-byte data is read from the block 1 of the data memory 8 and transferred to the host bus 3. In the case of an abnormal block such as the block 2, 512 bytes of data are read from the replacement block 0 of the replacement memory area 73 indicated by 0000h of the error information in 103 and transferred to the host bus 3. Here, the reading of the error memory 7 and the data memory 8 and the data transfer to the host bus 3 are performed by the memory controller 5 under the control of the microcomputer. The operation of reading file data in this way reads error information before reading a target block and checks whether the target block is normal. Block of the data memory 8 if normal, alternative memory area 73 if abnormal
To read the alternative block.

Next, a case where a file data write command is received from the host bus 3 will be described. FIG. 4 shows a processing procedure of the microcomputer 4 at the time of writing. First, the microcomputer 4 transfers the file data provided from the host bus 3 to the buffer memory 6 in 200. This is performed to reduce the waiting time of the host system 2 because writing to the flash memory takes longer time than reading. Next, in 201, the error information of the block number to be written is stored in the error information area 7 of the error memory 7.
Read from 1. Error information is checked at 202 as in the case of reading. For example, since the error information of the block 1 is FFFFh, it is a normal block, and the error information of the block 2 is 0000h, which is an abnormal block. When writing the file data to the block 1, since the writing is to a normal block, the data of the block 1 of the data memory 8 is erased at 203 and the file data stored in the buffer memory 6 is written to the block 1 of the data memory 8 at 204. Write. In the case of writing to the block 2, since the block 2 of the data memory 8 is abnormal, the data of the replacement block 0 of the replacement memory area 73 represented by the error information value 0000h is deleted at 205,
At 206, the file data of the buffer memory 6 is written to the substitute block 0. Next, at 207, it is checked whether writing to the data memory 8 or the error memory 7 has been performed normally. A writing error occurs in a flash memory when writing frequently occurs only in a specific block and the number of times of rewriting of the flash memory exceeds a limit. If normal writing has been performed in the check at 207, the processing of the file data write command from the host bus 3 ends. On the other hand, if the writing cannot be performed normally in this check, the error information is updated and a substitute block is allocated according to the procedure of 208.

FIG. 5 shows the procedure of error processing. First, 2
At 09, the use information in the use information area 72 of the error memory 7 is read, and at 210, an unused substitute block is searched from the use information. In FIG. 2, it can be seen that the 0th to 3rd bits are 1 and are in use, and the 4th bit, that is, the replacement block 4 is not used. Therefore, the replacement of the block in which the write error has occurred is performed in the replacement block 4. Therefore, the data of the substitute block 4 is erased in 211,
At 212, the file data of the buffer memory 6 is written to the substitute block 4. Next, in 213, the block in the error information area 71 in which the error information of the block in which the write error has occurred is stored.
Transfer to Then, at 214, the buffer memory 6
Is rewritten with new error information. For example, in the case of a write error of block 1, 000
FFFFh at the address 02h is rewritten to the block number 0004h of the substitute block 4. Then, at 215, the data of the block requiring rewriting of the error information area 71 is erased, and at 216, the data of the buffer memory 6 is written to the original block of the error information area 71. Similarly, in 217, the block in the use information area 72 is transferred to the buffer memory 6, and in 218, the bit of the substitute block which is newly used as a substitute this time is rewritten to 1.
Then, after erasing the data of the block of the use information area 72 at 219, the data of the buffer memory 6 is written to the block of the use information area 72 at 220. With the above error processing procedure, the error block is replaced with the substitute block and the error information is updated.

In this embodiment, only the writing check is performed in 207, but it may be added in the processing following the erasing of 203 and 205 whether or not the erasing has been performed normally. Also in this case, the error processing at 208 is performed.

In this embodiment, the error memory 7 is provided with the replacement memory area 73 and the error information area 71, but may be provided as individual memory chips. Conversely, an error information area and an alternative memory area may be provided in the data memory 8. FIG. 6 shows a configuration diagram in this case. In FIG. 6, unlike FIG. 1, the error memory 7 is not required, so that the number of chips can be reduced.

FIG. 7 shows an example of a memory map of the data memory 8 in the embodiment of FIG. As shown in FIG. 7, the data memory 8 is divided into four areas: an initialization information area 81, an error information area 82, an alternative memory area 83, and a data area 84.
The replacement memory area 83 is an area that replaces an errored block in the data area 84. The error information area 82 is address information of each block in the data area 84, or the address of a replacement block if a block in the data area 82 has an error. Store the information. Here, the address information indicates the upper bits of the physical address of the data memory 8 or the physical block number. The initialization information area 81 is the substitute memory area 8
3, and an area for storing the start address and capacity of the error information area 82 and the data area 84, and also stores the address information of the unused alternative memory. The user can freely set the size of the substitute memory area 83 by setting the initialization information area 81 when the semiconductor disk is initialized.

Next, the operation of this embodiment will be described. First,
FIG. 8 shows a processing procedure of the microcomputer 4 when a read command is received from the host bus 3. It is assumed that a block number of the data area 84 is given from the host bus 3. At first,
The microcomputer 4 reads the error information from the error information area 82 at 300. The address of the error information is obtained by calculating from the error information start address of the initialization information area 81 and the block number given from the host bus 3. For example, when the block number to be read is 0, the address of the error information is 20 which is 512 times the error information start address 0001.
0h is the first address. Next, in 301, 30
The physical block corresponding to the error information read at 0 is read. If the block number to be read is 0, the error information is 200h, so the data area 8 is obtained by multiplying 200h by 512.
Read from address 4 at 4000h. If the block number to be read is 2, the error information is 100h, so that the error information is read from the address 2000h in the alternative memory area 83. As described above, in this embodiment, the error information directly represents the physical address of the data memory, and therefore, unlike the embodiment of FIG. 3, there is an advantage that the error check process of 101 is not required.

Next, a case where a write command is received from the host bus 3 will be described. FIG. 9 shows a processing procedure at the time of writing. First, at 400, data provided from the host bus 3 is written to the buffer memory 6. Next, the error information of the block to be written is read from the error information area 82 in the same manner as when reading. Then, at 402, the physical address of the block to be written is calculated from the error information read out, and the data of the block at the physical address is erased. Then, in 403, the write data stored in the buffer memory 6 is written to the block of the data memory 8 indicated by the physical address calculated in 402. Then write 4
At 04, it is checked whether the writing of 403 has been performed normally. If the writing is normal, the writing process ends, but if the writing is not normal, error processing at 405 is performed. In the error processing 405, a substitute block of the block in which the write error has occurred is secured, the write data is transferred to the substitute block, and the error information and the initialization information are updated. First, at 406, an alternative memory unused address is read from the initialization information area 81. The value of the substitute memory unused address indicates the address of the new substitute block. Next, in 407, the data of the block indicated by the substitute memory unused address is erased. 104h in the example of FIG.
Is erased, and the block at address 20800h is erased. Next, at 408, the write data of the buffer memory 6 is written to the block at address 208h. Next, 409
The data of the block of the error information in which the write error has occurred is read from the error information area 82 and transferred to the buffer memory 6. The transferred error information is updated at 410 with new error information. For example, in the case of a write error in block 0, the error information 200h of block 0 is updated to the address information 104 of the new alternative block.
Rewrite to h. Next, at 411, the data of the block of the error information area 82 to be rewritten is erased, and
, The updated error information in the buffer memory 6 is written to a block in which the error information area 82 is rewritten.
Next, in order to update the substitute block unused address in the initialization information area 81, first, in 413, the data in the initialization information area 81 is transferred to the buffer memory 6. Then, the value of the substitute memory unused address in the initialization information transferred in 414 is incremented by one. This value becomes the address information of a new substitute block when a write error occurs next time. Next, at 415, the initialization information area 8
1 is erased, and at 416 the buffer memory 6
Is written in the initialization information area 81. Writing and error processing are performed according to the above procedure.

In this embodiment, only one alternative memory area 83 and one data area 84 are provided. However, by adding new address information and capacity to the initialization information area, a plurality of alternative memory areas 83 and data area 84 are stored. The region 84 may be provided.

As described above, in a semiconductor disk using a flash memory as a storage medium, an error due to a limitation on the number of rewrites of the flash memory can be relieved, so that the life of the semiconductor disk can be extended.

Next, the alternative memory areas 73 and 83 and the error information areas 71 and 82 in the embodiment of FIGS.
A method for determining the capacity of the storage device will be described.

First, the capacity of the alternative memory areas 73 and 83 depends on how many blocks of the data memory 8 are used as areas where the host system 2 rewrites most frequently, for example, FAT and directory areas. In this example, it is assumed that the data memory 8 uses 128 kB as the FAT and directory area out of 32 MB. In this case, the alternative memory areas 73 and 83 have three times 128 kB,
With a capacity of 384 kB, even if all of the FAT and the directory area become erroneous, replacement can be performed three times, so that the life of the semiconductor disk 1 is quadrupled.

Accordingly, when it is desired to extend the life of the silicon disk 1 by n times, the replacement memory areas 73 and 83 need to have a capacity of n-1 times the capacity of the frequently rewritten area of the data memory 8. In the case of the embodiment shown in FIG. 7, the service life is doubled because 128 kB is used as the substitute memory area 83. Generally, since rewriting is not frequently performed in all of the FAT and the directory area, the life is expected to be further extended.
It is considered as a standard of the capacity of 83.

Next, the capacity of the error information areas 71 and 82 will be described. In the case of the embodiment of FIG.
3 is required for the number of blocks in the data memory 8 to store each block number. That is, in this example, the replacement memory area 73 has 768 blocks (384 kB) and the data memory 8 has 64 k blocks (32 MB).
At least 80 kB is required for a capacity for storing 64 k pieces of 10-bit address information representing the following.

In the case of the embodiment shown in FIG.
Requires an area for storing the block number of the alternative memory area 83 or the data area 84 by the number of blocks of the data area 84. In this example, 256 blocks are assigned to the substitute memory area 83 and 65024 blocks are assigned to the data area 84, so that 16-bit information indicating the block number is assigned to 650.
A storage capacity for 24 units is required.

Use information area 72 and initialization information area 8
1 allocates the remaining capacity.

When each of these areas is divided, it is convenient to divide it into blocks which are rewriting units of the flash memory.

As described above, according to the present invention, the life of the semiconductor disk 1 can be extended by using a capacity of 2% or less of the total capacity of the flash memory for the error information areas 71 and 82 and the alternative memory areas 73 and 83. It is possible to make it twice or more. In order to further extend the life, if the capacity of the alternative memory areas 73 and 83 is increased, the life is extended correspondingly.

Next, the interface between the host system 2 and the semiconductor disk 1 will be supplementarily described. The host system 2 is an information processing device such as a personal computer or a word processor, and the host bus 3 is a bus for connecting the host system 2 to a file device such as a magnetic disk. Generally, the host bus 3 for connecting a magnetic disk has a SCSI or IDE interface. When the semiconductor disk 1 of the present invention is connected to the host bus 3 such as a SCSI or IDE interface similarly to the magnetic disk, the transfer from the magnetic disk or the like to the semiconductor disk 1 can be easily performed.

In order to connect the semiconductor disk 1 to a SCSI or IDE interface, it is necessary to use the same interface as a magnetic disk. For that purpose, first, it is necessary to make the block size of the flash memory correspond to the sector of the magnetic disk. In this embodiment, the block size is set to 512 bytes, which is in accordance with the sector size of the magnetic disk. When the block size is smaller than the sector size of the magnetic disk, there is no problem if a plurality of blocks are used as one sector, but when the block size is larger, the blocks need to be divided into several sector sizes and used. In addition, what corresponds to the track or head of the magnetic disk may be obtained by logically allocating the flash memory to the track or head. In addition, the interfaces such as control registers and interrupts are made identical, and the semiconductor disk 1 is controlled by a magnetic disk input / output command given from the host bus 3. However, it is necessary to replace a command unique to a magnetic disk, for example, a process such as control of a motor, with another process.

Table 1 below shows an example of a command to the magnetic disk and a process of the magnetic disk for the command, and a process of the semiconductor disk 1 when the command of the magnetic disk is diverted to the semiconductor disk 1 as it is. is there.

[0032]

[Table 1]

This is an example of the IDE interface. In Table 1, No. 1 and No. Reference numeral 6 denotes a head movement command, but since the semiconductor disk 1 has no head, this process is not performed. Further, since the flash memory has a much lower error rate than the magnetic disk, there is no need to provide an ECC. Therefore, Read Verify S
The vector instruction does not perform any processing. Other instructions are shown in Table 1.
It is as shown in FIG.

Further, even if the processing is not performed in Table 1, when an interruption or the like occurs on the magnetic disk, the interruption is also issued on the semiconductor disk 1 in the same manner. That is, the interface is set so that there is no distinction between the magnetic disk and the semiconductor disk 1 when viewed from the host bus 3.

As described above, by making the interface of the magnetic disk and the interface of the semiconductor disk 1 the same, it is easy to replace the magnetic disk with the semiconductor disk 1.

ID for SCSI interface
If the same interface as the magnetic disk is used as in the case of the E interface, replacement can be easily performed. But,
Since the SCSI interface can be connected to other devices such as a magneto-optical disk in addition to the magnetic disk, the file system has its own instruction system, and the semiconductor disk 1 also has a dedicated instruction system for useless processing. And speeding up. However, it has basically the same instruction system as a magnetic disk, but does not have a motor control command or the like. In this case, the block size of the flash memory may be any number of bytes, and one block of the flash memory may be processed as one sector. The processing of the microcomputer 4 shown in the embodiment of FIGS. 1 and 6 and the processing of the flowcharts of FIGS. 3, 4, 5, 8, and 9 may be performed by the host system 2.

Although the standard IC card interface specifications include JEIDA and PCMCIA, the semiconductor disk 1 of the present invention may be formed into an IC card, and the semiconductor file 1 may be constructed with the interface conforming to JEIDA or PCMCIA. In this case, the semiconductor disk 1 is handled as an IO device.

The semiconductor disk 1 is compared with the magnetic disk.
Advantageously, as shown in Table 1, the processing of the semiconductor disk 1 requires less processing than that of the magnetic disk, so that high-speed operation can be performed, and since there is no mechanical part such as a motor, power consumption is low. In addition, it has shock resistance against vibrations and the like, and does not require ECC because of high reliability.

The flash memory is used as a storage medium because it is non-volatile and retains data even when the power is turned off, does not require a battery backup like an SRAM or a DRAM, and has a simpler structure than an EEPROM. This is because there is an advantage that the capacity can be easily increased, and mass production can be performed at a low cost.

In the present invention, the flash memory is divided into a plurality of areas, and a plurality of data memory areas for storing data and provided in correspondence with the above-mentioned areas are provided. A plurality of alternative memory areas which are provided in correspondence with the above areas instead of the areas; a plurality of error memory areas which store error information of the data memory areas and are provided in correspondence with the above areas; An initialization information area for storing a start address and a capacity may be provided. According to this, when a new flash memory is added to expand the storage capacity, three new memory areas can be newly added without changing the contents stored in the error memory area and the data memory area. , Can be expanded. What is necessary is just to store the information of the expanded memory in the initialization information area.

Further, in the present invention, the error memory area may have error information of an alternative memory area where an error has occurred. In this way, the error can be further relieved not only in the data memory area but also in the case where an error occurs in the replacement memory area which has once replaced the data memory area. An alternative method may be the same as when an error occurs in the data memory area. By replacing the alternative memory area, the life can be extended.

In the present invention, the capacity of the substitute memory area may be a predetermined part of the data memory area. As a method for selecting an area, an area in which rewriting is most frequently performed may be selected.
Then, if there are few alternative areas, the life can be significantly extended.

[0043]

According to the present invention, in a semiconductor disk using a flash memory as a storage medium, the life of the semiconductor disk can be extended.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a semiconductor disk and a host system according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a memory map of an error memory 7;

FIG. 3 is a flowchart of the microcomputer 4 at the time of reading.

FIG. 4 is a flowchart of the microcomputer 4 during writing.

FIG. 5 is a flowchart when an error occurs in the microcomputer 4;

FIG. 6 is a configuration diagram of a semiconductor disk and a host system according to another embodiment of the present invention.

FIG. 7 is an explanatory diagram of a memory map of a data memory 8 according to another embodiment of the present invention.

FIG. 8 is a flowchart of a microcomputer 4 according to another embodiment at the time of reading.

FIG. 9 is a flowchart of the microcomputer 4 according to another embodiment at the time of writing.

[Explanation of symbols]

 1. . . Semiconductor disk 2. . . Host system 3. . . Host bus 4. . . Microcomputer 5. . . Memory controller 6. . . Buffer memory 7. . . Error memory 8. . . Data memory 71. . . Error information area 72. . . Usage information area 73. . . Alternative memory area 81. . . Initialization information area 82. . . Error information area 83. . . Alternative memory area 84. . . Data area

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yoshihiro Hayashi 7-1-1, Higashi-Narashino, Narashino-shi, Chiba Hitachi, Ltd. Office System Design and Development Center (72) Inventor Takashi Tsunehiro Yoshida, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture 292 Hitachi, Ltd. Microelectronics Equipment Development Laboratory, Hitachi, Ltd. (72) Inventor Takeshi Furuno 4-6 Kanda Surugadai, Chiyoda-ku, Tokyo Hitachi, Ltd. (56) References JP 1-251372 (JP, A) Japanese Patent Laid-Open No. 3-127116 (JP, A) Japanese Patent Laid-Open No. 1-292455 (JP, A) Fujio Masuzoka, 256 Kbit EEPROM aiming at replacement of ultraviolet-erasable EPROM With the addition of an erase gate to the EPROM, Nikkei Electronics, Nikkei McGraw-Hill, 19 85, 7-29, No. 374, 195-209 (58) Field surveyed (Int. Cl. ⁷ , DB name) G06F 3/08

Claims (10)

(57) [Claims] 1. A semiconductor disk using a flash memory as a storage medium, wherein the flash memory includes a predetermined data memory area as an area for storing data, and an error area of the data memory. There are a predetermined replacement memory area as a replacement area and a predetermined error memory area as an area for storing an address of a replacement memory replacing the data memory area in which an error has occurred. A semiconductor disk having a memory controller for reading from and writing to the data memory area , the alternative memory area , and the error memory area. 2. A semiconductor disk of claim 1, wherein the error memory area, a semiconductor disk, characterized in that the address of the alternate memory area generated in error, further stores. 3. A semiconductor disk according to claim 1 or 2, wherein, the usage of the error memory area, alternate memory area
A semiconductor disk further storing information to be indicated . 4. An error memory area and a data memory area
And a method for reading and writing data on a semiconductor disk having an alternative memory area , wherein the data memory area is normal from the error memory area.
Or read-error information indicating abnormality and whether, by the error information, the data memory area when the data memory area is normal, when abnormalities have line out or writing reading alternate memory area, in a write operation, error is is generated, the alternative searching an empty area in the memory area, writes the data into the free area, reading out and writing process and updates the error information of the data memory area in error. 5. A semiconductor disk using a flash memory as a storage medium, comprising a memory controller for reading and writing to the flash memory, wherein the flash memory is predetermined as an area for storing data. A predetermined replacement memory area as an area for replacing the data memory area having an error and a data memory area having an error, and a predetermined area as an area for storing error information of the data memory area. 1. A semiconductor disk comprising: an error memory area; and an initialization information area for storing a start address and capacity of each area. 6. A semiconductor disk using a flash memory as a storage medium, comprising a memory controller for reading and writing to the flash memory, wherein the flash memory is divided into a plurality of areas and stores data. A plurality of data memory areas provided corresponding to the above-mentioned area, and a plurality of alternative memory areas provided corresponding to the above-mentioned area, which substitute for the data memory area in which an error has occurred; A semiconductor device, comprising: a plurality of error memory regions provided for a plurality of error memory regions provided in correspondence with the above-mentioned regions, and an initialization information region for storing a start address and a capacity of each region; disk. 7. The semiconductor disk according to claim 5, wherein the capacities of the data memory area and the substitute memory area are variable. 8. The semiconductor disk according to claim 5 , wherein the error memory area also has error information of an alternative memory area in which an error has occurred. 9. The method of claim 1 , 2 , 3 , 5 , 6, 7, or 8.
The semiconductor disk, wherein the alternate memory area, the semiconductor disc, which is a region of part of the data memory area. 10. A semiconductor disk using a flash memory as a storage medium, comprising: a controller, wherein the flash memory is divided into first, second, and third areas; A semiconductor disk, which determines which of the second area and the third area to access data by reading data.