JP3185814B2 - Waveform storage device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is suitable for, for example, storing a measured signal waveform for a long time and finding partial characteristics from the stored data. The present invention relates to a waveform storage device. 2. Description of the Related Art For example, in various systems, when an apparatus stops abnormally due to noise, it is necessary to analyze the noise that caused the abnormal stop. A storage device is used. That is, the signal waveform of each part of the system is taken into a waveform storage device, and the waveform is displayed on a display for analysis. In this case, it is preferable that the waveform can be displayed at high speed in order to efficiently perform the analysis operation.
Therefore, conventionally, when a long-term signal waveform to be analyzed is stored in a waveform storage device, the stored data is read out at a high speed when the stored data is read out and displayed on a display. A technique for compressing and displaying a compressed image is known. In this case, as a compression method, there are a method of forming display data by thinning data, and a method of obtaining a maximum value and a minimum value for each of a plurality of data and arranging them in order. . However, in the case of a waveform device for compressing and displaying stored data for high-speed display as described above, the waveform device has the following disadvantages. It is not suitable for extracting and analyzing some features of the input signal waveform. That is, in the case of a method of performing data thinning as a compression method, for example, even if spike-like noise is present in the input signal waveform, it may not appear in the display waveform due to the thinning. With this compression method, it is only possible to grasp the trend of the stored input signal waveform from the displayed waveform. In the case of a method of arranging the maximum value and the minimum value of data in order as a compression method, usually, about 1 k word or 2 k word is displayed for the purpose of compressing and monitoring the display. It is fixed to the data display without flicker, and for the purpose of extracting only a part of the signal to be analyzed, such as when detecting the position of spike noise etc. from the stored data and conducting detailed examination Not suitable for [0008] Further, the maximum value of the data as a compression method,
In the case of the method of arranging the minimum value in order, in the part where the data tends to gradually increase, the data is arranged in the order of minimum value data → maximum value data, and in the part where the data gradually decreases, the maximum value data is used. → The display was also easy to see by arranging in the order of the minimum value data.However, this method is also a display that is easy to see, and only a part of the input signal waveform is extracted and detailed characteristics of the waveform are extracted. Not suitable for consideration. For this reason, conventionally, all of the measurement data read from a waveform storage device having a memory capacity of several M words is transferred to a computer via an interface such as GP-IB. Then, a part of the measurement data is taken out and analyzed by the computer. However, in this case, since all of the measurement data from the memory is transferred to the computer, some of the necessary information can be effectively stored due to the data transfer speed of the interface and the limitation of the memory capacity of the computer. The removal could not be performed. In view of the above, it is an object of the present invention to provide a waveform storage device capable of searching a partial characteristic of input waveform data at high speed. [0012] In order to solve the above problems, a waveform storage device according to the present invention comprises an A / D converter for converting input waveform data into a digital signal, and an A / D converter. A first memory circuit for storing the digital waveform data of the first memory circuit, and N pieces of data (M> N) read out of all M pieces of data of the first memory circuit.
≧ 2) For each data, the maximum value , the minimum value and the maximum value
Second storing a detection circuit that detect the difference, the maximum value of each of the N data detected by the detecting circuit, the difference between the minimum value and the minimum value and the maximum value of the minimum value Of the memory circuit and the setting input of the value of N by the user
Means for receiving user input for receiving
For every N data received through the attachment means,
The read out data from the first memory circuit, to the means for supplying before danger detection circuit that read data, comprising: a. In the above-structured waveform storage device according to the present invention, the user sets the waveform through the user input receiving means.
A maximum value, a minimum value , and a difference between the maximum value and the minimum value are obtained for each of the determined N pieces of data, and are stored in the second memory circuit. The data from the second memory circuit can be used for analysis. The number of data N can be arbitrarily set by the user. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a waveform storage device according to the present invention and a method for searching for a characteristic of a waveform using the waveform storage device will be described with reference to the drawings. FIG. 1 shows an example of the configuration of a waveform feature search system including an embodiment of a waveform storage device according to the present invention. In FIG. 1, reference numeral 10 denotes a waveform storage device, which is an input terminal 1, an A / D converter 2, a first memory circuit 3, a maximum / minimum value detection circuit 4, and a second It includes a memory circuit 5, a CPU (microcomputer) 6, a key input device 7, and an output terminal 8. The CPU 6 of the waveform storage device 10 is connected to an external computer, for example, a personal computer 12 via a GP-IB interface 11, and exchanges data and control signals between the waveform storage device 10 and the personal computer 12. It has been like that. In the waveform storage device 10, an input waveform signal to be searched through the input terminal 1 is input to the A / D converter 2.
Is converted into a digital signal. Then, this digital signal is written and stored in the first memory circuit 3 having a large capacity of, for example, about 4 M words, under the write control of the CPU 6. By the key input operation of the key input device 7, the CPU 6 is set to obtain the maximum value and the minimum value for each of N data, for example, N = ²ⁿ data, as described later. In this case, as information set by key input, for example, a read start point indicating from which position of the first memory circuit 3 data is to be read, and a data number N as a unit for obtaining a maximum value and a minimum value are determined. The value of the above n, and the like. When the maximum value and the minimum value are determined for each of the N data, the input waveform data from the first memory circuit 3 is read from the read start point under the control of the CPU 6. They are sequentially read out and supplied to the maximum / minimum value detection circuit 4. The maximum value / minimum value detection circuit 4 obtains the maximum value MAX and the minimum value MIN and the difference DIF between the maximum value and the minimum value for each of the N data input thereto. Then, the obtained maximum value MAX, minimum value MIN, and difference DIF for each of the N data are written and stored in the second memory circuit 5 under the control of the CPU 6. The maximum value / minimum value detection circuit 4 and the write circuit of the second memory circuit 5 can be configured as shown in FIG. 2 as an example. That is, the waveform data DA read from the first memory circuit 3 is supplied to one input terminal A of the first comparison circuit 21 and the other input terminal of the second comparison circuit 22 B. The waveform data DA is also supplied to a first register 29 for holding a maximum value, and is also supplied to a second register 30 for holding a minimum value. These registers 29 and 30 latch input data when a pulse is supplied to the latch terminal LT. The output data of the register 29 is the first
And the output data of the register 30 is supplied to one input terminal A of the second comparison circuit 22. Comparison circuits 21 and 22
Represents the data value supplied to the input terminal A as SA,
When the data value supplied to the input terminal B is SB,
When A> SB, one pulse P1 and one pulse P2 are output. Output pulses P1 and P2 of these comparison circuits 21 and 22 are supplied to AND gates 24 and 26, respectively. A data clock CLK synchronized with the waveform data DA is supplied to AND gates 23, 24, 25 and 26. Further, from the CPU 6, the set read start point and the delimiter pulse INIT generated every N pieces of input waveform data DA from this start point.
Is supplied to the AND gates 23 and 25. For this reason, one pulse is obtained from the AND gates 23 and 24 for every N data from the read start point, and this pulse is supplied to the registers 29 and 30 via the OR gates 27 and 28 as its latch pulse. You. Therefore, the registers 29 and 30 always latch the input waveform data DA at the head of every N data. When the input waveform data is larger than the latch data of the register 29, the output pulse P1 is generated from the first comparison circuit 21. The output pulse P1 is supplied to the register via the OR gate 27. 29 is supplied as a latch pulse. Therefore, register 29
Is rewritten to input waveform data having a value larger than the latch data of the register 29 up to that time. As described above, since the latch data of the register 29 is forcibly rewritten to the input data at each head of the N data DAs, the latch data of the register 29 immediately before the rewriting is input to the input data. It is the maximum value of the N pieces of data. The maximum value MAX for each of the N pieces of data in the register 29 is sequentially written to the second memory circuit 5. That is, the data clock CLK is supplied to the 1 / N frequency dividing circuit 31, from which the pulse WC is obtained immediately before the (N + 1) th input data from the delimiter pulse INIT, and supplied to the write address counter 32. The address specified by the write address counter 32 is stored in the register 29 at the time of the pulse WC.
, Ie, the maximum value MAX of the N input waveform data DA before the pulse WC is written. When the input waveform data is smaller than the latch data of the register 30 up to that point, an output pulse P2 is generated from the second comparison circuit 22, and this pulse P2 is supplied to the register via the OR gate 28. 30 is supplied as a latch pulse. Therefore, register 30
Is rewritten to input waveform data having a value smaller than the latch data of the register 30 up to that time. Then, as described above, the latch data of the register 30 is forcibly rewritten to the input data at each head of the N data DAs. It is the minimum value MIN of the N data. The minimum value MIN of every N data of the register 30 is stored in the second memory circuit 5 together with the maximum value MAX of every N data from the register 29. In this example, the output data MAX of the register 29 and the output data MIN of the register 30
Is supplied to the subtraction circuit 33, and the difference DIF (= M
AX-MIN), and the difference DIF is also stored in the second memory circuit 5 along with the maximum value MAX and the minimum value MIN.
Is stored. The maximum value MAX, the minimum value MIN, and the difference DIF stored in the second memory circuit 5 are supplied to the personal computer 12 via the CPU 6 and the GP-IB interface 11. Then, the personal computer 12 performs a partial feature search such as a search for spike noise in the waveform of the input signal stored in the first memory circuit 3 by displaying the data on a display or the like. . In this case, the analysis is performed by appropriately changing the reading start point of the setting information by the key input device 7 and the value of the data number N. For example, when the input signal waveform is searched finely, the value of N is small, and when the search is rough, the value of N is large. Since the maximum value, the minimum value, and the difference between them are obtained and used for analysis in arbitrary N data units of the input waveform, partial characteristics can be easily grasped. In the case of this example, the waveform data from the first memory circuit 3 is transferred to the CPU 6 and the GP-
The data in the first memory circuit 3 can be directly analyzed by transferring the data to the personal computer 12 via the IB interface 11. In this example described above, the first memory circuit 3 transfers data from the CPU 6 to the personal computer 12 via the GP-IB interface 11.
Not all of the input waveform data of the second memory circuit 5
Value, minimum value, and difference DI for each of N data stored in
F, and the transfer data amount may be small. Therefore, G
The data processing can be performed at high speed without using a particularly high-speed P-IB interface and without using a large-capacity high-speed memory in the personal computer 12, and the waveform search can be quickly performed. It can be carried out. In the above example, the difference DIF is not essential, and only the maximum value MAX and the minimum value MIN
A partial feature search of a waveform can be performed. But,
When the difference DIF is added to the maximum value MAX and the minimum value MIN, there is an advantage that occurrence of abnormal noise such as spike noise can be detected more easily. The setting information such as the reading start point and the number of unit data N can be input to the CPU 6 from the personal computer 12 via the GP-IB interface 11 instead of from the key input device 7. In the above example, the data from the waveform storage device according to the present invention is analyzed by a personal computer. However, for example, the waveform storage device according to the present invention is applied to a digital oscilloscope and built in, and is displayed on its display. , The maximum value MAX, the minimum value MIN, DI
By displaying F, it is possible to analyze the input signal waveform only with the digital oscilloscope. As described above, according to the waveform storage device of the present invention, the maximum value of the waveform data stored in the first memory circuit can be set for every N data which can be set arbitrarily. The minimum value is obtained and stored in the second memory circuit. Since the maximum value and the minimum value from the second memory circuit are used for the waveform feature search, the number of data to be searched is small, and the waveform feature of the portion to be focused on at high speed can be found. Can be put out. In addition, since all the waveform data of the input signal remains in the first memory circuit, the search is performed as necessary, such as changing the number of unit data for obtaining the maximum value and the minimum value and performing a search again. It can be done over and over again. The maximum value MAX and the minimum value MIN
In addition to the above, when the difference DIF is stored, there is an advantage that the occurrence of abnormal noise such as spike noise can be more easily detected by using the difference DIF for analysis.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of a waveform feature search system including an embodiment of a waveform storage device according to the present invention. FIG. 2 is a block diagram of an embodiment of a main part of FIG. 1; [Description of Signs] 1 Input terminal 2 A / D converter 3 First memory circuit 4 Maximum / minimum value detection circuit 5 Second memory circuit 6 CPU 29 Maximum value holding register 30 Minimum value holding register 33 Subtractor

Continuation of the front page (56) References JP-A-61-262668 (JP, A) JP-A-2-134572 (JP, A) JP-A-3-18764 (JP, A) JP-A-4-15071 (JP, A) , U) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 13/00-13/42 G11C 27/00

Claims (1)

(57) [A claim] A / D for converting input waveform data into a digital signal
A first memory circuit that stores the digital waveform data from the A / D converter; and N (M> N) data read out of all M data in the first memory circuit. ≧ 2) for each data of the maximum value, minimum value and a detection circuit that detect <br/> the difference between the minimum value and the maximum value, the N data every detected by the detection circuit And a second memory circuit for storing a maximum value, a minimum value, and a difference between the maximum value and the minimum value, for receiving an input of setting of the value of N by a user.
User input receiving means, and N received through the user input receiving means
Number of each data, said first read data from the memory circuit, a waveform memory device including means for providing prior danger detection circuit and the readout data.