JP3033805B2 - Method of forming via hole in thick film IC - Google Patents
Method of forming via hole in thick film ICInfo
- Publication number
- JP3033805B2 JP3033805B2 JP23370893A JP23370893A JP3033805B2 JP 3033805 B2 JP3033805 B2 JP 3033805B2 JP 23370893 A JP23370893 A JP 23370893A JP 23370893 A JP23370893 A JP 23370893A JP 3033805 B2 JP3033805 B2 JP 3033805B2
- Authority
- JP
- Japan
- Prior art keywords
- via hole
- forming
- film
- frame
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本考案は厚膜ＩＣのバイアホール
の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a via hole in a thick film IC.
【０００２】[0002]
【従来の技術】従来、スクリーン印刷によって基板上に
多層配線回路を形成する場合は、図３（Ａ）に示すよう
に、基板１上に下部導体膜２を形成し、次に図３（Ｂ）
に示すように上部導体膜５との連結部分となるバイアホ
ール３となる部分以外の部分に絶縁膜４を形成し、図３
（Ｃ）に示すように、前記バイアホール３に図示しない
導体を埋設し、その上に上部導体膜５を形成していた。
しかしながら、上記の方法においては、絶縁膜４を形成
する際に、絶縁ペーストの粘度が小さいためにバイアホ
ール３の内部に絶縁ペーストが流れこんでバイアホール
３を埋めてしまったり、バイアホール３の穴径を狭くし
てしまうなどの問題をもつものであった。Conventionally, when forming a multilayer wiring circuit on a substrate by screen printing, as shown in FIG. 3 (A), to form a lower conductor film 2 on the substrate 1, and then FIG. 3 (B )
As shown in FIG. 3 , an insulating film 4 is formed in a portion other than a portion serving as a via hole 3 serving as a connecting portion with an upper conductor film 5, and
As shown in (C), not shown in the via hole 3
The conductor is buried, and the upper conductor film 5 is formed thereon.
However, in the above method, when the insulating film 4 is formed, since the viscosity of the insulating paste is small, the insulating paste flows into the via hole 3 to fill the via hole 3, or the via hole 3 is not filled. There was a problem that the hole diameter was reduced.
【０００３】[0003]
【発明が解決しようとする課題】本発明は、上記の問題
を解決するためバイアホールの内部に絶縁ペーストが流
れこまず、バイアホールの穴径が狭くならない厚膜ＩＣ
のバイアホールの形成方法を提供することにある。SUMMARY OF THE INVENTION According to the present invention , there is provided a thick film IC in which an insulating paste does not flow into a via hole and the hole diameter of the via hole is not reduced.
And a method of forming a via hole.
【０００４】[0004]
【課題を解決するための手段】本発明は上述の課題を解
決するため、基板の上に下部導体膜を形成し、次にバイ
アホールとなる部分の外周部に枠状の絶縁パターンを形
成し、次に前記枠状の絶縁パターンと、この枠状の絶縁
パターンによって囲まれたバイアホール部以外の部分に
絶縁膜を形成した後、バイアホールに導体を埋設し、こ
の上に上部導体を形成するようにした。 According to the present invention, in order to solve the above-mentioned problems, a lower conductive film is formed on a substrate, and a frame-shaped insulating pattern is formed on an outer peripheral portion of a portion to be a via hole. And then the frame-shaped insulation pattern and the frame-shaped insulation
In areas other than via holes surrounded by patterns
After forming the insulating film , a conductor was buried in the via hole, and an upper conductor was formed thereon .
【０００５】[0005]
【作用】以上のように構成したので、本発明によるバイ
アホールの形成方法においては、基板の上に下部導体膜
を形成し、次に、バイアホールとなる部分の外周部に予
めマドとなる枠状の絶縁パターンを形成し、その後に前
記絶縁パターンと、同絶縁パターンによって囲まれたバ
イアホール部以外の部分に絶縁膜を形成するようにした
ので、このような部分的に印刷したペーストが通過でき
る程度の小さな枠状の絶縁パターンが存在する場合は、
その後に形成する絶縁膜に、ニジミやダレの発生する率
は小さくなり、バイアホールに与える影響は少なくなる
のでバイアホールが絶縁ペーストによって埋まらなくな
る。With the above construction, in the method of forming a via hole according to the present invention , the lower conductor film is formed on the substrate.
Is formed and then, to form a frame-shaped insulating pattern to be pre <br/> Me Mado the outer periphery of the portion to be the via holes, then before
The insulation pattern and the bus surrounded by the insulation pattern
Insulation film is formed on the part other than the ear hole part.
So, if there is a small frame-shaped insulating pattern that can pass such a partially printed paste,
The rate of occurrence of bleeding and sagging in the insulating film formed thereafter is reduced, and the influence on the via hole is reduced, so that the via hole is not filled with the insulating paste.
【０００６】[0006]
【実施例】以下図面に基づいて本発明による厚膜ＩＣの
バイアホールの形成方法を詳細に説明する。 図１は本
発明における厚膜ＩＣのバイアホールの形成方法により
形成したバイアホールの構造を示す要部平断面図、図２
は本発明における厚膜ＩＣのバイアホールの形成方法に
より形成したバイアホールの構造を示す要部側断面図で
ある。 図に示すように基板１の上にスクリーン印刷によ
って下部導体膜２を形成し、次にスクリーン印刷によっ
てバイアホール３となる部分の外周部にマドとなる枠状
の絶縁パターン６を形成し、次にこの枠状の絶縁パター
ン６と、この枠状の絶縁パターン６によって囲まれたバ
イアホール３部以外の部分にスクリーン印刷によって絶
縁膜４を形成する。次に、このようにして形成した前記
バイアホール３に導体を埋設し、その上にスクリーン印
刷によって上部導体膜５を形成する。BRIEF DESCRIPTION OF THE DRAWINGS FIG.
A method for forming a via hole will be described in detail. Figure 1 is a book
According to the method of forming a via hole of a thick film IC in the invention
FIG. 2 is a cross-sectional plan view of a main part showing the structure of the formed via hole.
Describes a method for forming a via hole of a thick film IC in the present invention.
FIG. 5 is a side sectional view showing a main part of a via hole structure formed from
is there. Forming a lower conductive layer 2 by screen printing on the substrate 1 as shown in FIG next frame shape made of a window to the outer periphery of the portion to be the via-holes 3 by screen printing
Is formed, and then the frame-shaped insulating pattern is formed.
And down 6, surrounded by the frame-shaped insulating pattern 6 bar
Absolute by screen printing in a portion other than Iahoru 3
An edge film 4 is formed. Next, the thus formed
A conductor is buried in the via hole 3, and an upper conductor film 5 is formed thereon by screen printing.
【０００７】このようにすれば、従来の絶縁膜のペース
トが前記バイアホール内にニジミ出ようとしても、前記
マドとなる枠状の絶縁パターンによって、これを阻止
し、バイアホールの内部が埋まることを防止できる。以
下に上記のバイアホールの形成方法と従来のバイアホー
ルの形成方法とを比較する。厚膜ＩＣのスクリーン印刷
は、従来のバイアホールの形成方法のように、バイアホ
ールのように部分的に印刷しない部分が存在する場合に
は、メッシュが基板に密着し、過多の印刷ペーストが転
写されると、前記バイアホールのような印刷しない部分
に前記印刷ペーストが拡散する。この拡散する量は膜厚
が厚いほど印刷ペーストのダレ性も加わって多くなる
が、本発明における枠状の絶縁パターンのように部分的
に小さなパターンを印刷する場合は、印刷ペーストのニ
ジミやダレの発生する率は小さくバイアホールに与える
影響は少なくなる。この枠状の絶縁パターンの周囲に同
じスクリーン印刷によって絶縁膜４を形成した場合は、
この枠状の絶縁パターンにより印刷ペーストの拡散を防
ぐことができる。 従って、従来の技術ではバイアホール
を小さくすると（特に200 ×200 ミクロン以下）バイア
ホールの周辺部分からの絶縁ペーストのニジミが多くな
り、このためバイアホールが埋もれてしまうようなこと
があったのでバイアホールの大きさとして300 ×300 ミ
クロン以下が標準とされていたが、本発明の技術のよう
に、前記マドとなる枠状の絶縁パターンを印刷する場合
は、150 ×150 ないしは200 ×200 ミクロンのバイアホ
ールを形成することができ、従来の１／２以下の大きさ
のバイアホールが形成可能となる。In this way, even if the paste of the conventional insulating film tries to bleed into the via hole, the paste is prevented by the frame-shaped insulating pattern serving as the pad, and the inside of the via hole is buried. Can be prevented. Less than
Below, the method of forming the via hole and the conventional via hole
The method is compared with the method of forming a screw . In the screen printing of a thick film IC, when there is a part that is not printed partially like a via hole as in the conventional method of forming a via hole, the mesh adheres to the substrate and excessive printing paste is transferred. Then, the printing paste is diffused into a non-printing portion such as the via hole . The amount of diffusion increases as the film thickness increases, due to the dripping property of the printing paste.
However, as in the frame-shaped insulating pattern of the present invention,
When a small pattern is printed, the rate of occurrence of bleeding or sagging of the printing paste is small, and the influence on the via hole is reduced. Around the frame-shaped insulating pattern.
When the insulating film 4 is formed by the same screen printing,
This frame-shaped insulating pattern prevents the diffusion of the printing paste.
Can be passed. Therefore, in the prior art, when the via hole is reduced (especially, 200 × 200 μm or less), the bleeding of the insulating paste from the peripheral portion of the via hole increases, and the via hole may be buried. Although 300 × 300 microns or less have been a standard as the size of the hole, as in the technique of the present invention
In the case of printing a frame-shaped insulating pattern serving as a pad, a via hole of 150 × 150 or 200 × 200 μm can be formed, and a via hole having a size smaller than half of a conventional one can be formed. Becomes
【０００８】[0008]
【発明の効果】以上に説明したように、本発明によるバ
イアホールの形成方法によれば、バイアホールの内部に
絶縁ペーストが流れこまず、バイアホールの穴径が狭く
ならないので、従来の１／２以下の大きさのバイアホー
ルを形成することが可能となるという効果がある。As described above, the battery according to the present invention is used.
According to the method for forming the via hole, the insulating paste does not flow into the via hole, and the hole diameter of the via hole does not become narrow. Therefore, it is possible to form a via hole having a size smaller than half the conventional size. This has the effect.
【図１】本発明による厚膜ＩＣのバイアホールの形成方
法により形成したバイアホールの構造を示す要部平断面
図である。 FIG. 1 shows a method of forming a via hole of a thick film IC according to the present invention .
Principal section showing the structure of a via hole formed by the method
FIG.
【図２】本発明による厚膜ＩＣのバイアホールの形成方
法により形成したバイアホールの構造を示す要部側断面
図である。 FIG. 2 shows a method of forming a via hole of a thick film IC according to the present invention .
Side cross section showing the structure of via hole formed by the method
FIG.
【図３】従来の厚膜ＩＣのバイアホールの形成方法を示
す一部分解要部側断面図である。 FIG. 3 shows a method of forming a via hole of a conventional thick film IC .
FIG.
１ 基板 ２ 下部導体膜 ３ バイアホール ４ 絶縁膜 ５ 上部導体膜 ６ 枠状の絶縁パターン DESCRIPTION OF SYMBOLS 1 Substrate 2 Lower conductor film 3 Via hole 4 Insulation film 5 Upper conductor film 6 Frame-shaped insulation pattern
Claims (1)
導体膜上にバイアホールを有する絶縁膜を形成し、前記
バイアホールに導体を埋設し、この上に上部導体パター
ンを形成する厚膜ＩＣのバイアホールの形成方法におい
て、前記下部導体膜上に前記バイアホールとなる部分の
外周部に枠状の絶縁パターンを形成し、その後に前記枠
状の絶縁パターンと、同枠状の絶縁パターンによって囲
まれたバイアホール部以外の部分に絶縁膜を形成するよ
うにしたことを特徴とする厚膜ＩＣのバイアホールの形
成方法。1. A method of forming a lower conductor film on a substrate, forming an insulating film having a via hole on the lower conductor film, embedding a conductor in the via hole, and forming an upper conductor pattern thereon. In the method for forming a via hole of a film IC, a portion to be the via hole on the lower conductor film is formed .
Forming a frame-like insulating pattern on the outer periphery, then the frame
A method for forming a via hole of a thick film IC, wherein an insulating film is formed in a portion other than the via hole portion surrounded by the frame-shaped insulating pattern and the frame-shaped insulating pattern .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23370893A JP3033805B2 (en) | 1993-09-20 | 1993-09-20 | Method of forming via hole in thick film IC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23370893A JP3033805B2 (en) | 1993-09-20 | 1993-09-20 | Method of forming via hole in thick film IC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0794676A JPH0794676A (en) | 1995-04-07 |
| JP3033805B2 true JP3033805B2 (en) | 2000-04-17 |
Family
ID=16959311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23370893A Expired - Fee Related JP3033805B2 (en) | 1993-09-20 | 1993-09-20 | Method of forming via hole in thick film IC |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3033805B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8180188B2 (en) | 2000-03-16 | 2012-05-15 | Steyphi Services De Llc | Multimode planar waveguide spectral filter |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7615481B2 (en) * | 2006-11-17 | 2009-11-10 | Ricoh Company, Ltd. | Method of manufacturing multilevel interconnect structure and multilevel interconnect structure |
-
1993
- 1993-09-20 JP JP23370893A patent/JP3033805B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8180188B2 (en) | 2000-03-16 | 2012-05-15 | Steyphi Services De Llc | Multimode planar waveguide spectral filter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0794676A (en) | 1995-04-07 |
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