JP3009079B2 - Satellite communication control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a satellite communication control device, and more particularly to a satellite communication control device used for data communication by satellite communication.

[0002]

2. Description of the Related Art Data communication between computers by satellite communication has been conventionally performed, which is excellent in multi-access, broadcasting, and network expandability.

[0003] The data communication by the satellite communication is generally performed by occupying a specific band and channel of a digital satellite communication line by a communication satellite.

[0004]

It is preferable to perform data communication by occupying a specific band and channel of a digital satellite communication line by a communication satellite in order to perform efficient broadcast transmission by utilizing the characteristics of satellite communication. In this case, however, renting a transponder of a communication satellite, securing a specific band of a digital satellite communication line, exclusive use of a channel, and renting a large amount of money are required.

[0005] In this case, a transmitting device, a receiving device, a scrambler, a descrambler, and the like dedicated to data communication are required, so that the communication system becomes large and expensive.

[0006] For this reason, the satellite communication using a digital satellite communication line by the communication satellite, the data communication between small computers general user uses, become what communication cost is high, the cost It is not something that is adopted at all.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in data communication between computers by satellite communication, and does not occupy a specific band and channel of a digital satellite communication line by communication satellites. It is another object of the present invention to provide a satellite communication control device that enables data communication between computers by satellite communication without requiring a large-scale device.

[0008]

In order to achieve the above-mentioned object, a satellite communication control apparatus according to the present invention employs
Ethernet frames transferred from the
Ethernet frame capture means to capture
Ethernet captured by the Ethernet frame capture means
HDLC flag and destination in net frame
Address and frame check sequence.
Frame forming hand for forming HDLC frame
And the step formed by the HDLC frame forming means.
Error correction coding for error correction coding of HDLC frames
Means and an error correcting code by the error correcting coding means.
Multiplexing the added HDLC frame as one packet
A transmission frame that forms a transmission frame consisting of a number of packets
Formed by the frame forming means and the transmission frame forming means.
Output means for outputting the transmitted transmission frame to an independent data portion in a frame of a satellite broadcast PCM audio signal of a satellite broadcast scrambler.

In order to achieve the above object, in the satellite communication control apparatus according to the present invention, an error which forms a frame of a satellite broadcast PCM audio signal output from a satellite broadcast descrambler is described. Correction coding
Independent data that captures independent data for each packet
Capture means and a packet by this independent data capture means.
Error-correction coded independent data
Error correction means for correcting errors in
The independent data corrected by the correct means
HDLC frame formation in order to form HDLC frame
Means and the HDLC frame forming means
HDLC frame, HD
Nation address and frame check sequence
Information field that captures information field data except
Field data acquisition means and the information field acquisition means
From the information field data captured in the step
Frame forming means for forming an Ethernet frame
And the Ethernet generated by this Ethernet forming means
Output means for outputting the net frame to the local machine .

[0010]

According to the above arrangement, the QPSK-FM (T
V) Data communication between computers using the independent data portion of the frame of the satellite broadcast PCM signal by the satellite broadcast as in the data format is performed without affecting the existing video and audio satellite broadcasts and coexisting with the satellite broadcasts. Will be Further, a data transmission error is prevented by a scrambler and a descrambler, and an error correction code is added to the transmission data, and an error correction of the reception data is performed on the receiving side by the error correction code.

[0011]

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 1 shows an example of the overall configuration of a satellite communication system using a satellite communication control device according to the present invention.
A transmitting station 1 for satellite broadcasting modulates and amplifies a signal to transmit a broadcast radio wave by a subcarrier system (QPSK) to a transmitting antenna 3.
The signal is output to a broadcasting satellite 5 (or a satellite broadcasting communication satellite) such as BS or CS. The transmitting station 1 is provided with a general-purpose scrambler 7 for transmitting satellite broadcasting that performs interleaving and error correction coding. It is connected. A video / audio output device 9 for satellite broadcasting and a satellite communication control device 11 for data communication are connected to the scrambler 7, and the satellite communication control device 11 is controlled by a LAN (local area network) transmission line 13 such as Ethernet. It is connected to a workstation 15 as a machine.

The transmitting station 1 has the functions of modulation, frequency conversion and amplification, and the video / audio output device 9 is a broadcast facility owned by a broadcaster.

Tuners 17 for receiving a plurality of satellite broadcasts distributed over a wide area on the earth are generally commercially available home-use satellite broadcast tuners, and are transmitted from a transmitting station 1 in a subcarrier system (QPSK). Radio wave by the receiving antenna 19
To receive the data. The tuner 17 is connected with a general-purpose descrambler 21 for receiving satellite broadcasting for performing deinterleaving and error correction. The descrambler 21 is connected to a video / audio reproducing device 23 for satellite broadcasting and a satellite communication control device for data communication. At least one of the devices 25 is connected.

The video / audio reproduction device 23 is a generally used home television and audio device.

The satellite communication control device 25 is a LAN server machine via a LAN transmission line 27 such as Ethernet, and is connected to a workstation 29 which is a local machine in the whole communication system. A plurality of workstations 31 as client machines are connected to the LAN transmission path 27.

Each workstation 29 as a local machine is communicably connected to a workstation 15 or a workstation 35 as a host machine via a terrestrial communication network 33 such as an ISDN, DDX-P, or a dedicated line for p. A response such as a transmission error by a satellite communication line is made by the ground communication network 33.

LAN on data transmission side and data reception side
May be, for example, Ethernet which is CSMA / CD. In this case, a LAN transmission frame (LAN frame) is an Ethernet frame as shown in FIG. The Ethernet frame includes an 8-byte preamble as an Ethernet synchronization flag, a 6-byte destination address indicating a partner station, a 6-byte source address indicating a local station, a 2-byte type field, and 46 to 1500 bytes. It has a data field and a frame check sequence in order.

FIG. 2 shows a specific configuration example of the satellite communication control device 11 for transmission. The satellite communication control device 11 includes an Ethernet transceiver 37 for connecting to the LAN transmission line 13 by Ethernet, an Ethernet serial communication controller 39, a local area network controller (hereinafter, LAN controller) 41,
A CPU 43 containing an AM controller, a high-level data link controller (hereinafter, HDLC controller) 45, an SRAM 47 as a working memory, a ROM 49 in which a program for transmission control is written,
It has an error correction coding circuit 51 and a frame creation circuit 53 for satellite communication.

Ethernet serial communication controller 3
Numeral 9 monitors carrier collisions in Ethernet so that the satellite communication control device 11 functions as one node in the local area network.

The LAN controller 41 is configured to receive an Ethernet frame from the Ethernet serial communication controller 39.

The CPU 43 controls data transfer between the LAN controller 41 and the SRAM 47 and data transfer between the SRAM 47 and the HDLC controller 45 by a built-in DMA controller.
The LAN controller 41 transfers the data obtained by removing the preamble and the frame check sequence from the Ethernet frame to the SRAM 47 to the SRAM 47.
7, the data is transferred to the HDLC controller 45.

The HDLC controller 45 has a general H
DLC controller LSI, SRAM4
7 is written in its entirety into the information field as it is, and a flag, a destination address, and a frame check sequence are added to the information field to add a high-level data link frame (FIG. 4B). Hereinafter, an HDLC frame is generated, and the HDLC frame is output to the error correction coding circuit 51.

In the satellite broadcasting, it takes a long time to transmit, and since this satellite communication is one-way 1: N communication, a retransmission request is not made. In the link, the number management is unnecessary, so that the control field in the HDLC frame may be omitted.

The error correction coding circuit 51 has a
For error correction (FEC), the input data is encoded by, for example, a (272, 190) shortened difference set cyclic code, and the encoded data, that is, the data with the error correction code is a frame. The data is output to the creation circuit 53.

A frame creation circuit 53 creates a transmission frame by adding a synchronization signal to the input data with error correction code, and outputs this to the independent data input terminal of the satellite broadcast PCM audio signal frame of the scrambler 7. It is supposed to.

As shown in FIG. 5, the transmission frame created by the frame creation circuit 53 has 11 packets as one frame, and is placed at the beginning of the frame so that error correction can be easily performed on the receiving side. Synchronization signal SY and control bit C
(Unused).

Each packet has a head H # and a data DA
TA # and an error correction code unit FEC #, and the packet length is set to 228 bits. In this case, the head portion H # is not used and may be all "0".

In satellite television broadcasting, sound is transmitted through a digital channel of a subcarrier system (four-phase QPSK). In this digital channel, a satellite broadcasting PCM sound signal is transmitted as shown in FIG.
It is multiplexed into an 8-bit frame, the frame frequency is set to 1 kHz, and the digital transmission speed is set to 2028 kbit / sec. The frame of the PCM audio signal includes a frame synchronization encoding section FS at the head, a frame control encoding section FC for controlling a transmission mode, a range encoding section RB, an audio channel section VC, an independent data section ID, an error correction code, Since the range code is composed of 8 bits per audio channel, the range code is 32 bits in the A mode and 16 bits in the B mode.

The information that can be transmitted by this frame is A
4 channels of audio (quantized 14/10 bit quasi-instantaneous companding, sampling frequency 32 kHz) in mode, 2 channels of audio (quantized 16 bit straight line, sampling frequency 48 kHz) in B mode, independent data part ID Are 480 bits in the A mode and 224 bits in the B mode. Here, the data signal can be transmitted independently of the voice.
Is an unused channel which is not generally used because it is used in some teletext broadcasting.

The satellite broadcast communication device according to the present invention is an adapter for performing data communication between computers by effectively utilizing the independent data portion ID which is a free channel in a frame of a satellite broadcast PCM audio signal.

The CPU 43 has a parallel port unit 57.
A dip switch 59 and a numerical display LED driver 61 are connected to the parallel port section 57, and a numerical display L is connected to the numerical display LED driver 61.
The ED 63 is connected.

The dip switch 59 is used for setting a service identification code, and is connected to the C
The PU 43 is directly accessed. The setting of the service identification code by the dip switch 59 can be performed over a plurality of times.

The service identification code read by the CPU 43 is set in the destination address register of the HDLC controller 45,
5 is written to the destination address of the HDLC frame. CPU 43
Is transferred to the numeral display LED driver 61, and the value is displayed on the numeral display LED 63.

As described above, the service identification code is inserted in the destination address of the HDLC frame in place of the destination address, and the destination address of the HDLC frame is not used as the address information field because it is included in the information field of the HDLC frame. This is because the Ethernet frame has a destination address, which is used as address information.

The setting of the service identification code can be performed by data transfer from the workstation 15.

The service identification code includes electronic catalog information, new product information, product sales information, housing information, stock information,
It may indicate the type of information service such as ticket reservation information, travel guidance information, news, and electronic conference.

The service identification code includes a management information code, which is used for information transmitted from the transmitting station to all the receiving stations simultaneously for system management. The management information for management includes data transmission suspension due to trouble occurrence, data transmission restart due to recovery, and the like. In the management information, there is a command that all the receiving stations can send a response signal to the transmission by the terrestrial communication network 33 so that the transmitting station checks the number of receiving stations. The transmitting station can detect the transmission error rate by checking the number of receiving stations, and this check may be performed periodically.

FIG. 3 shows a specific example of the configuration of the satellite communication control device 25 for reception. Satellite communication control unit 25, de
A serial / parallel converter 65 which receives serial independent data with an error correction code from the independent data input terminal of the frame of the satellite broadcast PCM audio signal of the scrambler 21 and converts this into parallel for each predetermined bit; A buffer memory 67 for taking in parallel data from the parallel converter 65, a parallel / serial converter 69 for converting the parallel data from the buffer memory 67 to serial data for each packet, and an input signal to the serial / parallel converter 65 are monitored. A synchronization signal detection circuit 71 for detecting a synchronization signal and a synchronization signal detection circuit 7
1, a clock generator 73 for generating timing clocks for the serial / parallel converter 65 and the parallel / serial converter 69 based on the detection of the synchronization signal by the FEC circuits 75 and 77, the SRAM 79,
81, FIFO memories 83 and 85 for parallel input / serial output, HDLC controller 87, and FIFO
A clock generation circuit 89 for generating operation clocks for the O memories 83 and 85 and the HDLC controller 87;
A CPU 91 with a built-in M controller, an SRAM 93 as a working memory, a ROM 95 in which a program for reception control is written, and a LAN controller 97
, An Ethernet serial communication controller 99, an Ethernet transceiver 101, and an input / output interface transceiver 105 for connecting a control terminal 103 for setting various parameters and monitoring status.

The FEC circuits 75 and 77 alternately take in the serial data output from the parallel / serial converter 69 one packet at a time, and store them in the SRAM 7 associated with each packet.
9 and 81, error correction is performed based on the error correction code therein, and the data after error correction is stored in SRAMs 79 and 81.
The data is input to the FIFO memories 83 and 85.

The HDLC controller 87 has a general H
It is configured by a DLC controller LSI, and is configured to input error-corrected data in the form of an HDLC frame from the FIFO memories 83 and 85 in the order of packet numbers.

The CPU 43 has an HDLC controller 87 and an SRAM 93 by a built-in DMA controller.
And the data transfer between the SRAM 93 and the LAN controller 97. Only the data of the information field of the HDLC frame is transferred from the HDLC controller 87 to the SRAM 93, and the data is transferred from the SRAM 93. The data is transferred to the LAN controller 97.

The LAN controller 97 has an SRAM 93
A preamble and a frame check sequence are added to the transferred data to generate an Ethernet frame as described above, and the Ethernet frame is output to the Ethernet serial communication controller 99.

Ethernet serial communication controller 9
Reference numeral 9 indicates that the satellite communication control device 25 monitors carrier collision in Ethernet so that the satellite communication control device 25 functions as one node in the LAN, encodes the data into Manchester code, and transfers the data to the Ethernet transceiver 101. ing.

A parallel port section 111 is connected to the CPU 91. The parallel port section 111 has a dip switch 113, an LED driver 115, and a numerical display LE.
D driver 117 is connected, and LED driver 1
LED 15 for normal operation display and transmission error occurrence display
119 is connected, and the LED driver 11 for displaying numbers is
7 is connected to a number display LED 121.

The dip switch 113 is used for setting the transfer rate and parity of the input / output interface for connecting the control terminal 103 and for setting the service identification code.
91 is directly accessed. The setting of the service identification code by the dip switch 113 can be performed over a plurality.

The service identification code read by the CPU 91 is set in the destination address register of the HDLC controller 87, and the LED for displaying a number is displayed.
The value is transferred to the driver 117, and the value is displayed on the numeric display LED1.
21 is displayed.

As described above, the service identification code is set in the destination address register of the HDLC controller instead of the destination address, so that the HDLC controller 87 stores the service identification code written in the destination address of the HDLC frame. Then, only the HDLC frame in which the same service identification code as the set service identification code is written at the destination address is processed.

In the data transmission, the destination address, the source address, and the type field of the Ethernet frame input from the workstation 15 to the LAN controller 41 via the LAN transmission line 13, the Ethernet transceiver 37, and the Ethernet serial communication controller 39 are input. And the data field
S by the DMA controller built in the CPU 43
The data is sequentially transferred to the RAM 47.

Next, the CPU 43 writes the currently set service identification code into the destination address register of the HDLC controller 45, and the data held in the SRAM 47 by the DMA controller 51, ie, the destination address and the source address of the Ethernet frame. The type field and the data field are sequentially transferred to the HDLC controller 45.

The HDLC controller 45 has an SRAM 4
7, a HDLC flag is added to the beginning of the data, a destination address in which the service identification code written in the destination address register is written, and a CR is added to the end of the data.
An HDLC frame is generated by adding a frame check sequence such as C and an HDLC flag. If there is no transmission data, the HDLC controller 45 sets “1”.
Is output.

This HDLC frame is sent to the error correction encoding circuit 51 as transmission data. The error correction encoding circuit 51 performs forward error correction (FEC).
For this purpose, the input data is encoded by a cyclic code, and the data with the error correction code output by the error correction coding circuit 51 is output to the frame creation circuit 53 and is shown in FIG. As described above, the signal is framed with a synchronization signal added thereto, and is input to the independent data input terminal of the frame of the satellite broadcast PCM audio signal of the scrambler 7 in synchronization with the transfer clock from the scrambler 7.

The data input to the independent data input terminal of the frame of the satellite broadcast PCM audio signal of the scrambler 7 is reduced as the data of the independent data portion of the frame of the satellite broadcast PCM audio signal by a continuous transmission error in a burst form. For this purpose, interleaving is performed, and error correction coding is further performed. Thereafter, the signal is output from the transmitting station 1 to the broadcasting satellite 5 as a broadcast wave.

In data reception, the descrambler 2
1, the data of the independent data portion of the frame of the satellite broadcast PCM audio signal corrected by the deinterleaving and error correction processing is input from the descrambler 21 to the serial / parallel converter 65 in synchronization with the transfer clock of the descrambler 21. Is done. The data input to the serial / parallel converter 65 is based on a frame as shown in FIG. 5, and has an error correction code by FEC. The data with the error correction code is a serial / parallel converter. The data is parallel-converted by a predetermined bit, for example, every 8 bits by 65, and is input to the data buffer 67. The data in the data buffer 67 is output to the parallel / serial converter 69, serial-converted for each packet, and input to the FEC circuit 75 or 77.

The reason why two FEC circuits are provided in parallel with each other is to perform parallel operation because it takes time for error correction, and therefore, the parallel / serial converter 69 is used.
The input of more data to the FEC circuit is performed alternately by the FEC circuits 75 and 77 for each packet.

The FEC circuits 75 and 77 expand the input data in packet units in the SRAMs 79 and 81, respectively, and perform error correction based on the error correction code therein. Therefore, when error correction by the descramble 21 is included, double error correction is performed at the time of data reception.
Thereby, data transmission errors are reduced as much as possible.

In the case of video and audio, even if there is a slight data error, there is no practical problem. However, in data communication between computers, even a single bit is not allowed to cause a transmission error. As described above, it is useful in data communication between computers to perform double error correction and reduce data transmission errors as much as possible during data reception, and by performing original error correction, It is also useful for security.

Each of the FEC circuits 75 and 77 performs error correction, develops the corrected data in another memory area of the SRAMs 79 and 81, and interrupts the CPU 91.

The CPU 91 determines whether error correction has been performed normally or not by looking at the internal registers of the FEC circuits 75 and 77. Perform the process of discarding on the spot. On the other hand, those for which error correction has been performed normally are input from the SRAMs 79 and 81 to the FIFO memories 83 and 85. And the FIFO memory 83,
Data input to HDLC 85 is in HDLC order
It is input to the controller 87.

The data input by the HDLC controller 87 is based on the HDLC frame. The HDLC controller 87 first stores the service identification code described in the destination address of the input HDLC frame in the destination address register of the HDLC controller 87. It is determined whether or not the service identification code matches the written service identification code. If the service identification code does not match, the data acquisition is stopped and the data is discarded. If the service identification codes match, only the data in the information field of the HDLC frame is transferred from the HDLC controller 87 to the SRAM 93 by the DMA controller of the CPU 91.
Transferred to

At this time, a transmission error is detected by the frame check sequence of the HDLC frame. If a transmission error is detected, the data in the information field is discarded and the data is not transferred to the SRAM 93.

When a transmission error occurs, the time and frequency of occurrence of the transmission error are recorded in the SRAM 93, which can be monitored and counted by the control terminal 103 or the work station 29.

When the data of the information field of the HDLC frame is transferred from the HDLC controller 87 to the SRAM 93, the data of the information field is transferred from the SRAM 93 to the LAN controller 97 by the DMA controller of the CPU 91.

The LAN controller 97 has an SRAM 93
A preamble is added to the head of the data, and a frame check sequence such as CRC is added to the end of the data to generate an Ethernet frame, which is transferred to the serial communication controller 99. The serial communication controller 99 encodes the received data into Manchester code, and
Transfer to 1. The Ethernet transceiver 101 converts it from the TTL level to the Ethernet electrical level and sends it out to the LAN transmission line 27.

As described above, data for which error correction cannot be performed is discarded.
Some of the data input to the HDLC controller 87 will be missing. In this case, the HDLC controller 87 detects a format error or a transmission error by error detection using an error detection code in the FCS field, identifies data loss, invalidates the frame, and discards the entire frame data. . Of course, the data discarded in this manner is not transferred to the workstation 29 as an Ethernet frame.

In this case, the workstation 29
Since frame loss is detected by a higher-level communication protocol such as CP / IP, a request for retransmission of a discarded frame can be made to the workstation 15 by the terrestrial communication network 33.

When the workstation 15 receives the retransmission request, the workstation 15 can retransmit the frame to the workstation 29 via the satellite communication line or the terrestrial communication network 33.

In the system configuration diagram shown in FIG. 1, what is connected to the terrestrial communication network 33 on the receiving side is as follows.
There is only the workstation 29 as a server machine, which normally receives data from the satellite communication control device 25 and transmits the data to the workstation 1 on the transmitting side.
A retransmission request is made to 5 or 35. Workstation 31 which is a client machine is workstation 2
The transmission data is used by accessing the storage device of No. 9 or copying files and data from the storage device. Therefore, the workstation 31 does not directly receive data from the satellite communication control device 25.

In the satellite communication as described above, HDLC
Since frames are used, satellite communication is a mere transmission path, and data is dripped as it is.Even if it is difficult to distinguish between when transmission data exists and when it does not exist, the existence of transmission data is determined by the receiving side. Easily detected by
It is not necessary to generate useless operation and traffic on the receiving side. Also, by using HDLC frames,
A transmission error can be detected by the error detection code at the final stage on the receiving side.

As described above, the HDL is transmitted on the data transmitting side.
By writing the service identification code indicating the type of the information service in the destination address field of the C frame, data of different services can be transmitted simultaneously from one transmission workstation 15. When there are a plurality of transmitting stations, data having a unique service identification code from each transmitting station can be transmitted by using a satellite channel in a time-division manner. Also, the data receiving side identifies the service identification code written in the destination address field of the HDLC frame, and fetches and processes only the frame to which the specific service identification code has been added, so that only the necessary reception data is stored in the local area. The transfer to the network 29 can be performed, so that the traffic volume of the local area network is not unnecessarily increased.

[0072]

As can be understood from the above description, according to the satellite communication control apparatus of the present invention, the QPSK-FM (T
V) Data communication between computers using the independent data portion of the frame of the satellite broadcast PCM signal by the satellite broadcast as in the data format is performed without affecting the existing video and audio satellite broadcasts and coexisting with the satellite broadcasts. As a result, data communication between computers by satellite communication becomes possible without occupying a specific band and channel of a digital satellite communication line by a communication satellite and without requiring a large-scale device.
Further, a data transmission error is prevented by a scrambler and a descrambler, and an error correction code is added to the transmission data. The reception side corrects the error of the reception data by the error correction code. Error correction is performed, data transmission errors are reduced as much as possible, and the reliability of data communication between computers is improved.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an example of the overall configuration of a communication system using a satellite communication control device according to the present invention.

FIG. 2 is a block diagram showing a specific configuration example of a satellite communication control device according to the present invention.

FIG. 3 is a block diagram showing a specific configuration example of a satellite communication control device according to the present invention.

FIG. 4 is an explanatory diagram showing a frame configuration of Ethernet and HDLC used in the satellite communication control device according to the present invention.

FIG. 5 is an explanatory diagram showing a transmission frame configuration used in the satellite communication control device according to the present invention.

FIG. 6 is an explanatory diagram showing a frame configuration of a satellite broadcast PCM audio signal in a QPSK-FM (TV) format data format.

[Explanation of symbols]

 Reference Signs List 1 transmitting station 5 broadcast satellite 7 scrambler 9 video / audio output device 11 satellite communication control device 15 workstation 17 tuner 21 descrambler 23 video / audio reproduction device 25 satellite communication control device 29 workstation 31 workstation 33 terrestrial communication network 45 HDLC controller 51 Error correction coding circuit 75 FEC circuit 77 FEC circuit 87 HDLC controller

Continuation of the front page (56) References JP-A-62-131636 (JP, A) JP-A-64-89878 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04B 7 / 14-7/22

Claims (2)

(57) [Claims] (1)Ether transferred from the host machine
Ethernet frame capture to capture net frames
Means, Captured by this Ethernet frame capture means
HDLC flag and disable
Nation address and frame check sequence
HDLC frame that forms an HDLC frame by adding
Means for forming a HDL formed by this HDLC frame forming means
Error correction encoding means for error correction encoding a C frame
When, The error correction code is added by this error correction coding means.
HDLC frame ToMultiple packets as one packet
Frame formation to form a transmission frame consisting of packets
Means, The transmission frame formed by this transmission frame forming means is
 Scrambler for satellite broadcasting PCM audio signal of satellite broadcasting
Independent data section in frameToOutputOutput means andTo
A satellite communication control device comprising: 2. An output from a descrambler for satellite broadcasting.
Of PCM audio signal of satellite broadcastFrom this frame
The error-correction-coded independent data that makes up the
Independent data capture means to capture for each unit, This independent data capture means captures each packet
Error correction for coded independent data
Error correction means for performing correctness; The independent data corrected by the error correcting means.
In an HDLC frame in packet order.
Frame forming means; HDL formed by this HDLC frame forming means
From frame C, HDLC flag, destination
Address and frame check sequence
Information field data that captures information field data
Data acquisition means, The information file captured by this information field capturing means
Field data to form an Ethernet frame
A sanet frame forming means, The Ethernet generated by this Ethernet forming means
Local frame Output means for outputting to the machine With
A satellite communication control device.