JP3045122B2 - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereofInfo
- Publication number
- JP3045122B2 JP3045122B2 JP9304931A JP30493197A JP3045122B2 JP 3045122 B2 JP3045122 B2 JP 3045122B2 JP 9304931 A JP9304931 A JP 9304931A JP 30493197 A JP30493197 A JP 30493197A JP 3045122 B2 JP3045122 B2 JP 3045122B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- back surface
- suction
- suction head
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 114
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000000034 method Methods 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 7
- 230000003746 surface roughness Effects 0.000 claims description 7
- 229910003460 diamond Inorganic materials 0.000 claims description 5
- 239000010432 diamond Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 238000006073 displacement reaction Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000007788 roughening Methods 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000010835 comparative analysis Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/75301—Bonding head
- H01L2224/75302—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
Landscapes
- Wire Bonding (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置に関
し、特に狭ピッチの電極を有する半導体素子を配線基板
に搭載する半導体装置及びその製造方法の技術に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a semiconductor element having narrow pitch electrodes is mounted on a wiring board and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】従来の技術を、図５〜図８を参照して説
明する。まず、半導体素子１を吸着ヘッド２で収納トレ
ー３より吸着を行う。その後、半導体素子１をチャック
４等により位置規正を行う。その後、半導体素子１の認
識用マークと配線基板５の認識用マークを画像認識装置
６で各々画像処理を行う。その後、半導体素子１と配線
基板５の位置補正後、半導体素子１上の突起電極７と配
線基板５上の導体配線８を合致させ、半導体素子１を配
線基板５上に搭載を行うものである。2. Description of the Related Art A conventional technique will be described with reference to FIGS. First, the semiconductor element 1 is suctioned from the storage tray 3 by the suction head 2. Thereafter, the position of the semiconductor element 1 is adjusted by the chuck 4 or the like. After that, the image recognition device 6 performs image processing on the recognition mark on the semiconductor element 1 and the recognition mark on the wiring board 5. Then, after correcting the positions of the semiconductor element 1 and the wiring board 5, the protruding electrodes 7 on the semiconductor element 1 are matched with the conductor wirings 8 on the wiring board 5, and the semiconductor element 1 is mounted on the wiring board 5. .
【０００３】[0003]
【発明が解決しようとする課題】従来技術のように、半
導体素子１を吸着ヘッド２で吸着し、フェースダウン方
式で直接、配線基板５へ搭載する半導体装置の製造方法
では、搭載完了までに幾度も吸着ヘッド２が水平方向に
高速移動する。その高速移動と停止の際に、吸着されて
いる半導体素子１は、吸着ヘッド２の慣性力によって吸
着位置ずれを起こす。As in the prior art, in the method of manufacturing a semiconductor device in which the semiconductor element 1 is sucked by the suction head 2 and is directly mounted on the wiring board 5 in a face-down manner, a number of times are required until the mounting is completed. Also, the suction head 2 moves at high speed in the horizontal direction. At the time of the high-speed movement and the stop, the sucked semiconductor element 1 causes a suction position shift due to the inertial force of the suction head 2.
【０００４】半導体素子１を吸着固定する方法として
は、実開昭６２−１４７３２号公報に記載の技術があ
る。これは半導体素子を吸着固定する搭載装置の吸着面
を粗す例である。しかしながら、この公知例では、半導
体素子を吸着する際に、エアーリークの可能性があり、
搭載装置の吸着面に働く垂直方向の吸着力が不足する恐
れがある。As a method for adsorbing and fixing the semiconductor element 1, there is a technique described in Japanese Utility Model Laid-Open Publication No. Sho 62-14732. This is an example in which a suction surface of a mounting device for suction-fixing a semiconductor element is roughened. However, in this known example, there is a possibility of air leak when adsorbing the semiconductor element,
There is a possibility that the vertical suction force acting on the suction surface of the mounting device may be insufficient.
【０００５】そこで、エアーリークが発生しない程度に
吸着面を粗した場合について、図８を用いて説明する。
吸着ヘッド２の吸着面を、エアーリークしない程度に粗
した場合、半導体素子１の裏面が鏡面仕上げであるた
め、吸着ヘッド２の吸着面の凹凸部２１と半導体素子１
の裏面の微少な凹凸部１１が図８に示すように噛み合わ
ない。すなわち、吸着ヘッド２の慣性力によって、半導
体素子１が動き出すのを阻止する摩擦力が不足してい
る。従って、吸着ヘッド２の吸着面を粗面化しただけで
は、高速で移動する吸着ヘッド２の慣性力に抗して、半
導体素子１が動き出すのを阻止する摩擦力を向上させる
ことは出来ない。A case where the suction surface is roughened to the extent that no air leak occurs will be described with reference to FIG.
When the suction surface of the suction head 2 is roughened so as not to cause air leak, since the back surface of the semiconductor element 1 is mirror-finished, the unevenness 21 of the suction surface of the suction head 2 and the semiconductor element 1
8 do not mesh with each other as shown in FIG. That is, the frictional force for preventing the semiconductor element 1 from starting to move due to the inertial force of the suction head 2 is insufficient. Therefore, the frictional force that prevents the semiconductor element 1 from starting against the inertia force of the suction head 2 that moves at high speed cannot be improved only by roughening the suction surface of the suction head 2.
【０００６】本発明の目的は、半導体素子をフェースダ
ウン方式にて直接、配線基板へ搭載する際の搭載位置ず
れを確実に防止もしくは有効に低減することができる半
導体装置及びその製造方法を提供するものである。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which can surely prevent or effectively reduce a mounting position shift when a semiconductor element is directly mounted on a wiring board by a face-down method. Things.
【０００７】[0007]
【課題を解決するための手段】本発明では、吸着ヘッド
と半導体素子裏面とに働く水平方向の摩擦力を向上させ
るために、半導体素子裏面を機械加工にて、その半導体
素子裏面と吸着ヘッド間の吸着力が低下しない程度に、
従来よりも粗すことを特徴とする。すなわち、本発明で
は、配線基板の導体配線と半導体素子の突起電極とを合
致させて、半導体素子と配線基板との間を、接着用絶縁
性樹脂にて固着する構造を有する半導体装置において、
半導体素子の裏面の表面粗さを、平均粗さで０．４〜
１．６μｍに粗した構成とした。その場合、半導体素子
の裏面を部分的に粗面化することもできる。粗面化する
には、半導体素子の裏面をダイヤモンド砥石等で研削す
ることにより行うこともできる。一方、本発明では、吸
着ヘッドにて半導体素子の裏面を吸着して基板に搭載す
る工程を有する半導体装置の製造方法において、吸着ヘ
ッドの吸着面と半導体素子の裏面とに互いに噛み合う凹
凸を設けておくことによって、それら吸着ヘッドの吸着
面に沿う方向に対する半導体素子の位置決めを行ないつ
つ、半導体素子を基板に搭載する方法を採用した。その
際、半導体素子の裏面をダイヤモンド砥石等で研削する
ことにより、その半導体素子の裏面に位置決めのための
凹凸を形成することもできる。また、吸着ヘッドの吸着
面及び半導体素子の裏面の凹凸による表面粗さの程度
を、互いにほぼ同じ程度の表面粗さにしておくのも大変
好適である。また、凹凸を吸着ヘッドの吸着面の一部に
設けたり、半導体素子の裏面の一部に設けておくことも
できる。According to the present invention, in order to improve the horizontal frictional force acting on the suction head and the back surface of the semiconductor device, the back surface of the semiconductor device is machined by machining the back surface of the semiconductor device and the suction head. To the extent that the adsorption power of
It is characterized by being rougher than before. That is, according to the present invention, in a semiconductor device having a structure in which a conductor wiring of a wiring board is matched with a protruding electrode of a semiconductor element, and the semiconductor element and the wiring board are fixed with an adhesive insulating resin.
The surface roughness of the back surface of the semiconductor element is 0.4 to 0.4 in average roughness.
The configuration was roughened to 1.6 μm. In that case, the back surface of the semiconductor element can be partially roughened. Roughening can also be performed by grinding the back surface of the semiconductor element with a diamond grindstone or the like. On the other hand, according to the present invention, in a method of manufacturing a semiconductor device having a process of adsorbing the back surface of a semiconductor element with a suction head and mounting the semiconductor device on a substrate, the suction surface of the suction head and the back surface of the semiconductor element are provided with irregularities that mesh with each other. In this way, a method of mounting the semiconductor element on the substrate while positioning the semiconductor element in the direction along the suction surface of the suction head is adopted. At this time, by grinding the back surface of the semiconductor element with a diamond grindstone or the like, unevenness for positioning can be formed on the back surface of the semiconductor element. It is also very preferable that the surface roughness due to the unevenness of the suction surface of the suction head and the back surface of the semiconductor element be substantially the same as each other. Further, the unevenness may be provided on a part of the suction surface of the suction head or on a part of the back surface of the semiconductor element.
【０００８】（作用）本発明では、従来よりも半導体素
子の裏面を粗すことで、吸着ヘッドの高速移動時におい
て、半導体素子が動き出そうとするのを半導体素子裏面
上の凹凸部分と吸着ヘッドの吸着面の凹凸部分が噛み合
い、吸着ヘッド吸着面と半導体素子裏面とに働く水平方
向の摩擦力を増大させる。従って、半導体素子の吸着か
ら搭載までの高速移動に伴うｘｙθ方向の外力よりも、
吸着ヘッドの吸着面と半導体素子裏面との間に働く水平
方向の摩擦力が大きくなり、微少な吸着位置ずれが低減
できる。また、搭載位置ずれが減少するため、半導体素
子の突起電極と配線基板の導体配線の接続信頼性を高め
る。In the present invention, the back surface of the semiconductor element is made rougher than in the prior art, so that the semiconductor element tends to move when the suction head moves at a high speed. The concave and convex portions of the suction surface mesh with each other to increase the horizontal frictional force acting on the suction head suction surface and the back surface of the semiconductor element. Therefore, the external force in the xyθ direction accompanying the high-speed movement from the suction to the mounting of the semiconductor element is smaller than
The horizontal frictional force acting between the suction surface of the suction head and the back surface of the semiconductor element is increased, and a slight displacement of the suction position can be reduced. Further, since the mounting position shift is reduced, the connection reliability between the protruding electrode of the semiconductor element and the conductor wiring of the wiring board is improved.
【０００９】[0009]
【発明の実施の形態】以下、本発明の好適な実施の形態
について、図面を参照して説明する。図１は本発明に係
る半導体素子９の断面図であり、図２は半導体素子を吸
引した状態の断面図、図３は製造工程を示すフロー図、
図４は凹凸部分の噛み合い状態摩擦力評価のための測定
方法を示す断面図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view of a semiconductor element 9 according to the present invention, FIG. 2 is a cross-sectional view of a state where the semiconductor element is sucked, FIG.
FIG. 4 is a cross-sectional view showing a measuring method for evaluating a frictional force in a meshing state of an uneven portion.
【００１０】図１に示す様に、従来の半導体素子１の裏
面を、機械加工により粗し、凹凸９１を形成したもの
が、本発明の半導体素子９である。これは、図６にて示
したように、従来では半導体素子１を吸着ヘッド２で吸
着した際、吸着ヘッド２の高速移動に伴う外力Ｆに対し
て、吸着ヘッド２と半導体素子１の裏面とに働く摩擦力
Ｆ１が、Ｆ＞Ｆ１の関係で、半導体素子１の位置ずれが
発生した。As shown in FIG. 1, a semiconductor element 9 of the present invention is obtained by roughening the back surface of a conventional semiconductor element 1 by machining to form irregularities 91. This is because, as shown in FIG. 6, conventionally, when the semiconductor element 1 is sucked by the suction head 2, the external force F accompanying the high-speed movement of the suction head 2 causes the suction head 2 and the back surface of the semiconductor element 1 The semiconductor element 1 was displaced in a relation of F> F1.
【００１１】そこで、本発明では図２に示す様に、半導
体素子９を吸着ヘッド２で吸着した際は、吸着ヘッド２
の高速移動に伴う外力Ｆに対して、吸着ヘッド２と半導
体素子９の裏面とに働く摩擦力Ｆ２が、Ｆ≧Ｆ２＞Ｆ１
の関係となるように配慮している。これにより従来の半
導体素子１よりも位置ずれが少なくなる。Therefore, in the present invention, as shown in FIG. 2, when the semiconductor element 9 is sucked by the suction head 2,
The frictional force F2 acting on the suction head 2 and the back surface of the semiconductor element 9 with respect to the external force F caused by the high-speed movement of
Consideration is given to the relationship. As a result, the displacement is smaller than in the conventional semiconductor device 1.
【００１２】図２及び図３は本発明の実施の形態に係る
製造工程を示すフローである。まず、半導体素子９を吸
着ヘッド２で収納トレー３より吸着を行う。その後、半
導体素子９をチャック４等により規正を行う。その後、
半導体素子９の認識用マークと配線基板５の認識用マー
クを画像認識装置６で、各々画像処理を行う。その後、
半導体素子９と配線基板５の位置補正を実施し、半導体
素子９上の突起電極７と配線基板５上の導体配線８の位
置が合うように、半導体素子９の搭載を行う。FIGS. 2 and 3 are flow charts showing a manufacturing process according to an embodiment of the present invention. First, the semiconductor element 9 is suctioned from the storage tray 3 by the suction head 2. Thereafter, the semiconductor element 9 is adjusted by the chuck 4 or the like. afterwards,
The image recognition device 6 performs image processing on the recognition mark on the semiconductor element 9 and the recognition mark on the wiring board 5. afterwards,
The position of the semiconductor element 9 and the wiring board 5 are corrected, and the semiconductor element 9 is mounted so that the positions of the protruding electrodes 7 on the semiconductor element 9 and the conductor wirings 8 on the wiring board 5 are aligned.
【００１３】[0013]
【実施例】本発明のより具体的な実施例について、図面
及び評価結果を示す表１を参照して説明する。半導体素
子９は、従来の半導体素子１の裏面を、例えばダイヤモ
ンド研削加工等により表面粗さRa０．４〜１．６（μ
ｍ）に粗した断面構造である。EXAMPLE A more specific example of the present invention will be described with reference to the drawings and Table 1 showing evaluation results. The semiconductor element 9 has a surface roughness Ra of 0.4 to 1.6 (μ) formed on the back surface of the conventional semiconductor element 1 by, for example, diamond grinding.
m) is a rough cross-sectional structure.
【００１４】従来の半導体素子１と本発明の半導体素子
９の吸着時における摩擦力の比較評価を行った結果を表
１に示す。Table 1 shows the results of a comparative evaluation of the frictional force of the conventional semiconductor element 1 and the semiconductor element 9 of the present invention during suction.
【００１５】[0015]
【表１】 [Table 1]
【００１６】摩擦力評価のための測定方法については、
図４に示すように、まず、半導体素子９を吸着ヘッド２
にて吸着し、チャック４等により位置規正を行う。その
後、半導体素子９の側面及び角より水平方向に、荷重測
定器１０を用いて押し当て、半導体素子９が位置ずれを
起こす時の最大荷重の測定を行った。その結果、表１か
ら明らかなように、従来に比べ、大きな摩擦力が得られ
ていることが確認できた。Regarding the measuring method for evaluating the frictional force,
As shown in FIG. 4, first, the semiconductor element 9 is attached to the suction head 2.
And the position is adjusted by the chuck 4 or the like. Thereafter, the semiconductor device 9 was pressed in a horizontal direction from the side surfaces and corners of the semiconductor device 9 using the load measuring device 10 to measure the maximum load when the semiconductor device 9 was displaced. As a result, as is clear from Table 1, it was confirmed that a larger frictional force was obtained as compared with the related art.
【００１７】また、表面粗さRa１．６（μｍ）以上で
は、半導体素子吸着時のエアーもれによる吸着力不足が
発生し、本発明のような摩擦力は得られなかった。When the surface roughness Ra is 1.6 (μm) or more, the suction force is insufficient due to the air leakage when the semiconductor element is sucked, and the friction force as in the present invention cannot be obtained.
【００１８】なお、図４に示す例では、半導体素子９の
裏面の凹凸９１よりも吸着ヘッド２の吸着面の凹凸２１
の方が粗い例を示しているが、平均粗さ０．４〜１．６
（μｍ）の範囲において、互いにほぼ同程度の表面粗さ
としてもよい。こうすることにより、均一に噛み合わせ
て摩擦力の均一化を図ることができる。In the example shown in FIG. 4, the irregularities 21 on the suction surface of the suction head 2 are smaller than the irregularities 91 on the back surface of the semiconductor element 9.
Shows an example in which the average roughness is 0.4 to 1.6.
(Μm), the surface roughness may be substantially the same. By doing so, it is possible to achieve uniform frictional force by uniformly meshing.
【００１９】また、この半導体素子９の裏面の凹凸９１
及び吸着ヘッド２の吸着面の凹凸２１については、それ
ぞれ全面に設けなくてもよく、例えばそれぞれについて
部分的に設けてもよい。The unevenness 91 on the back surface of the semiconductor element 9
The unevenness 21 of the suction surface of the suction head 2 may not be provided on the entire surface, but may be provided partially, for example.
【００２０】[0020]
【発明の効果】第１の効果は、エアーリークしない範囲
で効果的に摩擦力を高めているので、吸着ヘッドで半導
体素子を吸着し、吸着ヘッドが高速移動する際の半導体
素子の吸着位置ずれが減少することである。従って、高
速で配線基板に半導体素子を搭載する半導体装置におい
て、半導体素子の突起電極と配線基板の導体配線の位置
ずれが従来より減少し、接続信頼性を高める。The first effect is that since the frictional force is effectively increased within a range where air leak does not occur, the semiconductor element is sucked by the suction head, and the displacement of the suction position of the semiconductor element when the suction head moves at high speed. Is to decrease. Therefore, in a semiconductor device in which a semiconductor element is mounted on a wiring board at a high speed, the displacement between the protruding electrode of the semiconductor element and the conductor wiring of the wiring board is reduced as compared with the related art, and connection reliability is improved.
【００２１】第２の効果は、半導体素子の配線基板への
搭載時間が短縮できることである。その理由は、吸着ヘ
ッド移動後の半導体素子の吸着位置ずれ減少に伴い、搭
載位置の教示を容易に行えるからである。また、吸着ヘ
ッドの高速移動に伴う吸着位置ずれが減少することによ
り、吸着ヘッドの高速化をさらに進めることができるか
らである。A second effect is that the mounting time of the semiconductor element on the wiring board can be reduced. The reason for this is that the mounting position can be easily taught with a decrease in the deviation of the suction position of the semiconductor element after the movement of the suction head. Further, because the suction position shift due to the high-speed movement of the suction head is reduced, the speed of the suction head can be further increased.
【００２２】第３の効果は、本発明の半導体素子の裏面
上にヒートシンク等を接着した場合、凹凸の存在により
接着表面積が大きいため、高熱伝導接着剤等を使用すれ
ば、放熱効果と接着強度向上が期待できる。The third effect is that when a heat sink or the like is bonded on the back surface of the semiconductor device of the present invention, the surface area of the bonding is large due to the presence of unevenness. Improvement can be expected.
【図１】本発明の実施の形態に係る半導体素子の断面図
である。FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.
【図２】本発明の実施の形態に係る半導体素子と吸着ヘ
ッドとに働く外力と摩擦力の関係を示す断面図である。FIG. 2 is a cross-sectional view showing a relationship between an external force and a frictional force acting on the semiconductor element and the suction head according to the embodiment of the present invention.
【図３】本発明の実施の形態に係る製造工程技術を断面
で示すフロー図である。FIG. 3 is a flow chart showing a cross section of a manufacturing process technology according to an embodiment of the present invention.
【図４】本発明の実施の形態に係る吸着ヘッドと半導体
素子との摩擦力評価のための測定方法を示す断面図であ
る。FIG. 4 is a cross-sectional view showing a measuring method for evaluating a frictional force between the suction head and the semiconductor element according to the embodiment of the present invention.
【図５】従来の半導体素子の断面図である。FIG. 5 is a sectional view of a conventional semiconductor device.
【図６】従来の半導体素子と吸着ヘッドとに働く外力と
摩擦力の関係を示す断面図である。FIG. 6 is a cross-sectional view showing a relationship between an external force and a frictional force acting on a conventional semiconductor element and a suction head.
【図７】従来の製造工程技術を断面で示すフロー図であ
る。FIG. 7 is a flowchart showing a cross section of a conventional manufacturing process technology.
【図８】従来の吸着ヘッドと半導体素子との凹凸部分の
噛み合い状態を示す断面図である。FIG. 8 is a cross-sectional view showing a state in which an uneven portion of a conventional suction head and a semiconductor element are engaged with each other.
【符号の説明】 １ 半導体素子 １１ 凹凸 ２ 吸着ヘッド ２１ 凹凸 ３ 収納トレー ４ チャック ５ 配線基板 ６ 画像認識装置 ７ 突起電極 ８ 導体配線 ９ 半導体素子 ９１ 凹凸 １０ 荷重測定器DESCRIPTION OF SYMBOLS 1 semiconductor element 11 unevenness 2 suction head 21 unevenness 3 storage tray 4 chuck 5 wiring board 6 image recognition device 7 protruding electrode 8 conductor wiring 9 semiconductor element 91 unevenness 10 load measuring device
Claims (8)
極とを合致させて、前記半導体素子と前記配線基板との
間を、接着用絶縁性樹脂にて固着する構造を有する半導
体装置において、前記半導体素子の裏面の表面粗さを、
平均粗さで０．４〜１．６μｍに粗したことを特徴とす
る半導体装置。1. A semiconductor device having a structure in which a conductor wiring of a wiring board is aligned with a projecting electrode of a semiconductor element and the semiconductor element and the wiring board are fixed with an insulating resin for bonding. The surface roughness of the back surface of the semiconductor element,
A semiconductor device characterized by having an average roughness of 0.4 to 1.6 μm.
していることを特徴とする請求項１記載の半導体装置。2. The semiconductor device according to claim 1, wherein a back surface of said semiconductor element is partially roughened.
石等で研削することにより粗面化していることを特徴と
する請求項１又は２記載の半導体装置。3. The semiconductor device according to claim 1, wherein the back surface of the semiconductor element is roughened by grinding with a diamond grindstone or the like.
して基板に搭載する工程を有する半導体装置の製造方法
において、前記吸着ヘッドの吸着面と前記半導体素子の
裏面とに互いに噛み合う凹凸を設けておくことによっ
て、それら吸着ヘッドの吸着面に沿う方向に対する半導
体素子の位置決めを行ないつつ、半導体素子を基板に搭
載することを特徴とする半導体装置の製造方法。4. A method for manufacturing a semiconductor device, comprising: a step of adsorbing a back surface of a semiconductor element by a suction head and mounting the semiconductor element on a substrate, wherein the suction surface of the suction head and the back surface of the semiconductor element are provided with irregularities that mesh with each other. A method of manufacturing a semiconductor device, comprising: mounting a semiconductor element on a substrate while positioning the semiconductor element in a direction along a suction surface of the suction head.
石等で研削することにより、その半導体素子の裏面に凹
凸を形成することを特徴とする請求項４記載の半導体装
置の製造方法。5. The method for manufacturing a semiconductor device according to claim 4, wherein the back surface of the semiconductor element is ground with a diamond grindstone to form irregularities on the back surface of the semiconductor element.
の裏面の凹凸による表面粗さの程度を、互いにほぼ同じ
程度の表面粗さにしておくことを特徴とする請求項４又
は５記載の半導体装置の製造方法。6. The semiconductor according to claim 4, wherein the surface roughness due to the irregularities on the suction surface of the suction head and the back surface of the semiconductor element is approximately the same. Device manufacturing method.
部に設けておくことを特徴とする請求項４〜６の何れか
に記載の半導体装置の製造方法。7. The method of manufacturing a semiconductor device according to claim 4, wherein the unevenness is provided on a part of a suction surface of the suction head.
に設けておくことを特徴とする請求項４〜７の何れかに
記載の半導体装置の製造方法。8. The method of manufacturing a semiconductor device according to claim 4, wherein the unevenness is provided on a part of the back surface of the semiconductor element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9304931A JP3045122B2 (en) | 1997-10-20 | 1997-10-20 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9304931A JP3045122B2 (en) | 1997-10-20 | 1997-10-20 | Semiconductor device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11121530A JPH11121530A (en) | 1999-04-30 |
| JP3045122B2 true JP3045122B2 (en) | 2000-05-29 |
Family
ID=17939046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9304931A Expired - Fee Related JP3045122B2 (en) | 1997-10-20 | 1997-10-20 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3045122B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001059842A1 (en) * | 2000-02-10 | 2001-08-16 | International Rectifier Corporation | Vertical conduction flip-chip device with bump contacts on single surface |
-
1997
- 1997-10-20 JP JP9304931A patent/JP3045122B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH11121530A (en) | 1999-04-30 |
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