JP2962385B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP2962385B2 JP2962385B2 JP5001040A JP104093A JP2962385B2 JP 2962385 B2 JP2962385 B2 JP 2962385B2 JP 5001040 A JP5001040 A JP 5001040A JP 104093 A JP104093 A JP 104093A JP 2962385 B2 JP2962385 B2 JP 2962385B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- circuit board
- sealing resin
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H10W74/012—
-
- H10W72/30—
-
- H10W74/15—
-
- H10W70/681—
-
- H10W72/072—
-
- H10W72/07251—
-
- H10W72/073—
-
- H10W72/20—
-
- H10W72/856—
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体素子をフェイス
ダウンで回路基板に搭載し、樹脂封止する工程に特徴を
有する半導体装置の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, which is characterized in that a semiconductor element is mounted face-down on a circuit board and sealed with a resin.
【0002】[0002]
【従来の技術】従来より半導体装置は、半導体素子の周
辺に設けられたアルミ電極からAuまたはAlの極細線
で一本ずつ順次回路基板の外部端子に接続し、また機械
的保護のためにパッケージング(樹脂封止)されたもの
を利用するのが主流である。通常、半導体素子のパッケ
ージングには、エポキシ樹脂をモールド成形したものが
用いられている。しかし、メモリー、マイクロコンピュ
ータ等の半導体素子と連結するInput/Outpu
t(I/O)のある半導体素子では、機能数の増加とと
もに、チップサイズ、および電極端子数の増大に伴いパ
ッケージサイズも大きくなっている。しかしながら昨
今、小型化、軽量化、薄型化する電子機器においてはパ
ッケージサイズの増大は問題となっている。この問題を
解決する上で、従来より半導体素子の高密度実装性に優
れている方法の一手段として、半導体素子をフェイスダ
ウンにて搭載するフリップチップ実装工法がある。2. Description of the Related Art Conventionally, a semiconductor device is connected to an external terminal of a circuit board one by one from an aluminum electrode provided on the periphery of a semiconductor element by an ultrafine wire of Au or Al, and a package for mechanical protection. The mainstream is to use the one that has been sealed (resin sealed). In general, a semiconductor element molded by epoxy resin is used for packaging. However, Input / Output connected to a semiconductor device such as a memory or a microcomputer.
In a semiconductor element having t (I / O), the package size is increasing with the increase in the number of functions and the chip size and the number of electrode terminals. However, recently, in electronic devices that are becoming smaller, lighter, and thinner, an increase in package size has become a problem. In order to solve this problem, there is a flip-chip mounting method in which the semiconductor element is mounted face down as one of the methods which have been conventionally excellent in the high density mounting of the semiconductor element.
【0003】従来の半導体装置の製造方法として、前記
フリップチップ工法の封止工程を、図を用いて説明す
る。図4,図5,図6および図7は、従来の半導体装置
の製造方法において、フリップチップ工法の封止工程を
示す工程図である。図4、図5,図6および図7におい
て、1は突起電極を有した半導体素子、2は回路基板、
3は封止樹脂供給用ノズル、4はエポキシ、シリコン系
等の封止樹脂である。As a conventional method of manufacturing a semiconductor device, a sealing step of the flip chip method will be described with reference to the drawings. 4, 5, 6, and 7 are process diagrams showing a sealing step of a flip chip method in a conventional method of manufacturing a semiconductor device. 4, 5, 6, and 7, 1 is a semiconductor element having a protruding electrode, 2 is a circuit board,
Reference numeral 3 denotes a sealing resin supply nozzle, and reference numeral 4 denotes an epoxy, silicon-based sealing resin, or the like.
【0004】以下、図4,図5,図6および図7を参照
しながら従来の半導体装置の製造方法における封止方法
について説明する。Hereinafter, a sealing method in a conventional method for manufacturing a semiconductor device will be described with reference to FIGS. 4, 5, 6, and 7. FIG.
【0005】まず図4(a),(b)に示すように、突
起電極を有した半導体素子1を回路基板2にフリップチ
ップ実装し、はんだ材などにより回路基板2上の電極と
接続した後、一辺毎に前記半導体素子1の側面に封止樹
脂供給ノズル3をセットし、平行移動させながらエポキ
シ、シリコン系等の封止樹脂4を供給し、毛細管現象を
利用し、前記半導体素子1と前記回路基板2との隙間に
前記封止樹脂4を充填するものである。First, as shown in FIGS. 4 (a) and 4 (b), a semiconductor element 1 having a protruding electrode is flip-chip mounted on a circuit board 2 and connected to an electrode on the circuit board 2 by a solder material or the like. The sealing resin supply nozzle 3 is set on the side surface of the semiconductor element 1 for each side, and the sealing resin 4 of epoxy, silicon or the like is supplied while moving in parallel, and the semiconductor element 1 is connected to the semiconductor element 1 by utilizing the capillary phenomenon. The sealing resin 4 is filled in the gap with the circuit board 2.
【0006】次に図5(a),(b)に示すように、対
向側面において、前記封止方法により前記半導体素子1
と前記回路基板2との隙間に前記封止樹脂4を充填す
る。Next, as shown in FIGS. 5A and 5B, the semiconductor element 1 is sealed on the opposite side surface by the sealing method.
And the circuit board 2 is filled with the sealing resin 4.
【0007】次に図6(a),(b)に示すように、後
部側面に前記封止方法により前記半導体素子1と前記回
路基板2との隙間に前記封止樹脂4を充填する。Next, as shown in FIGS. 6A and 6B, a gap between the semiconductor element 1 and the circuit board 2 is filled with the sealing resin 4 on the rear side surface by the sealing method.
【0008】最後に図7(a),(b)に示すように、
未封止部分である前部面に前記封止方法により、前記半
導体素子1と前記回路基板2との隙間に前記封止樹脂4
を充填し、樹脂硬化させて半導体装置が完成する。Finally, as shown in FIGS. 7A and 7B,
According to the sealing method, the sealing resin 4 is inserted into the gap between the semiconductor element 1 and the circuit board 2 on the front surface, which is an unsealed portion.
And the resin is cured to complete the semiconductor device.
【0009】[0009]
【発明が解決しようとする課題】しかしながら前記従来
の半導体装置の製造方法では、一辺方向からエポキシ、
シリコン系等の封止樹脂4を供給し、前記封止樹脂4を
毛細管現象を利用することにより供給するため、突起電
極を有した半導体素子1と回路基板2との隙間に前記封
止樹脂4を充填される過程において、気泡がその隙間に
残る場合がある。前記気泡は、半導体装置の信頼性試験
において、半導体素子間でのリーク電流不良や、前記半
導体素子1の電極部の腐食によるコンタクト不良を生
じ、半導体装置の信頼性を著しく低下させる原因となっ
ていた。このため、回路基板に空気抜き貫通孔を設けた
回路基板を用い、封止樹脂を充填することにより、隙間
中の気泡を除去する手段が考えられるが、この場合、回
路基板下面から空気抜き貫通孔を通じて封止樹脂がたれ
ることがあり、この処理に多大の工数を要していた。However, in the conventional method of manufacturing a semiconductor device, the epoxy,
In order to supply the sealing resin 4 made of silicon or the like and supply the sealing resin 4 by utilizing the capillary phenomenon, the sealing resin 4 is provided in a gap between the semiconductor element 1 having the protruding electrodes and the circuit board 2. May be left in the gaps in the process of filling with. In the reliability test of the semiconductor device, the air bubbles cause a leak current defect between the semiconductor elements and a contact failure due to corrosion of the electrode portion of the semiconductor element 1, thereby causing a significant decrease in the reliability of the semiconductor device. Was. For this reason, it is conceivable to remove air bubbles in the gap by using a circuit board having a circuit board provided with an air vent through hole and filling the sealing resin, but in this case, through the air vent through hole from the lower surface of the circuit board, The sealing resin may be dripped, and this process requires a large number of steps.
【0010】本発明は、前記従来の課題を解決するもの
で、樹脂封止工程時に発生する気泡の防止と封止樹脂の
たれ防止、および封止作業の容易化が可能となる半導体
装置の製造方法を提供することを目的とする。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems, and manufactures a semiconductor device capable of preventing bubbles generated during a resin sealing step, preventing dripping of a sealing resin, and facilitating a sealing operation. The aim is to provide a method.
【0011】[0011]
【課題を解決するための手段】前記課題を解決するため
に、本発明に係る半導体装置の製造方法は、以下のよう
な構成を有している。すなわち、半導体素子をフェイス
ダウンさせて貫通孔を有した回路基板に搭載する工程
と、前記搭載した半導体素子の平面方向において左右両
側面端部から封止樹脂供給ノズルを前記半導体素子に対
して平行移動させながら封止樹脂を供給し、前記半導体
素子と前記貫通孔を有した回路基板との隙間および半導
体素子の周辺部に前記封止樹脂を充填被覆する工程と、
前記搭載した半導体素子の平面方向において前後両側両
端部から封止樹脂供給ノズルを前記半導体素子に対して
平行移動させながら封止樹脂を供給し、前記半導体素子
と前記貫通孔を有した回路基板との隙間および半導体素
子の周辺部に前記封止樹脂を充填被覆する工程とよりな
る半導体装置の製造方法であって、前記回路基板には穴
径がφ50[μm]〜φ300[μm]の範囲の4個ま
たは5個の貫通孔が設けられた回路基板を用いることを
特徴とする。In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention has the following configuration. That is, a step of mounting on a circuit board having a transmural hole a semiconductor device by a face-down, the sealing resin supply nozzle from the left and right lateral end in the planar direction of the semiconductor element in which the mounting relative to the semiconductor element a step of supplying the sealing resin is filled covering the sealing resin on the periphery of the gap and the semiconductor element and the circuit board having the semiconductor element and the front Kinuki hole while translating,
Wherein a sealing resin is supplied while moving in parallel equipped with a sealing resin supply nozzle from the front and rear sides at both ends in the plane direction of the semiconductor element to the semiconductor element, having the semiconductor element and the front Kinuki hole circuit a method of manufacturing a more becomes a semiconductor device and the step of filling covering the sealing resin on the periphery of the gap and the semiconductor element with the substrate, the holes in the circuit board
Up to four diameters ranging from φ50 [μm] to φ300 [μm]
Alternatively, a circuit board provided with five through holes is used .
【0012】[0012]
【作用】前記構成により、封止工程において半導体素子
と回路基板との隙間を封止樹脂で充填する際、前記回路
基板が適切な穴径を有した少なくとも1個以上の貫通孔
を備えているため、気泡は前記貫通孔から逃げ、前記隙
間に気泡残りを防止し、しかも封止樹脂のたれを防止し
て封止作業を容易にすることが可能となる。According to the above construction, when filling the gap between the semiconductor element and the circuit board with the sealing resin in the sealing step, the circuit board has at least one through hole having an appropriate hole diameter. Therefore, the bubbles escape from the through-holes, the bubbles are prevented from remaining in the gaps, and the sealing resin can be prevented from dripping, thereby facilitating the sealing operation.
【0013】[0013]
【実施例】以下、本発明の一実施例について、図面を参
照しながら説明する。An embodiment of the present invention will be described below with reference to the drawings.
【0014】図1,図2および図3は、本発明の一実施
例における半導体装置の製造方法を示す工程図であり、
図1の(a)は断面図、(b)は底面図である。図2の
(a)は断面図、(b)は平面図である。図3の(a)
は断面図、(b)は平面図である。図1,図2および図
3において、1は突起電極を有した半導体素子、3は封
止樹脂供給ノズル、4はエポキシ系の封止樹脂、5は空
気抜き貫通孔、6は回路基板、7は気泡である。FIGS. 1, 2 and 3 are process diagrams showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
1A is a sectional view, and FIG. 1B is a bottom view. 2A is a sectional view, and FIG. 2B is a plan view. FIG. 3 (a)
Is a sectional view, and (b) is a plan view. 1, 2 and 3, 1 is a semiconductor element having a protruding electrode, 3 is a sealing resin supply nozzle, 4 is an epoxy sealing resin, 5 is an air vent through hole, 6 is a circuit board, 7 is It is a bubble.
【0015】まず図1(a),(b)に示すように、空
気抜き貫通孔5を底面に有した回路基板6に突起電極を
有した半導体素子1を高精度位置決め装置により、フェ
イスダウンにて実装し、回路基板6と前記半導体素子1
とをはんだ材などの導電性接着剤により接続する。First, as shown in FIGS. 1 (a) and 1 (b), a semiconductor element 1 having a projecting electrode on a circuit board 6 having an air vent through hole 5 on the bottom face is face-down by a high precision positioning device. After mounting, the circuit board 6 and the semiconductor element 1
And are connected by a conductive adhesive such as a solder material.
【0016】次に図2(a),(b)に示すように、前
記回路基板6と前記半導体素子1を接続した製品の機械
的性質、信頼性向上を図るために樹脂封止を行なう。そ
の方法としては、前記回路基板6を加熱テーブル上に置
き、前記回路基板6の下面より加熱し、かつ加熱テーブ
ル上の前記回路基板6を真空吸着で固定する。次に、前
記半導体素子1の左右両側面に封止樹脂供給ノズル3を
各々一辺毎にセットする。そして、封止樹脂供給ノズル
3を平行移動させながらエポキシ系の封止樹脂4を供給
し、前記半導体素子1と前記回路基板6の隙間(50μ
mから100μmの範囲)に前記封止樹脂4を充填す
る。Next, as shown in FIGS. 2A and 2B, resin sealing is performed to improve mechanical properties and reliability of a product in which the circuit board 6 and the semiconductor element 1 are connected. In this method, the circuit board 6 is placed on a heating table, heated from below the circuit board 6, and the circuit board 6 on the heating table is fixed by vacuum suction. Next, a sealing resin supply nozzle 3 is set on each of the left and right side surfaces of the semiconductor element 1 for each side. Then, the epoxy-based sealing resin 4 is supplied while the sealing resin supply nozzle 3 is moved in parallel, and a gap (50 μm) between the semiconductor element 1 and the circuit board 6 is supplied.
m to 100 μm) with the sealing resin 4.
【0017】次に図3(a),(b)に示すように、未
封止部分である前後両側面に封止樹脂供給ノズル3を各
々一辺毎にセットし、前記封止樹脂供給ノズル3を平行
移動させながら前記封止樹脂4を供給することにより、
前記半導体素子1と前記回路基板6との隙間に前記封止
樹脂4を充填し、かつ前記半導体素子1の周囲に前記封
止樹脂4を充填し、前記充填した封止樹脂4を硬化させ
て封止が完了する。Next, as shown in FIGS. 3 (a) and 3 (b), the sealing resin supply nozzles 3 are set for each side on both front and rear sides which are unsealed portions. By supplying the sealing resin 4 while moving the
The gap between the semiconductor element 1 and the circuit board 6 is filled with the sealing resin 4, and the periphery of the semiconductor element 1 is filled with the sealing resin 4, and the filled sealing resin 4 is cured. The sealing is completed.
【0018】なお前記充填0する場合の封止樹脂4とし
ては、前記エポキシ系の樹脂として液状エポキシ樹脂以
外にも、シリコン系の樹脂でも封止樹脂として使用でき
る。また前記充填する場合の封止樹脂の溶融粘度は、エ
ポキシ系の樹脂である場合、25[℃]で80〜300
[cP]であり、半導体素子1と前記回路基板2の隙間
に容易に充填することができる。In addition, as the sealing resin 4 when the filling is zero, other than the liquid epoxy resin as the epoxy resin, a silicon resin can be used as the sealing resin. The melt viscosity of the sealing resin when filling is 80 to 300 at 25 [° C.] when the resin is an epoxy resin.
[CP], and the gap between the semiconductor element 1 and the circuit board 2 can be easily filled.
【0019】以下に実施例に示す製造方法により、数種
類の径を有した空気抜き貫通孔5を2個、4個、5個、
10個設けた回路基板6に突起電極を有した半導体素子
1をフリップチップ実装して接続した後、エポキシ系の
封止樹脂4を半導体素子と回路基板との隙間に充填し、
樹脂封止を行なった場合の半導体素子1と回路基板6と
の隙間にできた気泡と、前記封止樹脂4の前記回路基板
6からのたれを測定した結果を(表1),(表2),
(表3)および(表4)に示す。In the following, two, four, five air vent through holes 5 having several kinds of diameters are produced by the manufacturing method shown in the embodiment.
After flip-chip mounting and connecting the semiconductor element 1 having the protruding electrode to the ten circuit boards 6 provided, the epoxy-based sealing resin 4 is filled in the gap between the semiconductor element and the circuit board,
Tables 1 and 2 show the results of measurement of bubbles formed in the gap between the semiconductor element 1 and the circuit board 6 when resin sealing is performed and the dripping of the sealing resin 4 from the circuit board 6. ),
The results are shown in (Table 3) and (Table 4).
【0020】[0020]
【表1】 [Table 1]
【0021】[0021]
【表2】 [Table 2]
【0022】[0022]
【表3】 [Table 3]
【0023】[0023]
【表4】 [Table 4]
【0024】以上のように、本実施例に係る半導体装置
の製造方法において、回路基板6の構造条件としては、
前記回路基板6に設けられた空気抜き貫通孔5の数を4
個または5個とし、そしてその穴径はφ50μmからφ
300μmの範囲が適していることがわかる。また空気
抜き貫通孔5の配置位置は、前記回路基板2の配線パタ
ーン、突起電極を有した半導体素子1のサイズ等に依存
して変わるため限定しない。As described above, in the method of manufacturing a semiconductor device according to the present embodiment, the structural conditions of the circuit board 6 are as follows.
The number of the air vent through holes 5 provided in the circuit board 6 is 4
Or 5 holes, and the hole diameter is from φ50μm to φ
It is understood that the range of 300 μm is suitable. In addition, the arrangement position of the air vent through-hole 5 is not limited because it varies depending on the wiring pattern of the circuit board 2, the size of the semiconductor element 1 having the protruding electrode, and the like.
【0025】[0025]
【発明の効果】以上のように本発明は、半導体素子のフ
リップチップ実装の封止工程において、適切な穴径を有
した空気抜き貫通孔を少なくとも1個以上設けた回路基
板を用いることにより、半導体素子と回路基板との隙間
に残る気泡を効率よく除去することができる半導体装置
の製造方法を実現するものである。As described above, the present invention provides a semiconductor device using a circuit board provided with at least one air vent through hole having an appropriate hole diameter in a sealing step of flip chip mounting of a semiconductor element. An object of the present invention is to provide a method of manufacturing a semiconductor device capable of efficiently removing bubbles remaining in a gap between an element and a circuit board.
【図1】本発明の一実施例における半導体装置の製造方
法を示す工程図FIG. 1 is a process chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
【図2】本発明の一実施例における半導体装置の製造方
法を示す工程図FIG. 2 is a process chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
【図3】本発明の一実施例における半導体装置の製造方
法を示す工程図FIG. 3 is a process chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.
【図4】従来の半導体装置の製造方法を示す工程図FIG. 4 is a process chart showing a conventional method for manufacturing a semiconductor device.
【図5】従来の半導体装置の製造方法を示す工程図FIG. 5 is a process chart showing a conventional method for manufacturing a semiconductor device.
【図6】従来の半導体装置の製造方法を示す工程図FIG. 6 is a process chart showing a conventional method for manufacturing a semiconductor device.
【図7】従来の半導体装置の製造方法を示す工程図FIG. 7 is a process chart showing a conventional method for manufacturing a semiconductor device.
1 半導体素子 2 回路基板 3 封止樹脂供給ノズル 4 封止樹脂 5 空気抜き貫通孔 6 回路基板 7 気泡 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Circuit board 3 Sealing resin supply nozzle 4 Sealing resin 5 Air vent through hole 6 Circuit board 7 Bubbles
Claims (1)
孔を有した回路基板に搭載する工程と、前記搭載した半
導体素子の平面方向において左右両側面端部から封止樹
脂供給ノズルを前記半導体素子に対して平行移動させな
がら封止樹脂を供給し、前記半導体素子と前記貫通孔を
有した回路基板との隙間および半導体素子の周辺部に前
記封止樹脂を充填被覆する工程と、前記搭載した半導体
素子の平面方向において前後両側両端部から封止樹脂供
給ノズルを前記半導体素子に対して平行移動させながら
封止樹脂を供給し、前記半導体素子と前記貫通孔を有し
た回路基板との隙間および半導体素子の周辺部に前記封
止樹脂を充填被覆する工程とよりなる半導体装置の製造
方法であって、前記回路基板には穴径がφ50[μm]
〜φ300[μm]の範囲の4個または5個の貫通孔が
設けられた回路基板を用いることを特徴とする半導体装
置の製造方法。 1. A mounting a semiconductor element on a circuit board having a transmural hole by face-down, the sealing resin supply nozzle from the left and right lateral end in the planar direction of the semiconductor element in which the mounting semiconductor element a step of supplying a sealing resin while moving in parallel, to fill covering the sealing resin on the periphery of the gap and the semiconductor element and the circuit board having the semiconductor element and the front Kinuki hole relative to the the sealing resin is supplied while moving parallel to the semiconductor element encapsulation resin supply nozzle from the front and rear sides at both ends in the plane direction of the mounted semiconductor element, the circuit board having the semiconductor element and the front Kinuki hole a manufacturing method of a gap and a semiconductor semiconductors device that Na more and filling covering the sealing resin on the periphery of the elements of the hole diameter on the circuit board is ø50 [[mu] m]
4 or 5 through holes in the range of ~ 300 [μm]
A semiconductor device characterized by using a provided circuit board.
Manufacturing method of the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5001040A JP2962385B2 (en) | 1993-01-07 | 1993-01-07 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5001040A JP2962385B2 (en) | 1993-01-07 | 1993-01-07 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH06204272A JPH06204272A (en) | 1994-07-22 |
| JP2962385B2 true JP2962385B2 (en) | 1999-10-12 |
Family
ID=11490455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5001040A Expired - Fee Related JP2962385B2 (en) | 1993-01-07 | 1993-01-07 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2962385B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024202143A1 (en) * | 2023-03-29 | 2024-10-03 | Sony Semiconductor Solutions Corporation | Manufacturing method for a mounting board and mounting board |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2198305A1 (en) * | 1996-05-01 | 1997-11-02 | Yinon Degani | Integrated circuit bonding method and apparatus |
| JP3683996B2 (en) * | 1996-07-30 | 2005-08-17 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
| DE19729073A1 (en) * | 1997-07-08 | 1999-01-14 | Bosch Gmbh Robert | Method for producing an adhesive connection between an electronic component and a carrier substrate |
| US6495083B2 (en) | 1997-10-29 | 2002-12-17 | Hestia Technologies, Inc. | Method of underfilling an integrated circuit chip |
| US6324069B1 (en) * | 1997-10-29 | 2001-11-27 | Hestia Technologies, Inc. | Chip package with molded underfill |
| JP3610787B2 (en) * | 1998-03-24 | 2005-01-19 | セイコーエプソン株式会社 | Semiconductor chip mounting structure, liquid crystal device and electronic apparatus |
| JP3654116B2 (en) | 2000-03-10 | 2005-06-02 | セイコーエプソン株式会社 | Semiconductor device and manufacturing method thereof, circuit board, and electronic apparatus |
| US6732905B2 (en) * | 2002-04-16 | 2004-05-11 | Agilent Technologies, Inc. | Vented cavity, hermetic solder seal |
| JP2006032622A (en) * | 2004-07-15 | 2006-02-02 | Mitsubishi Electric Corp | Leadless package mounting structure |
| JP4862893B2 (en) | 2006-06-02 | 2012-01-25 | 株式会社村田製作所 | Multilayer ceramic electronic component and manufacturing method thereof |
| JP6119632B2 (en) * | 2014-02-20 | 2017-04-26 | 株式会社オートネットワーク技術研究所 | Circuit structure |
| JP6468201B2 (en) * | 2016-01-07 | 2019-02-13 | トヨタ自動車株式会社 | Manufacturing method of semiconductor device |
| CN108063123A (en) * | 2017-10-30 | 2018-05-22 | 张延赤 | The structure design of cracking is prevented during plastic packaging electronic device Reflow Soldering |
-
1993
- 1993-01-07 JP JP5001040A patent/JP2962385B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024202143A1 (en) * | 2023-03-29 | 2024-10-03 | Sony Semiconductor Solutions Corporation | Manufacturing method for a mounting board and mounting board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH06204272A (en) | 1994-07-22 |
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