JP2894647B2 - Track address judgment method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a multi-track
The present invention relates to a track address determining method for determining a track address of a desired track in an optical information recording / reproducing apparatus for simultaneously recording / reproducing information.

[0002]

2. Description of the Related Art A recording medium such as an optical card or an optical disk has a plurality of tracks (or concentric circles) parallel to each other. On the other hand, the optical information recording / reproducing apparatus has an optical head for optically recording / reproducing information on / from the recording medium, and the recording medium and the optical head are respectively moved in a track direction of the recording medium and in a direction perpendicular to the track direction. In addition, information is recorded / reproduced by reciprocating.

[0003] Conventional optical information recording / reproducing devices include:
2. Description of the Related Art A single track readout type device that irradiates a single track with a single light emitted from an optical head and reads out information in units of one track is generally known. However, in this method, the reproduction speed of the information recorded on the track is determined by the relative speed between the optical head and the recording medium, and cannot be further increased. In order to solve this problem, a multi-track readout type optical information recording / reproducing apparatus which irradiates light emitted from an optical head onto a plurality of tracks and simultaneously reads information from the plurality of tracks has been devised. For example, the applicant of the present invention disclosed in Japanese Patent Application Laid-Open No. Hei 2-141932 to reduce the number of read-out tracks and the number of PLL (Phase-Located Loop) circuits and demodulation circuits to reduce the size of the data processing system. The device is proposed.

By the way, the recording medium will be described by taking an optical card as an example. As shown in FIG.
Extending a plurality of tracks 32, this track 32
It is composed of a sector or a plurality of sectors as shown in FIG. In this one-track configuration, ID sections 34a and 34b in which track address information and the like are recorded are provided on both sides of an information recording area 35 where information is written. In the figure, the left ID section 34a has an information recording area 3
5 is used when accessing from the left side. On the other hand, the right ID section 34b is used when accessing the information recording area 35 from the right side. Information recording area 3 shown in FIG.
5 is divided into N sectors. Each sector is configured with a buffer area called a gap (GAP) in which nothing is recorded in order to absorb unevenness in the transport speed of the optical card 30 and the like.

Next, a method of determining a track address recorded in the ID 34a or 34b will be described with reference to FIG. 7, taking a single track read type optical card recording / reproducing apparatus as an example. The optical card recording / reproducing apparatus reads one of the ID sections provided at both ends of the track 32, determines the track address based on the result, and records or reproduces information in the information recording area.

The ID sections 34a and 34b have, for example, five ID0 to ID4, respectively, as shown in FIG.
Each ID includes the same track address information, and is usually encoded with error correction. In the optical information recording / reproducing apparatus, erroneously recognizing a track address causes writing of already recorded information or reading of incorrect information. Therefore, the probability of erroneous recognition of the track address needs to be kept as low as possible.
This is why there are five IDs, and the track addresses are determined based on the read results of the five IDs, thereby reducing the probability of erroneous recognition. In addition, each I
Although the track addresses in D are error-correction-coded, erroneous corrections can occur, so that the determination of the track address is often performed by matching the track addresses in the five IDs. For example, when accessing from the left side in the figure, the optical head sequentially scans ID0 to ID4 of a certain track of the optical card 32, reads it, and stores the demodulated track address in a memory or the like. In this case, when the optical head passes ID4,
Since the individual IDs are collected, FIG.
As shown in (1), the determination of the track address is started.

The conventional multi-track readout type optical information recording / reproducing apparatus also determines the track address by the same processing as described above. It is needless to say that the multi-track read type device can also be used as a single track read device.

[0008]

The recording medium used in the conventional single-track and multi-track readout type optical information recording / reproducing apparatus has one track in one track in order to keep the error rate of track address recognition as low as possible. The track address is overwritten in one ID section. Multiple writing has the advantage of lowering the erroneous address recognition rate and improving the reliability of information recording / reproduction, but has the disadvantage that the storage capacity of the information recording area of the recording medium is limited and smaller. doing.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and in an optical information recording / reproducing apparatus of a multi-track read type, a track address can be recognized without multiple writing of a track address on an ID portion of a recording medium. It is an object of the present invention to provide a track address determination method capable of suppressing an error rate low.

[0010]

A track address determination method according to the present invention has a plurality of tracks, and each track includes at least one track address information section in which one track address is written. An optical information recording / reproducing apparatus that irradiates a plurality of tracks of the recording medium with light spots on a recording medium including an information recording area for recording / reproducing information and simultaneously reads information of the plurality of tracks. Applicable.

The track address determining method according to the present invention is a track determining method for determining a track address of a desired track among the plurality of tracks, wherein the track address determining method comprises the steps of:
From two or more different tracks, a step of reading the track addresses of the track address information section one by one, and within the period until the light spot reaches the information recording area, two or more different Determining the track address of a desired track based on the track address read from the track.

[0012]

According to the track address determination method of the present invention, a desired address is determined based on each track address corresponding to two or more tracks read by the reading procedure within a period until the light spot reaches the information recording area. Determine the track address of the track.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 6 relate to an embodiment of the present invention.
FIG. 2 is a block diagram showing an example of a reproducing circuit of the optical recording / reproducing apparatus. FIG. 2 is a timing chart showing the operation of the apparatus shown in FIG. 1, FIG. 3 is a schematic configuration diagram of an ID section of a track and an information recording section, and FIG. FIG. 5 is a flowchart showing an address determination method, FIG. 5 is an overall configuration diagram of an optical card, and FIG. 6 is a schematic configuration diagram showing an example of a track format.

Optical card 3 as recording medium shown in FIG.
The track address determination method according to the present invention will be described using the optical card device 1 as an optical information recording / reproducing device shown in FIG. The optical card device 1 is a multi-track reading type device.

As shown in FIG. 5, the optical card 30 has a track 32 extending in the long side direction of the card.
2 has a plurality of recording areas 33 formed in the card width direction (short side direction). Each track 32 of the recording area 33
Is an ID as a track address information section in which only one track address corresponding to each track is recorded at both ends on the short side of the card so that the track addresses can be read from opposite directions.
Parts 34a and 34b are provided. The ID section 34a corresponds to FIG.
As shown in, for example, each track n, (n + 1), (n + 2), (n + 3)
IDn, ID (n + 1), ID (n + 2), ID (n + 3), ID in which one track address corresponding to (n + 4) is recorded, respectively.
(n + 4) is provided. Also, the ID part 34b is the ID part 3
Each ID is provided similarly to 4a.

Then, the optical card 3
When 0 moves in the track direction from left to right in the figure, the ID section 34a is read, and the track address corresponding to the track can be recognized. When the optical card 30 moves from the right to the left in the drawing in the track direction with respect to the optical head, the ID section 34b is read, and the track address corresponding to the track can be recognized. The ID sections 34a and 34b are provided to prevent the effects of scratches and dirt on the end of the card,
In order to sufficiently stabilize the relative speed in the track direction between the optical head and the optical head, a certain distance (for example, 4 m
m). Also, the ID part 34a,
34b is preformatted in advance at the time of manufacturing the optical card.

Each track 32 of the recording area 33 is
An information recording area (DATA) 35 in which information is written is provided between the ID sections 34a and 34b. The information recording area 35 is divided into N sectors as shown in FIG. 6, for example.
P), a buffer area in which nothing is recorded is interposed. A gap is similarly formed between the sector and the ID portions 34a and 34b.

On the other hand, the optical card device 1 shown in FIG. 1 is a device for recording / reproducing information on a plurality of tracks of the optical card 30. The optical card device 1 includes an optical card 30
Irradiates recording / reproducing light to the k tracks 32 at the same time. This optical head is connected to an arbitrary k (= m + 1) tracks of the optical card 30 via an optical system including a light source, an objective lens, and the like (not shown).
Light spots are simultaneously projected onto n, n + 1,..., n + m.

The optical head includes a first optical detector 2a, a second optical detector 2b, and a k-th optical detector 2z.
+1),..., Each reflected light from the track (n + m) is converted into an electric signal and output.

The electric signal output from the first optical detector 2a corresponds to the information on the track n, and the first amplifier 3a
After that, the signal is converted into a binary signal by the binarizing circuit 4a and output. The binarized signal is supplied to a data input terminal of the memory 5a,
And selector 6. Also,
The data output terminal of the memory 5a is configured to be input to the selector 6.

The electric signal output from the second optical detector 2b is information on the track (n + 1). After passing through the second amplifier 3b, the electric signal is converted into a binarized signal by the binarizing circuit 4b. Is converted. The binarized signal is input to the data input terminal of the memory 5b and the selector 6. The data output terminal of the memory 5b is configured to be input to the selector 6.

Hereinafter, the same configuration is provided for reading tracks (n + 2) to (n + m). As shown in FIG. 1, a track (n + m) includes a k-th optical detector 2c, a k-th amplifier 3c, a k-th binarization circuit 4c,
And the configuration of the k-th memory 5c.

The address generation circuit 8 in FIG. 1 generates an address at the timing of a memory write signal output from a main controller (not shown), and generates an address.
b or to the memory 5c. The memory 5a stores the binarized signal output from the binarization circuit 4a in order from the address generated by the address generation circuit 8 at the timing of the memory write signal output from the controller. Also, the memory 5b,
The memory 5c has the same configuration.

The memories 5a, 5b, and 5c output the stored binary signals to the selector 7 at the timing of the memory write signal. The selector 7 controls the memory 5a, the memory 5b, and the memory 5b in response to a select signal output from the controller.
Alternatively, a binarized signal output from the memory 5c is selected, and one of the signals is output to a PLL (Phase-Located Loop) circuit 9. The select signal is, for example, a track
It is set so that the binarized signal is selected in the order of n, track (n + 1), or track (n + m).

The PLL circuit 9 generates a bit synchronization signal based on the applied binary signal, and outputs it to the demodulation circuit 10. The demodulation circuit 10 generates a data demodulation signal based on the binary signal and the bit synchronization signal, and outputs the data demodulation signal to the memory 11. The memory 11 stores the data demodulated signal. The error correction circuit 12 performs an error correction process on the stored data demodulated signal, and the memory 11 stores the data demodulated signal for which the error correction has been completed again, and outputs the data demodulated signal to the controller. The controller outputs the ID of the data demodulated signal.
The track addresses of n to ID (n + 4) are read, and a track address to be described later is determined.

The operation of the optical card device 1 will be described with reference to FIG. For convenience of explanation, the optical detectors 2a, 2b,
To 2c are collectively referred to as the respective optical detectors 2. Amplifier 3
a, 3b to 3c are collectively referred to as the respective amplifiers 3. The binarization circuits 4a, 4b to 4c are collectively referred to as each binarization circuit 4.

The track obtained by irradiating the reading light
The light reflected from n, track (n + 1), or track (n + m) is transmitted to the first light detector 2a and the second light detector 2a.
The light is converted into an electric signal by each of the b-th to k-th optical detectors 2c. A portion where the amplitude of the waveform shown in FIG. 2 is large corresponds to a pit formed on the track 32. The electric signal of each optical detector 2 is binarized by each binarizing circuit 4 via each amplifier 3. The generation of the memory write signal is started based on an instruction from the controller. As shown in FIG. 2, each memory 5 samples and stores the binarized output of each binarizing circuit 4 at the falling edge of the memory write signal. FIG. 2 shows the values stored in the first, second to kth memories 5 as memory contents.

When sampling errors are taken into consideration, generally, in recording / reproducing by light or magnetism, fluctuation in the time axis direction, that is, jitter occurs. The sampling error of the memory can also be considered as jitter. If the amount of jitter due to memory sampling can be suppressed to about 5%,
There is no significant effect on data reproduction. In the case of an optical card, the read speed is about 10 kbit / sec to 100 kbit / sec.
If the frequency is set to about Hz, the jitter amount can be suppressed to about 5%.

The address generated by the address generation circuit 8 is generated according to a memory write signal. Each memory 5 samples and stores the binarized signal for each track to the generated address, and the selector 7 sequentially sends the binarized signal to the PLL circuit 9 and the demodulation circuit 10 according to the select signal. Supply. The binarized signal is
The signal is demodulated through the PLL circuit 9 and the demodulation circuit 10.
In the reading of each memory 5, data in an address generated by the address generation circuit 8 is sequentially read. By increasing the reading speed from the memory up to the maximum reading frequency determined by the memory element itself, the demodulation speed can be increased.

Next, a method of determining a track address according to the present invention will be described with reference to FIGS. 3 and 4, taking as an example a case where an optical card 30 is mounted on the optical card device 1 and information is read. Note that the ID sections 34a and 34b of the optical card 30
For ease of explanation, it is assumed that five tracks are read simultaneously as shown in FIG.

Referring to FIG. 3, the operation of the optical head passing through the left ID section 34a of the five tracks will be described in order.

First, when the optical head passes through the area of ID0, I of tracks n, (n + 1), (n + 2), (n + 3) and (n + 4)
Dn, (n + 1), (n + 2), (n + 3), (n + 4)
At the same time, they are read and binarized and stored in the respective memories 5.

When the optical head passes through IDn, the memory 5 storing the binarized signal of IDn of track n is stored.
a is read, demodulated, and the error correction result is stored in memory 1.
Stored in 1. Then, the ID (n + 1) of track (n + 1) 2
The memory 5b storing the digitized signal is read, demodulated, and the error correction result is stored in the memory 11. Hereinafter, IDs (n + 2), (n + 3), (n + 3) of tracks (n + 2), (n + 3), and (n + 4)
Perform the same operation for 4).

FIG. 4 shows a flowchart of an example of the track address determination method according to the present invention. First, in step S1, when the optical head passes through the area of ID0, IDn and (n + 4) of tracks n, (n + 1), (n + 2), (n + 3), and (n + 4), respectively. (n + 1), (n + 2), (n + 3), (n + 4) are converted to optical card 3
The data is read simultaneously from 0, binarized, and stored in each memory 5. In step S2, the optical head is set to ID0
, The memory 5a storing the binarized signal of IDn of the track n is read out, demodulated, and error-corrected to obtain the track address TA0. Then, the track address TA0 is stored in the memory 11. Subsequently, in step S3, the ID (n +
The memory 5b storing the binarized signal of 1) is read, demodulated, error-corrected, and the track address TA1 is stored in the memory 11. Hereinafter, step S4
In step S6, the ID (n + 2) of the track (n + 2), the ID (n + 3) of the track (n + 3), and the ID (n +
For 4), the same operation is performed to obtain track addresses TA2 to TA4.

In step S7, the obtained track address is assigned by the controller to TA0, (TA1)-
1, (TA2) -2, (TA3) -3, and (TA4)-
4 are compared to determine whether all values match. If all match, in step S8, the address of the target track n is determined to be TA0, and the process ends as "normal state". On the other hand, if they do not all match, in step S9, it is determined that no determination has been made, and the process ends as an “abnormal state”.

The processing from step S1 to step S8 or step S9 is completed within the period until the light spot from the optical head reaches the recording information area 35, that is, before passing through the gap. Then, since the track address is determined before entering the information recording area 35, if it is confirmed based on the determination result that the track is located at the target track n, the information of the tracks n to (n + 4) can be read out. Alternatively, the operation of recording information on any of the tracks n to (n + 4) is started.

Although the left ID 34a has been described in the figure, it goes without saying that the same can be achieved by using the right ID 34b. Also, change the arithmetic expression for comparison,
For example, TA0 + 1, (TA1), (TA2) -1, (TA
3) -2 and (TA4) -3, the target track
The (n + 1) track address (TA1) is obtained. Further, in the illustrated example, five (all) I
Although the track address is demodulated and error corrected from Dn to ID (n + 4), the track address may be determined by performing demodulation and error correction on at least two or more addresses.

Alternatively, steps S2 to S
6. In the case of IDn or I where the error could not be corrected
When D (n + 4) has occurred, in step S7, the determination cannot be made without performing the comparison, and the process may end as an “abnormal state”. Also, in step S7, the track address may be determined by majority logic instead of simply obtaining all the matches.

In the present embodiment, the determination is made by obtaining a track address from a plurality of tracks adjacent to the track address to be determined using a recording medium in which the track address is not overwritten in the ID portion. . Therefore, it is possible to determine the track address with high reliability, as in the case of the conventional recording medium having the multiplexed track address. In other words, the present track address determination method does not require the multiple writing of the track address of the recording medium while keeping the error rate of the track address recognition low, so that the storage capacity of the recording medium can be increased by the amount of the need. it can.

Although an optical card in which ID portions are provided on one track on both the left and right sides is shown as a recording medium, the present invention
This is also effective for an optical card provided with only one ID section on a track. In this case, the storage capacity is further increased as compared with the above embodiment.

The present invention can be applied not only to an apparatus for mounting an optical card as a recording medium but also to an optical information recording / reproducing apparatus of a multi-track reading type for a reproducing type, a write-once type, and a rewritable type disk.

[0042]

As described above, the track address determination method of the present invention can be applied to a multi-track readout type optical information recording / reproducing apparatus, and the I / O of a recording medium to be used.
There is an effect that high reliability of track address recognition can be ensured without overwriting track addresses in the D section, and the storage capacity of the recording medium can be increased by the amount of no overwriting of addresses.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of a reproducing circuit of an optical recording / reproducing apparatus.

FIG. 2 is a timing chart showing the operation of the apparatus of FIG.

FIG. 3 is a schematic configuration diagram of a track ID section and an information recording section.

FIG. 4 is a flowchart according to a track address determination method.

FIG. 5 is an overall configuration diagram of an optical card.

FIG. 6 is a schematic configuration diagram showing an example of a track format.

FIG. 7 is an explanatory diagram showing conventional track address reading and its determination.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Optical card apparatus 2a, 2b, 2c ... Disk 5a, 5b, 5c ... Memory 7 ... Selector 10 ... Demodulation circuit 11 ... Memory 12 ... Error correction circuit

Continuation of the front page (58) Fields investigated (Int. Cl. ⁶ , DB name) G11B 7/00 G11B 20/10-20/16 351 G11B 27/10

Claims (1)

(57) [Claims] 1. A recording system comprising a plurality of tracks, each track including at least one track address information section in which one track address is written, and an information recording area for recording / reproducing information. For the medium,
The optical information recording / reproducing apparatus for irradiating a plurality of tracks of the recording medium with a light spot and simultaneously reading out information of the plurality of tracks is used, and a track of a desired track among the plurality of tracks is used. In the track determining method for determining an address, a step of reading track addresses of a track address information section one by one from two or more different tracks among the plurality of tracks read simultaneously, Determining a track address of a desired track based on track addresses read from two or more different tracks in the reading procedure within a period until the area reaches the area. Track address determination method.