JP2751271B2 - Digital transceiver - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a digital transmitting / receiving apparatus used for digital communication.

FIG. 3 shows a configuration of a conventional digital transmitting / receiving apparatus.

In FIG. 3, a signal input to a terminal 1 is encoded by a convolutional encoder 2, subjected to differential phase modulation by a differential phase modulator 3, and transmitted to a line 4. This signal is
Distortion and the like are added in the line 4 and received by the receiving side.

This received signal is subjected to quadrature synchronous detection by the synchronous detector 5, and the synchronous detector 5 outputs an I component signal 18 and a Q component signal 19 of analog waveforms as shown in FIG. 2 (b).

When the I and Q component signals 18 and 19 are subjected to soft decision maximum likelihood decoding by the maximum likelihood decoders 6I and 6Q, respectively, the binary I component signal 14 as shown in FIG. , Q component signal 15, and then, for example, the output of the demodulator 7 at the time 2T is a value “1” of the Q component 15 identified by the rising edge of the unipolar clock 16 at the time 2T, and one symbol before the symbol The exclusive OR "0" of the "1" of the I component 14 identified by the falling edge of the clock 16 at the time T and the value "0" of the clock 16 in the period T to 2T is obtained. 7 is an I component 14 identified by the falling edge of clock 16 at 3T.
Value “0” and the clock at time 2T one symbol before
The value of Q component 15 identified by the rising edge of 16 "1"
And the exclusive OR "1" of the value "1" of the clock 16 during 2T to 3T.

The binary digital signal 17 output from the demodulator 7 is
The hard-decision maximum likelihood decoder 8 performs hard-decision maximum likelihood decoding for convolutional coding.

Therefore, in the above conventional example, the maximum likelihood decoders 6I and 6Q perform soft decision maximum likelihood decoding, and the hard decision maximum likelihood decoder 8 performs hard decision maximum likelihood decoding. The added received signal can be decoded.

However, in the above-mentioned conventional digital transmitting and receiving apparatus, the received signal is decoded by the three maximum likelihood decoders 6I, 6Q and 8, so that the decoding processing amount is large and the circuit configuration is complicated. There is a problem that there is.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described conventional problems, and has as its object to provide a digital transmission / reception device that can reduce the amount of decoding processing and has a simple circuit configuration.

Means for Solving the Problems In order to achieve the above object, the present invention provides a synchronous detector for synchronously detecting a coded and modulated received signal and outputting an I component and a Q component signals. A first output that outputs the product of the value of the Q component that is soft-decided at the rising or falling edge of the clock, the value of the I component that is soft-decided at the falling or rising edge of the clock one symbol before, and the value of the clock therebetween. In addition, the value of the I component that is soft-decided at the falling or rising edge of the clock in the symbol following the certain symbol and the value of the Q component that is soft-decided at the rising or falling edge of the clock one symbol before A soft decision unit that performs a second operation of outputting a product of a value and a clock value therebetween, and alternately performs the first and second operations; And a decoder that performs maximum likelihood decoding by soft decision on the signal soft-decided by the soft decision unit.

Operation According to the present invention, the received signal can be decoded by one decoder by the above configuration, so that the decoding processing amount can be reduced as compared with the conventional example, and the circuit configuration is simplified.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a digital transmitting / receiving apparatus according to the present invention. FIG. 2 is a waveform diagram showing main signals of the digital transmitting / receiving apparatus shown in FIG. The same components as those described above are denoted by the same reference numerals.

In FIG. 1, 1 is a signal input terminal, 2 is a convolutional encoder that encodes a signal from the input terminal 1,
Is a differential phase modulator that differentially modulates the encoded signal from the convolutional encoder 2 and outputs the signal to the line 4. This signal is subjected to distortion and the like in the line 4 and is received by the receiving side. .

Reference numeral 5 denotes a quadrature synchronous detection of the signal received via the line 4, and an I-component analog signal 18 as shown in FIG.
And a synchronous detector that outputs a Q component analog signal 19, 9
Is a soft-decision that soft-decisions the I-component and Q-component signals 18 and 19 from the synchronous detector 5 and outputs a multi-valued quantized signal 21 as shown in FIG. The unit 10 is a soft decision maximum likelihood decoder that performs maximum likelihood decoding of the signal 21 soft-decided by the soft decision unit 9 by soft decision.

Next, the operation of the above embodiment, particularly the operation of the soft decision unit 9 and the soft decision maximum likelihood decoder 10, will be described.

When the analog signals 18 and 19 of the I component and the Q component as shown in FIG. 2 (b) are input to the soft decision unit 9, for example, the output of the soft decision unit 9 at the time 2T is a double-polarity clock 20 at the time 2T. The value of the Q component 19, which is soft-decided at the rise of `` 0.
7 ”, the product“ −0.7 ”of the value“ 1.0 ”of the I component 18 that is soft-decided at the falling edge of the clock 20 at the time T one symbol before and the value“ −1 ”of the clock 20 from T to 2T during that time Becomes

At the time 3T, the output of the soft decision unit 9 is the I component
And the value of the Q component 19 that is soft-decided at the rising edge of the clock 20 at the time 2T one symbol before, that is, the value of 0.
7 ”and the product“ −0.4 ”of the value“ 1 ”of the clock 20 in 2T to 3T during that time.

In this case, when the values of the I and Q components 18 and 19 to be soft-decided are larger than "1" or smaller than "-1", they are multiplied as "1" and "-1", respectively.

The output signal 21 of the soft decision unit 9 is a multi-valued quantized value, and is decoded by the soft decision maximum likelihood decoder 12.

Therefore, according to the above embodiment, a single decoder 10 can decode a received signal in which distortion or the like has been added on the line 4, so that the decoding processing amount can be reduced as compared with the conventional example. Further, the circuit configuration is simplified.

As described above, according to the present invention, the synchronous detector synchronously detects the received signal, outputs the I component and the Q component signals, and the soft decision unit determines whether the clock rises or falls in a certain symbol. Performs the first operation of outputting the product of the value of the Q component that is soft-decided in the above, the value of the I component that is soft-decided at the falling or rising edge of the clock one symbol before, and the value of the clock between them. , The value of the I component which is soft-decided at the falling or rising edge of the clock in the above or next symbol, and 1
A second operation of outputting the product of the value of the Q component that is soft-decided at the rising or falling edge of the clock before the symbol and the value of the clock between them is performed, and the first and second operations are alternately performed. Since the decoder performs the maximum likelihood decoding by soft decision on the signal soft-decided by the soft decision unit, the received signal can be decoded by one decoder. Can be reduced, and the circuit configuration can be simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a digital transmission / reception device according to the present invention, FIG. 2 is a waveform diagram showing main signals of the digital transmission / reception device of FIG. 1, and FIG. It is a block diagram showing an apparatus. 2 convolutional encoder, 3 differential phase modulator, 4 line, 5 synchronous detector, 9 soft decision unit, 10 soft decision maximum likelihood decoder.

Claims (1)

(57) [Claims] 1. A synchronous detector for synchronously detecting a coded and modulated received signal and outputting an I-component and a Q-component signal;
Outputs the product of the value of the Q component that is soft-decided at the rising or falling edge of the clock in a certain symbol, the value of the I component that is soft-decided at the falling or rising edge of the clock one symbol before, and the value of the clock between them In addition, the first operation is performed, and the value of the I component that is soft-decided at the falling or rising edge of the clock in the symbol next to the certain symbol, and the soft-decision is made at the rising or falling edge of the clock one symbol before. A soft decision unit that performs a second operation of outputting the product of the value of the Q component and the value of the clock therebetween, and alternately performs the first and second operations, and a signal soft-decided by the soft decision unit And a decoder for performing maximum likelihood decoding by soft decision.