JP2510456B2 - Image coding device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding apparatus used for digitally coding and transmitting a moving image, and more particularly to an image coding apparatus capable of improving coding efficiency.

[0002]

2. Description of the Related Art FIG. 7 is a block diagram showing a conventional image coding apparatus. In the figure, 1 is an input digital image signal, 2 is an input digital image signal 1 for every K (K is an integer of 2 or more). A block / raster converter (scan converter) for collectively grouping into blocks, 3 is an input signal series grouped for every K pieces, 4 is a past at the same position on the image as an input signal series in a frame memory 12 described later. Signal sequence 4
, 6 is a threshold value used for significant / insignificant discrimination, 7 is significant / insignificant discrimination based on the threshold value 6, and motion detection is performed to block-code only significant difference signal sequence. A block encoder, 8 is a significant difference signal sequence block encoded signal output from the motion detection block encoder 7.

Reference numeral 9 is a block decoder which decodes the significant block data included in the significant difference signal sequence block coded signal 8 and outputs a decoded difference signal sequence 10, and 11 is a signal sequence 4 outputted from the frame memory 12. A decoded signal sequence obtained by adding the decoded differential signal sequence 10 and supplied to the frame memory 12.

Numeral 13 is a code allocator which outputs a code allocation signal 14 by variable length coding the significant difference signal sequence block coded signal 8 output from the motion detection block coder 7, and 15 is a code allocator 13. , 16 is an output of the buffer memory 15, and 17 is a frame configuration circuit connected to the output side of the buffer memory 15, which outputs to a transmission frame transmission line 18.

Next, the operation will be described. When the input digital image signal 1 is supplied, the block / raster converter 2 outputs the input signal sequence 3 by dividing the input digital image signal 1 into K blocks. Then, the past signal series 4 at the same position on the image of the frame memory 12 is subtracted from the input signal series 3 to obtain the difference signal series 5, and then the motion detection block encoder 7 sets a threshold value 6 By performing the significant / unintentional discrimination based on the above, only the significant difference signal sequence is output as the significant difference signal sequence block coded signal 8.

The significant difference signal sequence block coded signal 8 is decoded in the block decoder 9 to obtain a decoded difference signal sequence 10, and the decoded signal sequence 4 is added to the past signal sequence 4. 11 is required.

Then, the decoded signal sequence 11 is supplied to the frame memory 12 to update the contents of the block so that the contents are matched by transmission and reception.

Next, the significant difference signal sequence block coded signal 8 consisting of the significant / unconscious result and the significant block coding result is code-length-coded by the code assigner 13 for each cluster in block units. It is stored in the buffer 15 as the signal 14. The contents of the buffer 15 are read at a constant speed so that the speed is smoothed, and the output signal 16 is supplied to the frame composing circuit 17 to compose a transmission frame to form the transmission line 1.
8 is sent. FIG. 8 shows an example of encoding.

[0009]

Since the conventional image coding apparatus is configured as described above, since the ratio of significant / insignificant information in the total amount of information increases, the amount of information increases, There is a problem that the coding efficiency is reduced.

The present invention has been made in order to solve the above problems, and an image code which can improve the coding efficiency by performing variable-length coding on M significant / insignificant information collectively. The purpose is to obtain a chemical conversion device.

[0011]

An image coding apparatus according to a first aspect of the present invention is configured to collectively code significant / unconscious results for every M large blocks.

The image coding apparatus according to the invention of claim 2 collects the identification results of the block encoder for every M pieces.
At the same time, the results collected for each M pieces are combined into a predetermined pattern.
If it matches the specified pattern by determining whether to match
, The predetermined pattern and the predetermined pattern are continuous.
The number of times to be performed is variable length coded and output .

[0013]

In the image coding apparatus according to the first and second aspects of the invention, the coding efficiency is improved by collectively coding the significant / unconscious results into M pieces.

[0014]

EXAMPLES Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an image coding apparatus according to an embodiment of the present invention.
Reference numeral 1 is a scan converter for dividing an input digital image signal 201 into blocks for every K pieces, and 102 is a frame memory 10.
3, the difference signal series 203 between the signal series 204 on the same image position and the latest input signal series 202 is determined based on the threshold value 300, and only the significant difference signal series is block coded. It is a block encoder for converting.

Reference numeral 103 is a frame memory for storing at least one frame of an image signal, and 104 is a block-encoded signal sequence 2 output from the block encoder 102.
It is a block decoder that decodes 06 to obtain a decoded differential signal sequence 207.

Reference numeral 105 denotes a significant / insignificant code assigner for performing variable length coding by further summing the results of significant / unconsciousness for each M, 106 denotes a significant block code assignor for variable length coding a significant block coded signal, Numeral 107 is a buffer for temporarily storing the non-uniformly input significant / insignificant code allocation results and performing rate balancing, and 108 is a buffer for temporarily storing non-uniformly input significant block code assignment signals to perform rate balancing. , 109 are header-added frame configuration circuits (frame configuration circuits) that read information from the buffers 107 and 108 and add headers for transmission.
Is.

FIG. 2 shows a significant / insignificant code assigner 1 shown in FIG.
5 is a block diagram showing a concrete example of a buffer 107 and a buffer 107. In the figure, 110 is a blocking circuit for grouping significant / unconscious signals into M blocks and further dividing them into blocks.
Reference numeral 11 is a pattern determination circuit that determines whether to encode a continuous number of patterns having a high possibility of continuous block patterns or to encode a combination thereof, and 112 is a code for controlling the encoding allocation process. A conversion control circuit, 113 is a run counter for counting the number of consecutive patterns, 1
Reference numeral 14 is a pattern coding circuit for allocating codes to patterns, 115 is a run coding circuit for allocating a continuous number of codes, 116 is a gate for inhibiting output until the code allocation processing is completed, and 117 is code allocation processing completed. It is a selector for selecting a route that has been made.

Next, the operation will be described. First, the input digital image signal 201 is divided into K blocks by the scan converter 101 to form a signal series 202. Then, from this signal series 202, the past signal series 204 at the same position on the image stored in the frame memory 103
Is subtracted, the difference signal sequence 203 is obtained.

Next, with respect to this differential signal sequence 203,
The block encoder 102 discriminates significant / insignificant on the basis of the threshold value 300, and the significant signal difference signal sequence 203
Only block code. The block decoder 104 decodes the block coded signal 206 to obtain a decoded differential signal sequence 207, which is added to the past signal sequence 204 to obtain a decoded signal sequence 208. Then, the decoded signal sequence 208 is supplied to the frame memory 103 to update the contents thereof so that the contents of the transmitted and received frame memories match.

On the other hand, the significant / unconscious signals 205 are further grouped into M pieces in the block forming circuit 110 shown in FIG. 2, and the pattern judging circuit 111 encodes a continuous number or a combination thereof. Determine whether or not. Such processing is effective because there is a property that an area with change and an area without change are continuous on the screen to some extent in the image. For this reason,
There is a high possibility that some combinations, for example, combinations in which all small blocks inside a large block are insignificant blocks, or combinations in which all small blocks are significant blocks occur consecutively.

The run counter 113 counts the consecutive numbers for each specific combination, and the run encoding circuit 115 counts the consecutive numbers at the time when the sequences of the same pattern are separated.
Send to. The run coding circuit 115 performs variable length coding on a continuous number. The pattern coding circuit 114 also performs variable length coding on the combination itself.

The gate 116 prohibits output until the encoding is completed, and the selector 117 selects the encoded data and writes it in the buffer 107. At the same time 1
While the video frame is being encoded, the significant block code assignor 106 converts the significant block coded signal 206 into a variable length code and writes it into the buffer 108. When the encoding process of one video frame is completed, the header addition frame configuration circuit 109 first adds a header to the significant / unconscious information 210 of the entire one video frame and transmits the information, and finally adds a special code.
Next, a header is added to the significant block data 211 of the entire one video frame for transmission, and the entire one video frame is transmitted.
01 is ended. 3 to 6 show examples of the above encoding.

Embodiment 2 FIG. Although the significant block is block-encoded in the above embodiment, the same effect as that of the above embodiment can be obtained even if the significant block is encoded for each pixel.

[0024]

As described above, according to the first aspect of the present invention, the identification results of the block encoder can be collected for every M pieces.
Since it is configured to perform variable length coding , significant / insignificant discrimination
The amount of information is reduced, and the coding efficiency is improved. In addition, according to the invention of claim 2, it is grouped by M pieces.
It is determined whether the results of the
If the specified pattern matches, the specified pattern
And variable length coding of the number of times the predetermined pattern continues.
Since it is configured to output as M,
Encode consecutive times without encoding all
It will be sufficient if the specified pattern continues.
As the number increases, more encoding than the invention of claim 1
It has the effect of improving efficiency.

[Brief description of drawings]

FIG. 1 is a block diagram showing an image coding apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a specific example of a significant / insignificant code assigner and a buffer in FIG.

FIG. 3 is an explanatory diagram showing an operation of blocking.

FIG. 4 is an explanatory diagram illustrating an operation of significant / unconscious information.

FIG. 5 is a pattern diagram showing an example of encoding / decoding of significant / unconscious information.

FIG. 6 is a transmission frame diagram showing a transmission frame after a header-added frame structure.

FIG. 7 is a block diagram showing a conventional image encoding device.

FIG. 8 is an explanatory diagram explaining an encoding operation.

[Explanation of symbols]

101 Scan Converter 102 Block Encoder 103 Frame Memory 104 Block Decoder 105 Significant / Insignificant Code Assigner 106 Significant Block Code Assigner 109 Header-added Frame Configuration Circuit (Frame Configuration Circuit)

Claims (2)

(57) [Claims] 1. A frame memory that stores a digital image signal for at least one video frame, and blocks an input digital image signal for each K (K is an integer of 2 or more).
And a scan converter that generates an input signal sequence, the blocked input signal sequence and the frame memory.
Significance of signal sequence obtained from
A signal system that identifies insignificance based on a predetermined threshold
A block encoder for block coding for the column, before
Signal system blocked encoded by serial block encoder
Decodes the sequence and bases on the decoded signal sequence.
Based on the digital image stored in the frame memory
Block decoder for updating a signal and said block code
A significant / insignificant code allocation unit for variable length coding the identification result of the encoder the M (M is an integer of 2 or more) are grouped by the Bro
Coded block-coded signal sequence
A significant block code allocator for-coding, the significance / Muifu
And a frame configuration circuit that outputs the outputs of a significant block code assigner . 2. The significant / insignificant code assignor is configured to
Of the identification results of the coder encoder for each M
Whether or not the result collected for each M matches a predetermined pattern
If it matches the predetermined pattern, the
The given pattern and the number of times the given pattern continues
2. The variable-length coded data is output after being encoded.
Placing the image coding apparatus.