JP2023140098A - Optical reflective ABZ phase encoder - Google Patents

Abstract

To provide an optical reflection type ABZ phase encoder that uses a narrow pitch scale capable of making a distance for arranging various kinds of components larger, by using secondary Talbot image formation, than that in a configuration using primary Talbot image formation.SOLUTION: An optical reflection type ABZ phase encoder comprises: a light source that radiates light; a scale that reflects the light; and an optical detector that receives reflection light reflected by the scale. The optical detector includes a processing circuit that when a differential signal between a current signal by light reception at a first position and a current signal by the light reception at a second position exceeds a threshold as for the first position and the second position separated by two pitches in secondary Talbot image formation of the light, determines the first and second positions as positions in a Z phase representing prescribed reference positions.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to an optical reflective ABZ phase encoder.

An optical encoder equipped with a light source, a scale, and a photodetector has been developed (see Patent Document 1).
As a specific example, an optical encoder (optical reflection type ABZ phase encoder) that detects A phase, B phase, and Z phase is known.

JP 2017-111068 Publication

However, in the conventional technology, a configuration using first-order Talbot imaging can be considered in an optical reflection type ABZ phase encoder using a narrow pitch scale, but in this configuration, the distance at which various components are arranged (for example, the light source and the distance between the scale and the photodetector) are small, making it sometimes difficult to install these parts.

The present disclosure has been made in consideration of these circumstances, and by using second-order Talbot imaging, the distances for arranging various parts can be increased compared to a configuration using first-order Talbot imaging. It is an object of the present invention to provide an optical reflection type ABZ phase encoder using a narrow pitch scale that can be used.

One aspect is an optical reflective ABZ phase encoder including a light source that emits light, a scale that reflects the light, and a photodetector that receives the reflected light reflected by the scale, The device generates a difference signal between a current signal due to light reception at the first position and a current signal due to light reception at the second position, with respect to a first position and a second position separated by two pitches in the secondary Talbot imaging of the light. This is an optical reflection type ABZ phase encoder that includes a processing circuit that determines that the position is a Z phase position representing a predetermined reference position when the position exceeds a threshold value.

According to the present disclosure, in an optical reflective ABZ phase encoder using a narrow pitch scale, by using second-order Talbot imaging, various components can be arranged more easily than in a configuration using first-order Talbot imaging. The distance can be increased.

FIG. 1 is a diagram illustrating an example of a schematic structure of an optical reflection type ABZ phase encoder according to an embodiment. FIG. 1 is a diagram illustrating an example of a schematic structure of an optical reflection type ABZ phase encoder according to an embodiment. FIG. 2 is a diagram showing an example of a schematic structure of an optical reflection type ABZ phase encoder using a narrow single slit LED as a light source. FIG. 2 is a diagram showing an example of a schematic structure of an optical reflection type ABZ phase encoder using a narrow single slit LED as a light source. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a narrow single slit LED as a light source. It is a figure showing an example of composition of a light emitting surface of a multi-slit LED concerning an embodiment. It is a figure showing the example of composition of the unit light emitting surface which constitutes the light emitting surface of the multi-slit LED concerning an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide multi-slit LED as a light source according to an embodiment. FIG. 3 is a diagram for explaining the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a wide multi-slit LED as a light source according to an embodiment. FIG. 2 is a diagram showing an example of the configuration of a photodiode array according to an embodiment. It is a figure showing an example of A phase and B phase (n=1) concerning an embodiment. It is a figure which shows an example of the Lissajous waveform (n=1) of A phase and B phase based on embodiment. It is a figure showing an example of Zs phase and R phase (n=1) concerning an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a narrow single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide single slit LED as a light source according to an embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide multi-slit LED as a light source according to an embodiment. FIG. 3 is a diagram for explaining the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a wide multi-slit LED as a light source according to an embodiment. It is a figure showing an example of A phase and B phase (n=2) concerning an embodiment. FIG. 3 is a diagram showing an example of A-phase and B-phase Lissajous waveforms (n=2) according to the embodiment. It is a figure showing an example of Zs phase and R phase (n=2) concerning an embodiment. FIG. 7 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=1) in an optical reflection type ABZ phase encoder using a multi-slit LED with four slits as a light source according to an embodiment. FIG. 3 is a diagram illustrating an example of a first processing circuit that processes a light reception signal by a photodiode array according to an embodiment. FIG. 6 is a diagram showing an example of a differential voltage and a comparison voltage in the first processing circuit according to the embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a multi-slit LED with four slits as a light source according to an embodiment. FIG. 3 is a diagram showing an example of a differential voltage and a comparison voltage in the first processing circuit. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a multi-slit LED with four slits as a light source according to an embodiment. FIG. 6 is a diagram showing an example of a differential voltage and a comparison voltage in the first processing circuit according to the embodiment. FIG. 3 is a diagram showing an example of the intensity of an image formed on a photodiode array (n=2) in an optical reflection type ABZ phase encoder using a multi-slit LED with four slits as a light source according to an embodiment. FIG. 7 is a diagram illustrating an example of a second processing circuit that processes a light reception signal by the photodiode array according to the embodiment. It is a figure which shows an example of the difference voltage and the comparison voltage in the 2nd processing circuit based on embodiment. FIG. 2 is a diagram showing an example of the configuration of a photodiode array according to an embodiment. FIG. 7 is a diagram illustrating an example of a third processing circuit that processes a light reception signal by the photodiode array according to the embodiment. FIG. 3 is a diagram schematically showing a third processing circuit that processes a light reception signal by a photodiode array according to an embodiment.

Embodiments of the present disclosure will be described below with reference to the drawings.

[Optical reflective ABZ phase encoder]
FIG. 1 is a diagram showing an example of a schematic structure of an optical reflection type ABZ phase encoder 1 according to an embodiment.
The optical reflective ABZ phase encoder 1 includes a multi-slit LED (Light Emitting Diode) 11, a reflective scale 12, and a photodiode array 13.

Here, the multi-slit LED 11 is an example of a light source.
Further, the reflective scale 12 is an example of a scale.
Further, the photodiode array 13 is an example of a photodetector.

The multi-slit LED 11 includes a light emitting surface A1.
The light emitting surface A1 emits (emits) light (rays).
In the example of FIG. 1, the multi-slit LED 11 includes four light-emitting surfaces, but in order to simplify the illustration, only one light-emitting surface A1 is labeled with a reference numeral.
The four light emitting surfaces are arranged at equal intervals.
Here, in this embodiment, the multi-slit LED 11 having four light emitting surfaces is shown, but the number of the plurality of light emitting surfaces may be any number.

The reflective scale 12 includes a reflective surface B1, a reflective surface C1, and an absorbing surface D1.
In the center part, as a Z-phase pattern used as an index of the initial position, the reflective surface C1 has a width of five continuous lines with respect to the normal reflective surface B1.
The reflective surface B1 and the reflective surface C1 reflect the light emitted from the multi-slit LED 11.
The absorption surface D1 absorbs the light emitted from the multi-slit LED 11.
In the example of FIG. 1, the reflective scale 12 includes a plurality of reflective surfaces (in this case, normal reflective surfaces), but in order to simplify the illustration, only one reflective surface B1 is labeled with a reference numeral. It is attached.
The plurality of reflective surfaces (here, normal reflective surfaces) are arranged at regular intervals except for the reflective surface C1 of the Z-phase pattern.

The photodiode array 13 includes an array of photodiodes (a plurality of photodiodes) that receive light.
A light receiving pattern is formed on the photodiode array 13 by the light (reflected light) from the reflective scale 12 .
FIG. 1 shows a pixel image E1 of a photodiode array.

Here, an outline of the operation of the optical reflection type ABZ phase encoder 1 will be explained.
The multi-slit LED 11 emits light, the reflective scale 12 reflects the light, and the photodiode array 13 receives the reflected light and performs predetermined signal processing.
The reflective scale 12 is formed with an optical pattern and can be moved relative to the light source (multi-slit LED 11).
The optical pattern of the reflective scale 12 has reflective parts (reflective surface B1 in the example of FIG. 1) and non-reflective parts (absorbing surface D1 in the example of FIG. 1) alternately in the moving direction of the reflective scale 12. At least one non-periodic index pattern (in the example of FIG. 1, the pattern of the reflective surface C1) is arranged in the arranged periodic incremental pattern.
In the photodiode array 13, a plurality of pixels including pixels for detecting an incremental pattern and pixels for detecting an index pattern are arranged in a constant pattern corresponding to the moving direction of the reflective scale 12. In this embodiment, each pixel of the photodiode array 13 is a unit in which each photodiode receives light and converts it into an electrical signal.
The photodiode array 13 generates a reference position signal (Z-phase pulse signal) based on the index pattern detection signal.

In the reflective scale 12, the width of each reflective portion is, for example, the same width (or approximately the same width) as the non-reflective portion of the incremental pattern.
In the photodiode array 13, the plurality of pixels are arranged periodically so that it is possible to detect four phase parts having different phases by 90 degrees in a bright and dark pattern having a constant period. There is.

As a configuration example, each of the plurality of pixels includes a first group (A phase), a second group (-A phase), a third group (B phase), a fourth group (-B phase), and a fifth group. (Z phase) and the sixth group (-Z phase).
As another configuration example, each of the plurality of pixels includes a first group (A phase), a second group (-A phase), a third group (B phase), a fourth group (-B phase), and a fifth group. The corresponding group among the group (Z phase), the sixth group (-Z phase), the seventh group (R phase), and the eighth group (-R phase) is assigned.
In this embodiment, the A phase is also referred to as the Ap phase, the -A phase is also referred to as the An phase, the B phase is also referred to as the Bp phase, the -B phase is also referred to as the Bn phase, the Z phase is also referred to as the Zp phase, and - The Z phase is also called the Zn phase. Further, in this embodiment, the R phase is also called the Rp phase, and the -R phase is also called the Rn phase.

FIG. 2 is a diagram showing an example of a schematic structure of the optical reflection type ABZ phase encoder 1 according to the embodiment.
FIG. 2 is a diagram showing an example of the structure of the optical reflective ABZ phase encoder 1 when viewed from a viewpoint in the direction W1 shown in FIG.
1 and 2 show light rays from the multi-slit LED 11 to the reflective scale 12 (outbound) and light rays from the reflective scale 12 to the photodiode array 13 (return).

[Description of narrow width single slit light source (order n=1)]
FIG. 3 is a diagram showing an example of a schematic structure of an optical reflection type ABZ phase encoder 1a using a narrow single slit LED 11a as a light source.
The optical reflective ABZ phase encoder 1a includes a narrow single slit LED 11a, a reflective scale 12a, and a photodiode array 13a.

Here, FIG. 3 is a diagram for explaining the case of a narrow width single slit light source (n=1) regarding the optical reflection type ABZ phase encoder 1 shown in FIG. 1.

The narrow single slit LED 11a includes one light emitting surface A1a.
The reflective scale 12a includes a reflective surface B1a (normal reflective surface), a reflective surface C1a (a Z-phase pattern reflective surface), and an absorbing surface D1a.
In the example of FIG. 3, the reflective scale 12a includes a plurality of reflective surfaces (here, normal reflective surfaces), but in order to simplify the illustration, only one reflective surface B1a is labeled with a reference numeral. It is attached.
A light receiving pattern is formed on the photodiode array 13a.
FIG. 3 shows a pixel image E1a of the photodiode array.

FIG. 4 is a diagram showing an example of a schematic structure of an optical reflection type ABZ phase encoder 1a using a narrow single slit LED 11a as a light source.
FIG. 4 is a diagram illustrating an example of the structure of the optical reflective ABZ phase encoder 1a when viewed from a viewpoint in the direction W1a illustrated in FIG. 3.
3 and 4 show the light rays (going) from the narrow single slit LED 11a to the reflective scale 12a, and the light rays (returning) from the reflective scale 12a to the photodiode array 13a.

With reference to FIGS. 3 and 4, the operation of the optical reflection type ABZ phase encoder 1a using the narrow single slit LED 11a as a light source will be considered.
The distance from the narrow single slit LED 11a to the reflective scale 12a and the distance from the reflective scale 12a to the photodiode array 13a are approximated and considered as being sufficiently equal to the distances of the outgoing and returning light rays.
In this embodiment, these distances are expressed as distance z.

Regarding the narrow single slit LED 11a, light from the intersection F1a with the broken line (broken line in FIG. 3) on the light emitting surface A1a (light from an ideal point light source) will be considered.
Regarding the reflective scale 12a, consider imaging on the broken line (the broken line in FIG. 3).
In this embodiment, the period of the reflective surface B1a in the reflective scale 12a (the same applies to the period of the reflective surface B1 in the reflective scale 12 shown in FIG. 1) is set to L.
Regarding the photodiode array 13a, consider imaging on the dashed line (dashed line in FIG. 3).

FIG. 5 is a diagram showing an example of the intensity of an image formed on the photodiode array 13a (n=1) in the optical reflection type ABZ phase encoder 1a using a narrow single slit LED as a light source.
In the graph shown in FIG. 5, the horizontal axis represents the position in the photodiode array 13a (position in the direction of the broken line), and the vertical axis represents the intensity of received light.
FIG. 5 shows the intensity characteristics (intensity characteristics 1011) of the image formed on the photodiode array 13a.
This imaging is called first-order (n=1) Talbot imaging.

z=2・(nL ² /λ)

This image formation is an image formation when the order n=1.
L is the periodic length of the reflective surface B1a of the reflective scale 12a.
The imaging period on the photodiode array 13a is 2L.
The example in FIG. 5 is a calculation example when L=20 μm, the wavelength of light λ=0.635 μm, and z is about 1260 μm.
In the intensity characteristic 1011 shown in FIG. 5, the vicinity of the center is projected by the Z-phase detection pattern (pattern formed by the reflective surface C1a) of the reflective scale 12a.

[Description of wide multi-slit light source (order n=1)]
FIG. 7 is a diagram showing a configuration example of the light emitting surface A1c of the multi-slit LED 11c according to the embodiment.
Here, the multi-slit LED 11c and the light-emitting surface A1c are examples of the multi-slit LED 11 and the light-emitting surface A1 shown in FIG.
In the example of FIG. 7, the width of one light emitting surface A1c is 20 μm.
In the example of FIG. 7, for convenience of explanation, the four light-emitting surfaces A1c are respectively assigned symbols α1, α2, α3, and α4.
In the example of FIG. 7, the multi-slit LED 11c includes four light-emitting surfaces, but in order to simplify the illustration, only one light-emitting surface A1c is labeled with a reference numeral.

FIG. 6 is a diagram showing an example of a model configuration of unit light emitting surfaces G1 to G5 that constitute the light emitting surface A1c of the multi-slit LED 11c according to the embodiment.
In this embodiment, one light emitting surface A1c (for example, the light emitting surface α1) shown in FIG. 7 is composed of five unit light emitting surfaces G1 to G5. The same applies to the configurations of the light emitting surfaces α2, α3, and α4 shown in FIG. 7.
In the example of FIG. 6, the width of each unit light emitting surface G1 to G5 is 0.2 μm in the direction in which the plurality of unit light emitting surfaces G1 to G5 are lined up.
In the example of FIG. 7, the period in which the plurality of unit light emitting surfaces G1 to G5 are lined up is 4 μm.

Here, in the examples of FIGS. 6 and 7, five narrow-width single-slit LEDs shown in FIG. 3 are collected as shown in FIG. 6, and the light emitting surface A1c of each multi-slit LED 11c shown in FIG. 7 is approximated. Calculating and designing.

8A to 8D are diagrams showing an example of the intensity of an image formed on the photodiode array 13 (n=1) in the optical reflection type ABZ phase encoder 1 using the wide single slit LED as a light source according to the embodiment.
FIG. 8E is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=1) in the optical reflection type ABZ phase encoder 1 using the wide multi-slit LED as a light source according to the embodiment.
In each of the graphs shown in FIGS. 8A to 8E, the horizontal axis represents the position in the photodiode array 13 (the position in the direction in which the plurality of light receiving sections are lined up), and the vertical axis represents the intensity of received light.

In each of FIGS. 8A to 8D, an example of the waveform (imaging intensity waveform) of each of the five unit light emitting surfaces G1 to G5 is shown for each of the light emitting surfaces A1c of α1, α2, α3, and α4. ), (a2), (a3), (a4), and (a5). Each of the waveforms (a1), (a2), (a3), (a4), and (a5) is similar to the waveform obtained by a narrow single slit, as shown in FIG.

Each of FIGS. 8A to 8D shows the synthesis results of the waveforms (imaging intensity waveforms) of the five unit light emitting surfaces G1 to G5 for each of the light emitting surfaces A1c of α1, α2, α3, and α4 ( all).
That is, in each of FIGS. 8A to 8D, the sum (composition) of (a1), (a2), (a3), (a4), and (a5) is (all).

FIG. 8E shows waveforms of the synthesis results of α1 (all), α2 (all), α3 (all), and α4 (all).

Here, in this model, the imaging intensity by one slit-shaped light source of the multi-slit LED 11c is approximated by combining the intensity of a δ-function ultrafine line light source at the imaging position. Furthermore, the coupling strength by multi-slits is similarly approximated by intensity synthesis at the imaging position.
That is, the imaging intensity by the light emitting surface A1c of α1 is expressed as (all), which is the result of combining the imaging intensities (a1) to (a5) by the five unit light emitting surfaces G1 to G5, respectively. The same applies to the imaging intensities of the light emitting surfaces α2, α3, and α4.
The imaged intensity of the entire light emitting surface of α1, α2, α3, and α4 is the result of combining the imaged intensities (all) of each of α1, α2, α3, and α4, and is the imaged intensity shown in FIG. 8E. It is expressed as

In this calculation example, the single slit light source is assumed to be a light source with a width of 0.2 μm, and five of them are arranged at a pitch of 4 μm to form one slit light source with a width of 20 μm.
Further, in this calculation example, four of these are arranged at a pitch of 40 μm to form a multi-slit light source, and the order n=1, z=1260 μm, and λ=0.635 μm.

<Detection of A phase, B phase, and Z phase>
FIG. 9 is a diagram for explaining the intensity of an image formed on the photodiode array 13 (n=1) in the optical reflection type ABZ phase encoder 1 using the wide multi-slit LED as a light source according to the embodiment.
In the graph shown in FIG. 9, the horizontal axis represents the position in the photodiode array 13 (the position in the direction in which the plurality of light receiving sections are lined up), and the vertical axis represents the intensity of light reception.
FIG. 9 shows the intensity characteristics (intensity characteristics 1111) of the image formed on the photodiode array 13.

Intensity characteristic 1111 corresponds to the waveform shown in FIG. 8E.
In the example of FIG. 9, main points 1121 of the A phase and B phase, and main points 1131 and 1132 of the Z phase are shown.
Based on the A phase and B phase key points 1121, the A phase and B phase can be detected.
The Z phase can be detected based on the points 1131 and 1132 of the Z phase.

Here, the intensity characteristic 1111 represents the intensity of the image formed on the photodiode array 13. The pitch of the photodiode array 13 is set to 1/4 of the period of the imaging waveform (=period/4). This imaged waveform shifts in the direction in which the peaks of the waveform are lined up (left and right in the example of FIG. 9) as the reflective scale 12 moves.

FIG. 10 is a diagram showing a configuration example of the photodiode array 13b according to the embodiment.
Photodiode array 13b is an example of photodiode array 13.
The configuration example of the photodiode array 13b is a configuration example for a scale when L=20 μm.

In the example of FIG. 10, the photodiode array 13b has a plurality of strip-shaped pixels, and after converting the received light signal into an electrical signal by integrating the width of the strip, a predetermined calculation is performed. , A phase, B phase, Z phase, and R phase are calculated and output.
Note that detection and calculation may not be performed for the R phase if the R phase is not used.

In the example of FIG. 10, 60 strip-shaped light receiving portions numbered 00 to 59 are lined up in the light receiving pattern.
In the example of FIG. 10, each numbered pixel (00 to 59) represents a phase to be detected (target).
The detection object (target) is a target when it is assumed that the reflective scale 12 is at a predetermined position.
Note that Du (dummy) is not used.
In addition, when there are a plurality of the same phases, the detection results of these plurality are combined. The reason for this is to increase the signal-to-noise ratio (S/N ratio).

Du represents a dummy.
Ap represents the positive phase of the A phase. An represents the negative phase of the A phase.
Bp represents the positive phase of the B phase. Bn represents the negative phase of the B phase.
Zp represents the positive phase of the Zs phase (Z signal phase). Zn represents the negative phase of the Zs phase (Z signal phase).
Rp represents the positive phase of the R phase (comparison phase of the Z phase) used as a reference. Rn represents the negative phase of the R phase (comparison phase of the Z phase).

FIG. 11 is a diagram showing an example of A phase and B phase (n=1) according to the embodiment.
In the graph shown in FIG. 11, the horizontal axis represents the position (scale position) [μm] of the reflective scale 12, and the vertical axis represents the value.
FIG. 11 shows an A-phase characteristic 1211 and a B-phase characteristic 1212.
In this embodiment, A phase=total Ap−total An (the result of subtracting the sum of all An from the sum of all Ap).
In this embodiment, B phase=total Bp−total Bn (the result of subtracting the sum of all Bn from the sum of all Bp).
Note that in order to sufficiently increase the signal strength of Ap, An, Bp, Bn, etc., a plurality of values are summed.

FIG. 12 is a diagram showing an example of A-phase and B-phase Lissajous waveforms 1221 (n=1) according to the embodiment.
In the graph shown in FIG. 12, the horizontal axis represents the A phase, and the vertical axis represents the B phase.
The Lissajous waveform 1221 shown in FIG. 12 is based on the graph of FIG. 11.
For example, the moving direction of the scale can be determined from the Lissajous waveform 1221.

FIG. 13 is a diagram showing an example of the Zs phase and R phase (n=1) according to the embodiment.
In the graph shown in FIG. 13, the horizontal axis represents the scale position [μm], and the vertical axis represents the value.
FIG. 13 shows a characteristic 1231 of the Zs phase (vertical axis on the left) and a characteristic 1232 of the R phase (vertical axis on the right).
In this embodiment, the Zs phase=Zp−Zn (the result of subtracting Zn from Zp).
In this embodiment, R phase=total Rp−total Rn (the result of subtracting the sum of all Rn from the sum of all Rp).
As a result, Z phase=m×Zs phase−q×R phase−α (result of subtracting α from the result of multiplying the R phase by q from the result of multiplying the Zs phase by m). Here, m and q represent values for amplifying Zp and Zn, values for amplifying Rp and Rn, respectively, and α represents an offset value.

[Description of narrow width single slit light source (order n=2)]
FIG. 14 is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the narrow single slit LED as a light source according to the embodiment.
In the graph shown in FIG. 14, the horizontal axis represents the position in the photodiode array 13 (position in the direction of the broken line), and the vertical axis represents the intensity of received light.
FIG. 14 shows the intensity characteristics (intensity characteristics 1311) of the image formed on the photodiode array 13.
This imaging is called second-order (n=2) Talbot imaging.

z=2・(nL ² /λ)

This image formation is an image formation when n=2.
L is the periodic length of the reflective surface B1 of the reflective scale 12.
The imaging period on the photodiode array 13 is 2L.
The example in FIG. 14 is a calculation example when L=20 μm and λ=0.635 μm, and z is about 2520 μm.
In the intensity characteristic 1311 shown in FIG. 14, the vicinity of the center is prominent due to the Z-phase detection pattern of the reflective scale 12. Here, in the waveform of the intensity characteristic 1011 shown in FIG. 5, one protrusion appears near the center, but in the waveform of the intensity characteristic 1311 shown in FIG. 14, two protrusions appear near the center.

[Description of wide multi-slit light source (order n=2)]
Here, also in the description of the wide multi-slit light source (n=2), a case will be shown in which the configurations shown in FIGS. 6 and 7 are used.
That is, FIG. 7 is a diagram showing a configuration example of the light emitting surface A1c (an example of the light emitting surface A1 shown in FIG. 1) of the multi-slit LED 11c (an example of the multi-slit LED 11 shown in FIG. 1) according to the embodiment. Further, FIG. 6 is a diagram showing an example of a model configuration of unit light emitting surfaces G1 to G5 that constitute the light emitting surface A1c of the multi-slit LED 11c according to the embodiment.

15A to 15D are diagrams showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the wide single slit LED as a light source according to the embodiment.
FIG. 15E is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the wide multi-slit LED as a light source according to the embodiment.
In each of the graphs shown in FIGS. 15A to 15E, the horizontal axis represents the position in the photodiode array 13 (the position in the direction in which the plurality of light receiving sections are lined up), and the vertical axis represents the intensity of the received light.

15A to 15D show examples of waveforms (imaging intensity waveforms) for each of the five unit light emitting surfaces G1 to G5 for each of the light emitting surfaces A1c of α1, α2, α3, and α4 (a1 ), (a2), (a3), (a4), and (a5). Each of the waveforms (a1), (a2), (a3), (a4), and (a5) is similar to the waveform obtained by a narrow single slit, as shown in FIG.

Each of FIGS. 15A to 15D shows the synthesis results of the waveforms (imaging intensity waveforms) of the five unit light emitting surfaces G1 to G5 for each of the light emitting surfaces A1c of α1, α2, α3, and α4 ( all).
That is, in each of FIGS. 15A to 15D, the sum (composition) of (a1), (a2), (a3), (a4), and (a5) is (all).

FIG. 15E shows the waveforms of the synthesis results of α1 (all), α2 (all), α3 (all), and α4 (all).

Here, in this model, the imaging intensity by one slit-shaped light source of the multi-slit LED 11c is approximated by combining the intensity of a δ-function ultrafine line light source at the imaging position. Furthermore, the coupling strength by multi-slits is similarly approximated by intensity synthesis at the imaging position.
That is, the imaging intensity by the light emitting surface A1c of α1 is expressed as (all), which is the result of combining the imaging intensities (a1) to (a5) by the five unit light emitting surfaces G1 to G5, respectively. The same applies to the imaging intensities of the light emitting surfaces α2, α3, and α4.
The imaged intensity of the entire light emitting surface of α1, α2, α3, and α4 is the result of combining the imaged intensities (all) of each of α1, α2, α3, and α4, and is the imaged intensity shown in FIG. 15E. It is expressed as

In this calculation example, the single slit light source is assumed to be a light source with a width of 0.2 μm, and five of these light sources are arranged at a pitch of 4 μm to form one 20 μm slit light source.
Furthermore, in this calculation example, four of these are arranged at a pitch of 40 μm to form a multi-slit light source, and the order n=2, z=2520 μm, and λ=0.635 μm.
In the examples of FIGS. 15A to 15E, as shown in the example of FIG. 14, the shapes of the protruding portions of the coupling strength waveforms are different from those of the examples of FIGS. 8A to 8E.

<Detection of A phase, B phase, and Z phase>
FIG. 16 is a diagram for explaining the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the wide multi-slit LED as a light source according to the embodiment.
In the graph shown in FIG. 16, the horizontal axis represents the position in the photodiode array 13 (the position in the direction in which the plurality of light receiving sections are lined up), and the vertical axis represents the intensity of light reception.
FIG. 16 shows the intensity characteristics (intensity characteristics 1411) of the image formed on the photodiode array 13.

Intensity characteristic 1411 corresponds to the waveform shown in FIG. 15E.
In the example of FIG. 16 (n=2), the shape of the protrusion according to the Z-phase detection pattern is different from that of the example of FIG. 9 (n=1).

Here, the intensity characteristic 1411 represents the intensity of the image formed on the photodiode array 13. The pitch of the photodiode array 13 is set to 1/4 of the period of the imaging waveform (=period/4). This imaged waveform shifts in the direction in which the peaks of the waveform are lined up (left and right in the example of FIG. 16) as the reflective scale 12 moves.

Here, in explaining a wide multi-slit light source (n=2), a case will be described in which the configuration shown in FIG. 10 is used.
Here, FIG. 10 is a diagram showing an example of the configuration of the photodiode array 13.

FIG. 17 is a diagram showing an example of A phase and B phase (n=2) according to the embodiment.
In the graph shown in FIG. 17, the horizontal axis represents the position (scale position) [μm] of the reflective scale 12, and the vertical axis represents the value.
FIG. 17 shows an A-phase characteristic 1511 and a B-phase characteristic 1512.
In this embodiment, A phase=total Ap−total An (the result of subtracting the sum of all An from the sum of all Ap).
In this embodiment, B phase=total Bp−total Bn (the result of subtracting the sum of all Bn from the sum of all Bp).
Note that in order to sufficiently increase the signal strength of Ap, An, Bp, Bn, etc., a plurality of values are summed.

FIG. 18 is a diagram showing an example of A-phase and B-phase Lissajous waveforms 1521 (n=2) according to the embodiment.
In the graph shown in FIG. 18, the horizontal axis represents the A phase, and the vertical axis represents the B phase.
The Lissajous waveform 1521 shown in FIG. 18 is based on the graph of FIG. 17.
For example, the moving direction of the scale can be determined from the Lissajous waveform 1521.

FIG. 19 is a diagram showing an example of a Zs phase and an R phase (n=2) according to the embodiment.
In the graph shown in FIG. 19, the horizontal axis represents the scale position [μm], and the vertical axis represents the value.
FIG. 19 shows a characteristic 1531 of the Zs phase (vertical axis on the left) and a characteristic 1532 of the R phase (vertical axis on the right).
In this embodiment, the Zs phase=Zp−Zn (the result of subtracting Zn from Zp).
In this embodiment, R phase=total Rp−total Rn (the result of subtracting the sum of all Rn from the sum of all Rp).
As a result, Z phase=m×Zs phase−q×R phase−α (result of subtracting α from the result of multiplying the R phase by q from the result of multiplying the Zs phase by m). Here, m and q represent values for amplifying Zp and Zn, values for amplifying Rp and Rn, respectively, and α represents an offset value.

Here, when n = 2, the aspects of the A phase and B phase and the Lissajous figure due to them are the same as when n = 1, but the waveform of Zs (waveform of Z phase) changes greatly. ing.
As can be understood from the double peak (two pulse-like peaks) Zs waveform in the case of n=2, in the case of n=2, the Z phase of the optical encoder is Even if zero point detection is attempted, the position of the zero point cannot be uniquely determined.

For example, when assembling a reflective optical encoder, in a configuration where n = 1 and z = 1260 μm (when λ = 0.635 μm), the distance from the surface of the LED or photodiode array to the reflective scale is too short. There may be cases where there are significant implementation constraints. In such cases, the use of z=2520 μm (for λ=0.635 μm) with n=2 can be important.

[Description of Z phase detection method (n=1)]
FIG. 20 is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=1) in the optical reflection type ABZ phase encoder 1 using the multi-slit LED 11 having 4 slits as a light source according to the embodiment. be.
In the graph shown in FIG. 20, the horizontal axis represents the coordinates in the photodiode array 13, and the vertical axis represents the photodiode current.
FIG. 20 shows the intensity characteristics (intensity characteristics 2011) of the image formed on the photodiode array 13.
In the example of FIG. 20, for convenience of explanation, an artificially created waveform is shown as the waveform of the intensity characteristic 2011.

The example in FIG. 20 schematically represents the primary image formation of the Talbot, which is imaged through a reflective scale 12 with a 20 μm pitch using a multi-slit LED 11 (40 μm pitch) having 4 slits as a light source.
Note that in this embodiment, n=1 and z=1260 μm.
In the example of FIG. 20, in the intensity characteristic 2011, detection of positions H1 and H2 on the photodiode array is performed.

FIG. 21 is a diagram showing an example of the first processing circuit 101 that processes the light reception signal by the photodiode array 13 according to the embodiment.
In this embodiment, a case is shown in which the first processing circuit 101 is included in the photodiode array 13, but as another configuration example, the first processing circuit 101 and the photodiode array 13 may be configured as separate bodies. good.

The first processing circuit 101 includes photodiodes 111 and 112, bipolar transistors 121 and 122, an amplifier circuit (IV conversion circuit P1) including an operational amplifier 131, a resistor 132, and a voltage source 133, a resistor 134, and an operational amplifier 141. An amplifier circuit (IV conversion circuit P2) consisting of a resistor 142 and a voltage source 143, an amplifier circuit (inverting amplifier circuit P3) consisting of a resistor 144, an operational amplifier 151, a resistor 152, and a voltage source 153, a resistor 154, an operational amplifier 161, It includes an amplifier circuit (inverting amplifier circuit P4) consisting of a resistor 162 and a voltage source 163, and a differential amplifier circuit Q1 consisting of an operational amplifier 171 and a voltage source 172.

In this embodiment, when the reflective scale 12 is at an appropriate position, the photodiode 111 converts the Zp phase light reception signal into a current signal, and the photodiode 112 converts the Zn phase light reception signal into a current signal.

The current signal converted by the photodiode 111 is amplified by the bipolar transistor 121, then converted to a voltage by the IV conversion circuit P1, and output to the resistor 134.
The current signal converted by the photodiode 112 is amplified by the bipolar transistor 122, then converted to a voltage by the IV conversion circuit P2, and output to the resistor 144. Then, the polarity of this output signal is inverted by inverting and amplifying the voltage (in this embodiment, inverting and amplifying by a factor of 1) by the inverting amplifier circuit P3, and the resultant signal is output to the resistor 154.
In the example of FIG. 21, the circuit portions of bipolar transistors 121 and 122 each constitute an emitter follower amplification circuit using bipolar transistors.

The output signal from the resistor 134 and the output signal from the resistor 154 are input to the inverting amplifier circuit P4, and the voltage is inverted and amplified by the inverting amplifier circuit P4. Here, in the inverting amplifier circuit P4, the output signal from the resistor 134 and the output signal from the resistor 154 are combined (in this embodiment, the output signal from the IV conversion circuit P1 and the output signal from the IV conversion circuit P2 are substantially combined). subtraction) is performed.
The result of inversion amplification by the inversion amplifier circuit P4 is input to the differential amplifier circuit Q1.
The output from the inverting amplifier circuit P4 corresponds to the addition of the output signal from the resistor 134 and the output signal from the resistor 154.

The differential amplifier circuit Q1 performs comparison, and outputs a predetermined value (for example, 1 value) when the voltage signal input from the inverting amplifier circuit P4 exceeds a predetermined voltage, and outputs another predetermined value in other cases. Output a value (for example, a 0 value).
The differential amplifier circuit Q1 functions as a comparator.
The output from the differential amplifier circuit Q1 is the result of the comparison.

For example, when the reflective scale 12 is at an appropriate position, the first processing circuit 101 photographs the received light signals at the two positions H1 and H2 (two positions 40 μm apart) shown in FIG. The diode array 13 (each one pixel) converts it into a current signal and amplifies it.
That is, in the examples of FIGS. 20 and 21, the photodiode 111 receives light at a position H1 regarding Zp, and the photodiode 112 receives light at a position H2 regarding Zn.
Thereafter, the first processing circuit 101 converts the current signal (I signal) into a voltage signal (V signal) for each light reception signal, obtains a differential voltage signal between Zp and Zn, and converts the current signal (I signal) into a voltage signal (V signal) in a predetermined direction (main direction). In the embodiment, a signal obtained by comparing only the upward (upward) signal is output.
Note that in the comparison, for example, an R waveform or the like may be used as the reference potential.

FIG. 22 is a diagram illustrating an example of a differential voltage and a comparison voltage in the first processing circuit 101 according to the embodiment.
In FIG. 22, the graph of (A) and the graph of (B) are shown with their horizontal axes aligned. In these graphs, the horizontal axis represents the amount of scale movement (the amount corresponding to the amount of movement of the reflective scale 12).
In the graph of FIG. 22(A), the vertical axis represents the differential voltage. The graph shows a characteristic 2021 of the differential voltage.
In the graph of FIG. 22(B), the vertical axis represents the comparison voltage. The graph shows a characteristic 2031 of the comparison voltage.
In addition, in the examples of FIGS. 22(A) and 22(B), for convenience of explanation, the waveform of the differential voltage characteristic 2021 and the waveform of the comparison voltage characteristic 2031 are respectively artificially created waveforms for the purpose of explanation. is shown.

The differential voltage characteristic 2021 represents the characteristic of the differential voltage signal obtained when the reflective scale 12 moves. This is based on the Zs waveform in the example of FIG.
The comparison voltage characteristic 2031 represents the characteristic of the compared signal obtained with respect to the differential voltage characteristic 2021. The waveform of the signal becomes the Z-phase detection result.
For example, the voltage (reference potential) of the voltage source 172 of the differential amplifier circuit Q1 in the example of FIG. 21 is adjusted so that the comparison voltage characteristic 2031 is obtained from the differential voltage characteristic 2021.

[Explanation of problems with Z phase detection method (n=2)]
FIG. 23 is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the multi-slit LED 11 having four slits as a light source according to the embodiment. be.
In the graph shown in FIG. 23, the horizontal axis represents the coordinates in the photodiode array 13, and the vertical axis represents the photodiode current.
FIG. 23 shows the intensity characteristics (intensity characteristics 2111) of the image formed on the photodiode array 13.
In the example of FIG. 23, for convenience of explanation, an artificially created waveform is shown as the waveform of the intensity characteristic 2111.

The example in FIG. 23 schematically represents secondary imaging of Talbot, which is imaged through a reflective scale 12 with a pitch of 20 μm using a multi-slit LED 11 (40 μm pitch) having 4 slits as a light source.
Note that in this embodiment, n=2 and z=2520 μm.
In the example of FIG. 23, in the intensity characteristic 2111, positions H11 and H12 on the photodiode array are detected.

Here, a case will be shown in which the first processing circuit 101 shown in FIG. 21 is used.
In the first processing circuit 101, the received light signals at the two positions H11 and H12 (two positions separated by 40 μm) shown in FIG. 23 are converted into current signals by the photodiode array 13 (one pixel each). and amplify it.
That is, in the examples of FIGS. 23 and 21, the photodiode 111 receives light at a position H11 regarding Zp, and the photodiode 112 receives light at a position H12 regarding Zn.
Thereafter, the first processing circuit 101 converts the current signal (I signal) into a voltage signal (V signal) for each light reception signal, obtains a differential voltage signal between Zp and Zn, and converts the current signal (I signal) into a voltage signal (V signal) in a predetermined direction (main direction). In the embodiment, a signal obtained by comparing only the upward (upward) signal is output.
Note that in the comparison, for example, an R waveform or the like may be used as the reference potential.

FIG. 24 is a diagram illustrating an example of a differential voltage and a comparison voltage in the first processing circuit 101.
In FIG. 24, the graph of (A) and the graph of (B) are shown with their horizontal axes aligned. In these graphs, the horizontal axis represents the amount of scale movement (the amount corresponding to the amount of movement of the reflective scale 12).
In the graph of FIG. 24(A), the vertical axis represents the differential voltage. The graph shows a characteristic 2121 of the differential voltage.
In the graph of FIG. 24(B), the vertical axis represents the comparison voltage. The graph shows a characteristic 2131 of the comparison voltage.
In the examples of FIGS. 24(A) and 24(B), for convenience of explanation, the waveform of the differential voltage characteristic 2121 and the waveform of the comparison voltage characteristic 2131 are respectively artificially created waveforms for the purpose of explanation. is shown.

The differential voltage characteristic 2121 represents the characteristic of the differential voltage signal obtained when the reflective scale 12 moves. This is based on the Zs waveform in the example of FIG.
The comparison voltage characteristic 2131 represents the characteristic of the compared signal obtained with respect to the differential voltage characteristic 2121.

However, in the example of FIG. 24, unlike the example of FIG. 22, the differential voltage characteristic 2121 and the comparison voltage characteristic 2131 have double peak waveforms.
Therefore, the waveform of the comparison signal cannot be used as the Z-phase detection result if such a double-peak waveform remains.

[Method for solving problems of Z phase detection method (n=2)]
FIG. 25 is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the multi-slit LED 11 having 4 slits as a light source according to the embodiment. be.
In the graph shown in FIG. 25, the horizontal axis represents the coordinates in the photodiode array 13, and the vertical axis represents the photodiode current.
FIG. 25 shows the intensity characteristics (intensity characteristics 2211) of the image formed on the photodiode array 13.
In the example of FIG. 25, for convenience of explanation, an artificially created waveform is shown as the waveform of the intensity characteristic 2211.

The example in FIG. 25 schematically represents secondary imaging of Talbot, which is imaged through a reflective scale 12 with a pitch of 20 μm, using a multi-slit LED 11 (40 μm pitch) having 4 slits as a light source.
Note that in this embodiment, n=2 and z=2520 μm.
In the example of FIG. 25, in the intensity characteristic 2211, positions H21 and H22 on the photodiode array are detected.
In the example of FIG. 25, the separation between these two positions H21 and H22 is set to 80 μm (separation of 2 pitches).

Here, a case will be described in which the first processing circuit 101 shown in FIG. 21 is used.
In the first processing circuit 101, the photodetection signals at the two positions H21 and H22 (two positions separated by 80 μm) shown in FIG. 25 are converted into current signals by the photodiode array 13 (one pixel each). and amplify it.
That is, in the examples of FIGS. 25 and 21, the photodiode 111 receives light at a position H21 regarding Zp, and the photodiode 112 receives light at a position H22 regarding Zn.
Thereafter, the first processing circuit 101 converts the current signal (I signal) into a voltage signal (V signal) for each light reception signal, obtains a differential voltage signal between Zp and Zn, and converts the current signal (I signal) into a voltage signal (V signal) in a predetermined direction (main direction). In the embodiment, a signal obtained by comparing only the upward (upward) signal is output.
Note that in the comparison, for example, an R waveform or the like may be used as the reference potential.

FIG. 26 is a diagram illustrating an example of a differential voltage and a comparison voltage in the first processing circuit 101 according to the embodiment.
In FIG. 26, the graph of (A) and the graph of (B) are shown with their horizontal axes aligned. In these graphs, the horizontal axis represents the amount of scale movement (the amount corresponding to the amount of movement of the reflective scale 12).
In the graph of FIG. 26(A), the vertical axis represents the differential voltage. The graph shows a characteristic 2221 of the differential voltage.
In the graph of FIG. 26(B), the vertical axis represents the comparison voltage. The graph shows a characteristic 2231 of the comparison voltage.
In the examples of FIGS. 26(A) and 26(B), for convenience of explanation, the waveform of the differential voltage characteristic 2221 and the waveform of the comparison voltage characteristic 2231 are respectively artificially created waveforms for the purpose of explanation. is shown.

The differential voltage characteristic 2221 represents the characteristic of the differential voltage signal obtained when the reflective scale 12 moves.
The comparison voltage characteristic 2231 represents the characteristic of the compared signal obtained with respect to the differential voltage characteristic 2221.

In the example of FIG. 26, the waveform of the differential voltage characteristic 2221 is a triple peak (three pulse-like peaks) waveform.
In the present embodiment, the parameters (circuit constants) of the first processing circuit 101 are set so that the comparison is performed using the highest wave height point in the middle of the triple peak waveform to obtain the Z-phase detection result. etc. to set or adjust. As a result, in the example of FIG. 26, one peak is obtained in the comparison voltage characteristic 2231.

[Configuration example in which Zs signal of secondary Talbot imaging (n=2) is compared with R signal]
In this embodiment, an R-phase signal may be used to generate a reference potential for comparison. In this case, the R-phase signal is separately processed so that only the highest part of the triple peak in the example of FIG. 26 is detected.

FIG. 27 is a diagram showing an example of the intensity of an image formed on the photodiode array 13 (n=2) in the optical reflection type ABZ phase encoder 1 using the multi-slit LED 11 having four slits as a light source according to the embodiment. be.
In the graph shown in FIG. 27, the horizontal axis represents the coordinates in the photodiode array 13, and the vertical axis represents the photodiode current.
FIG. 27 shows the intensity characteristics (intensity characteristics 2311) of the image formed on the photodiode array 13.
In the example of FIG. 27, for convenience of explanation, an artificially created waveform is shown as the waveform of the intensity characteristic 2311.

The example in FIG. 27 schematically shows secondary imaging of Talbot, which is imaged through a reflective scale 12 with a pitch of 20 μm using a multi-slit LED 11 (40 μm pitch) having 4 slits as a light source.
Note that in this embodiment, n=2 and z=2520 μm.
In the example of FIG. 27, in the intensity characteristic 2311, detection of positions H31 and H32 on the photodiode array is performed with respect to the Zs signal.
Further, in the example of FIG. 27, in the intensity characteristic 2311, detection of positions H41 and H42 on the photodiode array and detection of positions H43 and H44 are performed with respect to the R signal.

FIG. 28 is a diagram showing an example of the second processing circuit 201 that processes the light reception signal by the photodiode array 13 according to the embodiment.
The second processing circuit 201 is a circuit that can be used in place of the first processing circuit 101 shown in FIG.
In this embodiment, a case is shown in which the second processing circuit 201 is included in the photodiode array 13, but as another configuration example, the second processing circuit 201 and the photodiode array 13 may be configured as separate bodies. good.

The second processing circuit 201 includes photodiodes 211 and 212, bipolar transistors 221 and 222, and an amplifier circuit (IV conversion circuit P11) consisting of an operational amplifier 231, a resistor 232, and a voltage source 233, as a circuit related to Z-phase detection. , an amplifier circuit (IV conversion circuit P12) consisting of a resistor 234, an operational amplifier 241, a resistor 242, and a voltage source 243, and an amplifier circuit (inverting amplifier circuit P13) consisting of a resistor 244, an operational amplifier 251, a resistor 252, and a voltage source 253. , a resistor 254, an amplifier circuit (inverting amplifier circuit P14) including an operational amplifier 261, a resistor 262, and a voltage source 263.

Here, the configuration and operation of the circuit related to such Z-phase detection are, for example, similar to the configuration and operation of the circuit portion of the first processing circuit 101 shown in FIG. 21 except for the differential amplifier circuit Q1, Detailed explanation will be omitted.

In this embodiment, when the reflective scale 12 is at an appropriate position (referred to as position PO1 for convenience of explanation), the photodiode 211 converts the Zp phase light reception signal into a current, and the photodiode 212 converts the Zn phase light reception signal into a current. Converts the light reception signal into a current signal.

The second processing circuit 201 includes photodiodes 311 to 314, bipolar transistors 321 and 322, and an amplifier circuit (IV conversion circuit P21) consisting of an operational amplifier 331, a resistor 332, and a voltage source 333, as a circuit related to R-phase detection. , an amplifier circuit (IV conversion circuit P22) consisting of a resistor 334, an operational amplifier 341, a resistor 342, and a voltage source 343, and an amplifier circuit (inverting amplifier circuit P23) consisting of a resistor 344, an operational amplifier 351, a resistor 352, and a voltage source 353. , a resistor 354, an amplifier circuit (inverting amplifier circuit P24) including an operational amplifier 361, a resistor 362, and a voltage source 363.

Here, the configuration and operation of the circuit related to such R-phase detection include, for example, that the currents from the two photodiodes 311 and 312 are combined and input to the bipolar transistor 321, and the currents from the two photodiodes 313 , 314 are combined and input to the bipolar transistor 322, the configuration and operation of the circuit are the same as those related to Z-phase detection, and detailed description thereof will be omitted.

In this embodiment, when the reflective scale 12 is at an appropriate position (the above-mentioned position PO1), the two photodiodes 311 and 312 convert the Rp phase light reception signal at each of the two positions into a current. The two photodiodes 313 and 314 each convert the Rn phase light reception signal at each of the two positions into a current signal.

The second processing circuit 201 includes an operational amplifier 371 for performing comparison.
The operational amplifier 371 performs a comparison so that the value of the voltage signal input from the circuit related to Z-phase detection (inverting amplifier circuit P14) is equal to the value of the voltage signal input from the circuit related to R-phase detection (inverting amplifier circuit P24). If the value exceeds the value, a predetermined value (for example, 1 value) is output, and in other cases, another predetermined value (for example, 0 value) is output.
The operational amplifier 371 functions as a comparator.
The output from operational amplifier 371 is the result of the comparison.

Here, in the second processing circuit 201, a signal output from a circuit related to R-phase detection is used as a reference value for comparison of a Zs-phase signal output from a circuit related to Z-phase detection.

For example, when the reflective scale 12 is at an appropriate position (the above-mentioned position PO1), the second processing circuit 201 sends the received light signals at the two positions H31 and H32 shown in FIG. 27 to the photodiode array 13 ( (each pixel) is converted into a current signal and amplified.
That is, in the examples of FIGS. 27 and 28, the photodiode 211 receives light at a position H31 regarding Zp, and the photodiode 212 receives light at a position H32 regarding Zn.
Thereafter, the second processing circuit 201 converts the current signal (I signal) into a voltage signal (V signal) with an appropriate magnification for each light reception signal, and obtains a differential voltage signal between Zp and Zn.

In addition, the second processing circuit 201 processes two positions for each of the four positions H41 to H44 (4 pixels) shown in FIG. The photodiode array 13 converts the received light signals for pixels (1/2 pitch separation) into current signals, synthesizes them, and amplifies them.
That is, in the examples of FIGS. 27 and 28, the photodiode 311 receives light at a position H41 relative to Rp, the photodiode 312 receives light at a position H42 relative to Rp, and these light reception signals (current signals) are combined. Ru. Furthermore, the photodiode 313 receives light at a position H43 related to Rn, the photodiode 314 receives light at a position H44 related to Rn, and these light reception signals (current signals) are combined.
Thereafter, the second processing circuit 201 converts the current signal (I signal) into a voltage signal (V signal) with an appropriate magnification for each composite signal, and obtains a differential voltage signal between Rp and Rn.

Further, in the second processing circuit 201, the operational amplifier 371 compares the Zs signal with the R signal.

Regarding the positions H41, H42, H31, H32, H44, and H44 shown in FIG. 27, each pixel position of the photodiode array 13 is 0 μm as the reference for the leftmost position, 20 μm for the next position, and 20 μm for the next position. Thereafter, they are located at 50 μm, 130 μm, 160 μm, and 180 μm, respectively.

FIG. 29 is a diagram illustrating an example of a differential voltage and a comparison voltage in the second processing circuit 201 according to the embodiment.
In FIG. 29, the graph (A) and the graph (B) are shown with their horizontal axes aligned. In these graphs, the horizontal axis represents the amount of scale movement (the amount corresponding to the amount of movement of the reflective scale 12).
In the graph of FIG. 29(A), the vertical axis represents the differential voltage. The graph shows a differential voltage characteristic 2321 regarding the Zs phase and a differential voltage characteristic 2322 regarding the R phase.
In the graph of FIG. 29(B), the vertical axis represents the comparison voltage. The graph shows a characteristic 2331 of the comparison voltage.
In the examples of FIGS. 29(A) and 29(B), for convenience of explanation, the waveform of the differential voltage characteristic 2321 regarding the Zs phase, the waveform of the differential voltage characteristic 2322 regarding the R phase, and the comparison voltage characteristic are shown. As the waveforms 2331, artificially created waveforms are shown for the sake of explanation.

The characteristic 2321 and the characteristic 2322 of the differential voltage represent the characteristic of the differential voltage signal obtained when the reflective scale 12 moves.
The comparison voltage characteristic 2331 represents the characteristic of the compared signal obtained with respect to the differential voltage characteristic 2321 and the characteristic 2322.

The example in FIG. 29 shows a waveform outputted by the second processing circuit 201 shown in FIG. 28 when the secondary Talbot image moves with the movement of the reflective scale 12.
The characteristic 2321 of the Zs signal in the example of FIG. 29(A) is similar to the characteristic 2221 of the example of FIG. 26(A), but the signal magnification is changed appropriately.
The R signal characteristic 2322 in the example of FIG. 29(A) is a waveform obtained by signal processing the photodiode current of the pixels at each position H41 to H44. The waveform obtained by comparing the characteristic 2321 of the Zs signal using the characteristic 2322 of the R signal becomes the characteristic 2331 in FIG. 29(B).
Thereby, the second processing circuit 201 can obtain a Z-phase detection signal waveform having a width less than one period of the A-phase (or B-phase).

For example, the second processing circuit 201 in the example of FIG. Parameters (circuit constants) etc. are set or adjusted.

FIG. 30 is a diagram showing a configuration example of the photodiode array 13c according to the embodiment.
Photodiode array 13c is an example of photodiode array 13.
The configuration example of the photodiode array 13c is a configuration example for a scale when L=20 μm.

In the example of FIG. 30, the photodiode array 13c has a plurality of strip-shaped pixels, and after converting the received light signal into an electrical signal by integrating the width of the strip, a predetermined calculation is performed. , A phase, B phase, Z phase, and R phase are calculated and output.
Note that detection and calculation may not be performed for the R phase if the R phase is not used.

The photodiode array 13c is used by the second processing circuit 201 shown in FIG. 28 to perform Z-phase detection based on the intensity characteristic 2311 shown in FIG. 27.
The arrangement of each pixel of the photodiode array 13c is dedicated to secondary Talbot imaging, and the arrangement of Zp, Zn, Rp, and Rn is different from the arrangement example shown in FIG.

The arrangement of each pixel of the photodiode array 13c shown in FIG. 30 will be explained.
With respect to the direction in which the plurality of light receiving parts of the light receiving pattern are lined up (in the example of FIG. 30, the left and right direction), from one side (the left side in the example of FIG. 30) to the other side (the right side in the example of FIG. 30), Sixty pixels are arranged at equal intervals. Each pixel has a photodiode that receives light.

In the example of FIG. 30, 60 strip-shaped light receiving portions numbered 00 to 59 are lined up in the light receiving pattern.
In the example of FIG. 30, each numbered pixel (00 to 59) represents a phase to be detected (target).
The detection object (target) is a target when it is assumed that the reflective scale 12 is at a predetermined position.
Note that Du (dummy) is not used.
In addition, when there are a plurality of the same phases, the detection results of these plurality are combined. The reason for this is to increase the signal-to-noise ratio (S/N ratio).

The detection target with number 00 is Du (dummy). The detection target numbered 01 is Du (dummy). The detection target numbered 02 is the Ap phase. The detection target numbered 03 is the Bp phase. The detection target numbered 04 is the An phase. The detection target numbered 05 is the Bn phase. The detection target numbered 06 is the Ap phase. The detection target numbered 07 is the Bp phase. The detection target numbered 08 is the An phase. The detection target with number 09 is the Bn phase. The detection target numbered 10 is the Ap phase. The detection target numbered 11 is the Bp phase. The detection target numbered 12 is the An phase. The detection target numbered 13 is the Bn phase. The detection target numbered 14 is the Ap phase. The detection target numbered 15 is the Bp phase. The detection target numbered 16 is the An phase. The detection target numbered 17 is the Bn phase. The detection target numbered 18 is the Ap phase. The detection target numbered 19 is the Rp phase. The detection target numbered 20 is the An phase. The detection target numbered 21 is the Rp phase. The detection target numbered 22 is the Ap phase. The detection target numbered 23 is the Bp phase. The detection target numbered 24 is the Zp phase. The detection target numbered 25 is the Bn phase. The detection target numbered 26 is the Ap phase. The detection target numbered 27 is the Bp phase. The detection target numbered 28 is the An phase. The detection target numbered 29 is the Bn phase. The detection target numbered 30 is the Ap phase. The detection target numbered 31 is the Bp phase. The detection target numbered 32 is the Zn phase. The detection target numbered 33 is the Bn phase. The detection target numbered 34 is the Ap phase. The detection target numbered 35 is the Rn phase. The detection target numbered 36 is the An phase. The detection target numbered 37 is the Rn phase. The detection target numbered 38 is the Ap phase. The detection target numbered 39 is the Bp phase. The detection target numbered 40 is the An phase. The detection target numbered 41 is the Bn phase. The detection target numbered 42 is the Ap phase. The detection target numbered 43 is the Bp phase. The detection target numbered 44 is the An phase. The detection target numbered 45 is the Bn phase. The detection target numbered 46 is the Ap phase. The detection target numbered 47 is the Bp phase. The detection target numbered 48 is the An phase. The detection target numbered 49 is the Bn phase. The detection target numbered 50 is the Ap phase. The detection target numbered 51 is the Bp phase. The detection target numbered 52 is the An phase. The detection target numbered 53 is the Bn phase. The detection target numbered 54 is the Ap phase. The detection target numbered 55 is the Bp phase. The detection target numbered 56 is the An phase. The detection target numbered 57 is the Bn phase. The detection target numbered 58 is Du (dummy). The detection target numbered 59 is Du (dummy).

The photodiode array 13c has a strip shape, and after converting the received light signal into an electrical signal by integrating the width of the strip, the A phase, B phase, and Z phase are calculated by performing predetermined calculations. and output it.

In the example of FIG. 30, in the photodiode array 13c, positions H31 and H32 shown in FIG. 27 correspond to the 24th Zp and 32nd Zn, respectively.
In the example of FIG. 30, in the photodiode array 13c, positions H41, H42, H43, and H44 shown in FIG. 27 are respectively 19th Rp, 21st Rp, 35th Rn, and 37th Rp. It is made to correspond to the th Rn.

In this embodiment, a Z-phase signal is obtained from secondary Talbot imaging using a photodiode array 13c. Furthermore, in this embodiment, it is also possible to obtain an R-phase signal from secondary Talbot imaging using the photodiode array 13c.

In this embodiment, as an example of the configuration, the components shown in FIG. A second-order Talbot image is generated on the photodiode array 13 using a diode array 13). In this case, there is a feature in the pixel arrangement of the photodiode array 13c shown in FIG.
Signal processing is performed, for example, by a second processing circuit 201 shown in FIG. As a result, the optical reflective ABZ phase encoder 1 generates the Zs signal and R signal shown in FIG. 29(A), and by comparing these signals, generates the comparison signal shown in FIG. 29(B). The optical reflection type ABZ phase encoder 1 uses this as a Z phase detection signal.

[Circuit that realizes Z phase detection in an optical reflective ABZ phase encoder]
FIG. 31 is a diagram illustrating an example of a third processing circuit 401 that processes a light reception signal by the photodiode array 13 according to the embodiment.
The third processing circuit 401 is a circuit that can be used in place of the first processing circuit 101 shown in FIG. 21 or the second processing circuit 201 shown in FIG.
In this embodiment, a case is shown in which the third processing circuit 401 is included in the photodiode array 13, but as another configuration example, the third processing circuit 401 and the photodiode array 13 may be configured as separate bodies. good.

The third processing circuit 401 includes a photodiode 411, a MOS (Metal Oxide Semiconductor) transistor 421, a current mirror circuit J1 consisting of two MOS transistors 431 and 432, a MOS transistor 441, two MOS transistors 451, 452, and a MOS transistor 461.

Further, the third processing circuit 401 includes a photodiode 412, a MOS transistor 521, a current mirror circuit J11 including two MOS transistors 531 and 532, a MOS transistor 541, and two MOS transistors 551 and 552. It includes a current mirror circuit J12, a MOS transistor 561, a current mirror circuit J13 consisting of two MOS transistors 571 and 572, and a MOS transistor 581.

Further, the third processing circuit 401 includes an inverting amplifier circuit including an operational amplifier 611, a resistor 612, and a voltage source 613.

The third processing circuit 401 also includes a current source 711, a voltage source (power supply) 712, a current mirror circuit consisting of two MOS transistors 721 and 722, and a MOS transistor 731 as a circuit related to bias voltage and bias current. , a current mirror circuit including two MOS transistors 741 and 742, a MOS transistor 761, a MOS transistor 771, and a current mirror circuit including two MOS transistors 781 and 782.

Here, the current source 711 supplies a reference current.
A voltage source (power supply) 712 supplies a predetermined voltage. The voltage may be, for example, 3.3V or 5V.
Furthermore, in this embodiment, assuming that the detection current of the photodiode is small, a circuit configuration is adopted in which a current is drawn from the MOS transistor 431 to the MOS transistor 742 side, and a current is drawn from the MOS transistor 531 to the MOS transistor 782 side. It becomes.

In the example of FIG. 31, the voltage of the photodiode 411 is stabilized by providing a MOS transistor 421 between the photodiode 411 related to the Zp phase and the current mirror circuit J1.
Further, by providing a MOS transistor 441 between the current mirror circuit J1 and the current mirror circuit J2, the drain-source voltage of the MOS transistor 432 is stabilized.
Further, by providing a MOS transistor 461 at the subsequent stage of the current mirror circuit J2, the drain-source voltage of the MOS transistor 452 is stabilized.

In the example of FIG. 31, the voltage of the photodiode 412 is stabilized by providing a MOS transistor 521 between the photodiode 412 related to the Zn phase and the current mirror circuit J11.
Further, by providing a MOS transistor 541 between the current mirror circuit J11 and the current mirror circuit J12, the drain-source voltage of the MOS transistor 532 is stabilized.
Further, by providing a MOS transistor 561 between the current mirror circuit J12 and the current mirror circuit J13, the drain-source voltage of the MOS transistor 552 is stabilized.
Further, by providing a MOS transistor 581 at the subsequent stage of the current mirror circuit J13, the voltage between the drain and source of the MOS transistor 572 is stabilized.

In this embodiment, when the reflective scale 12 is at an appropriate position, the photodiode 411 converts the Zp phase light reception signal into a current, and the photodiode 412 converts the Zn phase light reception signal into a current signal.

Here, as a comparative example, the first processing circuit 101 shown in FIG. 21 excluding the final stage comparator becomes a Zs signal generation circuit for Z phase detection. In the operation of such a Zs signal generation circuit, first, a photodiode is irradiated with light, and a current accompanying the light is generated. The current is amplified by a bipolar transistor, and an operational amplifier at the next stage of the bipolar transistor performs IV conversion (conversion from current to voltage) at an appropriate magnification to output a voltage signal. There are two sets of such circuits in the overall circuit, one for Zp and one for Zn, and in the one for Zn, the polarity of the voltage is further reversed by an operational amplifier. The Zp signal and Zn signal processed up to this point are further added in the next stage operational amplifier (substantially equivalent to subtracting Zp and Zn). Bipolar transistors are important in such circuits. In other words, since the photocurrent generated from the photodiode of one pixel is minute, it is necessary to amplify the current in advance with a bipolar transistor before IV conversion.

In contrast, the third processing circuit 401 shown in FIG. 31 has a configuration circuit that does not use bipolar transistors. In the third processing circuit 401, current amplification of a minute photocurrent is performed by a current amplification circuit block including a current mirror circuit with an appropriate magnification.
Furthermore, the first processing circuit 101 is configured to perform IV conversion immediately after current amplification, but the third processing circuit 401 folds back only the Zn signal side one more step with respect to the Zp signal side after current amplification, and then , and is configured to combine both currents and perform IV conversion on the combined current (substantially, the difference current).

Therefore, the third processing circuit 401 has a configuration in which the bipolar transistor is replaced with a current mirror circuit using a simple MOS transistor without using any special elements in the configuration of the first processing circuit 101. It has become.
Further, in the third processing circuit 401, the number of IV conversion circuits can be reduced by one stage compared to the configuration of the first processing circuit 101.
In the third processing circuit 401, the polarity inversion operational amplifier is replaced with a simple current mirror circuit, and the voltage addition operational amplifier is also eliminated.

FIG. 32 is a diagram schematically showing a third processing circuit 401a that processes a light reception signal by the photodiode array 13 according to the embodiment.
The third processing circuit outline 401a is an example of a circuit configuration for convenience of explanation, and represents a schematic configuration of the third processing circuit 401.

In the third processing circuit outline 401a, the circuit portions related to bias voltage and bias current are simplified compared to the configuration example shown in FIG. 31. Specifically, in the third processing circuit outline 401a, for convenience of explanation, the bias voltage and bias current generation circuits in the third processing circuit 401 are excluded, and only directly driven parts are shown.
In the example of FIG. 32, current source 711 and current source 811 are offset current sources for increasing gm (mutual conductance).

The operation of the third processing circuit 401 will be explained with reference to FIG. 32.
The current signal converted by the photodiode 411 regarding Zp is amplified by the Zp current amplification circuit block L1.
In the Zp current amplification circuit block L1, the current signal from the photodiode 411 is input to the current mirror circuit J1 via the MOS transistor 421. In the current mirror circuit J1, for example, the current amplification factor is set to 10 times.
The output from current mirror circuit J1 is input to current mirror circuit J2 via MOS transistor 441. In the current mirror circuit J2, for example, the current amplification factor is set to 10 times.

The output from the current mirror circuit J2 is input to the IV conversion circuit block L4 via the MOS transistor 461.
Here, a total of 100 times amplification is performed by the current mirror circuit J1 and the current mirror circuit J2.

The current signal converted by the photodiode 412 related to Zn is amplified by the Zn current amplification circuit block L2.
In the Zn current amplification circuit block L2, the current signal from the photodiode 412 is input to the current mirror circuit J11 via the MOS transistor 521. In the current mirror circuit J11, for example, the current amplification factor is set to 10 times.
The output from current mirror circuit J11 is input to current mirror circuit J12 via MOS transistor 541. In the current mirror circuit J12, for example, the current amplification factor is set to 10 times.

The output from the current mirror circuit J12 is input to the Zn current folding circuit block L3 via the MOS transistor 561.
Here, a total of 100 times amplification is performed by the current mirror circuit J11 and the current mirror circuit J12.

In the Zn current folding circuit block L3, the output from the MOS transistor 561 is input to the current mirror circuit J13. In the current mirror circuit J13, for example, the current amplification factor is set to 1 (polarity inversion).
The output from the current mirror circuit J13 is input to the IV conversion circuit block L4 via the MOS transistor 581.

At the input of the IV conversion circuit block L4, a current (difference current 3021) that is the difference between the amplified current related to the Zp phase (Zp amplified current 3011) and the amplified current related to the Zn phase (Zn amplified current 3012) is input.
In the IV conversion circuit block L4, the differential current 3021 is converted into a voltage signal. A voltage signal corresponding to the differential current 3021 is output.

In the third processing circuit 401, the Zp optical signal is converted into a current by a photodiode 411. The current is amplified by the current mirror circuit J1 of the Zp current amplification circuit block L1. However, at this time, since the gm-up offset current is current-synthesized and input, the frequency characteristics (time response) of the current mirror circuit J1 are improved.
Furthermore, the current is amplified by a total of 100 times through another current mirror circuit J2, and then connected to the IV conversion circuit block L4. At this time, the current flows in the direction of pulling out from the IV conversion circuit block L4.

Like the Zp side, the Zn side is also amplified in the Zn current amplification circuit block L2, but is connected to the IV conversion circuit block L4 after passing through the Zn current folding circuit block L3 at the final stage. This causes the current to flow into the IV conversion circuit block L4.
Finally, a difference current between the Zn amplification current and the Zp amplification current flows through the IV conversion circuit block L4, and the voltage-converted version of the difference current is output as a Zs signal. At this time, since the gm-up offset current sources (current source 711 and current source 811) have the same current value, the difference current between the Zn amplification current 3012 and the Zp amplification current 3011 is the gm-up offset current source (current source 711 and current source 811). source 711) and the gm-up offset current source (current source 811) are canceled out, resulting in signal components originating from the photodiode 411 and the photodiode 412.

MOS transistors (gate common amplifier circuits) 421, 441, 461, 521, 541, 561, 581 with nodes K1 to K3 and K11 to K14 shown in FIG. , K11 to K14 side) is kept constant, and the voltage applied to the elements (photodiodes, etc.) connected to the elements (photodiodes, etc.) This suppresses the occurrence of errors in the amount of current.

Here, in the examples of FIGS. 31 and 32, a case is shown in which the third processing circuit 401 is used as a circuit that processes the current signal from the photodiode 411 regarding the Zp phase and the current signal from the photodiode 412 regarding the Zn phase.
As another configuration example, it is also possible to use a circuit having the same configuration as the third processing circuit 401 as a circuit that processes a current signal generated by a photodiode related to the Rp phase and a current signal generated by a photodiode related to the Rn phase.
In this case, as a specific example, a photodiode related to the Rp phase is used instead of the photodiode 411 related to the Zp phase shown in FIGS. 31 and 32, and a photodiode 412 related to the Zn phase shown in FIGS. 31 and 32 is used. A configuration may also be adopted in which a photodiode relating to the Rn phase is used.

Furthermore, when there are multiple photodiodes related to the Rp phase (for example, when there are two photodiodes 311 and 312 shown in FIG. 28), the current signals from these multiple photodiodes are summed. The result may be input to the current mirror circuit J1 via the MOS transistor 421.
Similarly, when there are multiple photodiodes related to the Rn phase (for example, when there are two photodiodes 313 and 314 shown in FIG. 28), the current signals from these multiple photodiodes are summed. The result may be input to the current mirror circuit J11 via the MOS transistor 521.

Note that when a circuit having a configuration similar to that of the third processing circuit 401 is used as a circuit for processing a current signal generated by a photodiode related to the Rp phase and a current signal generated by a photodiode related to the Rn phase, for example, the photodiode 411 related to the Zp phase is used. The parameters (circuit constants) may be arbitrarily changed (adjusted) in comparison with the case where the circuit is used as a circuit for processing the current signal from the photodiode 412 and the current signal from the photodiode 412 regarding the Zn phase. For example, instead of a total of 100 times (=10 times x 10 times) amplification by the two current mirror circuits in the examples of FIGS. 31 and 32, a total of 50 times amplification may be used.

(Description of optical reflection type ABZ phase encoder according to each configuration example)
In this embodiment, the following configurations (first to third configuration examples) can be realized.

[Optical reflective ABZ phase encoder according to first configuration example]
In the optical reflection type ABZ phase encoder 1 according to the first configuration example, Z phase detection is performed using secondary Talbot imaging.
The pixel positions shown in FIG. 30 are used as pixel positions on the photodiode array 13 used for Z-phase detection. The pixel positions are, for example, two positions separated by two pitches, such as position H21 and position H22 in the example of FIG.

As the processing circuit, for example, the first processing circuit 101 shown in FIG. 21 may be used.
As an even better example, the second processing circuit 201 shown in FIG. 28 may be used as the processing circuit. The second processing circuit 201 uses the R phase for comparison for Z phase detection.

Therefore, in the optical reflective ABZ phase encoder 1 according to the first configuration example, by using the second-order Talbot imaging, the distances at which various components are arranged can be made larger than in the configuration using the first-order Talbot imaging. can do.
The optical reflection type ABZ phase encoder 1 according to the first configuration example can enable Z phase detection in secondary Talbot imaging. That is, in the optical reflection type ABZ phase encoder 1 according to the first configuration example, a desired single pulse output can be obtained in secondary Talbot imaging.

Further, in the optical reflection type ABZ phase encoder 1 according to the first configuration example, for example, the degree of freedom in mounting for a user (for example, a customer) of a small encoder using a narrow pitch (in this embodiment, 20 μm) optical scale is improved. be able to. As a specific example, when the order n=2, z is doubled compared to the case where the order n=1, so it is necessary to install the multi-slit LED 11, the reflective scale 12, and the photodiode array 13, or It is possible to easily adjust the arrangement.

Further, in the optical reflection type ABZ phase encoder 1 according to the first configuration example, for example, in order to detect the Zs phase, a threshold value (reference value) can be generated using the R phase. Compared to the case of performing a comparison using a threshold value (reference value), resistance to environmental changes can be improved in determining only the central peak of the triple peaks of the Zs phase.

Note that when a narrow pitch scale is used in an optical encoder, the distance at which good imaging can be achieved becomes discrete due to the effect of the wave nature of light. The distance is the distance between the LED (in this embodiment, a multi-slit LED) and the reflective scale, and the distance between the reflective scale and the photodiode array.
In the past, there were cases in which various components could not be mounted due to the distance relationship of first-order Talbot imaging. Therefore, when increasing the distance for mounting various components, secondary Talbot imaging with twice the distance is established, but since the shape of the formed image is different from the primary image, With a configuration similar to the conventional one, the requirements for an optical encoder in Z-phase detection were not met. Specifically, in such a configuration, a double peak occurs at a location where a single peak (one pulse-like peak) is desired.
With respect to such conventional problems, the optical reflection type ABZ phase encoder 1 according to the first configuration example can solve the problems.

<Configuration example of optical reflection type ABZ phase encoder according to first configuration example>
As one configuration example, a light source that emits light (in the example in FIG. 1, the multi-slit LED 11), a scale that reflects the light (in the example in FIG. 1, the reflective scale 12), and reflected light reflected by the scale. An optical reflection type ABZ phase encoder (optical reflection type ABZ phase encoder 1 in the example of FIG. 1), which includes a photodetector (in the example of FIG. 1, the photodiode array 13) that receives light, and the following: The structure is as follows.
The photodetector is located at a first position and a second position separated by two pitches in the secondary Talbot imaging of the light (two positions H21 and H22 in the example of FIG. 25, two positions in the example of FIG. 27). H31, H32, Zp position and Zn position in the example of FIG. 30), if the difference signal between the current signal due to light reception at the first position and the current signal due to light reception at the second position exceeds a threshold value, A processing circuit (for example, the first processing circuit 101, the second processing circuit 201, or the third processing circuit 401) that determines that the position is the Z-phase position representing the position is provided.

As a configuration example, in an optical reflection type ABZ phase encoder, the difference signal has triple peaks. The threshold value has a value such that only the central peak of the triple peaks exceeds the threshold value.
As a configuration example, in an optical reflective ABZ phase encoder, the processing circuit is configured to detect a third position (positions H41 and H42 in the example of FIG. 27) included in a peak that is one pitch away from the first position. and a fourth position (in the example of FIG. 27, positions H43 and H44) included in the peak that is one pitch longer on the other side with respect to the second position, the current signal due to light reception at the third position and the fourth position are It includes a circuit that generates a threshold value based on a difference signal from a current signal caused by light reception at a position.
As a configuration example, in an optical reflective ABZ phase encoder, the third position includes two positions, and the fourth position includes two positions.

[Optical reflective ABZ phase encoder according to second configuration example]
In the optical reflection type ABZ phase encoder 1 according to the second configuration example, a Zs signal for Z phase detection is generated using first-order Talbot imaging or second-order Talbot imaging.

The optical reflective ABZ phase encoder 1 according to the second configuration example has a configuration in which an emitter follower amplification circuit using bipolar transistors for amplifying the current output of the photodiodes of two pixels (for example, as shown in FIG. 21). As an alternative to the configuration of the first processing circuit 101 (the configuration of the first processing circuit 101 shown in FIG.
In addition, in the optical reflection type ABZ phase encoder 1 according to the second configuration example, in order to enable operation at a higher frequency during such current amplification, an offset is added to the current mirror circuit for each pixel. The configuration and operation are such that the offset current is canceled by passing a current and finally combining the two amplified currents. Moreover, in the optical reflection type ABZ phase encoder 1 according to the second configuration example, as the current synthesis circuit, a combination of current mirror circuits using simple MOS transistors is used instead of, for example, a circuit that uses many conventional operational amplifiers. There is.
In addition, in the optical reflection type ABZ phase encoder 1 according to the second configuration example, in order to suppress fluctuations in the amplification degree of these circuits due to incident light, there are A gate-grounded amplifier circuit using a MOS transistor is inserted between the mirror circuit and the mirror circuit.

Therefore, the optical reflective ABZ phase encoder 1 according to the second configuration example includes a circuit effective for amplifying the current signal of a pixel related to Z phase detection in a photodetector (in this embodiment, a photodiode array).
In the optical reflection type ABZ phase encoder according to the second configuration example, current can be amplified without using bipolar transistors, which eliminates the need for, for example, a special front-end process, and also reduces the circuit scale. This makes it possible to improve productivity and reduce costs. Further, in the optical reflection type ABZ phase encoder 1 according to the second configuration example, the overall performance can be equal to or higher than that of the conventional circuit.
As described above, the optical reflection type ABZ phase encoder 1 according to the second configuration example eliminates the need for a special pre-process process and achieves cost reduction by downsizing the IC (Integrated Circuit). can.

In addition, in the optical reflection type ABZ phase encoder 1 according to the second configuration example, the processing circuit (in this embodiment In this case, the third processing circuit 401) can be applied.

In the third processing circuit 401, current signals from the photodiodes 411 and 412 are amplified by current mirror circuits J1, J2, J11, and J12 using MOS transistors without using bipolar transistors.
Further, the third processing circuit 401 uses an offset current source. As a specific example, the third processing circuit 401 can improve the frequency characteristics (time response) of the entire circuit by providing a gm-up offset current source.

In the third processing circuit 401, the voltage applied to the photodiodes 411 and 412 is kept constant using a MOS transistor. As a specific example, in the third processing circuit 401, by providing common gate amplifier circuits at various locations such as between the photodiode and the current mirror circuit, it is possible to reduce the influence of errors caused by increases and decreases in optical signals.
In the third processing circuit 401, since the IV conversion circuit is provided at the final stage, the circuit configuration can be significantly reduced. As a specific example, in the third processing circuit 401, the circuit scale can be reduced by inputting the amplified currents of the Zp phase and Zn phase to the IV conversion circuit after combining them.

In addition, in the third processing circuit 401, by changing the Zp phase and Zn phase to Rp phase (for example, for 2 pixels) and Rn phase (for example, for 2 pixels), it is possible to detect not only the Zs signal but also the R signal. It can also be used for processing.

Conventionally, in an optical encoder, the output current for the incident light of the pixel responsible for Z-phase detection in the photodiode array is small, and in order to perform subsequent signal processing, current amplification in an emitter follower amplifier circuit using a bipolar transistor is required. It was mandatory. Furthermore, conventionally, the subsequent electronic circuit for signal processing has been a large-scale circuit that frequently uses operational amplifiers.
With respect to such conventional problems, the optical reflection type ABZ phase encoder 1 according to the second configuration example can solve the problems.

<Configuration example of optical reflection type ABZ phase encoder according to second configuration example>
As one configuration example, a light source that emits light (in the example in FIG. 1, the multi-slit LED 11), a scale that reflects the light (in the example in FIG. 1, the reflective scale 12), and reflected light reflected by the scale. An optical reflection type ABZ phase encoder (optical reflection type ABZ phase encoder 1 in the example of FIG. 1), which includes a photodetector (in the example of FIG. 1, the photodiode array 13) that receives light, and the following: The structure is as follows.
The photodetector is located at a first position and a second position separated by one pitch in the primary Talbot imaging of the light (two positions H1 and H2 in the example of FIG. 20, and the position of Zp in the example of FIG. Zn position), or the first and second positions separated by two pitches in the secondary Talbot imaging of the light (two positions H21 and H22 in the example of FIG. 25, two positions in the example of FIG. 27) positions H31, H32, the Zp position and the Zn position in the example of FIG. The difference signal between the amplified result and the result of amplifying the current signal from the second position light reception by the second current mirror circuit (in the example of FIG. 31, current mirror circuits J11, J12 and 1x current mirror circuit J13) is the threshold value. A processing circuit (for example, the third processing circuit 401) that generates a Zs signal for determining that the position is a Z-phase position representing a predetermined reference position is provided.

As a configuration example, in an optical reflective ABZ phase encoder, the processing circuit has an offset current source for a current signal due to light reception at the first position and a current signal due to light reception at the second position.
As a configuration example, in an optical reflective ABZ phase encoder, the processing circuit includes a MOS transistor (MOS transistor 421 in the example of FIG. 31) between the photodiode corresponding to the first position and the first current mirror circuit. Furthermore, a MOS transistor (MOS transistor 521 in the example of FIG. 31) is provided between the photodiode corresponding to the second position and the second current mirror circuit.
As a configuration example, in an optical reflective ABZ phase encoder, the processing circuit performs IV conversion in a circuit portion that acquires a difference signal (in the example of FIG. 32, IV conversion circuit block L4).
As a configuration example, in an optical reflection type ABZ phase encoder, the first current mirror circuit is configured using MOS transistors, and the second current mirror circuit is configured using MOS transistors.
As a configuration example, in an optical reflective ABZ phase encoder, the first current mirror circuit includes a plurality of current mirror circuits, and a MOS is connected between at least one set of adjacent current mirror circuits among the plurality of current mirror circuits. The second current mirror circuit includes a transistor (in the example of FIG. 31, a MOS transistor 441 between the current mirror circuit J1 and the current mirror circuit J2), and the second current mirror circuit includes a plurality of current mirror circuits, and the second current mirror circuit includes a plurality of current mirror circuits. A MOS transistor between at least one set of adjacent current mirror circuits among the mirror circuits (in the example of FIG. 31, a MOS transistor 541 between current mirror circuit J11 and current mirror circuit J12, and a MOS transistor between current mirror circuit J12 and current mirror It has a MOS transistor 561) between it and the circuit J13.

One configuration example is an optical reflection type ABZ phase encoder that includes a light source that emits light, a scale that reflects the light, and a photodetector that receives the reflected light reflected by the scale. The structure is as follows.
The photodetector has a first position and a second position separated by three pitches in the first-order Talbot imaging of the light (for example, the three Rp positions and the three Rn positions in the example of FIG. 10), Or, the first position and the second position separated by 4 pitches in the secondary Talbot imaging of the light (for example, the two positions H41 and H42 in the example of FIG. 27 and the two positions H43 and H44 in the example of FIG. (2 Rp positions and 2 Rn positions in the example), the current signal due to light reception at the first position is amplified by the first current mirror circuit, and the current signal due to light reception at the second position is amplified by the second current signal. A processing circuit (for example, a circuit in which the third processing circuit 401 is applied to R-phase detection) is provided to obtain a difference signal from the result amplified by the mirror circuit.

[Optical reflective ABZ phase encoder according to third configuration example]
The optical reflection type ABZ phase encoder according to the third configuration example has features that are compatible with the configuration of the optical reflection type ABZ phase encoder according to the first configuration example and the configuration of the optical reflection type ABZ phase encoder according to the second configuration example. .

In the optical reflection type ABZ phase encoder 1 according to the third configuration example, Z phase detection is performed using secondary Talbot imaging.
The pixel positions shown in FIG. 30 are used as pixel positions on the photodiode array 13 used for Z-phase detection. The pixel positions are, for example, two positions separated by two pitches, such as position H21 and position H22 in the example of FIG.
As the processing circuit, for example, the third processing circuit 401 shown in FIG. 31 is used.

Therefore, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, it is possible to detect the Z phase in secondary Talbot imaging. That is, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, a desired single pulse output can be obtained in secondary Talbot imaging.

Further, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, for example, the degree of freedom in mounting for a user (for example, a customer) of a small encoder using a narrow pitch (20 μm in this embodiment) optical scale is improved. be able to. As a specific example, when the order n=2, z is doubled compared to the case where the order n=1, so it is necessary to install the multi-slit LED 11, the reflective scale 12, and the photodiode array 13, or It is possible to easily adjust the arrangement.

Further, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, for example, in order to detect the Zs phase, a threshold value (reference value) can be generated using the R phase. Compared to the case of performing a comparison using a threshold value (reference value), it is possible to improve the accuracy of determining only the central peak of the triple peaks of the Zs phase.
Further, in this case, for example, the third processing circuit 401 shown in FIG. 31 may be used as the R-phase processing circuit.

Further, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, current can be amplified without using bipolar transistors, which eliminates the need for, for example, a special front-end process, and , it is possible to reduce the circuit scale, improve productivity and reduce costs. Further, in the optical reflection type ABZ phase encoder 1 according to the third configuration example, the overall performance can be made equal to or higher than that of the conventional circuit.
In this manner, the optical reflection type ABZ phase encoder 1 according to the third configuration example eliminates the need for a special pre-process, and the IC can be miniaturized, thereby achieving cost reduction.

[About the above embodiments]
The circuits and the like according to the above embodiments may be controlled by, for example, a computer executing a predetermined program using a processor.
Such a computer may be included in the optical reflection type ABZ phase encoder 1, or may be provided separately from the optical reflection type ABZ phase encoder 1, for example.

For example, a program for realizing the function of any component in any device described above may be recorded on a computer-readable recording medium, and the program may be loaded and executed by a computer system. . Note that the "computer system" herein includes an operating system or hardware such as peripheral devices. Furthermore, "computer-readable recording media" refers to portable media such as flexible disks, magneto-optical disks, ROMs, CDs (Compact Discs) and ROMs (Read Only Memory), and storage devices such as hard disks built into computer systems. Refers to a device. Furthermore, a "computer-readable recording medium" refers to a volatile memory within a computer system that serves as a server or client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. This also includes those that hold time programs. The volatile memory may be, for example, RAM (Random Access Memory). The recording medium may be, for example, a non-transitory recording medium.

Further, the above program may be transmitted from a computer system storing the program in a storage device or the like to another computer system via a transmission medium or by a transmission wave in a transmission medium. Here, the "transmission medium" that transmits the program refers to a medium that has a function of transmitting information, such as a network such as the Internet or a communication line such as a telephone line.
Moreover, the above-mentioned program may be for realizing a part of the above-mentioned functions. Furthermore, the above-mentioned program may be a so-called difference file, which can realize the above-described functions in combination with a program already recorded in the computer system. The difference file may be called a difference program.

Furthermore, the functions of any component in any of the devices described above may be realized by a processor. For example, each process in the embodiment may be realized by a processor that operates based on information such as a program, and a computer-readable recording medium that stores information such as a program. Here, in the processor, the functions of each part may be realized by separate hardware, or the functions of each part may be realized by integrated hardware, for example. For example, a processor includes hardware, and the hardware may include at least one of a circuit that processes a digital signal and a circuit that processes an analog signal. For example, a processor may be configured using one or more circuit devices or one or more circuit elements mounted on a circuit board. An IC (Integrated Circuit) or the like may be used as the circuit device, and a resistor or a capacitor may be used as the circuit element.

Here, the processor may be, for example, a CPU. However, the processor is not limited to a CPU, and various processors such as a GPU (Graphics Processing Unit) or a DSP (Digital Signal Processor) may be used. Further, the processor may be, for example, a hardware circuit such as an ASIC (Application Specific Integrated Circuit). Further, the processor may be configured by, for example, a plurality of CPUs or a hardware circuit by a plurality of ASICs. Further, the processor may be configured by, for example, a combination of a plurality of CPUs and a hardware circuit using a plurality of ASICs. Further, the processor may include, for example, one or more of an amplifier circuit or a filter circuit that processes an analog signal.

Although the embodiment of this disclosure has been described above in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and includes designs within the scope of the gist of this disclosure.

1, 1a... Optical reflective ABZ phase encoder, 11, 11c... Multi-slit LED, 11a... Narrow width single slit LED, 12, 12a... Reflective scale, 13, 13a, 13b, 13c... Photodiode array, 101... Th. 1 processing circuit, 111, 112, 211, 212, 311 to 314, 411, 412...Photodiode, 121, 122, 221, 222, 321, 322...Bipolar transistor, 131, 141, 151, 161, 171, 231 , 241, 251, 261, 331, 341, 351, 361, 371, 611... Operational amplifier, 132, 142, 134, 144, 152, 154, 162, 232, 234, 242, 244, 252, 254, 262, 332 , 334, 342, 344, 352, 354, 362, 612...Resistance, 133, 143, 153, 163, 172, 233, 243, 253, 263, 333, 343, 353, 363, 613...Voltage source, 421, 441, 461, 521, 541, 561, 581, 731, 761, 771, 431, 432, 451, 452, 531, 532, 551, 552, 571, 572, 721, 722, 741, 742, 781, 782... MOS transistor, 201...Second processing circuit, 401...Third processing circuit, 711, 811...Current source, 712...Voltage source, 1011, 1311, 1411, 2011, 2111, 2211, 2311...Intensity characteristic, 1121...A phase and B phase essentials, 1131, 1132... Z phase essentials, 1211, 1212, 1231, 1232, 1511, 1512, 1531, 1532, 2021, 2031, 2121, 2131, 2221, 2231, 2321, 2322, 2331... characteristics , 1221, 1521...Lissajous waveform, 3011...Zp amplification current, 3012...Zn amplification current, 3021...difference current, A1, A1a, A1c...light emitting surface, B1, B1a, C1, C1a...reflecting surface, D1, D1a...absorption Surface, E1, E1a... Pixel image of photodiode array, F1a... Intersection, G1 to G5... Unit light emitting surface, H1, H2, H11, H12, H21, H22, H31, H32, H41 to H44... Position, J1, J2 , J11-J13...Current mirror circuit, K1-K3, K11-K14...Node, L1...Zp current amplification circuit block, L2...Zn current amplification circuit block, L3...Zn current folding circuit block, L4...I-V conversion circuit Block, P1, P2, P11, P12, P21, P22...IV conversion circuit, P3, P4, P13, P14, P23, P24...Inverting amplifier circuit, Q1...Differential amplifier circuit, W1, W1a...Direction

Claims (4)

An optical reflective ABZ phase encoder comprising a light source that emits light, a scale that reflects the light, and a photodetector that receives the reflected light reflected by the scale,
The photodetector is configured to generate a current signal due to light reception at the first position and a current signal due to light reception at the second position with respect to a first position and a second position separated by two pitches in secondary Talbot imaging of the light. comprising a processing circuit that determines that the position is a Z-phase position representing a predetermined reference position when the difference signal exceeds a threshold;
Optical reflection type ABZ phase encoder. The difference signal has a triple peak,
The threshold value is such that only the central peak of the triple peaks has a value exceeding the threshold value.
The optical reflection type ABZ phase encoder according to claim 1. The processing circuit includes a third position included in a peak that is one pitch length on one side with respect to the first position, and a fourth position that is included in a peak that is one pitch length on the other side with respect to the second position. and a circuit that generates the threshold value based on a difference signal between a current signal due to light reception at the third position and a current signal due to light reception at the fourth position.
The optical reflection type ABZ phase encoder according to claim 1 or 2. the third location includes two locations;
the fourth position includes two positions;
The optical reflection type ABZ phase encoder according to claim 3.

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