JP2022183142A - Communication link equalization process, computing device and equalizer optimization method - Google Patents

Abstract

To optimize 16 taps of an equalizer quickly and accurately.SOLUTION: A computing device sets all 16 values to zero. Then, the computing device repeats a process of: determining a current smallest parameter in a set of 16 parameters until the all 16 values are assigned; determining a minimum value from a value obtained by dividing, by the current minimum parameter, a value obtained by subtracting the sum of each of the parameters in the parameter set multiplied by each of values in a value set from a first item in the parameter set multiplied by a main pulse response, and the corresponding pulse response; and assigning the minimum value to values in a value set at the same position as the current minimum parameter in the parameter set. The computing device multiplies each of the values by the sign of the corresponding pulse response in the pulse response and determines the value of each coefficient of the equalizer.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to optimization of equalizers used in communication of electrical and optical signals, and more particularly to optimization of decision feedback equalizers used in standard signaling protocols with constraints.

High-speed communication links between transmitters and receivers typically operate at speeds of 6 gigabits per second (Gb/s). At such high speeds, either the transmitter or the receiver, or both, typically employ equalization techniques to compensate for signal degradation. Signal degradation can be due to channel loss, reflections, crosstalk, noise, to name a few. Equalizing a signal usually means amplifying the signal while removing or filtering unwanted components from the signal.

This equalization process is accomplished by a variety of widely used techniques, including decision feedback equalizers (DFEs). A DFE typically equalizes the input signal by using a feedback path that uses past decisions to mitigate the effects of inter-symbol interference (ISI). A DFE uses various coefficients, commonly called "taps," to mitigate the effects of signal impairments.

Japanese Patent No. 2663820 WO2012/102258 U.S. Pat. No. 8,855,186

"PCI-SIG specifications", PCI-SIG, [online], [searched May 27, 2022], Internet <https://pcisig.com/specifications>

Different communication standards have different requirements for the equalization process, which is typically set as the number of DFE taps and the range and constraints of the taps. The process of optimizing these taps for a particular equalizer typically requires an iterative research process or a sweep of the solution space. These processes are typically slow and inaccurate.

In the following, examples are presented that are useful in understanding the technology disclosed in this application. Embodiments of the technology may include one or more and any combination of the examples described below.

Embodiment 1 is a method of equalizing a communication link, comprising setting the number of coefficients equal to the required number of coefficients and determining the number of pulse responses for the waveform greater than the number of coefficients. setting all values in a set of values equal to the number of coefficients to zero; using the position of said current minimum parameter in said set of parameters as an index, and multiplying the first term in said set of parameters by the main pulse response minus the sum of each of the parameters in the set of parameters multiplied by each of the values in the set of values, divided by the current minimum parameter, and the corresponding pulse response repeating a process of determining a minimum value from among and assigning the minimum value to a value in the set of values that is in the same position as the current minimum parameter in the set of parameters; determining the value of each of the coefficients in the set of coefficients by multiplying each value in the set by the sign of the corresponding pulse response in the pulse response; and each of said taps having a value based on said corresponding coefficient; and applying said equalizer to a waveform received over said communication link to produce an equalized waveform. Equipped with

Example 2 is the method of Example 1, wherein the process of determining the number of pulse responses uses a linear approximation pulse response extraction method.

Example 3 is the method of Examples 1 or 2, where the given set of parameters is obtained from the necessary constraints for the equalizer.

Example 4 is the method of any of Examples 1-3, wherein when the index is equal to 1, the process of determining the minimum value also considers an additional term based on the main pulse response. Determine the minimum value.

Example 5 is the method of Example 4, where the additional term is based on the equalizer tap constraint for the equalizer.

Example 6 is the method of any of Examples 1-5, wherein the communication link includes any of PCIe Gen6 and USB.

Example 7 is a method of any of Examples 1-5, wherein the number of coefficients required is 16.

Example 8 is a computing device comprising an interface to a high speed communication link and one or more processors configured to execute a program, wherein when said program is executed, said one or more processors but setting a number of coefficients equal to the required number of coefficients; determining a number of pulse responses for the waveform that is greater than the number of coefficients; setting all values of to zero, determining the current smallest parameter in a given set of parameters until all values in said set of values have been assigned, and in said set of parameters and multiplying the first term in the parameter set by the main pulse response, to each of the parameters in the parameter set the value of determining the minimum value among the sum of the multiplications of each of the values in the set minus the sum divided by the current minimum parameter and the corresponding pulse response; assigning the minimum value to the value in the set of values co-located with the current minimum parameter of and assigning each value in the set of values the corresponding determining the value of each of the coefficients in the set of coefficients by multiplying by the sign of the pulse response; Defining an equalizer with values and applying the equalizer to a waveform received over the communication link to produce an equalized waveform.

Example 9 is the computing apparatus of Example 8, wherein the program causing the one or more processors to determine the number of pulse responses includes the program causing the one or more processors to use a linear approximation pulse response extraction method .

Example 10 is the computing apparatus of Example 8 or 9, wherein the given set of parameters is obtained from the necessary constraints on the equalizer.

Example 11 is the computing apparatus of any of Examples 8-10, wherein the program causing the one or more processors to determine the minimum value, if the index is equal to 1, the additional Includes a program that takes into account various terms to determine the minimum value.

Example 12 is the computing apparatus of Example 11, wherein the additional term is based on equalizer tap constraints for the equalizer.

Example 13 is the computing device of any of Examples 8-12, wherein the communication link includes one of PCIe Gen6 and USB.

Example 14 is the computing device of any of Examples 8-13, wherein the number of coefficients required is sixteen.

Example 15 is a method of optimizing a 16-tap equalizer for a communication link, the process determining the number of pulse responses for a waveform greater than 16 and all values in the set of 16 values to zero; determining the current smallest parameter in a given set of 16 parameters until all 16 values in the set of values have been assigned; and multiplying the first term in the set of parameters by the main pulse response to obtain each of the parameters in the set of parameters with the value subtracting the sum of the multiplied values of each of the values in the set of and dividing by the current minimum parameter and the corresponding pulse response; assigning said minimum value to the value in said set of values co-located with said current minimum parameter in said pulse response; and determining the value of each of the coefficients in the set of coefficients by multiplying by the sign of the pulse response.

Example 16 is the method of Example 15, wherein determining the number of pulse responses includes using a linear approximation pulse response extraction method.

Example 17 is the method of Examples 15 or 16, wherein the process of determining the minimum considers an additional term based on the main pulse response to determine the minimum if the index is equal to 1 Including processing.

Example 18 is the method of any of Examples 15-17, wherein the given set of parameters is obtained from the required constraints on the equalizer.

Example 19 is the method of any of Examples 15-18, wherein the given set of parameters comprises [1 1 0.85 0.60 0.25 0.10 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05].

Example 20 is the method of any of Examples 15-19, wherein the process of defining a 16-tap equalizer with each tap having a value based on a corresponding coefficient; applying the equalizer to generate an equalized waveform.

Aspects, features and advantages of embodiments of the present invention will become apparent upon reading the following description of embodiments with reference to the accompanying drawings.

FIG. 1 illustrates one embodiment of a device having a communication link using equalization. FIG. 2 shows one embodiment of the architecture of a decision feedback equalizer. FIG. 3 shows the pulse response of a signal passed through a relatively short channel and a relatively long channel. FIG. 4 shows waveforms of signals that have passed through a relatively short channel and a relatively long channel. FIG. 5 shows an eye diagram of a signal passed through a relatively short channel and a relatively long channel. FIG. 6 shows the characteristics of the equalizer taps. FIG. 7 shows a graph of the signal after equalization processing of the signal passed through the relatively long channel. FIG. 8 shows the eye diagram after equalization of a signal that has passed through a relatively long channel.

Embodiments of the present application provide a method for equalizing a communication link, and FIG. 1 illustrates such a communication link. Equalization processing may be performed at the transmitter, the receiver, or both to improve system performance. As the transfer rate increases, so does the amount of equalization required. The DFE uses different numbers of taps depending on the degradation or impairment of the signal to be mitigated, and in general, the faster the transfer rate, the more taps are required.

PCIe (Peripheral Component Interface Express) is an example of a communication protocol or standard that uses a DFE. PCIe, broadly speaking, has an architecture that interconnects inputs and outputs used in a wide variety of computing and communication platforms. The following discussion focuses on this particular communication protocol standard and its explicit requirements. These specific requirements provide examples of design requirements and constraints from which design requirements and constraints can be deduced to apply to the requirements of other communication protocols.

In the example of PCIe, the transfer speed has increased in successive generations from the 3rd generation to the 6th generation, as shown in Table 1 below. In Table 1, the unit of transfer rate is gigatransfers per second (GT/s: GigaTransfers/sec).

FIG. 1 illustrates one embodiment of a computing device 10. As shown in FIG. The apparatus 10 may comprise a test and measurement instrument such as an oscilloscope. Oscilloscope 10 is generally coupled to a device under test (DUT) 14 by probes 12 . Oscilloscope 10 may be connected to DUT 14 via a cable or fixture. DFE and related optimization may be performed within oscilloscope 10 or between oscilloscope 10 and DUT 14 . Either of these may function as a receiving or transmitting endpoint of a high speed transfer link employing PCIe 6th generation.

Oscilloscope 10 may have a probe interface and acquisition system 16 . Acquisition system 16 may comprise a wide variety of circuitry for receiving analog signals from DUT 14 and acquiring them as digital data (also referred to as waveform data or simply "waveforms"). Examples of a wide variety of circuits include analog-to-digital converters, preamplifiers, and the like. Memory 18 may receive and store digital data from acquisition system 16 . Memory 18 may also include executable programs that, when executed by processor 20, cause processor 20 to perform methods described below. A display 22 displays the resulting waveform, a user interface 24 may include dials, knobs, keys, etc., and a portion of display 22 may be utilized as a touch screen; These allow the user to set up and run tests on transmitters or receivers according to user defined tests.

A computing device need not necessarily consist of a test and measurement device. Many computing devices have a communication bus using a communication protocol such as PCIe as an interface between their main processor and other components (such as displays, memory and other accessories). A processor within the computing device may operate to optimize the coefficients of the DFE taps. The computing device, whether it is a test and measurement device that tests the equalizer or a computing device that operates with the equalizer, may have high speed communication link endpoints. . A computing device would have an interface (either a probe or another endpoint) to a high speed communication link.

FIG. 2 shows an embodiment of an N-tap DFE, such as a 16-tap DFE, which can be used to comply with the requirements of the PCIe Gen6 standard. As used herein, x _k refers to the input signal or waveform to the DFE and y _k refers to the input signal to the decision function. Decision function 32 detects the symbols in digital form. For example, in the case of a NRZ (None Return to Zero) signal, if the output of decision function 32 were -1, 1, this would represent bit 0 and bit 1; For a PAM4 (4-level Pulse Amplitude Modulation) signal, if the output is -1, -1/3, 1/3, 1, this represents symbol 0, symbol 1, symbol 2, and symbol 3. . The output of decision function 32 is then sent to delay block 34 (z ^-1 ). Each of these delay block 34 outputs is multiplied by the coefficient d _i of the corresponding DFE tap 36 and the products are summed at summation 38 and summed at summing node 30 with the input signal x _k . The number of DFE taps is designated by N. For PCIe 3rd generation (Gen3), N=1. For PCIe 6th generation (Gen6), N=16.

Optimizing the DFE taps improves system performance. First, various optimization target functions are used to quantify the performance of the system, including the minimum mean squared error (MMSE). The PCIe specification uses "eye opening", which means the peak-to-peak value of the waveform of the input signal, the opening in the eye diagram. indicates an eye that is US Pat. No. 8,855,186 presents an explicit solution for optimizing a DFE for PCIe Generation 3 (Gen3) utilizing a 1-tap DFE. However, the method described in this US patent does not provide an explicit solution that generalizes to cases where the DFE has more than one tap. Embodiments of the present application include an explicit method for optimizing DFEs with any number of taps, according to which the target performance criteria are met even with constraints on tap values. A satisfying eye opening can be achieved.

In an embodiment of the DFE for PCIe Gen6, the PCIe Gen6 specification "PCI Express Base Specification 6.0" (pcisig.com, 2021) defines equalizer tap constraints. there is Although the equalizer tap constraints used in this application apply specifically to this specification, all methods are applicable to any type of equalizer tap constraint used in a wide variety of communication protocol specifications. Applicable. In certain embodiments of PCIe Generation 6 (Gen6), the specification defines constraints on the equalizer taps to limit the DFE burst error. DFE burst errors, as used herein, refer to errors that occur in multiple consecutive symbols, as opposed to errors that occur independently of each other.

The PCIe 6th generation (Gen6) specification has constraints (1) and (2) expressed by the following two formulas.
[Formula 1]
_d1 / _h0 <0.55 (1)

[Formula 2]
(|d ₁ |+|d ₂ |+0.85×|d ₃ |+0.60×|d ₄ |+0.25×|d ₅ |+0.10×|d ₆ |+0.05×|d ₇ | +0.05×| _d8 |+0.05×| _d9 |+0.05×| _d10 |+0.05×| _d11 |+0.05×| _d12 |+0.05×| _d13 |+0. 05×|d ₁₄ |+0.05×|d ₁₅ |+0.05×|d ₁₆ |)/h ₀ =<0.85 (2)

As used herein, the h ₀ term means the main cursor of the pulse response extracted from the input waveform to the DFE. For example, using a linear fit pulse extraction method as described in the IEEE 802.3ba 40Gb/s and 100 Gb/s Ethernet standard (www.ieee802.org/3/, 2010). and extract the pulse response.

This linear approximation pulse extraction method, as an example of a method of extracting a pulse response from a waveform, generates a set of impulse responses h _i , where i equals the number of coefficients. . The _h0 term refers to the main impulse response. In this example, the captured waveform is the result of the transmitter repeatedly transmitting the pattern. The effective sample rate of the captured waveform is equal to M times the signaling rate of the transmitter. The captured waveform represents an integer number of repetitions of the test pattern totaling N bits. This results in a captured waveform consisting of M×N samples. The method below assumes that the first M samples of the waveform correspond to the first bit of the test pattern and the second M samples correspond to the second bit.

Given such a captured waveform y(k) and corresponding symbols x(n), we can define the M×N waveform matrix Y shown below.

Subsequently, the symbol vector x is rotated by the specified pulse delay D _p to produce x _i , as shown below.
[Formula M2]
x _r = [x(D _p +1) x(D _p +2) … x(N) x(1) … x(ND _p )]

We define the N×N matrix derived from x _r as the matrix X, as shown below.

Define matrix X ₁ as the first N _p rows of matrix X concatenated with length N row vectors. Then N _p represents the number of symbols in one pulse response. An M×N _p coefficient matrix P corresponding to a linear fit is then defined as follows. The superscript T indicates a transposed matrix.
[Formula M4]
^P = _{YX1T (} ^{X1X1T )} _-1

結果として得られる線形近似パルス応答ｐ(k)は、ｈ_iとして使用され、このとき、ｉ＝１，２，… ，Ｎ_pである。 P ₁ is then defined as the matrix consisting of the first N _p columns of matrix P. The linear approximation pulse response p(k) is obtained by reading out the components of P ₁ in the column direction.

The resulting linearly approximated pulse response p(k) is used as h _i , where i=1, 2, . . . , N _p .

The pulse response can be extracted by the linear approximation pulse extraction method described above. FIG. 3 shows on the left the pulse response from a signal passed through a relatively short channel compared to the right one and on the right a pulse response from a signal passed through a relatively long channel compared to the left one. indicates FIG. 4 shows on the left the corresponding waveforms of signals passed through relatively short channels compared to those on the right, and on the right the corresponding waveforms of signals passed through relatively long channels compared to those on the left. indicates The pulse response from the signal through the long channel has a lower main cursor h ₀ and longer decay than the pulse response from the signal through the short channel. This indicates that the inter-symbol interference (ISI) is greater. As a result, FIG. 5 shows an eye diagram of a signal through a relatively short channel compared to the right one on the left, and an eye diagram of a signal through a relatively long channel on the right compared to the left one. , but the eye diagram on the right shows the tendency of the eye to close more.

Let h _i (i=1, ₂ , . Considering what causes (eye closure), the eye opening optimization problem can be transformed into the optimization problem (3) shown in Equation 3 below.

Given the above constraints (1) and (2)

From the weighting parameters of constraint (2), we can define a set of parameters K, where
K = [1 1 0.85 0.60 0.25 0.10 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05]
is. This allows constraint (2) to be rewritten as:

Here, putting c _i =|d _i |, the optimization problem (3) shown in Equation 3 is transformed into the optimization problem (4) shown in Equation 4 below.

[数式７]
０≦ｃ_i≦|ｈ_i| （７） Optimization problem (4) has constraints (5), (6) and (7) shown in Equations 5, 6 and 7 below, respectively.

[Formula 5]
_c1 < 0.55 x _h0 (5)

[Formula 7]
0≦c _i ≦|h _i | (7)

この不等式８は、最適化コスト関数Ｊと制約関数Ｇとを結びつけることに注意してください。Ｃ_jに関する最適値は、次の通りである。

ｊ＝１の場合では、次のように、制約条件（５）も考慮する必要がある。

なお、min関数は、引数の最小の値を返す。
For any one index j, k _j can be chosen to be less than or equal to the remainder of k _i , where iε[1 N]. Obtaining this index j can be done by permuting k _i .

Note that this inequality 8 connects the optimization cost function J and the constraint function G. The optimum values for C _j are:

In the case of j=1, constraint (5) must also be considered, as follows.

Note that the min function returns the minimum value of its arguments.

As an example, assume that the sixth term of the set of parameters K is currently the minimum value. This sets j to 6, so in the above equation, k _j =k ₆ . Since the value of j is not 1, this process uses Equation 9 to determine the value of _c6 . All of the values c _i are initialized to zero. As a result, the minimum value of c ₆ is (0.85×h ₀ )/k ₆ or the absolute value of the pulse response h ₆ , whichever is smaller. This is because all of the c _i terms are initially zero, so the sum term is zero. This results in the value of the first term (0.85*h ₀ )/k ₆ as the minimum or absolute value of the pulse response h ₆ . Once this term is in the set c _i , the process is repeated using the next smallest value in the set K of parameters until the set c _i is full, but when j=1 the formula 10 is used.

Once the set c _i is complete, the DFE tap values can be determined as follows.
[Formula 11]
d _i =sign(h _i )×c _i i=1, 2, . . . , N (11)

Note that the sign function returns the sign of the value.

In summary, the method consists of computing the pulse response from the input waveform to the equalizer to find both h ₀ and h _i , where i corresponds to the number of taps. The set of pulse responses h _i , the set of values c _i , and the set of parameters all have the same number of elements. These will be called the counterparts of each set.

In the specific embodiment used to describe the practice of the invention, i is 1 to _Np . All of the set values c _i are initialized to zero. The index j is used to select the current minimum among the lowest in the parameter set K, where j is the index or position of the minimum term in the parameter set K. Knowing each value in the set of values, the current lowest parameter in the set of parameters changes position to the next lowest parameter since each parameter is used only once.

The process then determines the value of c _j according to either Equation 9 or Equation 10. Note that when determining the first term as the minimum value in a given set of parameters for PCIe Generation 6 (Gen6), it means that the first term is 0.85. This first term is then multiplied by the main pulse response h ₀ to obtain the product. Next, the sum of each parameter k _i in the parameter set multiplied by each value in the set of values c _i divided by the current smallest parameter k _j is subtracted from the previous product. A minimum value is chosen between this value and the absolute value of the corresponding pulse response h _i . In the case of j=1, the additional term of 0.55 times the main pulse response h ₀ is also included as a candidate value for choosing the minimum value. This value comes from the first constraint above (shown in Equation 1), d _i /h ₀ <0.55.

FIG. 6 shows the DFE taps obtained for the longer channel. FIG. 7 shows on the left the pulse response of the signal after applying the DFE to the signal through the longer channel. Note that the post-cursor h _i is pushed close to zero at several symbol sample positions. The right side of FIG. 7 is the waveform after applying DFE to the signal through the longer channel, showing that DFE reduces the effects of inter-symbol interference (ISI). FIG. 8 shows the eye diagram after applying the DFE to the signal through the longer channel, compared with the eye diagram on the right side of FIG. 5, showing that the DFE opens the eye of the eye diagram. ing.

In the above, PCIe Gen6 is used to describe an explicit solution of the DFE tap optimization process with the problem of tap constraints. However, the method can be applied to various DFE tap optimizations with tap constraint issues. Depending on the application, the position of the horizontal samples in the unit interval (UI) may be adjusted. In this case, the main cursor h ₀ may be selected and measured at different possible sample positions during the unit interval within the main cursor. This explicit method can be used to perform DFE tap optimization for each of the horizontal sample locations. Explicit equations 9 and 10 use '≦' instead of the constraints (5) and (6) which are strictly '<'. A small negative value ε may be added to h ₀ in Equations 9 and 10 to meet tight constraints.

Aspects of the disclosed technology can operate on specially programmed general purpose computers, including specially crafted hardware, firmware, digital signal processors, or processors that operate according to programmed instructions. As used herein, the term "controller" or "processor" is intended to include microprocessors, microcomputers, ASICs, dedicated hardware controllers, and the like. Aspects of the disclosed technology are computer-usable data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including monitoring modules) or other devices. realizable. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or perform particular functions when executed by a processor in a computer or other device. Implement an abstract data format. Computer-executable instructions may be stored on computer-readable storage media such as hard disks, optical disks, removable storage media, solid state memory, RAM, and the like. Those skilled in the art will appreciate that the functionality of the program modules may be combined or distributed as desired in various embodiments. Moreover, such functionality may be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits, field programmable gate arrays (FPGAs), and the like. One or more aspects of the disclosed technology may be more effectively implemented using certain data structures, such as the computer-executable instructions and computer-usable data described herein. is considered to be within the range of

Aspects disclosed may optionally be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may be implemented as instructions carried by or stored on one or more computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as computer program products. Computer-readable media, as described herein, refer to any media that can be accessed by a computing device. By way of example, and not limitation, computer readable media may comprise computer storage media and communication media.

Computer storage medium means any medium that can be used to store computer readable information. Non-limiting examples of computer storage media include random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory and other memories. technology, compact disc read-only memory (CD-ROM), DVD (Digital Video Disc) and other optical disk storage devices, magnetic cassettes, magnetic tapes, magnetic disk storage devices and other magnetic storage devices, and implemented in any technology It may also include any other volatile or non-volatile removable or non-removable media. Computer storage media excludes the signal itself and transitory forms of signal transmission.

Communication medium means any medium that can be used to communicate computer readable information. By way of example, and not limitation, communication media include coaxial cables, fiber optic cables, air or air suitable for communicating electrical, optical, radio frequency (RF), infrared, acoustic or other forms of signals. Any other medium may be included.

In addition, the description of the present application refers to specific features. It is to be understood that the disclosure herein includes all possible combinations of these specific features. Where a particular feature is disclosed in connection with a particular aspect or embodiment, that feature can also be used in connection with other aspects and embodiments, where possible.

Also, when this application refers to a method having more than one defined step or process, these defined steps or processes may be performed in any order or simultaneously, unless the circumstances preclude them. may be executed.

Example

In the following, examples are presented that are useful in understanding the technology disclosed in this application. Embodiments of the technology may include one or more and any combination of the examples described below.

Embodiment 1 is a method of equalizing a communication link, comprising setting the number of coefficients equal to the required number of coefficients and determining the number of pulse responses for the waveform greater than the number of coefficients. setting all values in a set of values equal to the number of coefficients to zero; using the position of said current minimum parameter in said set of parameters as an index, and multiplying the first term in said set of parameters by the main pulse response minus the sum of each of the parameters in the set of parameters multiplied by each of the values in the set of values, divided by the current minimum parameter, and the corresponding pulse response repeating a process of determining a minimum value from among and assigning the minimum value to a value in the set of values that is in the same position as the current minimum parameter in the set of parameters; determining the value of each of the coefficients in the set of coefficients by multiplying each value in the set by the sign of the corresponding pulse response in the pulse response; and each of said taps having a value based on said corresponding coefficient; and applying said equalizer to a waveform received over said communication link to produce an equalized waveform. Equipped with

Example 2 is the method of Example 1, wherein the process of determining the number of pulse responses uses a linear approximation pulse response extraction method.

Example 3 is the method of Examples 1 or 2, where the given set of parameters is obtained from the necessary constraints on the equalizer.

Example 4 is the method of any of Examples 1-3, wherein when said index is equal to 1, the process of determining the minimum value is the minimum value considering also an additional term based on the main pulse response. determine the value.

Example 5 is the method of Example 4, where the additional term is based on the equalizer tap constraint for the equalizer.

Example 6 is the method of any of Examples 1-5, wherein the communication link includes any of PCIe Gen6 and USB.

Example 7 is a method of any of Examples 1-5, wherein the number of coefficients required is 16.

Example 8 is a computing device comprising an interface to a high speed communication link and one or more processors configured to execute a program, wherein when said program is executed, said one or more processors but setting a number of coefficients equal to the required number of coefficients; determining a number of pulse responses for the waveform that is greater than the number of coefficients; setting all values of to zero, determining the current smallest parameter in a given set of parameters until all values in said set of values have been assigned, and in said set of parameters and multiplying the first term in the parameter set by the main pulse response, to each of the parameters in the parameter set the value of determining the minimum value among the sum of the multiplications of each of the values in the set minus the sum divided by the current minimum parameter and the corresponding pulse response; assigning the minimum value to the value in the set of values co-located with the current minimum parameter of and assigning each value in the set of values the corresponding determining the value of each of the coefficients in the set of coefficients by multiplying by the sign of the pulse response; Defining an equalizer with values and applying the equalizer to a waveform received over the communication link to produce an equalized waveform.

Example 9 is the computing apparatus of Example 8, wherein the program causing the one or more processors to determine the number of pulse responses includes the program causing the one or more processors to use a linear approximation pulse response extraction method .

Example 10 is the computing apparatus of Example 8 or 9, wherein the given set of parameters is obtained from the necessary constraints on the equalizer.

Example 11 is the computing apparatus of any of Examples 8-10, wherein the program causing the one or more processors to determine the minimum value, if the index is equal to 1, the additional Includes a program that takes into account various terms to determine the minimum value.

Example 12 is the computing apparatus of Example 11, wherein the additional term is based on equalizer tap constraints for the equalizer.

Example 13 is the computing device of any of Examples 8-12, wherein the communication link includes one of PCIe Gen6 and USB.

Example 14 is the computing device of any of Examples 8-13, wherein the number of coefficients required is sixteen.

Example 15 is a method of optimizing a 16-tap equalizer for a communication link, the process determining the number of pulse responses for a waveform greater than 16 and all values in the set of 16 values to zero; determining the current smallest parameter in a given set of 16 parameters until all 16 values in the set of values have been assigned; and multiplying the first term in the set of parameters by the main pulse response to obtain each of the parameters in the set of parameters with the value subtracting the sum of the multiplied values of each of the values in the set of and dividing by the current minimum parameter and the corresponding pulse response; assigning said minimum value to the value in said set of values co-located with said current minimum parameter in said pulse response; and determining the value of each of the coefficients in the set of coefficients by multiplying by the sign of the pulse response.

Example 16 is the method of Example 15, wherein determining the number of pulse responses includes using a linear approximation pulse response extraction method.

Example 17 is the method of Examples 15 or 16, wherein the process of determining the minimum considers an additional term based on the main pulse response to determine the minimum if the index is equal to 1 Including processing.

Example 18 is the method of any of Examples 15-17, wherein the given set of parameters is obtained from the required constraints on the equalizer.

Example 19 is the method of any of Examples 15-18, wherein the given set of parameters comprises [1 1 0.85 0.60 0.25 0.10 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05].

Example 20 is the method of any of Examples 15-19, wherein the process of defining a 16-tap equalizer with each tap having a value based on a corresponding coefficient; applying the equalizer to generate an equalized waveform.

All features disclosed in the specification, abstract, claims and drawings, and all steps in any method or process disclosed, are intended to be interpreted such that at least some of such features or steps are mutually exclusive. They can be combined arbitrarily, except in cases where they are combinations that are not mutually exclusive. Each feature disclosed in the specification, abstract, claims and drawings, unless stated otherwise, may be replaced by alternative features serving the same, equivalent or similar purpose.

While specific embodiments of the invention have been illustrated and described for purposes of illustration, it will be appreciated that various changes can be made without departing from the spirit and scope of the disclosure. Accordingly, the invention is not to be restricted except by the appended claims.

10 computing device 12 probe 14 device under test (DUT)
16 Acquisition System 18 Memory 20 Processor 22 Display 24 User Interface 30 Summing Node 32 Decision Function 34 Delay Block 36 DFE Tap 38 Summing Unit

Claims (12)

A method of equalizing a communication link, comprising:
setting the number of coefficients equal to the desired number of coefficients;
determining a number of pulse responses for the waveform that is greater than the number of coefficients;
setting all values in a set of values equal to the number of coefficients to zero;
until all values in the above set of values have been assigned
determining the current smallest parameter in a given set of parameters;
using the position of the current smallest parameter in the set of parameters as an index;
the first term in the parameter set multiplied by the main pulse response minus the sum of each of the parameters in the parameter set multiplied by each of the values in the value set; determining the minimum value between the divided by the current minimum parameter and the corresponding pulse response;
assigning said minimum value to a value in said set of values co-located with said current minimum parameter in said set of parameters; and
determining the value of each of the coefficients in the set of coefficients by multiplying each value in the set of values by the sign of the corresponding pulse response in the pulse response;
defining an equalizer having a number of taps equal to the number of coefficients, each tap having a value based on the corresponding coefficient;
applying said equalizer to a waveform received over said communication link to produce an equalized waveform. 2. The method of claim 1, wherein the process of determining the number of pulse responses utilizes a linear approximation pulse response extraction method. 2. The method of claim 1, wherein said set of parameters is obtained from necessary constraints on said equalizer. 2. The method of claim 1, wherein if said index is equal to 1, said minimum value determining process also considers an additional term based on said main pulse response to determine said minimum value. 4. The method of claim 3, wherein said additional term is based on equalizer tap constraints for said equalizer. A computing device,
an interface to a communication link;
one or more processors configured to execute a program;
to the one or more processors when the program is executed;
setting the number of coefficients equal to the desired number of coefficients;
determining a number of pulse responses for the waveform that is greater than the number of coefficients;
setting all values in a set of values equal to the number of coefficients to zero;
until all values in the above set of values have been assigned
determining the current smallest parameter in a given set of parameters;
using the position of the current smallest parameter in the set of parameters as an index;
the first term in the parameter set multiplied by the main pulse response minus the sum of each of the parameters in the parameter set multiplied by each of the values in the value set; determining the minimum value between the divided by the current minimum parameter and the corresponding pulse response;
assigning said minimum value to a value in said set of values co-located with said current minimum parameter in said set of parameters; and
determining the value of each of the coefficients in the set of coefficients by multiplying each value in the set of values by the sign of the corresponding pulse response in the pulse response;
defining an equalizer having a number of taps equal to the number of coefficients, each tap having a value based on the corresponding coefficient;
applying said equalizer to a waveform received over said communication link to produce an equalized waveform. 7. The computing device of claim 6, wherein the set of parameters is obtained from necessary constraints on the equalizer. 3. The program for causing the one or more processors to determine the minimum value includes, when the index is equal to 1, determining the minimum value considering an additional term based on the main pulse response. 6 computing devices. A method of optimizing a 16-tap equalizer for a communication link, comprising:
determining a number of pulse responses for the waveform greater than 16;
setting all values in the set of 16 values to zero;
Until all 16 values in the above set of values have been assigned,
determining the current smallest parameter in a given set of 16 parameters;
using the position of the current smallest parameter in the set of parameters as an index;
the first term in the parameter set multiplied by the main pulse response minus the sum of each of the parameters in the parameter set multiplied by each of the values in the value set; determining the minimum value between the divided by the current minimum parameter and the corresponding pulse response;
assigning said minimum value to a value in said set of values co-located with said current minimum parameter in said set of parameters; and
determining the value of each of the coefficients in the set of coefficients by multiplying each value in the set of values by the sign of the corresponding pulse response in the pulse response. . 10. The equalizer optimization method of claim 9, wherein determining said minimum value includes determining said minimum value considering an additional term based on said main pulse response when said index is equal to one. 10. The equalizer optimization method of claim 9, wherein the set of parameters comprises [1 1 0.85 0.60 0.25 0.10 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05]. defining a 16-tap equalizer, each tap having a value based on a corresponding coefficient; and applying the equalizer to a waveform received over the communication link to produce an equalized waveform. 10. The equalizer optimization method of claim 9 comprising.

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