JP2022068670A - Information processing device, process execution method, program and recording medium - Google Patents

Abstract

To provide an information processing device capable of optimizing access to data on a non-volatile memory.SOLUTION: An information processing device 1 includes an operating system unit 10 and a plurality of memory access nodes 20. In the operating system unit 10, a process analysis unit 11 analyzes a process. A data identification unit 12 identifies data which are access objects of the process and an executable file of the data, based on the process. At least one of the data and the executable file is the data stored on a non-volatile memory 231 of a specific memory access node 20. An allocation unit 13 allocates a central process unit 21 which executes the process from the plurality of memory access nodes 20, depending on the time distance with regard to the access to the non-volatile memory 231, based on the data and the executable file.SELECTED DRAWING: Figure 1

Description

The present invention relates to an information processing apparatus, a process execution method, a program and a recording medium.

Technology that selects the combination of I / O (Input / Output) and CPU (Central Processing Unit), and I / O and memory so that access is as short as possible in a system that adopts a NUMA (Non-Uniform Memory Access) architecture. Has been reported (for example, Patent Document 1 etc.)

Further, in recent years, the practical use of non-volatile memory (universal memory) such as NVDIMM (Nonvolatile Dual In Line Memory Module) is spreading.

Japanese Unexamined Patent Publication No. 2012-146105

However, in the NUMA architecture equipped with the non-volatile memory, the technique for optimizing the access has not been established.

Therefore, an object of the present invention is to provide an information processing apparatus, a process execution method, a program, and a recording medium that enable optimization of access to data on a non-volatile memory.

In order to achieve the above object, the information processing apparatus of the present invention is used.
Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit includes a process analysis unit, a data identification unit, and an allocation unit.
The process analysis unit analyzes the process running in the operating system unit and analyzes the process.
Based on the process, the data specifying unit identifies the data to be accessed by the process and the executable file of the data.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation unit allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the execution file. Is.

The process execution method of the present invention
Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit is a process execution method for executing each process including a process analysis process, a data identification process, and an allocation process:
The process analysis process analyzes the process running in the operating system unit and analyzes the process.
The data specifying step identifies the data to be accessed by the process and the executable file of the data based on the process.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation step allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the executable file.

According to the present invention, access to data on the non-volatile memory can be optimized.

FIG. 1 is a diagram showing a configuration of an example of the apparatus of the first embodiment. FIG. 2 is a flowchart showing an example of processing in the apparatus of the first embodiment. FIG. 3 is a diagram showing an example of processing by the allocation unit in the apparatus of the first embodiment. FIG. 4 is a diagram showing an example of processing by the allocation unit in the apparatus of the second embodiment. FIG. 5 is a diagram showing an example of processing by the swap processing unit in the apparatus of the third embodiment. FIG. 6 is a diagram showing an example of processing when new data is created in the apparatus of the fourth embodiment.

In the information processing apparatus of the present invention, for example,
The allocation unit may allocate a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The central processing unit (3) whose access time is close to that of the non-volatile memory storing either of the data or the execution file that satisfies the above conditions is "by a plurality of memory access nodes. When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when executed, the time distance required for access is close to the non-volatile memory that stores the specified data. When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the central processing unit (4) accesses the non-volatile memory storing the specified data. The central processing unit with a short time distance

In the information processing apparatus of the present invention, for example,
The allocation unit is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. It may be in the form of allocating a processor core.

The information processing apparatus of the present invention is, for example,
In addition, it includes a swap processing unit
When swap-out is required, the swap processing unit creates a swap area for each non-volatile memory of each memory access node, and the non-volatile memory having a short access time distance from each central processing unit. The mode may be such that the data in the memory in each of the central processing units is swapped out to the swap area.

The information processing apparatus of the present invention is, for example,
In addition, including the designated part,
The designated unit creates a new storage area for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. It may be in the form of designating a new storage area.

In the information processing apparatus of the present invention, for example,
In the allocation unit, when a process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the number of the processes and the non-volatile memory. Depending on the number of data and at least one of the execution files, the process may be assigned to be executed by the central processing unit in the one memory access node or the other memory access node.

In the process execution method of the present invention, for example,
The allocation step may be an embodiment in which a memory access node for executing the process is allocated based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The distance required for access is close to the non-volatile memory that stores either the data or the execution file that satisfies the above. Central processing unit (3) The specified execution file itself is "executed by a plurality of memory access nodes." When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when the data is generated, the non-volatile memory that stores the specified data and the time distance required for access are close to each other. Central processing unit (4) When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the time required for access to the non-volatile memory storing the specified data. The central processing unit that is close to the distance

In the process execution method of the present invention, for example,
The allocation step is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. It may be in the form of allocating a processor core.

The process execution method of the present invention is, for example,
In addition, it includes a swap processing process
In the swap processing step, when swap-out is required, a swap area is created for each non-volatile memory of each memory access node, and the non-volatile memory having a short access time distance from each central processing unit. The mode may be such that the data in the memory in each of the central processing units is swapped out to the swap area.

The process execution method of the present invention is, for example,
In addition, including designated steps,
In the designated step, a new storage area is created for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. It may be in the form of designating a new storage area.

In the process execution method of the present invention, for example,
In the allocation process, when a process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the number of the processes and the non-volatile memory. Depending on the number of data and at least one of the execution files, the process may be assigned to be executed by the central processing unit in the one memory access node or the other memory access node.

In at least one of the information processing apparatus of the present invention, the process execution method of the present invention, and the program of the present invention, for example,
The non-volatile memory may be an NVDIMM (Non-Volatile Dual In-Line Memory Module).

The program of the present invention is a program for causing a computer to execute each step of the method of the present invention as a procedure.

The recording medium of the present invention is a computer-readable recording medium on which the program of the present invention is recorded.

In the present invention, the "nonvolatile memory" refers to, for example, a non-volatile memory directly connected to a memory controller, and is also referred to as a universal memory. As the non-volatile memory, for example, a volatile memory (DRAM (Dynamic Random Access Memory) or the like) directly connected to a central processing unit such as a CPU is used as the memory base. Specific examples thereof include NVDIMM (Nonvolatile Dual In Line Memory Module) and the like. The NVDIMM is, for example, a form in which a DRAM (Dynamic Random Access Memory) work memory and a NAND (Not AND) storage memory are integrated.

Next, an embodiment of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments. In each of the following figures, the same parts are designated by the same reference numerals. Further, the explanations of the respective embodiments can be referred to each other unless otherwise specified, and the configurations of the respective embodiments can be combined unless otherwise specified.

[Embodiment 1]
FIG. 1A is a diagram showing a configuration of an example of the information processing apparatus 1 of the present embodiment. As shown in FIG. 1, the apparatus 1 includes an operating system unit 10 and a plurality of memory access nodes 20 (20a and 20b). The apparatus 1 may further include, for example, an input / output apparatus 30 (hereinafter referred to as an IO apparatus 30) (30a and 30b). Each part of the present apparatus 1 is connected to each other via the connection part 100 by each interface (I / F). The number of the plurality of memory access nodes 20 is not particularly limited, and may be two or more. Similarly, the number of IO devices 30 is not particularly limited, and may be one or two or more.

Further, the present device 1 can be connected to an external device described later via the communication network. The communication network is not particularly limited, and a known network can be used, and may be wired or wireless, for example. The communication line network includes, for example, an internet line, WWW (World Wide Web), a telephone line, a LAN (Local Area Network), a SAN (Storage Area Network), a DTN (Delay Tolerant Network), a point-to-point network (P2), and the like. Can be given. Examples of wireless communication include WiFi (Wireless Fidelity), Bluetooth (registered trademark) and the like. The wireless communication may be either a form in which each device communicates directly (Ad Hoc communication) or an indirect communication via an access point. The present device 1 may be, for example, a personal computer (PC, for example, a desktop type, a notebook type), a terminal (smartphone, a tablet terminal) or the like in which the program of the present invention is installed.

The connection unit 100 can also be connected to, for example, an external device. Examples of the external device include an external storage device (external database, etc.), a printer, an external input device, an external display device, and the like. The present device 1 can be connected to an external network (the communication line network) by a communication device connected to the connection unit 100, and can also be connected to another device via the external network. Specifically, the connection unit 100 is, for example, a bus, a serial link, or the like.

The IO device 30 includes an interface for exchanging data with various devices such as a network.

FIG. 1B is a diagram showing a configuration of an example of the memory access node 20 of the present embodiment. As shown in FIG. 1, the memory access node 20 includes a central processing unit 21, a memory controller 22, and a memory unit 23. The memory access node 20 is, for example, a node including a memory to be accessed. The memory access node 20 is, for example, a NUMA node constituting a NUMA architecture. Hereinafter, the memory access node 20 is also referred to as a NUMA node 20 or a node 20.

The central processing unit 21 includes a central processing unit 211. The central processing unit 211 includes a processor core 2111 and a connection controller 2112. Specifically, the central processing unit 21 may be in the form of a multiprocessor including a plurality of central processing units 211, or may be in the form of a multicore processor including a plurality of processor cores 2111 in one central processing unit 211. May be good. Further, the present apparatus 1 may be in a form of allocating each part in one central processing unit 211 to different NUMA nodes, for example. Specifically, for example, the central processing unit 211 may be divided into halves and the memory may be divided into halves, and one NUMA node may be configured for each. Examples of the central processing unit 211 include a CPU, GPU, APU, and the like. In the present apparatus 1, for example, the program of the present invention and other programs are executed by the central processing unit 21, and various information is read and written. Further, the central processing unit 211 is connected to another central processing unit via the connection controller 2112. The other central processing unit may be the central processing unit 211 in another memory access node 20 or the central processing unit 211 in the same memory access node 20. The connection controller 2112 enables connection between each central processing unit 211 using, for example, a data transmission line. The data transmission line is not particularly limited, and is, for example, a bus-type data transmission line such as a front-side bus (FSB) or a point-to-point (one-to-one) connection such as a UPI (Ultra Path Interconnect). There are interconnects and the like.

The memory controller 22 controls, for example, writing and reading data to and from the memory unit 23, which will be described later.

The memory unit 23 includes a non-volatile memory 231. The non-volatile memory 231 is the same as described above. When the central processing unit 21 is in the form of the multi-core, the non-volatile memory 231 may be, for example, a memory capable of operating corresponding to the operation of each processor core. Further, the memory unit 23 may be, for example, a memory having one or more non-volatile memory areas. The memory unit 23 is connected to the central processing unit 21 via a memory controller 22 via a high-speed network. Further, the memory unit 23 may include, for example, a volatile memory.

The operating system unit 10 (hereinafter, also referred to as an OS unit 10) includes a process analysis unit 11, a data identification unit 12, and an allocation unit 13. Further, the operating system unit 10 may include, for example, a swap processing unit 14 and a designated unit 15 as an arbitrary configuration.

The OS unit 10 operates on the memory unit 23. Further, a process as an application runs on the OS unit 10. The process is not particularly limited, and may be one or more. The OS unit 10 controls all the memory access nodes 20 in the apparatus 1.

Next, an example of the process execution method of the present embodiment will be described with reference to the flowchart of FIG. The process execution method of the present embodiment is carried out as follows, for example, by using the information processing apparatus 1 of FIG. The process execution method of the present embodiment is not limited to the use of the information processing apparatus 1 of FIG.

First, the process analysis unit 11 analyzes the process running in the OS unit 10 (S11). Next, the data specifying unit 12 identifies the data to be accessed by the process and the executable file of the data based on the process (S12). The data and the executable file are, for example, files and data stored on the non-volatile memory 231 or the volatile memory of a specific memory access node. Then, the central processing unit 21 that executes the process from the plurality of memory access nodes 20 according to the time distance required for access to the non-volatile memory 231 based on the data and the executable file by the allocation unit 13. That is, the central processing unit 211 and the processor core 2111 are allocated (S13) and terminated (END). The allocation unit 13 is also referred to as, for example, the process scheduler unit 13, and the allocation is also referred to as, for example, scheduling. Note that scheduling means, for example, operating a process, a thread, or the like on the central processing unit 211.

Specifically, this embodiment will be described with reference to FIG. FIG. 3 is a diagram showing an example of processing by the allocation unit 13. In the example shown in FIG. 3, two memory access nodes 20a and 20b are shown as the memory access nodes 20. In FIG. 3A, both the data specified by the data specifying unit 12 and the execution file thereof exist on the memory unit 23a (nonvolatile memory 231a) of the memory access node 20a. The non-volatile memory 231a is a non-volatile memory that operates in response to the operation of the processor core 2111a of the central processing unit 21a (central processing unit 211a), and the non-volatile memory 231b is the central processing unit 21b (central processing unit 21b). It is a non-volatile memory that operates corresponding to the operation of the processor core 2111b of 211b) (hereinafter, the same applies). Then, the allocation unit 13 determines which process should be executed by the central processing unit 21 of which memory access node 20. In the example shown in FIG. 3A, the allocation unit 13 accesses the non-volatile memory 231a of the memory access node 20a storing both the data and the executable file thereof to the analyzed process, and the time distance required for access. Allocates the nearest central processing unit 21a (central processing unit 211a and processor core 2111a). Here, the time distance required for access to the non-volatile memory 231 is, for example, a physical distance, a path length of a data transmission line used for access, a bandwidth (parallelism), and a D / A (Digital / Analog) conversion. It is a distance based on an access time (access speed) calculated based on factors such as efficiency (frequency, etc.) and SW protocol efficiency. Specifically, in the example of FIG. 3A, for example, between the non-volatile memory 231a and the central processing unit 21a of the memory access node 20a, and between the non-volatile memory 231b and the central processing unit 21b of the memory access node 20b. , The time distance required for access between the non-volatile memory 231 in the same memory access node 20 and the central processing unit 21 is the shortest. The next closest access time is between the non-volatile memory 231a of the memory access node 20a and the central processing unit 21b of the memory access node 20b, and the center of the non-volatile memory 231b of the memory access node 20b and the memory access node 20a. Time required for access between the non-volatile memory 231 in one memory access node 20 and the central processing unit 21 in the other memory access node 20 which are directly connected via each connection controller 2112, such as between the processing units 21a. The distance. In this example, an example is shown in which there are two memory access nodes 20 and each has one central processing unit 211 (central processing unit 21), but the present invention is not limited to this. The number of memory access nodes 20 and the number of central processing units 211 may be one or more and two or more. That is, the perspective of the time distance required for access is determined by the number of connection controllers 2112, in other words, the number of passages via the other central processing unit 211 and the other memory access node 20.

Further, although not shown, when the process does not use the data and uses only the execution file existing in the memory unit 23 in the memory access node 20, the same as the example shown in FIG. 3A. The allocation unit 13 has the closest central processing unit 21 (central processing unit 211 and processor core 2111) to the non-volatile memory 231 of the node 20 storing the execution file and the time distance required for access to the analyzed process. ) May be assigned. The fact that the process does not use the data means that, for example, the data specifying unit 12 does not specify the data and only the executable file is specified.

In FIG. 3B, the data specified by the data specifying unit 12 exists on the memory unit 23b (nonvolatile memory 231b), and the execution file of the data exists on the memory unit 23a (nonvolatile memory 231a). .. That is, the storage locations of the data and its executable file are different. In this case, the allocation unit 13 is close to the non-volatile memory 231 storing either the data satisfying the preset profile condition and the execution file with respect to the analyzed process. Allocate the central processing unit 21. The profile conditions are not particularly limited and can be set arbitrarily. Specifically, for example, there are conditions regarding the size of the data size (large or small data size, etc.). In the example shown in FIG. 3B, the data on the non-volatile memory 231b has a larger data size than the executable file on the non-volatile memory 231a, and the preset profile condition is "large data size". do. Then, the allocation unit 13 has the central processing unit 21b (central processing unit 211b and processor core) whose access time is closest to the non-volatile memory 231b storing the data having a large data size with respect to the analyzed process. 2111b) is assigned.

In FIG. 3C, the data specified by the data specifying unit 12 exists on both the non-volatile memory 231a and 231b, and the execution file of the data exists on the non-volatile memory 231a. Specifically, the example shown in FIG. 3C is an example in the form of a database corresponding to a hypervisor, a multiprocessor, a multicore processor, etc., an application such as Enterprise Resource Planning, and the like. That is, the specified executable file itself "is a function that optimally operates according to at least one of the central processing unit 21 and the memory unit 23 that operates when executed by a plurality of memory access nodes 20 (also referred to as a NUMA optimization function). I say) ”. As described above, when there is a NUMA optimization mechanism, the allocation unit 13 is optimized regardless of which memory access node 20 executes the executable file. Therefore, the analyzed process is performed without considering the position of the executable file. On the other hand, a central processing unit 21b (central processing unit 211b and processor core 2111b) may be assigned, which has a short access time to the non-volatile memory 231b in which the data is stored.

Further, although not shown, the specified execution file may exist in a storage other than the non-volatile memory 231 (for example, HDD, cloud storage (storage on the network), etc.), and the data may exist in the non-volatile memory 231. Similar to the example shown in FIG. 3B, the allocation unit 13 has a central processing unit 21 (center) whose access time is close to that of the non-volatile memory 231 in which the data is stored for the analyzed process. Processing device 211 and processor core 2111) may be assigned. More specifically, for example, the executable file may be started from the HDD or the like instead of the NVDIMM, and the data file may be read from the NVDIMM.

It is known that the access speed of the data on the memory from the central processing unit differs depending on whether or not the data is data in the same memory access node. That is, the access from the central processing unit that executes the process to the non-volatile memory in the same memory access node as the central processing unit can be processed at high speed. However, access to the non-volatile memory in another memory access node from the central processing unit that executes the process is processed at a slower speed than the access speed in the same memory access node. Specifically, assuming that the time required for one access to a hard disk (HDD) having a slow access speed is 100 and the time required for straddling another memory access node is 0.04, the time required for straddling another memory access node is 0.04. The access difference to the access node is only 0.04%. However, in the case of a high-speed universal memory such as NVDIMM, the time required for one access is extremely short as compared with the HDD (for example, the time required for one access to a hard disk (HDD) having a slow access speed). If it is 100, it is 0.01), so the influence of 0.04, which is the time required to straddle the other memory access nodes, is large, and the access difference from the own memory access node to the other memory access node is large. There is a problem that it is extremely expensive as compared with the HDD. However, according to the present embodiment, access to the data on the non-volatile memory can be optimized by allocating the processor core before executing the process. Therefore, according to the present embodiment, for example, even when accessing the non-volatile memory connected to the other central processing unit from one central processing unit, high-speed access is possible.

In the technique of Patent Document 1, a process is executed on an arbitrary processor core, and then a memory close to the CPU is allocated. However, the present invention allocates the processor core (ie, the central processing unit) that executes the process based on the data and the executable prior to the execution of the process. Thereby, the present invention can operate the process at a higher speed than the technique of Patent Document 1. Further, the present invention can reduce the number (cost) of systems required for operating the process at a high speed as compared with the technique of Patent Document 1.

[Embodiment 2]
An example of processing when the processor core (central processing unit) that executes a process is changed will be described. Unless otherwise specified, the information processing apparatus 1 and the process execution method of the present embodiment can incorporate the description of the first embodiment.

In the present embodiment, for example, when the process changes the processor core 2111 of the central processing unit 21 after the step (S13) shown in FIG. 2, the allocation unit 13 takes time to access the non-volatile memory 231. Depending on the distance, another processor core 2111 different from the processor core 2111 that was executing the process is assigned. The other processor core 2111 may be, for example, another processor core 2111 in the same memory access node 20 or a processor core 2111 in another memory access node 20. That is, the allocation unit 13 allocates, for example, another processor core 2111 having a short time distance for the access next to the processor core 2111 that was executing the process. In this way, the allocation unit 13 can be said to reschedul the execution of the process, for example. Note that rescheduling means, for example, re-running a process, thread, or the like on a central processing unit.

Specifically, this embodiment will be described with reference to FIG. FIG. 4 is a diagram showing an example of processing by the allocation unit 13. In the example shown in FIG. 4, two memory access nodes 20a and 20b are shown as the memory access nodes 20, and two processor cores 2111a1 and 2111a2 are shown in the central processing unit 21a in the memory access node 20a. In FIG. 4A, the data specified by the data specifying unit 12 exists on the non-volatile memory 231a. Then, when the processor core 2111a1 that executes the process is changed, the allocation unit 13 does not change the memory access node 20a of the allocated processor core 2111a1 and allocates another processor core 2111a2 in the memory access node 20a. Then, by the allocation, the execution of the process is continued in the same memory access node 20a before and after the change.

On the other hand, for example, as shown in FIG. 4B, both the specified execution file and the data are present on the non-volatile memory 231b in the memory access node 20b, and the process is in the memory access node 20a. When executed by the central processing unit 21a, the allocation unit 13 newly performs memory access in place of the central processing unit 21a that executes the process, for example, according to the time distance required for access to the non-volatile memory 231b. The central processing unit 21b in the node 20b is assigned as the central processing unit 21 that executes the process.

As described above, in the present embodiment, even when the processor core 2111 (central processing unit 211) for executing the process is changed, the data is determined according to the time distance required for access to the non-volatile memory 231. And rescheduling considering the position of the executable file. Therefore, according to the present embodiment, it is possible to optimize the access to the data on the non-volatile memory as in the first embodiment. When changing the processor core 2111 (central processing unit 211) that executes a process, for example, the processor core 2111 and the processor core 2111 are sequentially used in an environment where scheduling is executed in a plurality of processes. In some cases, the execution of the process is controlled as described above.

In a related technique, when caching is performed, it is necessary to move the data to be accessed closer to a central processing unit such as a CPU. Further, in the execution of the cache, intermediate processing such as writing back to the original data when the data is written or validating other cached information occurs. However, according to the present embodiment, since the data can be used directly, it is not necessary to perform the above-mentioned processing, and the function equivalent to the cache can be efficiently performed.

[Embodiment 3]
An example of processing in the case of swapping out will be described. Unless otherwise specified, the information processing apparatus 1 and the process execution method of the present embodiment can incorporate the description of the first and second embodiments.

In the present embodiment, the apparatus 1 further includes a swap processing unit 14. FIG. 5 shows an example of processing by the swap processing unit 14. As shown in FIG. 5, the swap processing unit 14 creates a swap area, which is a memory area for swap-out, for each non-volatile memory 231 (231a and 231b) of each memory access node 20 (20a and 20b). Further, the data in the memory in each central processing unit 21 (21a and 21b) is swapped out to the swap area of the non-volatile memory 231 whose access time is close to that of each central processing unit 21 (21a and 21b). "Creating a swap area for each non-volatile memory 231" can be said to mean creating a swap area on the non-volatile memory 231 for each processor core 2111 corresponding to the non-volatile memory 231. For example, the swap processing unit 14 may execute the swap-out with respect to the swap area of the non-volatile memory 231 having the closest access time distance to each central processing unit 21, and the time distance required for the next access. The swap-out may be executed for the swap area of the non-volatile memory 231 close to the above. The memory in each processor core 2111 is, for example, volatile memory.

Here, the swap-out means, for example, that the same area as the memory area reserved in the memory of the processor core 2111 is secured in the non-volatile memory 231 and the same data as the data written in the memory area is stored in the non-volatile memory. It means writing to the swap area (memory area) secured in 231 and releasing the memory area of the memory. The "case where swap-out is required" is, for example, a case where the function of virtual memory is realized. Specifically, for example, in a server equipped with a disk having an area larger than the memory capacity, data in an unused memory area is temporarily saved in the disk, and the memory capacity larger than the actual capacity is executed. And so on.

As described above, in this embodiment, swap-out is executed in units of 20 memory access nodes. According to the present embodiment, the access to the data on the non-volatile memory can be optimized as in the first and second embodiments.

[Embodiment 4]
An example of processing when creating new data will be described. Unless otherwise specified, the information processing apparatus 1 and the process execution method of the present embodiment can incorporate the description of the first to third embodiments.

In the present embodiment, the new data is not particularly limited, and may be, for example, newly created data or overwritten data. Specifically, for example, data in which a file path indicating a location for storing data has not been determined, data in which a file path has already been determined and is not stored in the same memory access node, and data in which a file path has already been determined. There is data shared with other processes, etc. FIG. 6 shows an example of processing when creating new data. FIG. 6A shows an example of processing in the case of data for which the file path has not been determined, and FIG. 6B shows an example of processing in the case of data for which the file path has already been determined.

First, as the new data, an example of processing in the case of data such as an intermediate file, a temporary file, and a cache file whose file path is not determined will be described. In this case, the apparatus 1 may further include, for example, a designated unit 15. As shown in FIG. 6A, the designation unit 15 creates a new storage area for each non-volatile memory 231 (231a and 231b), and executes the process as a memory for the newly created data. The new storage area of the non-volatile memory 231 whose access time is close to that of the processing unit 21 is designated. More specifically, for example, as shown in FIG. 6A, the process or the OS unit 10 whose new storage area is designated by the designated unit 15 accesses the central processing unit 21a executing the process. New data (temporary file, etc.) is created in the volatile memory 231a having the closest time distance.

Until now, temporary files have been saved in the location specified by the temp variable. In addition, the disk cache and intermediate files were saved in temporary folders and specific SSDs. However, according to the present embodiment, when new data is created, a storage location is created for each non-volatile memory 231 and the data is stored in a storage area close to the processor core 2111 that executes the process. Therefore, as in the first to third embodiments, the access to the data on the non-volatile memory can be optimized.

Next, as the new data, an example of processing in the case of data for which a file path has already been determined will be described. Specifically, this example is an example of processing in the case of data whose file path has already been determined and is not stored in the same memory access node, and data whose file path has already been determined and is shared with other processes. Is. As shown in FIG. 6B, when the process (application) A executed on the memory access node 20a accesses the non-volatile memory 231b in the memory access node 20b and creates new data in the allocation unit 13. The process A is rescheduled to be executed by the central processing unit 21b in the memory access node 20b according to the number of the processes and the number of at least one of the data and the execution file on the non-volatile memory 231b. The process B is a process (application) executed on the memory access node 20b. In this way, the allocation unit 13, for example, reschedules each process so that it gathers in one memory access node 20 as much as possible. The allocation unit 13 may further perform the reschedule based on, for example, the profile of at least one of the data and the executable file corresponding to the data. The profile is not particularly limited, and for example, the profile of the executable file includes a data size, a working set size, an image segment size, a data segment size, and the like, and the data profile includes a data size and the like. There is. In this example, the number of processes is 2, and the number of data on the non-volatile memory 231 is 1, but the number is not limited to this. For example, when the M processes share at least one of the N data and the execution file, the allocation unit 13 has the N data and the execution file accessed by one of the M processes. Identify on which non-volatile memory 231 at least one is stored, and reschedule the process to be executed by the central processing unit 21 in the memory access node 20 having the largest number of identified non-volatile memories 231. do. Processes other than the above one process are processed in the same manner. In this way, reschedule is performed according to the number of accesses of the process to at least one of the data and the executable file.

As described above, in the present embodiment, when the process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the central process for executing the process is executed. Access to the data on the non-volatile memory can be optimized by changing the unit 21 to the central processing unit 21 whose access time is close to that of the non-volatile memory 231.

[Embodiment 5]
The program of the present embodiment is a program for causing a computer to execute each step of the method of the present invention as a procedure. In the present invention, "procedure" may be read as "processing". Further, the program of the present embodiment may be recorded on a computer-readable recording medium, for example. The recording medium is not particularly limited, and examples thereof include a read-only memory (ROM), a hard disk (HD), and an optical disk.

Although the present invention has been described above with reference to the embodiments, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the structure and details of the present invention within the scope of the present invention.

<Additional Notes>
Some or all of the above embodiments may be described as, but not limited to, the following appendixes.
(Appendix 1)
Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit includes a process analysis unit, a data identification unit, and an allocation unit.
The process analysis unit analyzes the process running in the operating system unit and analyzes the process.
Based on the process, the data specifying unit identifies the data to be accessed by the process and the executable file of the data.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
Based on the data and the executable file, the allocation unit allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory. Processing equipment.
(Appendix 2)
The information processing apparatus according to Appendix 1, wherein the allocation unit allocates a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The central processing unit (3) whose access time is close to that of the non-volatile memory storing either of the data or the execution file that satisfies the above conditions is "by a plurality of memory access nodes. When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when executed, the time distance required for access is close to the non-volatile memory that stores the specified data. When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the central processing unit (4) accesses the non-volatile memory storing the specified data. The central processing unit with a short time distance (Appendix 3)
The allocation unit is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. The information processing device according to Appendix 1 or 2, to which a processor core is assigned.
(Appendix 4)
In addition, it includes a swap processing unit
When swap-out is required, the swap processing unit creates a swap area for each non-volatile memory of each memory access node, and the non-volatile memory having a short access time distance from each central processing unit. The information processing apparatus according to any one of Supplementary note 1 to 3, wherein the data in the memory in each central processing unit is swapped out to the swap area.
(Appendix 5)
In addition, including the designated part,
The designated unit creates a new storage area for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. The information processing apparatus according to any one of Supplementary note 1 to 4, which specifies a new storage area.
(Appendix 6)
In the allocation unit, when a process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the number of the processes and the non-volatile memory. Described in any of Appendix 1-5, which allocates the process to be executed by the central processing unit in the one memory access node or the other memory access node, depending on the number of data and at least one of the executable files. Information processing equipment.
(Appendix 7)
The information processing apparatus according to any one of Supplementary note 1 to 6, wherein the non-volatile memory is NVDIMM (Non-Volile Dual In-Line Memory Module).
(Appendix 8)
Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit is a process execution method for executing each process including a process analysis process, a data identification process, and an allocation process:
The process analysis process analyzes the process running in the operating system unit and analyzes the process.
The data specifying step identifies the data to be accessed by the process and the executable file of the data based on the process.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation step allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the executable file.
(Appendix 9)
The process execution method according to Appendix 8, wherein the allocation process allocates a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The distance required for access is close to the non-volatile memory that stores either the data or the execution file that satisfies the above. Central processing unit (3) The specified execution file itself is "executed by a plurality of memory access nodes." When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when the data is generated, the non-volatile memory that stores the specified data and the time distance required for access are close to each other. Central processing unit (4) When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the time required for access to the non-volatile memory storing the specified data. Central processing unit with a short distance (Appendix 10)
The allocation step is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. The process execution method according to Appendix 8 or 9, wherein a processor core is assigned.
(Appendix 11)
In addition, it includes a swap processing process
In the swap processing step, when swap-out is required, a swap area is created for each non-volatile memory of each memory access node, and the non-volatile memory having a short access time distance from each central processing unit. The process execution method according to any one of Supplementary note 8 to 10, wherein the data in the memory in each central processing unit is swapped out to the swap area.
(Appendix 12)
In addition, including designated steps,
In the designated step, a new storage area is created for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. The process execution method according to any one of Supplementary note 8 to 11, which specifies a new storage area.
(Appendix 13)
In the allocation process, when a process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the number of the processes and the non-volatile memory. Described in any of Appendix 8-12, which allocates the process to be executed by the central processing unit in the one memory access node or the other memory access node, depending on the number of data and at least one of the executable files. Process execution method.
(Appendix 14)
The process execution method according to any one of Supplementary note 8 to 13, wherein the non-volatile memory is NVDIMM (Non-Volile Dual In-Line Memory Module).
(Appendix 15)
Includes operating system section and multiple memory access nodes
Each NUMA node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
A program for causing the operating system unit to execute a procedure including a process analysis procedure, a data identification procedure, and an allocation procedure:
The process analysis procedure analyzes the process running in the operating system unit and analyzes the process.
The data identification procedure identifies the data to be accessed by the process and the executable file of the data based on the process.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation procedure allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the executable file.
(Appendix 16)
The program according to Appendix 15, wherein the allocation procedure allocates a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The central processing unit (3) whose access time is close to that of the non-volatile memory storing either of the data or the execution file that satisfies the above conditions is "by a plurality of memory access nodes. When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when executed, the time distance required for access is close to the non-volatile memory that stores the specified data. When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the central processing unit (4) accesses the non-volatile memory storing the specified data. Central processing unit with short time distance (Appendix 17)
The allocation procedure is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. The program according to Appendix 15 or 16, which allocates processor cores.
(Appendix 18)
In addition, including swap processing procedures,
In the swap processing procedure, when swap-out is required, a swap area is created for each non-volatile memory of each memory access node, and the time distance required for access is close to each central processing unit of the non-volatile memory. The program according to any one of Supplementary note 15 to 17, wherein the data in the memory in each central processing unit is swapped out to the swap area.
(Appendix 19)
In addition, including the designated procedure,
In the designation procedure, a new storage area is created for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. The program according to any of appendices 15 to 18, which specifies a new storage area.
(Appendix 20)
The allocation procedure is the number of processes and on the non-volatile memory when a process running on one memory access node accesses the non-volatile memory in the other memory access node to create new data. Any of Appendix 15-19, which reschedules the process to be run by the central processing unit in the one memory access node or the other memory access node, depending on the number of data and at least one of the executable files. The program described in.
(Appendix 21)
The program according to any one of Supplementary note 15 to 20, wherein the non-volatile memory is NVDIMM (Non-Volatile Dual In-Line Memory Module).
(Appendix 22)
A computer-readable recording medium recording the program according to any one of Supplementary Notes 15 to 21.

According to the present invention, access to data on the non-volatile memory can be optimized. Therefore, the present invention is useful in NUMA architectures equipped with non-volatile memory.

1 Information processing device 10 Operating system unit 11 Process analysis unit 12 Data identification unit 13 Allocation unit 14 Swap processing unit 15 Designation unit 20 Memory access node 21 Central processing unit 211 Central processing unit 2111 Processor core 2112 Connection controller 22 Remote controller 23 Memory unit 231 Non-volatile memory 30 IO device 100 connection

Claims (10)

Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit includes a process analysis unit, a data identification unit, and an allocation unit.
The process analysis unit analyzes the process running in the operating system unit and analyzes the process.
Based on the process, the data specifying unit identifies the data to be accessed by the process and the executable file of the data.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
Based on the data and the executable file, the allocation unit allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory. Processing equipment. The information processing apparatus according to claim 1, wherein the allocation unit allocates a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The central processing unit (3) whose access time is close to that of the non-volatile memory storing either of the data or the execution file that satisfies the above conditions is "by a plurality of memory access nodes. When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when executed, the time distance required for access is close to the non-volatile memory that stores the specified data. When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the central processing unit (4) accesses the non-volatile memory storing the specified data. The central processing unit with a short time distance The allocation unit is different from the processor core that was executing the process, depending on the time distance required for access to the non-volatile memory when the process changes the processor core of the central processing unit. The information processing apparatus according to claim 1 or 2, to which a processor core is assigned. In addition, it includes a swap processing unit
When swap-out is required, the swap processing unit creates a swap area for each non-volatile memory of each memory access node, and the non-volatile memory having a short access time distance from each central processing unit. The information processing apparatus according to any one of claims 1 to 3, wherein the data in the memory in each central processing unit is swapped out to the swap area. In addition, including the designated part,
The designated unit creates a new storage area for each of the non-volatile memories, and as a memory for the newly created data, the non-volatile memory has a time distance close to that of the central processing unit that executes the process. The information processing apparatus according to any one of claims 1 to 4, which specifies a new storage area. In the allocation unit, when a process executed on one memory access node accesses the non-volatile memory in the other memory access node and creates new data, the number of the processes and the non-volatile memory. One of claims 1-5, which allocates the process to be executed by the central processing unit in the one memory access node or the other memory access node, depending on the number of data and at least one of the executable files. The information processing device described in the section. The information processing apparatus according to any one of claims 1 to 6, wherein the non-volatile memory is an NVDIMM (Non-Voltile Dual In-Line Memory Module). Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
The operating system unit is a process execution method for executing each process including a process analysis process, a data identification process, and an allocation process:
The process analysis process analyzes the process running in the operating system unit and analyzes the process.
The data specifying step identifies the data to be accessed by the process and the executable file of the data based on the process.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation step allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the executable file. The process execution method according to claim 8, wherein the allocation step allocates a memory access node for executing the process based on at least one of the following (1) to (4).
(1) At least when the specified data and the execution file exist in the same memory access node, and when the process uses only the execution file existing in the memory access node without using the data. On the other hand, when the specified data and the execution file exist in different memory access nodes, the profile condition set in advance is the central processing unit (2) whose access time is close to that of the non-volatile memory in the memory access node. The distance required for access is close to the non-volatile memory that stores either the data or the execution file that satisfies the above. Central processing unit (3) The specified execution file itself is "executed by a plurality of memory access nodes." When it has a function that operates according to at least one of the central processing unit and the memory unit that operates when the data is generated, the non-volatile memory that stores the specified data and the time distance required for access are close to each other. Central processing unit (4) When the specified execution file exists in a storage other than the non-volatile memory and the data exists in the non-volatile memory, the time required for access to the non-volatile memory storing the specified data. The central processing unit that is close to the distance Includes operating system section and multiple memory access nodes
Each memory access node includes a central processing unit, a memory controller, and a memory unit.
The central processing unit includes a central processing unit.
The central processing unit includes a processor core and a connection controller.
The central processing unit is connected to another central processing unit via the connection controller.
The memory unit includes a non-volatile memory.
The memory unit is connected to the central processing unit via the memory controller, and is connected to the central processing unit.
A program for causing the operating system unit to execute a procedure including a process analysis procedure, a data identification procedure, and an allocation procedure:
The process analysis procedure analyzes the process running in the operating system unit and analyzes the process.
The data identification procedure identifies the data to be accessed by the process and the executable file of the data based on the process.
At least one of the data and the executable file is data stored in the non-volatile memory of a specific memory access node.
The allocation procedure allocates the central processing unit that executes the process from the plurality of memory access nodes according to the time distance required for access to the non-volatile memory based on the data and the executable file.

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