JP2021078103A - Active balun circuit, power amplifier circuit, and power amplifier module - Google Patents

Abstract

To suppress the increase in area of a semiconductor chip.SOLUTION: An active balun circuit 10 includes transistors Q1 and Q2 whose emitters are electrically connected to each other and which output differential signals, and a circuit element 30 connected between a reference potential and a connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2. In the circuit element 30, the impedance at a particular frequency of an input signal seems sufficiently higher than the impedance at another frequency. To a base of the transistor Q1, the input signal of an input terminal Pin is applied. To a base of the transistor Q2, the reference potential is applied. To a collector of the transistor Q1 and a collector of the transistor Q2, power source voltage Vcc is applied. The signal of the collector of the transistor Q1 and the signal of the collector of the transistor Q2 are output as the differential signals.SELECTED DRAWING: Figure 2

Description

The present invention relates to an active balun circuit, a power amplifier circuit and a power amplification module.

Conventionally, a balun by a differential transformer circuit may be provided at the input stage or the output stage of the amplifier of the power amplifier circuit. FIG. 18A of Non-Patent Document 1 discloses a configuration in which a balun is provided in the output stage of the amplifier.

Kyu Hwan An, 11 outsiders, "Power-Combining Transformer Techniques for Fully-Integrated CMOS Power Amplifiers", (USA), IEEE JOURNAL OF SOLID-STATE CIRCUITS, Institute of Electrical and Electronics Engineers, May 2008, Volume 43 , No. 5, p. 1064-1075

Here, consider a case where a semiconductor chip is provided with a balun using a transformer circuit composed of a passive element together with a power amplifier circuit. In that case, if the inductor required for the balun is formed on the semiconductor chip, the area of the semiconductor chip becomes large.

The present invention has been made in view of the above, and an object of the present invention is to realize an active balun circuit, a power amplifier circuit, and a power amplifier module capable of suppressing an increase in the area of a semiconductor chip.

The active balun circuit of one aspect of the present invention includes a first transistor and a second transistor, and a circuit element in which the impedance of the input signal at a specific frequency seems to be sufficiently larger than the impedance at another frequency, and corresponds to the input signal. This is an active balun circuit that outputs a pair of differential signals to be output from the first transistor and the second transistor.

The active balun circuit on the other side of the present invention includes a first terminal connected to a reference potential via a circuit element, a second terminal connected to an input terminal, and a third terminal connected to a power supply voltage terminal. A first transistor provided with, a first terminal connected to a reference potential via the circuit element, a second terminal connected to the reference potential, and a third terminal connected to the power supply voltage terminal. The first terminal of the first transistor is a source or drain, the second terminal of the first transistor is a gate, and the third terminal of the first transistor is a drain or source. The first terminal of the second transistor is a source or drain, the second terminal of the second transistor is a gate, the third terminal of the second transistor is a drain or source, and the first transistor. This is an active balun circuit that outputs a pair of differential signals from the third terminal of the second transistor and the third terminal of the second transistor.

According to the present invention, it is possible to provide an active balun circuit capable of suppressing an increase in the area of a semiconductor chip, a power amplifier circuit provided with the active balun circuit, and a power amplification module.

FIG. 1 is a diagram showing a power amplifier circuit including a balun. FIG. 2 is a diagram showing an example of a power amplifier circuit including an active balun circuit. FIG. 3 is a Smith chart showing an example of impedance when the circuit element in FIG. 2 is a resistor. FIG. 4 is a diagram showing a reference example of an active balun circuit. FIG. 5 is a diagram showing the characteristics of a power amplifier circuit using the active balun circuit of the reference example shown in FIG. FIG. 6 is a diagram showing the characteristics of a power amplifier circuit using the active balun circuit of the reference example shown in FIG. FIG. 7 is a diagram showing the characteristics of a power amplifier circuit using the active balun circuit of the reference example shown in FIG. FIG. 8 is a diagram showing the characteristics of a power amplifier circuit using the active balun circuit of the reference example shown in FIG. FIG. 9 is a diagram showing an example of another active balun circuit. FIG. 10 is a Smith chart showing an example of impedance when the circuit element in FIG. 9 is an inductor. FIG. 11 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 12 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 13 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 14 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 15 is a diagram showing an example of another active balun circuit. FIG. 16 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 17 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 18 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 19 is a diagram showing the characteristics of the power amplifier circuit using the active balun circuit shown in FIG. FIG. 20 is a diagram showing a modified example of the power amplifier circuit shown in FIG. FIG. 21 is a diagram showing an example of a power amplification module including a semiconductor chip having the active balun circuit of the present disclosure. FIG. 22 is a diagram showing an example of another power amplification module including a semiconductor chip having the active balun circuit of the present disclosure. FIG. 23 is a diagram showing an example of an equivalent circuit of an active balun circuit using a distributed constant circuit.

Hereinafter, embodiments of the active balun circuit of the present disclosure will be described in detail with reference to the drawings. The present invention is not limited to this embodiment. In addition, the components of each embodiment include those that can be easily replaced by those skilled in the art, or those that are substantially the same. Each embodiment is exemplary and the configurations shown in different embodiments can be partially replaced or combined. In the second and subsequent embodiments, the description of matters common to those of the first embodiment will be omitted, and only the differences will be described. In particular, the same action and effect due to the same configuration will not be mentioned sequentially for each embodiment.

Hereinafter, the active balun circuit of the present disclosure will be described. The active balun circuit of the present disclosure does not use the wiring inductor of the winding, unlike the balun by the differential transformer circuit. In order to facilitate understanding of each embodiment, a power amplifier circuit including a balun by a differential transformer circuit will be described first as a comparative example.

(Comparison example)
[Circuit configuration]
FIG. 1 is a diagram showing a power amplifier circuit including a balun. The power amplifier circuit shown in FIG. 1 includes a balun B by a transformer circuit using a winding wiring inductor. The balun B is provided between the input-side nodes N1 and N2 of the pair of amplifiers 11 and 12 in the final stage and the amplifier 13 in the preceding stage. A transformer T and a filter by an inductor L and a capacitor C are provided on the output side of the pair of amplifiers 11 and 12. The midpoint of the primary winding of the transformer T is connected to the power supply voltage Vcc. Capacitors CP1 and CP2, which are electrically connected between the midpoint of the primary winding of the transformer T and the reference potential, respectively, function as bypass capacitors. The reference potential is exemplified by the ground potential, but the present disclosure is not limited to this.

[motion]
A signal input to the input terminal Pin, for example, an RF (Radio Frequency) signal is amplified by the amplifier 13 and input to the balun B. The balun B provides differential outputs to nodes N1 and N2. The differential outputs of the nodes N1 and N2 are amplified by the amplifiers 11 and 12. The outputs of the amplifiers 11 and 12 are output to the output terminal Pout via the transformer T and the filter by the inductor L and the capacitor C. In this comparative example, since the balun B is provided between the stages, the final stage by the amplifiers 11 and 12 and the front stage by the amplifier 13 can be separated, and a differential output can be obtained.

When the power amplifier circuit of the comparative example described with reference to FIG. 1 is realized as a semiconductor chip, the area of the semiconductor chip becomes large due to the balun B. Therefore, in the power amplifier circuit of the comparative example, it is difficult to reduce the area of the entire semiconductor chip.

(First Embodiment)
[Circuit configuration]
FIG. 2 is a diagram showing an example of a power amplifier circuit including an active balun circuit. As shown in FIG. 2, an active balun circuit 10 is provided between the input terminal Pin and the nodes N1 and N2 on the input side of the pair of amplifiers 11 and 12.

The active balun circuit 10 includes a transistor Q1 which is a first transistor, a transistor Q2 which is a second transistor, and a circuit element 30. The transistors Q1 and Q2 have an emitter as a first terminal, a base as a second terminal, and a collector as a third terminal. The active balun circuit 10 is not a balun including a winding inductor, but a balun realized by transistors Q1 and Q2 and a circuit element 30.

An input terminal Pin is connected to the base of the transistor Q1. The base of transistor Q2 is connected to the reference potential. The reference potential is exemplified by the ground potential, but the present disclosure is not limited to this. The emitter of the transistor Q1 and the emitter of the transistor Q2 are connected, and their connection points are connected to one end of the circuit element 30. The other end of the circuit element 30 is connected to a reference potential. The collector of the transistor Q1 and the collector of the transistor Q2 are connected to the power supply voltage Vcc.

The signal Pi of the collector of the transistor Q1 and the signal Ph of the collector of the transistor Q2 form a pair of differential signals. The signal Pi of the collector of the transistor Q1 is input to the amplifier 11 through the filter by the inductor L1 and the capacitor C1. The wiring 41 and the capacitor C41 function as a matching circuit. The signal Ph of the collector of the transistor Q2 is input to the amplifier 12 through the filter by the inductor L2 and the capacitor C2. The wiring 42 and the capacitor C42 function as a matching circuit.

Examples of transistors Q1 and Q2 are NPN-type transistors, but the present disclosure is not limited thereto. The transistors Q1 and Q2 may be PNP type transistors.

Further, in the present disclosure, each transistor is a bipolar transistor, but the present disclosure is not limited to this. Bipolar transistors are exemplified by Heterojunction Bipolar Transistors (HBTs), but the present disclosure is not limited thereto. Each transistor may be, for example, a field effect transistor (FET). In that case, replace the collector with the drain, replace the base with the gate, and replace the emitter with the source. Therefore, it can be said that the first terminal is an emitter or a source, the second terminal is a base or a gate, and the third terminal is a collector or a drain.

Each transistor may be a multi-finger transistor in which a plurality of unit transistors (also referred to as fingers) are electrically connected in parallel. The unit transistor refers to the minimum configuration in which a transistor is composed.

The circuit element 30 includes, for example, at least one of a particular length of wiring, inductor, capacitor, and resistor. The circuit element 30 can also be said to be an impedance element. The circuit element 30 preferably has a high impedance at the fundamental frequency of the input signal. It is preferable that the circuit element 30 has a large impedance at the fundamental frequency. That is, it is preferable that the impedance of the circuit element 30 at a specific frequency of the input signal looks sufficiently larger than the impedance at other frequencies. However, the impedance of the circuit element 30 looks large only when the power amplifier circuit does not oscillate.

FIG. 3 is a Smith chart showing an example of impedance when the circuit element 30 is a resistor. When the frequency is changed from 1.930 GHz to 1.950 GHz, the impedance value normalized by the characteristic impedance of 50 Ω (circle in FIG. 3) changes as shown by the arrow Y1 in FIG. At the point m1 where the frequency is 1.950 GHz, the impedance is 540 Ω, which is about 10 times the value of 50 Ω. Therefore, it can be said that the impedance looks sufficiently large.

Here, the case where the circuit element 30 is wiring will be described. FIG. 4 is a diagram showing an active balun circuit 10a as a reference example. The active balun circuit 10a shown in FIG. 4 includes the wiring 30h as a circuit element 30. Therefore, the connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2 is electrically connected to the reference potential via the wiring 30h. The active balun circuit 10a shown in FIG. 4 does not include a transformer circuit using a winding wiring inductor. Therefore, by adopting the active balun circuit 10a in the power amplifier circuit, the area of the semiconductor chip can be reduced.

[motion]
5 to 8 are diagrams showing the characteristics of the power amplifier circuit using the active balun circuit 10a of the reference example shown in FIG. FIG. 5 is a diagram showing the characteristics obtained at the nodes N1 and N2 in FIG. 2 when the active balun circuit 10a of the reference example shown in FIG. 4 is used for the power amplifier circuit of FIG.

FIG. 5 shows the relationship between the level of the signal Pi at the node N1 and the level of the signal Ph at the node N2 with respect to the level of the input signal of the input terminal Pin. The relationship between the level and the level of the signal Ph at the node N2 is shown. In FIG. 5, when the level of the input signal of the input terminal Pin changes, the level of the signal Pi and the level of the signal Ph change in the same manner. As shown in FIG. 5, there is a difference between the level of the signal Pi and the level of the signal Ph, and the signal Pi and the signal Ph are differential signals having unbalanced amplitudes. The imbalance in the present disclosure is defined as the phase difference is not constant regardless of the level of the input signal, or the amplitude is not output in proportion to the level of the input signal. On the other hand, balance is defined as the phase difference being constant regardless of the level of the input signal, and the amplitude being output in proportion to the level of the input signal.

FIG. 6 shows the relationship between the level of the input signal of the input terminal Pin and the phase change between the signal Pi and the signal Ph. FIG. 7 shows the relationship between the level of the input signal of the input terminal Pin and the phase difference between the signal Pi and the signal Ph. The phase difference between the signal Pi and the signal Ph, which are differential signals, is preferably 180 °. As can be understood from FIGS. 6 and 7, the phase difference between the signal Pi and the signal Ph is about 130 °, and the phase difference between the signal Pi and the signal Ph is deviated from 180 °.

FIG. 8 shows the relationship between the signal level of the output terminal Pout and the gain of the power amplifier circuit. The signal Pi and the signal Ph have a phase shift from 180 ° with respect to the differential transformer circuit that performs phase synthesis from the phase difference of 180 ° on the output matching side to the same phase, and the output is an unbalanced differential signal. It has become. Therefore, the two output stage transistors cannot be driven under the optimum load conditions, and the output stage of the differential amplifier cannot output a desired saturated output, resulting in a load operation state. Therefore, as shown in FIG. 8, when the signal of the output terminal Pout exceeds 25 [dBm], the gain starts to decrease, and then the gain sharply decreases. Therefore, the active balun circuit 10a of the reference example shown in FIG. 4 cannot drive the two output stage transistors Q1 and Q2 under the optimum load conditions, respectively. However, by using the active balun circuit 10a of the reference example shown in FIG. 4, the power amplifier circuit operates normally.

[effect]
The active balun circuit 10a described with reference to FIG. 2 does not include a transformer circuit using a winding wiring inductor, unlike the balun B shown in FIG. Therefore, by adopting the active balun circuit 10a in the power amplifier circuit, it is possible to suppress an increase in the area of the semiconductor chip.

(Second Embodiment)
[Circuit configuration]
FIG. 8 is a diagram showing an example of another active balun circuit 10b. The active balun circuit 10b shown in FIG. 8 includes a circuit element 30a as compared with the active balun circuit 10a shown in FIG. The active balun circuit 10b is not a balun including a winding inductor, but a balun realized by transistors Q1 and Q2 and a circuit element 30a. The connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2 is connected to one end of the circuit element 30a. Unlike the circuit configuration of FIG. 4, the circuit element 30a is composed of the inductor L3. Therefore, the connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2 is connected to the reference potential via the inductor L3.

The inductance value of the inductor L3 is selected so that the impedance of the fundamental wave of the circuit element 30a does not oscillate at the fundamental frequency. When the circuit element 30a is formed in the semiconductor chip, the length of the wiring and the like can be adjusted in units of micrometers, for example. Therefore, the required impedance in the fundamental wave can be easily realized. For example, at a fundamental frequency of 2 GHz, the inductance value of the inductor L3 is about 5.13 nH.

FIG. 10 is a Smith chart showing an example of impedance when the circuit element 30a in FIG. 9 is an inductor L3. When the frequency is changed from 1.930 GHz to 1.950 GHz, the normalized impedance value (short line in FIG. 10) normalized by the characteristic impedance of 50 Ω changes as shown by the arrow Y2 in FIG. At the point m2 where the frequency is 1.950 GHz, the impedance is 516 Ω, which is about 10 times the value of 50 Ω. Therefore, it can be said that the impedance looks sufficiently large.

[motion]
11 to 14 are diagrams showing the characteristics of the power amplifier circuit using the active balun circuit 10b shown in FIG. FIG. 11 is a diagram showing the characteristics obtained at the nodes N1 and N2 in FIG. 2 when the active balun circuit 10b shown in FIG. 9 is used in the power amplifier circuit of FIG.

FIG. 11 shows the relationship between the level of the signal Pi at the node N1 and the level of the signal Ph at the node N2 with respect to the level of the input signal of the input terminal Pin. In FIG. 11, when the level of the input signal of the input terminal Pin changes, the level of the signal Pi and the level of the signal Ph change in the same manner. Since the signal Pi and the signal Ph are differential signals, they are preferably at the same level. Comparing FIG. 11 with FIG. 5, the difference between the signal Pi level and the signal Ph level is small, and the state in which the amplitudes of the signal Pi and the signal Ph are unbalanced is improved. Thereby, the symmetry of the differential signal can be satisfied.

FIG. 12 shows the relationship between the level of the input signal of the input terminal Pin and the phase change between the signal Pi and the signal Ph. FIG. 13 shows the relationship between the level of the input signal of the input terminal Pin and the phase difference between the signal Pi and the signal Ph. As can be understood from FIGS. 12 and 13, the phase difference between the signal Pi and the signal Ph is close to 180 °. Therefore, the phase difference between the signal Pi and the signal Ph is improved as compared with the cases of FIGS. 6 and 7. In addition, as compared with the active balun of the configuration of FIG. 4, the active balun of the configuration of FIG. 9 changes the phases of the signals Pi and Ph in the same manner even if the input level of the input signal changes. Therefore, as the phase difference, a constant phase difference can always be realized even if the input signal changes, and the value of the phase difference is also maintained at a phase difference close to 180 °.

FIG. 14 shows the relationship between the signal level of the output terminal Pout and the gain of the power amplifier circuit. As shown in FIG. 14, when the signal of the output terminal Pout exceeds 20 [dBm], the gain starts to decrease, and then the gain sharply decreases. According to the third embodiment described later, this sharp drop in gain can be improved.

The state in which the amplitudes of the signal Pi and the signal Ph are unbalanced as described with reference to FIG. 11 is improved, and the position of the signal Pi and the signal Ph is improved as described with reference to FIGS. 12 and 13. The phase difference is improving.

[effect]
Unlike the balun B shown in FIG. 1, the active balun circuit 10b does not include a transformer circuit using a winding wiring inductor. Further, the area of the wiring inductor used in the active balun circuit 10b can be formed to be much smaller than the area of the balun B composed of a combination of complicated wiring transformer circuits. Therefore, by adopting the active balun circuit 10b in the power amplifier circuit, it is possible to suppress an increase in the area of the semiconductor chip.

Further, when forming a balun on a semiconductor chip, there are certain process restrictions on the number of wiring layers for forming the balun, the dielectric film thickness, etc., and the number of masks is required to form a high-performance balun. There is a possibility that the process cost will increase due to the increase in such factors. In this regard, according to the active balun circuit 10b, it is possible to prevent an increase in cost. Further, the active balun circuit 10b can reduce the level difference of the output differential signal and improve the phase difference of the differential signal as compared with the case of the active balun circuit 10a.

(Third Embodiment)
[Circuit configuration]
FIG. 15 is a diagram showing an example of the active balun circuit 10c. The active balun circuit 10c shown in FIG. 15 includes a circuit element 30b. The active balun circuit 10c is not a balun including a winding inductor, but a balun realized by transistors Q1 and Q2 and circuit elements 30b. The connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2 is connected to one end of the circuit element 30b. Unlike the first embodiment and the second embodiment, the circuit element 30b is composed of the inductor L3 and the capacitor C3. The inductor L3 and the capacitor C3 are connected in parallel between the emitter of the transistor Q1 and the emitter of the transistor Q2 and the reference potential. A parallel resonance circuit (tank circuit) is formed by the inductor L3 and the capacitor C3. The resonance frequency of this parallel resonant circuit can be set to a specific frequency, and the inductance value and the capacitance value can be appropriately determined so as to set the emitter impedance of the transistor to a desired size.

Due to the resonance of the parallel circuit of the inductor L3 and the capacitor C3, the characteristic impedance of the circuit element 30b becomes infinite at the fundamental frequency. When the circuit element 30b is formed in the semiconductor chip, the length of the wiring and the like can be adjusted in units of nanometers, for example. Therefore, the required characteristic impedance can be easily realized. For example, at a fundamental frequency of 2 GHz, the inductance value of the inductor L3 is about 0.98 nH, and the capacitance value of the capacitor C3 is about 6 pF. By setting the above value, the resonance frequency becomes 2 GHz, and it appears as a sufficiently large impedance at the ideal 2 GHz. The sufficiently large impedance described here is defined as an impedance that is 10 times or more the standardized impedance when considered as a standardized impedance. That is, even when the circuit element 30b is composed of the inductor L3 and the capacitor C3, it can be said that the impedance looks sufficiently large as in the example of the impedance described with reference to FIG.

[motion]
16 to 19 are diagrams showing the characteristics of the power amplifier circuit using the active balun circuit 10c shown in FIG. FIG. 16 is a diagram showing characteristics obtained at nodes N1 and N2 in FIG. 2 when the active balun circuit 10c shown in FIG. 15 is used in the power amplifier circuit of FIG.

FIG. 16 shows the relationship between the level of the signal Pi at the node N1 and the level of the signal Ph at the node N2 with respect to the level of the input signal of the input terminal Pin. In FIG. 16, when the level of the input signal of the input terminal Pin changes, the level of the signal Pi and the level of the signal Ph change in the same manner. Since the difference between the signal Pi level and the signal Ph level is very small, the state in which the amplitudes of the signal Pi and the signal Ph are unbalanced is improved. Thereby, the symmetry of the differential signal can be satisfied.

FIG. 17 shows the relationship between the level of the input signal of the input terminal Pin and the phase change between the signal Pi and the signal Ph. FIG. 18 shows the relationship between the level of the input signal of the input terminal Pin and the phase difference between the signal Pi and the signal Ph. As can be understood from FIGS. 17 and 18, since the signal Pi and the signal Ph change in the same manner with respect to the change in the signal level of the input signal, the phase difference between the signal Pi and the signal Ph is 180. Very close to °. Therefore, the phase difference between the signal Pi and the signal Ph is further improved.

FIG. 19 shows the relationship between the signal level of the output terminal Pout and the gain of the power amplifier circuit. As shown in FIG. 19, even when the signal level of the output terminal Pout is 30 (dBm), the gain hardly decreases, and good characteristics are obtained. As described with reference to FIGS. 17 and 18, the phase difference between the signal Pi and the signal Ph is maintained at a state close to 180 °, and the signal levels of both are almost the same. Therefore, the subsequent two output stage transistors can be driven under optimum load conditions. As a result, as shown in FIG. 19, the entire differential amplifier having a two-stage configuration operates under ideal load conditions.

This point will be described in comparison with the case of the second embodiment. In the second embodiment, as shown in FIG. 14, the gain drops sharply due to the resistance component of the inductor L3 of the circuit element 30a. That is, in the second embodiment, the phase difference between the signal Pi and the signal Ph is improved as described with reference to FIGS. 12 and 13. However, since the inductor L3 has a large desired inductor value, the resistance component also becomes very large as the wiring length increases, which causes an increase in the emitter resistance of the drive stage transistor, and from the comparison of the input / output characteristics of FIGS. 5 and 11. As can be seen, there is an adverse effect that the gain of the drive stage itself is greatly reduced. Therefore, the transistor in the output stage cannot be sufficiently driven, and the gain of the amplifier as a whole drops sharply due to the resistance component of the inductor L3 of the circuit element 30a, as shown in FIG. On the other hand, in the third embodiment, as shown in FIG. 19, even if the signal level of the output terminal Pout is 30 (dBm), the gain hardly decreases and good characteristics can be obtained.

[effect]
Unlike the balun B shown in FIG. 1, the active balun circuit 10c does not include a transformer circuit using a winding wiring inductor. Therefore, by adopting the active balun circuit 10c in the power amplifier circuit, it is possible to suppress an increase in the area of the semiconductor chip. Further, the level difference of the output differential signal can be reduced as compared with the active balun circuit 10b, the phase difference of the differential signal can be improved, and good gain characteristics can be obtained. The area of the LC tank circuit can be reduced by the combination of the inductor and the capacitor as compared with the configuration of only the wiring inductor. Therefore, the circuit can be miniaturized by using the active balun circuit 10c.

A modified example of the active balun circuit described above will be described below.

(Modification example 1)
FIG. 20 is a diagram showing a modified example of the power amplifier circuit shown in FIG. In FIG. 20, the circuit element 30b of the active balun circuit 10d is composed of an inductor L3 and a capacitor C3, similarly to the active balun circuit 10c shown in FIG. The inductor L3 and the capacitor C3 are connected in parallel between the emitter of the transistor Q1 and the emitter of the transistor Q2 and the reference potential. Due to the resonance of the parallel circuit of the inductor L3 and the capacitor C3, the impedance of the circuit element 30b can be greatly set at the fundamental frequency.

Further, the active balun circuit 10d of the power amplifier circuit of this example includes transmission line transformers T1 and T2. The transmission line transformers T1 and T2 are provided between the final stage and the previous stage of the pair of amplifiers 11 and 12, that is, in the transmission lines 110 and 120 between the stages. That is, the transmission line transformers T1 and T2 are provided in the transmission lines 110 and 120 of the pair of differential signals. The transmission line transformers T1 and T2 act as a transformer by using a magnetic field generated in the transmission line, and have a role as a matching circuit having an impedance conversion function. Since the layout of the semiconductor chip has a margin by not adopting the balun B including the winding shown in FIG. 1, the transmission line transformers T1 and T2 can be provided on the semiconductor chip.

The transmission line transformer T1 is composed of wirings 511 and 512. The wiring 511 is connected in series between the collector of the transistor Q1 and the amplifier 11. Wiring 512 and wiring 511 are arranged adjacent to each other. One end of the wiring 512 is connected to one end of the wiring 511, and the other end of the wiring 512 is connected to the power supply voltage Vcc. The capacitor C41 functions as a bypass capacitor.

The transmission line transformer T2 is composed of wirings 521 and 522. The wiring 521 is connected in series between the collector of the transistor Q2 and the amplifier 12. The wiring 522 and the wiring 521 are arranged adjacent to each other. One end of the wiring 522 is connected to one end of the wiring 521, and the other end of the wiring 522 is connected to the power supply voltage Vcc. The capacitor C42 functions as a bypass capacitor.

In general, by combining the transmission line transformers T1 and T2 with the power amplifier circuit, wideband and low loss impedance matching of the frequencies of the transistors Q1 and Q2 and the amplifiers 11 and 12 can be easily realized. This makes it possible to realize a high-performance power amplifier circuit having a wider frequency band and high gain characteristics. In the above, the transmission line transformers T1 and T2 are provided on the transmission lines 110 and 120 between the stages, but a transmission line transformer and a balun may be provided on the output matching side after the output stage transistor. ..

(Modification 2)
FIG. 21 is a diagram showing an example of a power amplification module including a semiconductor chip having the active balun circuit of the present disclosure. In the power amplification module shown in FIG. 21, the semiconductor chip 100 has the active balun circuit of the present disclosure. However, among the components of the active balun circuit, the circuit element 30 is formed on the multilayer board 200 as described below. FIG. 21 schematically shows the configuration of each layer.

As shown in FIG. 21, the semiconductor chip 100 has an active balun region AB in which an active balun circuit is formed and an amplifier circuit region PS in which an amplifier circuit is formed. Further, the semiconductor chip 100 has bumps 101a and 101b. Bumps 101a and 101b are, for example, CPB (Copper Pillar Bump), but are not limited thereto.

Further, the multilayer substrate 200 has dielectric layers 201, 202 and 203. The dielectric layer 201 has electrodes 211 and 212 provided at positions corresponding to the bumps 101a and 101b. The semiconductor chip 100 is electrically connected to the corresponding electrodes 211 and 212 by bumps 101a and 101b. Vias 215a, 215b and 215c penetrating the dielectric layers 201, 202 and 203 are connected to the electrode 212.

The dielectric layer 202 has an electrode 213 at a position facing a part of the electrode 211. The electrode 211 and the electrode 213 face each other via the dielectric layer 201, and these function as a capacitor C3. Via 214a penetrating the dielectric layers 202 and 203 is connected to the electrode 213. Further, vias 214b penetrating the dielectric layers 201, 202 and 203 are connected to the electrode 211. The via 214b functions as the inductor L3 in the high frequency band. The inductor L3 is not limited to the via 214b, and may be formed by conductive wiring connected to the via 214b.

With the above configuration, the semiconductor chip 100 is electrically connected to the multilayer substrate 200. Then, instead of providing the circuit element 30 in the active balun circuit, the circuit element 30 is configured by the multilayer board 200. At this time, the semiconductor chip 100 includes a portion of the active balun circuit excluding the circuit element 30, and the multilayer substrate 200 constitutes the circuit element 30 including the inductor L3 and the capacitor C3. That is, the multilayer board 200 has a circuit element 30 which is one of the constituent elements of the active balun circuit, and the circuit element 30 necessary for the active balun circuit can be provided outside the active balun circuit. As a result, the semiconductor chip 100 can be made smaller. In this example as well, for example, as in FIG. 10, the impedance of the circuit element 30 seems to be sufficiently large at the fundamental frequency.

(Modification example 3)
FIG. 22 is a diagram showing an example of another power amplification module including a semiconductor chip having the active balun circuit of the present disclosure. In the power amplification module shown in FIG. 22, the semiconductor chip 300 has the active balun circuit of the present disclosure. However, among the components of the active balun circuit, the circuit element 30 is formed on the multilayer board 200 as described below. FIG. 22 schematically shows the configuration of each layer.

As shown in FIG. 22, the semiconductor chip 300 has an active balun region AB in which an active balun circuit is formed and an amplifier circuit region PS in which an amplifier circuit of an output stage is formed. Further, the semiconductor chip 300 has electrodes 216, 217, and 218. The electrode 218 is electrically connected to the electrode 216 formed on the back surface of the semiconductor chip 300 by vias 219a and 219b penetrating the semiconductor chip 300. Electrodes 216 are electrically connected to vias 215a, 215b and 215c. Since the transistor in the output stage generally handles a large amount of electric power, the vias 215a, 215b, and 215c also serve as thermal vias having a heat exhausting effect. The electrode 217 is electrically connected to the electrode 211 formed on the surface of the dielectric layer 201 by the bonding wire W1. The electrode 218 is electrically connected to the electrode 212a formed on the surface of the dielectric layer 201 by the bonding wire W2.

Similar to the case of FIG. 21, the electrode 211 faces the electrode 213 via the dielectric layer 201, and these function as the capacitor C3. Further, as in the case of FIG. 21, the via 214b is connected to the electrode 211. The via 214b functions as the inductor L3 in the high frequency band.

With the above configuration, the semiconductor chip 300 is electrically connected to the multilayer substrate 200. Then, instead of providing the circuit element 30 in the active balun circuit, it is composed of the multilayer board 200. At this time, the semiconductor chip 300 includes a portion of the active balun circuit excluding the circuit element 30, and the multilayer board 200 constitutes the circuit element 30 including the inductor L3 and the capacitor C3. That is, the multilayer board 200 has a circuit element 30 which is one of the constituent elements of the active balun circuit, and the circuit element 30 necessary for the active balun circuit can be provided outside the active balun circuit. As a result, the semiconductor chip 300 can be made smaller. Further, since the man-hours for producing the multilayer substrate 200 are shorter than those of the semiconductor chip 300, the design period can be shortened. In addition, the characteristics can be finely adjusted by using bonding wires together or adjusting the mounting position. In this example as well, for example, as in FIG. 10, the impedance of the circuit element 30 seems to be sufficiently large at the fundamental frequency.

(Modification example 4)
In the second and third embodiments described above, circuit elements 30a and 30b as lumped constant circuits are used. The present disclosure is not limited to a lumped constant circuit, and circuit elements as a distributed constant circuit may be used. For example, there is a wiring 30h of a predetermined distance between the connection point between the emitters of the transistor Q1 and the transistor Q2 in FIG. 4 and the reference potential. Considering the parasitic wiring capacitance and the parasitic wiring inductance, it can be considered that the distributed constant circuit is formed by the wiring 30h. Therefore, the wiring 30h can be considered as a distributed constant circuit having a predetermined characteristic impedance. Therefore, instead of using the circuit elements 30a and 30b as the lumped constant circuit, high impedance can be realized by wiring between the connection points of the emitters and the reference potential depending on the fundamental frequency. Assuming that the wavelength of the fundamental frequency is λ, the wiring 30h preferably has a length of λ / 4. That is, at the fundamental frequency, a wiring 30h having a length of 1/4 wavelength is provided as a circuit element. Since there is a wavelength shortening effect due to the relative permittivity of the semiconductor substrate, the wavelength is not 1/4 wavelength in free space but 1/4 wavelength as the electric length. For example, when the fundamental frequency is from 30 GHz to 650 MHz, λ / 4 is from about 0.7 [mm] to about 58 [mm]. The length of the wiring 30h is not limited to 1/4 wavelength, and may be n / 4 wavelength (n is an odd number of 3 or more).

FIG. 23 is a diagram showing an example of an equivalent circuit of an active balun circuit using a distributed constant circuit. In FIG. 23, a circuit element 30c by wiring as a distributed constant circuit exists between the connection point between the emitter of the transistor Q1 and the emitter of the transistor Q2 and the reference potential. The impedance of the circuit element 30c appears large enough at the fundamental frequency. The active balun circuit 10e shown in FIG. 23 is not a balun including a winding inductor, but a balun realized by transistors Q1 and Q2 and a circuit element 30c.

As described above, by using the active balun circuit of the present disclosure, the semiconductor chip can be made smaller and the symmetry of the differential signal can be satisfied.

10, 10a, 10b, 10c, 10d, 10e Active balun circuit 11, 12, 13 Amplifier 30, 30a, 30b, 30c Circuit element 41, 42 Wiring 100 Semiconductor chip Pin Input terminal Pout Output terminal Q1 Transistor Q2 Transistor T1, T2 Transmission Line transformer

Claims (10)

The first transistor includes a first transistor and a second transistor, and a circuit element in which the impedance of the input signal at a specific frequency appears to be sufficiently larger than the impedance at another frequency, and a pair of differential signals corresponding to the input signal is the first transistor. And an active balun circuit that outputs from the second transistor. The first transistor including a first terminal connected to a reference potential via the circuit element, a second terminal connected to an input terminal, and a third terminal connected to a power supply voltage terminal.
The second transistor including a first terminal connected to a reference potential via the circuit element, a second terminal connected to the reference potential, and a third terminal connected to the power supply voltage terminal.
With
The active balun circuit according to claim 1, wherein the pair of differential signals are output from the third terminal of the first transistor and the third terminal of the second transistor. The first terminal of the first transistor is an emitter and
The second terminal of the first transistor is a base and
The third terminal of the first transistor is a collector.
The first terminal of the second transistor is an emitter and
The second terminal of the second transistor is a base and
The third terminal of the second transistor is a collector.
The active balun circuit according to claim 2. Claim 2 or claim that the circuit element includes an inductor in which one end is connected to a connection point between the first terminal of the first transistor and the first terminal of the second transistor and the other end is connected to the reference potential. Item 3. The active balun circuit according to item 3. One end of the circuit element is connected to a connection point between the first terminal of the first transistor and the first terminal of the second transistor, and the other end is connected to the reference potential with respect to the inductor and the inductor. The active balun circuit according to claim 2 or 3, which includes a capacitor connected in parallel. The active balun circuit according to claim 2 or 3, wherein the circuit element has wiring having a wavelength of 1/4 of the fundamental frequency of the input signal to the input terminal. A first transistor having a first terminal connected to a reference potential via a circuit element, a second terminal connected to an input terminal, and a third terminal connected to a power supply voltage terminal.
A second transistor including a first terminal connected to a reference potential via the circuit element, a second terminal connected to the reference potential, and a third terminal connected to the power supply voltage terminal.
With
The first terminal of the first transistor is a source or a drain.
The second terminal of the first transistor is a gate and
The third terminal of the first transistor is a drain or a source.
The first terminal of the second transistor is a source or drain,
The second terminal of the second transistor is a gate and
The third terminal of the second transistor is a drain or a source.
A pair of differential signals are output from the third terminal of the first transistor and the third terminal of the second transistor.
Active balun circuit. The active balun circuit according to any one of claims 1 to 7.
A pair of amplifiers that input the pair of differential signals and
Power amplifier circuit including. The active balun circuit includes a transmission line transformer connected to each of the pair of differential signal transmission lines.
The power amplification circuit according to claim 8, wherein the transmission line transformer performs impedance matching between the first transistor and the second transistor and the pair of amplifiers. Of the active balun circuit according to any one of claims 2 to 7, a semiconductor chip including a portion excluding the circuit element, a substrate electrically connected to the semiconductor chip, and the differential signal. Including a pair of amplifiers with
The substrate is a power amplification module having the circuit elements of the active balun circuit.

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