JP2020014032A - Gate drive circuit and pulse power supply for semiconductor switching element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique which contributes to improvement of a response speed of a switching operation of a semiconductor switching element and suppression of ringing. SOLUTION: A primary winding T1 of a pulse transformer PT is connected to a pulse voltage source, a Tg on one end side of a secondary winding T2 of the pulse voltage source is connected to a gate of a switch SW1, and a Ts on the other end side is connected to a switch SW1. Connect to the source of. A discharge transistor Q and a Zener diode Dz are connected in parallel between one end side Tg and the other end side Ts of the secondary winding T2. The base of the discharge transistor Q is connected to the series connection point p1 and is connected to the other end side Ts via the resistor R1. As the resistor R1, a resistor having a relatively large resistance value within a range in which the desired function of the discharge transistor Q can be exhibited is applied. The Zener diode Dz connects the cathode to the anode side of the first diode D1 at one end side Tg and the anode to the other end side Ts. [Selection diagram] Fig. 1

Description

  The present invention relates to a pulse power supply and a gate drive circuit technology of a semiconductor switching element applicable to the pulse power supply.

  In a pulse power supply of a pulse width modulation system applied in various fields, a circuit configuration capable of supplying a high-voltage / high-current pulse to a load includes a pulse forming line (PFL), a pulse forming nutwork (PFN), and a bloom line. In addition to the circuit configuration using means such as (BL), a circuit configuration in which DC power energy from a DC power supply or the like is converted into pulses by a semiconductor switching element and supplied directly to a load without using the means (described later) In FIG. 3 and the like, there is known a configuration in which the semiconductor switching elements SW1, SW2 and the like convert the signal into a pulse form; hereinafter, simply referred to as a direct supply configuration as appropriate (for example, Patent Documents 1 and 2).

  In the direct supply configuration, a high voltage and a large current are applied to the semiconductor switching element (for example, several kV to several tens of kV are applied), similarly to the application to the load. It is desirable to apply one having a voltage property.

  Further, in order to apply a desired pulse to the load, the response speed of the switching operation (turn-on / turn-off) of the semiconductor switching element is fast (for example, the rise time / fall time of the pulse is several ns to several tens ns). It is preferable that the pulse width be narrowed (for example, several tens to several hundreds of ns) and that the pulse width be easily modulated.

  As described above, a semiconductor switching element having a withstand voltage and applying a desired pulse to a load has a structure provided with a capacitive gate (for example, a MOSFET (MOS field effect transistor) structure using SiC or the like). In some cases, the semiconductor switching element is appropriately operated by a gate drive circuit.

  The gate drive circuit has a configuration in which a primary winding of a pulse transformer is connected to a pulse voltage source, and a secondary winding of the pulse transformer is connected to a semiconductor switching element (specifically, one end of the secondary winding is a semiconductor switching element). A configuration in which the other end of the secondary winding is connected to the source of the semiconductor switching element.

JP 2013-9216 A JP 2010-193646 A

  As described above, the secondary winding of the pulse transformer connected to the semiconductor switching element is provided with a diode for preventing backflow in a path to the gate of the semiconductor switching element (hereinafter, simply referred to as a gate signal path as appropriate) ( For example, in addition to being equipped with a diode inserted and connected in series so as to be in a forward direction toward the gate, a resistor (so-called gate resistor) or the like may be provided. Have been.

  However, when the resistance of the gate signal path is increased by the gate resistor as described above, the response speed of the switching operation of the semiconductor switching element is likely to be slow, and a desired high-speed operation may not be performed.

  The present invention has been made in view of such a technical problem, and has as its object to provide a technique that contributes to improving the response speed of the switching operation of a semiconductor switching element and suppressing ringing.

  One embodiment of the present invention relates to a pulse transformer having a primary winding connected to a pulse voltage source, and a discharge transistor connected in parallel between one end of a secondary winding and the other end of the secondary winding of the pulse transformer. And a Zener diode.

  One end of the secondary winding of the pulse transformer is connected to the gate of the semiconductor switching element, and the first and second diodes connected in series are connected to the center of the one end of the secondary winding. The second diode is inserted in series and connected in series so as to be in the forward direction toward the gate of the semiconductor switching element, the other end of the secondary winding of the pulse transformer is connected to the source of the semiconductor switching element, The transistor has an emitter connected to the cathode side of the second diode at one end of the secondary winding, a collector connected to the other end of the secondary winding, and a base connected in series with the first and second diodes. Connected to the other end of the secondary winding via a resistor, and a Zener diode having a cathode connected to the anode side of the first diode at one end of the secondary winding, Is connected to the other end of the secondary winding, and the semiconductor switching element has a structure having a capacitive gate, and converts DC power energy supplied from the DC power supply to the load into pulses. And

  One end of the secondary winding of the pulse transformer is connected in series between the connection point with the emitter of the discharge transistor and the gate of the semiconductor switching element so that the third diode is directed forward toward the gate. A bypass circuit that is inserted and connected and bypasses from the cathode side to the anode side of the third diode may be connected.

  Further, the bypass circuit may be one in which resistors are inserted and connected in series. Further, the semiconductor switching element may have a MOSFET structure using SiC.

  Another embodiment includes a DC power supply connected in series to a load, and a first semiconductor switching element having a capacitive gate and being inserted and connected in series between the DC power supply and the load. It is a pulse power supply. The first semiconductor switching element performs a switching operation by the gate drive circuit described above.

  In another aspect, the semiconductor device further includes a second semiconductor switching element having a capacitive gate and connected in parallel to a load, wherein the second semiconductor switching element is switched by the gate drive circuit described above. It may operate.

  As described above, according to the present invention, it is possible to contribute to improvement of the response speed of the switching operation of the semiconductor switching element and suppression of ringing.

FIG. 1 is a schematic configuration diagram for explaining a gate drive circuit 10 according to a first embodiment. FIG. 9 is a schematic configuration diagram for explaining a gate drive circuit 20 according to a second embodiment. FIG. 2 is a schematic configuration diagram for explaining a pulse power supply P1 which is an application example of the gate drive circuits (10, 20 and the like) of the embodiment. FIG. 4 is a timing chart for explaining an example of a switching operation of the switches SW1 and SW2 in FIG. 3. FIG. 3 is a schematic configuration diagram for explaining a gate drive circuit 50 that performs a switching operation of a plurality of switch products SW connected in series. FIG. 2 is a schematic configuration diagram for explaining a gate drive circuit 60 according to a reference example.

  The gate drive circuit of the semiconductor switching element according to the embodiment of the present invention can drive the semiconductor switching element (hereinafter, simply referred to as a switch as appropriate) applicable to a pulse power supply having a direct supply configuration so as to be appropriately turned on and off. For example, a conventional circuit is completely different from a configuration in which a gate resistor or the like is simply provided in a gate signal path of a secondary winding of a pulse transformer (hereinafter simply referred to as a conventional circuit as appropriate).

  That is, in this embodiment, instead of providing a gate resistor, a discharging transistor and a Zener diode are provided between one end of the secondary winding (gate signal path side) of the pulse transformer and the other end of the secondary winding. The configuration is such that they are connected in parallel. In addition, a current that can flow through a Zener diode or the like due to a switch transient phenomenon is suppressed.

  According to the configuration of the present embodiment, for example, if ringing can occur in the voltage between the gate and source of the switch even if a gate resistor is not provided in the gate signal path of the pulse transformer, the Zener diode As a result, the ringing is suppressed.

  Further, as described above, with the configuration without the gate resistor, the resistance of the gate signal path can be reduced as compared with, for example, a conventional circuit. Accordingly, the response speed of the switching operation of the switch is increased, and a desired pulse is easily supplied to the load.

  Further, as described above, the current flowing due to the transient phenomenon when the switch is turned off can be one of the factors that cause a malfunction of the switch when the current amount increases, but the current is suppressed as in the present embodiment. According to the configuration described above, malfunction of the switch is suppressed.

  As described above, the gate drive circuit of the switch according to the present embodiment connects the discharging transistor and the Zener diode in parallel between one end of the secondary winding of the pulse transformer and the other end of the secondary winding, and sets the transient state of the switch. If the configuration is such that the current that can flow through a Zener diode or the like due to the phenomenon is suppressed, technical common sense in various fields (for example, fields of pulse power supply technology, gate drive circuit technology, semiconductor switching device technology, etc.) is appropriately applied. It is possible to design, and examples thereof include the following.

<< Application example of the gate drive circuit according to the present embodiment >>
FIG. 3 illustrates a pulse power source P1 to which the gate drive circuit (for example, gate drive circuits 10 and 20 shown in FIGS. 1 and 2 described below) of the present embodiment can be applied.

  In a pulse power supply P1 shown in FIG. 3, a DC power supply EV is connected in series to a load LD, and a switch SW1 is inserted and connected in series between the DC power supply EV and the load LD (the positive side in FIG. 3). I have. When the DC power energy of the DC power supply EV is supplied to the load LD, the switch SW1 is appropriately switched by a gate drive circuit (not shown) to repeatedly turn on and off, so that the DC power energy is converted into a pulse. Supplied to the load LD. That is, a desired pulse can be supplied to the load LD.

  In the case of the pulse power supply P1 shown in FIG. 3, one end of the capacitor C is connected between the DC power supply EV and the switch SW1, and the other end of the capacitor C is connected to the negative side of the DC power supply EV. With this capacitor C, a voltage drop due to the responsiveness of the DC power supply EV can be suppressed.

  Further, a resistor r1 is inserted and connected in series between the switch SW1 and the load LD, thereby causing an inductance component L (stray inductance) and a load LD that may exist between the DC power supply EV and the load LD. Ringing that occurs is suppressed.

  If the load LD is a capacitive load and DC power energy remains, the energy may cause a longer fall time of the voltage on the load LD side. In such a case, as shown in FIG. 3, a configuration in which a switch SW2 is connected in parallel to the load LD is exemplified.

  Specifically, one end of a switch SW2 is connected between the switch SW1 of the DC power supply EV and the load LD (connected via a resistor r2 in FIG. 3), and the other end of the switch SW2 is connected to the DC power supply EV. A configuration in which the switches are connected to the negative electrode side and switching operations are performed so that the switches SW1 and SW2 are appropriately turned on and off as shown in the timing chart of FIG. Note that, similarly to the resistor r1, the resistor r2 in FIG. 3 also contributes to suppression of an inductance component which may exist between the DC power supply EV and the load LD and ringing caused by the load LD.

  By performing the switching operation of the switches SW1 and SW2 in this manner, the influence of the energy remaining in the load LD can be suppressed, and the voltage on the load LD side can be quickly lowered.

  When the load LD is a resistive load, there is a possibility that the voltage on the load LD side can easily fall quickly even without the switch SW2 or the like as described above.

  As long as the switches SW1 and SW2 are configured to be capable of converting the DC power of the DC power supply EV into a pulse form and supplying the pulsed DC power to the load LD by repeating the turn-on and turn-off as described above, various modes can be applied. It is possible, for example, to apply a power switching element having a structure including a capacitive gate such as an IGBT or a MOSFET. As a specific example, an element having a MOSFET structure made of SiC (silicon carbide) and having a capacitive gate (a so-called SiC element) can be given.

  Further, each of the switches SW1 and SW2 may have a configuration having a withstand voltage corresponding to a high voltage and a large current applied to the target load LD. For example, when a discrete switch product is applied and configured, if the withstand voltage or the like of the switch product alone is not sufficient, a plurality of the switch products are connected in series as appropriate to obtain a desired withstand voltage or the like. It is possible to adopt a configuration in which it is provided.

As a specific example, as shown in FIG. 5, a plurality of switch products SW (switches SW ₀ ,..., SW _n−1 , SW _{n in} FIG. 5) are connected in series, and each switch product SW is connected to a gate drive circuit 50. Switching operation as appropriate.

  Various aspects can be applied to the gate drive circuit 50. For example, a configuration in which the circuit portion 51 is appropriately equipped with a discharge transistor Q, a Zener diode Dz, and the like as shown in FIGS. When a plurality of switch products SW are simultaneously switched as shown in FIG. 5, a primary winding T1 connected to a pulse voltage source (not shown) and a primary winding T1 are arranged to face the primary winding T1. There is a configuration including a pulse transformer PT having a plurality of secondary windings T2.

  The primary winding T1 shown in FIG. 5 has a configuration in which a plurality of (for example, the number of switch products SW connected in series) winding portions Tm are connected in series, and the winding portions Tm correspond to the respective winding portions Tm. , And the secondary windings T2 are arranged to face each other. Then, a corresponding switch product SW is connected to each secondary winding T2.

  Further, the number of turns of each of the primary winding T1 and the secondary winding T2 can be appropriately set according to the purpose. Although FIG. 1 and FIG. 2 described below illustrate a case where the primary winding T1 is set to 1T and the secondary winding T2 is set to 3T, the present invention is not limited to this. A pulse generated by a pulse voltage source (not shown) is transmitted from the primary windings T1 to T2 so that the switch product SW (the switch SW1 in FIGS. 1 and 2 described later) can be appropriately switched as desired. good.

<< Configuration example of gate drive circuit according to the present embodiment >>
<Reference example>
In the switches SW1 and SW2 shown in FIG. 3, a power switching element such as a SiC element having a capacitive gate as described above may be applied, and the switching operation may be performed at the timing shown in FIG. However, a voltage derived from a transient phenomenon (in FIG. 3, due to the influence of the capacitor C in addition to the transient phenomenon) may be applied to the switches SW1 and SW2.

  For example, in the case of FIG. 4, it is conceivable that a transient voltage is applied to the switch SW1 at the timing t1, and a transient voltage is applied to the switch SW2 at the timing t2.

  In a SiC device or the like applied to the switches SW1 and SW2, an input capacitance Ciss, an output capacitance Coss, and a feedback capacitance Crss exist as parasitic capacitances other than the gate capacitance as in the switch SW1 shown in FIG. .

  Therefore, for example, in a configuration in which the discharging transistor Q and the Zener diode Dz are simply connected in parallel as in a gate drive circuit 60 (a reference example applied to the switch SW1 in FIG. 6) illustrated in FIG. 6, the switch SW1 is turned off. When a transient voltage is applied in this state, a current (a current in a path such as i1 or i2 described later) may flow through the gate drive circuit 60 (the zener diode Dz or the like).

  In the case of the gate drive circuit 60 of FIG. 6, in addition to the discharging transistor Q and the Zener diode Dz, the first and second diodes D1 and D2 for preventing the backflow of the one end Tg of the secondary winding T2, and the bypass. The configuration includes a resistor R3 for a circuit and a resistor R4 for preventing static electricity. Further, the base of the discharging transistor Q is connected to the other end Ts of the secondary winding T2 via the resistor R1.

  The resistor R1 is appropriately applied in consideration of the current amplification factor hfe of the discharging transistor Q, the magnitude of the base current, and the like. For example, when the resistance value of the resistor R1 is large, the base current of the discharging transistor Q tends to be small. However, if the current amplification factor hfe of the discharging transistor Q is large, a sufficient amount of the collector can be obtained. It is also possible to pass a current.

  On the other hand, when the resistance value of the resistor R1 is small, the base current of the discharging transistor Q is easily increased, and a sufficient amount of collector current flows even if the current amplification factor hfe of the discharging transistor Q is small. It is also possible.

  As described above, if a sufficient amount of collector current can flow in the discharging transistor Q, the charge remaining in the gate capacitance of the switch SW1 can be sufficiently discharged when the switch SW1 is turned off.

  Here, when the switch SW1 is turned off, the Zener diode Dz does not perform a Zener operation, and a parasitic capacitance exists (when the switch SW1 is turned on, the Zener diode Dz is charged and present). A current may flow through a path like a loop i1 via the feedback capacitance Crss and the parasitic capacitance of the Zener diode Dz. When the resistance value of the resistor R1 is small, a current can flow through a path such as a loop i2.

  As the amount of current flowing through the loops i1 and i2 increases, the voltage between the gate and source of the switch SW1 also increases. If the voltage exceeds a predetermined threshold voltage, the switch SW1 may malfunction (for example, an undesired turn-on state), or the switch SW1 may be damaged.

  Note that by using a resistor R1 having a relatively large resistance value, the current of the loop i2 can be suppressed, but the base current of the discharging transistor Q tends to be small. Therefore, if the current amplification factor hfe of the discharging transistor Q is small, the desired function of the discharging transistor Q may not be sufficiently exhibited (for example, it becomes difficult to sufficiently supply the collector current). ).

  Further, the transient phenomenon and the like when the gate drive circuit 60 is applied to the switch SW1 have been described. However, the same transient phenomenon and the like may occur when the gate drive circuit 60 is applied to the switch SW2.

  Based on the above-described transient phenomenon and the like, it is preferable to suppress the current flowing through the path such as the loops i1 and i2 so that the current amount of the current does not become too large. As an example, instead of applying a configuration in which the discharging transistor Q and the Zener diode Dz are simply connected in parallel as in the gate drive circuit 60 in FIG. 6, a Zener diode as in the first and second embodiments described below is used. Applying a configuration in which the connection position of Dz is appropriately changed is applied.

<Example 1>
The gate drive circuit 10 shown in FIG. 1 is an example of a configuration applicable to each of the switches SW1 and SW2 in FIG. Note that the same components as those shown in FIGS. 3 to 6 are denoted by the same reference numerals and the like, and detailed description thereof will be omitted as appropriate. Further, since the gate drive circuit 10 can be similarly applied to the switches SW1 and SW2, a case where the gate drive circuit 10 is applied to the switch SW1 will be described as appropriate, and a case where the gate drive circuit 10 is applied to the switch SW2 will be appropriately omitted.

  The gate drive circuit 10 shown in FIG. 1 has a configuration provided with a pulse transformer PT. The primary winding T1 of the pulse transformer PT is connected to a pulse voltage source (not shown), and the secondary winding T2 of the pulse transformer PT is connected. Is connected to the switch SW1.

  In the secondary winding T2, one end Tg of the secondary winding T2 is connected to the gate of the switch SW1, and the other end Ts is connected to the source of the switch SW1. Thus, one end Tg is configured to function as a gate signal path.

  In the secondary winding T2, in the center of one end Tg, the first and second diodes D1 and D2 connected in series are connected to the switch SW1 in the order of the first and second diodes D1 and D2. They are inserted and connected in series so as to be in the forward direction toward the gate.

  The discharging transistor Q and the Zener diode Dz are connected in parallel between one end Tg and the other end Ts of the secondary winding T2.

  In the connection configuration of the discharging transistor Q, the emitter is connected to the cathode of the second diode D2 at one end Tg, the collector is connected to the other end Ts, and the base is the first and second diodes D1. , D2 and to the other end Ts via a resistor R1.

  As the resistor R1, a resistor having a relatively large resistance value within a range in which a desired function of the discharging transistor Q can be sufficiently exhibited may be used.

  In the connection configuration of the Zener diode Dz, the cathode is connected to the anode side of the first diode D1 at one end Tg, and the anode is connected to the other end Ts.

  In the gate drive circuit 10 configured as described above, a desired pulse is generated by appropriately driving a pulse voltage source (not shown) to which the primary winding T1 is connected, and the pulse is transmitted from the primary winding T1 to T2. The transmission allows the switch SW1 to perform a switching operation as appropriate.

  Further, the provision of the Zener diode Dz makes it possible to suppress the ringing of the voltage between the gate and the source of the switch SW1 without providing a gate resistor. According to the configuration in which the gate resistor is not provided, the resistance can be easily reduced at one end Tg, which can contribute to an improvement in the response speed of the switching operation of the switch SW1, and a desired pulse is supplied to the load LD. It will be easier.

  Further, since the Zener diode Dz has a connection configuration in which the cathode is connected to the anode side of the first diode D1 at one end Tg, the current of a path like the loop i1 in FIG. 6 when the switch SW1 is turned off is: Suppression (the current is suppressed so as to be blocked by the first and second diodes D1 and D2).

  Further, by applying a resistor having a relatively large resistance value to the resistor R1, the current in a path such as the loop i2 in FIG. 6 is also suppressed.

  Therefore, the amount of current flowing through the path such as the loops i1 and i2 can be prevented from becoming excessively large, and the malfunction of the switch SW1 is suppressed.

<Example 2>
The gate drive circuit 20 shown in FIG. 2 describes another example of a configuration applicable to each of the switches SW1 and SW2 in FIG. The same components as those shown in FIGS. 1 and 3 to 6 are denoted by the same reference numerals, and the detailed description thereof will be omitted as appropriate. Further, in the gate drive circuit 20, similarly to the gate drive circuit 10, the same applies to the switches SW1 and SW2. Therefore, the case where the invention is applied to the switch SW1 will be described as appropriate, and the case where the invention is applied to the switch SW2 will be appropriately omitted. .

  The gate drive circuit 20 of FIG. 2 has a configuration in which a third diode D3 is inserted and connected to one end Tg of the secondary winding T2 of the pulse transformer PT. Specifically, the third diode D3 is connected in series with one end Tg between the connection point p2 with the emitter of the discharging transistor Q and the gate of the switch SW1 so as to be in the forward direction toward the gate. Is inserted and connected.

  In addition, a bypass circuit BP is connected to the one end side Tg so that a bypass can be made from the cathode side to the anode side of the third diode D3, and a resistor R2 is inserted and connected in series to the bypass circuit BP. I have.

  In the bypass circuit BP, for example, a reverse flow (a flow from the anode side to the cathode side of the third diode D3) may occur depending on the characteristic (Vf or the like) in the turn-on state of the third diode D3. In such a case, As shown in FIG. 2, a backflow is prevented by applying a fourth diode D4. In the case of the fourth diode D4 in FIG. 2, in the bypass circuit BP, the fourth diode D4 is inserted and connected in series in the opposite direction toward the gate of the switch SW1.

  As the resistor R2, a resistor having a relatively large resistance is used as long as the charge remaining in the gate capacitance of the switch SW1 can be sufficiently discharged (discharged by the discharge transistor Q via the bypass circuit BP). It is mentioned.

  In the gate drive circuit 20 configured as described above, similarly to the gate drive circuit 10, a pulse voltage source (not shown) to which the primary winding T1 is connected is appropriately driven to generate a desired pulse. By transmitting the pulse from the primary winding T1 to T2, the switch SW1 can be appropriately switched.

  In addition to the same operation and effect as the gate drive circuit 10, the third diode D3 and the operation and effect by the bypass circuit BP are obtained as described below.

  That is, while the switch SW1 is turned off, the currents in the paths such as the loops i1 and i2 in FIG. 6 pass through the bypass circuit BP, respectively, and the currents correspond to the resistance value of the resistor R2 of the bypass circuit BP. Is suppressed in accordance with the magnitude of.

  Thereby, even if the resistance value of the resistor R1 is reduced and the base current of the discharging transistor Q is increased, the current in a path such as the loop i2 in FIG. 6 is sufficiently suppressed (the magnitude of the resistance value of the resistor R2). Can be suppressed according to the above. Further, the variation of the discharge transistor Q that can be used is increased.

  As described above, in the present invention, only the described specific examples have been described in detail. However, it is obvious to those skilled in the art that various modifications and the like can be made within the technical idea of the present invention. It is natural that such changes and the like belong to the scope of the claims.

10, 20, 50: gate drive circuit BP: bypass circuit D1 to D4: first to fourth diodes Dz: Zener diode EV: DC power supply LD: load P1: pulse power supply PT: pulse transformer p1: series connection point p2: connection Point Q: Discharge transistor R1, R2, r1, r2: Resistor SW1, SW2: Switch (first and second semiconductor switching elements)
T1 Primary winding T2 Secondary winding Tg One end Ts Other end

Claims (6)

A pulse transformer whose primary winding is connected to a pulse voltage source,
A discharge transistor and a zener diode connected in parallel between one end of the secondary winding of the pulse transformer and the other end of the secondary winding,
With
One end of the secondary winding of the pulse transformer is connected to the gate of the semiconductor switching element,
In the center of one end of the secondary winding, the first and second diodes connected in series are connected in series so that the first and second diodes are in the forward direction toward the gate of the semiconductor switching element in the order of the first and second diodes. Inserted and connected to
The other end of the secondary winding of the pulse transformer is connected to the source of the semiconductor switching element,
The discharging transistor is
An emitter connected to the cathode side of the second diode at one end of the secondary winding;
A collector is connected to the other end of the secondary winding,
A base connected to the series connection point of the first and second diodes, and connected to the other end of the secondary winding via a resistor;
Zener diodes are
A cathode connected to the anode side of the first diode at one end of the secondary winding;
An anode is connected to the other end of the secondary winding,
The semiconductor switching element has a structure having a capacitive gate,
A gate drive circuit for a semiconductor switching element, which converts DC power energy supplied from a DC power supply to a load into a pulse. One end of the secondary winding of the pulse transformer is
A third diode is inserted and connected in series between the connection point of the emitter of the discharging transistor and the gate of the semiconductor switching element so as to be directed forward toward the gate,
2. The gate drive circuit for a semiconductor switching element according to claim 1, wherein a bypass circuit for bypassing from a cathode side to an anode side of the third diode is connected.   3. The gate drive circuit for a semiconductor switching element according to claim 2, wherein the bypass circuit has a resistor inserted and connected in series.   4. The gate drive circuit for a semiconductor switching device according to claim 1, wherein the semiconductor switching device has a MOSFET structure using SiC. A DC power supply connected in series to the load,
A first semiconductor switching element having a capacitive gate and being inserted and connected in series between a DC power supply and a load;
With
A pulse power supply, wherein the first semiconductor switching element performs a switching operation by the gate drive circuit of the semiconductor switching element according to claim 1. A second semiconductor switching element having a capacitive gate and connected in parallel to the load,
The pulse power supply according to claim 5, wherein the second semiconductor switching element performs a switching operation by the gate drive circuit of the semiconductor switching element according to any one of claims 1 to 4.

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