JP2019129545A - Power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a switching loss generated in a low temperature region of a SiC-MOSFET type power semiconductor element. A power conversion device includes power semiconductor modules 1a-1 to 1b-3 configured by a half-bridge circuit and gate drive circuits 2a and 2b for driving the power semiconductor modules. The gate drive circuit includes a gate voltage threshold value detection determination circuit 3, gate resistance switching circuits 28 and 29, and gate resistors 33 and 34 having a resistance variable function. The gate voltage threshold detection determination circuit uses the gate-source sense terminal voltage of the power semiconductor module as an input signal and compares the gate-source sense terminal voltage levels with reference to the threshold voltage of the built-in gate voltage threshold generation circuit. The high and low of the element temperature of the SiC-MOSFET type power semiconductor element 11 inside the power semiconductor module is determined, and if it is in the low temperature region, a switching signal is transmitted to the control signal terminal of the gate switching circuit to change and control the gate resistance value. [Selection diagram] Fig. 1

Description

  The present invention relates to a power conversion device in which a power conversion semiconductor element is a main circuit element of power conversion.

  Power semiconductor elements for power conversion are widely used as basic components of power converters (also referred to as “power converters”) such as motor drive inverters and power transmission / distribution converters. The power semiconductor device is mounted on the power semiconductor module and incorporated in the power converter in one device or in a parallel connection of a plurality of devices.

  In recent years, a silicon carbide (SiC) device having features of low loss and high speed operation has been used as a power semiconductor device for power conversion in order to improve the performance of a power converter. SiC devices have the advantage of a wide band gap and a breakdown breakdown voltage about 10 times higher than Si. When the breakdown voltage is designed to be equal, the thickness of the channel semiconductor layer that becomes the current path can be made thinner than that of Si devices. Since this is possible, it is possible to realize a very small on-resistance value at the time of conduction. Further, when compared with the same breakdown voltage, the depletion layer width is as short as about 1/10 of the Si element, and high-speed switching of about 10 times is possible due to the effect of shortening the carrier travel length.

  Conventionally, as a technique for reducing power loss in a power switching device during low-temperature operation of the power switching device, in the gate voltage control / resistance switching circuit, the channel resistance of the transistor is determined based on the detection value in the channel resistance detection unit. To provide an instruction to control the gate voltage of the power switching device based on the resistance value, or a turn-off resistance connected to the turn-on resistance connected to the turn-on transistor and the turn-off transistor There has been a control to switch the resistance value of (see, for example, Patent Document 1).

  Conventionally, as a drive circuit for reducing the temperature dependence of the loss of the wide gap semiconductor element, there is one that detects the temperature of the power semiconductor switching element and changes the gate drive voltage or the gate drive resistance based on the detected value. (See, for example, Patent Document 2).

  Conventionally, it has been shown as an experimental value that the temperature dependence of the threshold voltage Vth or the like of the SiC-MOSFET that determines the dependence of the switching loss on the temperature region tends to increase in the low temperature region (for example, Non-patent document 1).

  Conventionally, the relationship between the gate plateau voltage VGP, which is one of the characteristics of the power semiconductor element, and the load current Iload has been formulated (see, for example, Non-Patent Document 2).

JP, 2006-52197, A

JP 2007-259576 A

F. Jiang et al., “Comparative study of temperature-dependent characteristics for SiC MOSFETs”, 2016 13th China International Forum on Solid State Lighting, pp. 50-53

B. Jayant Baliga, “Fundamentals of Power Semiconductor Devices”, ISBN-10: 0387473130, pp.436-447

  The power converter is required to have low power consumption from the viewpoint of energy saving, and part of the power loss generated by the power converter is the power loss consumed by the power semiconductor module. The power loss is the sum of a resistive loss (conduction loss) generated in a flow path through which a steady current flows and a switching loss (switching loss) generated by the multiplication of a transient current and a transient voltage at switching. Therefore, the power semiconductor module and the power semiconductor element mounted therein are required to have low power loss.

The temperature dependency of power loss MOSFET according to the SiC (M etal O xide S emiconductor F ield E ffect T ransistor) type power semiconductor device occurs when it is applied to the power converter, for example, in Patent Document 1 There is a description. In paragraph 0003 of Patent Document 1, there is a description that a control method in which the on-voltage increases as the temperature rises, and thus the temperature dependence of power loss is reduced is important. Further, Patent Document 1 describes that when the device temperature is lowered, the on-voltage decreases with the temperature up to a certain temperature, but when the temperature is further lowered, the on-voltage increases again. From the description of the above-mentioned Patent Document 1, the temperature dependence of the power loss generated in the SiC-MOSFET type power semiconductor element is caused by the on-voltage, that is, the resistive loss generated in the flow path through which the steady current flows, It is clearly shown that the loss increases on the low temperature side and the high temperature side of the temperature region.

  Patent Document 2 is a document for the purpose of providing a drive circuit that reduces the temperature dependence of the loss of a wide gap semiconductor element. In Patent Document 2, the temperature of a power semiconductor switching element is detected and the detected temperature is detected. If the temperature is higher than a predetermined temperature, it is described that the gate drive voltage is increased or the gate drive resistance is decreased. Patent Document 2 describes that when the temperature of the element in the power module is high, the gate resistance can be reduced, and di / dt and dv / dt can be increased to reduce the loss of the power element. Has been. As a system for detecting the temperature of a semiconductor element, a system using a thermistor and a system using temperature dependency of current-voltage characteristics of a diode for temperature detection are disclosed. Therefore, Patent Document 2 describes an example of a method of reducing the loss of the device by reducing the switching loss when the device temperature becomes high.

  From the above Patent Documents 1 and 2, among the power losses in the SiC-MOSFET type power semiconductor element, 1) the conduction loss increases in the low temperature region and the high temperature region, and 2) when the device becomes high temperature It can be said that the method of shortening switching time by making gate resistance small and reducing switching loss among power losses, and lowering | hanging the temperature of an element conventionally is well-known.

  As described above, when a power semiconductor module equipped with a SiC-MOSFET type power semiconductor element is used in the power conversion device, there is a problem that both the switching loss and the conduction loss increase when the element temperature is low. When a plurality of power semiconductor modules are connected in parallel, due to the characteristic variation among the modules, the combined loss of the switching loss and the conduction loss is unevenly distributed among the plurality of modules, and a certain power semiconductor module A current may flow or a sharp temperature rise may occur, which may reduce the long-term operation reliability of the power semiconductor module.

  As described above, the SiC-MOSFET type power semiconductor element has the temperature dependence of the resistance of the current path in the MOSFET, and when the element temperature region is roughly divided into three regions of low temperature, intermediate temperature, and high temperature, The resistance value is high in the low temperature region and the high temperature region, and the resistance value in the intermediate temperature region is low. When a SiC-MOSFET type power semiconductor element is used for a power semiconductor module, the characteristics of conduction loss (Econd) determined by steady current and resistance have a tendency shown in the upper part of FIG. The conduction loss decreases and increases again from the intermediate temperature range to the high temperature range. The switching loss (Esw) has a tendency with respect to the element temperature shown in the lower part of FIG. 8, and the loss in the low temperature region tends to increase as compared to the loss in the intermediate temperature region and the high temperature region. In applications to power converters with high switching frequency, switching losses dominate. The temperature range dependency of the switching loss is determined by the temperature dependency of the threshold voltage Vth and the like of the SiC-MOSFET. The temperature dependency of Vth, which is the controlling factor, is shown in FIG. An experimental value is disclosed in 2 and it is clearly shown that Vth tends to increase in the low temperature region.

  In the low temperature region, both the conduction loss Econd and the switching loss Esw tend to increase as shown in FIG. In this case, since the power loss increases at the time of starting up the power conversion device or in a low temperature environment, it is necessary to reduce the power loss even when the element temperature is low. When a plurality of power semiconductor modules mounted with SiC-MOSFET type power semiconductor elements are connected in parallel to configure the power converter, the conduction loss due to the characteristic variation among the power semiconductor modules The loss combined with the switching loss becomes non-uniform among the plurality of modules, and the element temperatures of the plurality of power semiconductor elements mounted on the power semiconductor module become non-uniform. This may cause overcurrent to flow in a part of a specific power semiconductor module or power semiconductor elements connected in parallel within the power semiconductor module, or may cause rapid temperature fluctuations. Reliability may be reduced.

  The prior art which detects the temperature of a SiC-MOSFET type | mold power semiconductor element, and changes the voltage and resistance of a gate drive circuit is described in patent document 1 and patent document 2. FIG.

  The circuit configuration shown in FIG. 1, FIG. 2, and FIG. 5 of Patent Document 1 includes a channel resistance detection unit 18 or 18A that is different from the switching element serving as the main current flow path of the power converter, It is shown that the gate drive resistance value and the gate drive voltage are changed by the detected value. In the circuit configuration described in Patent Document 1, it is necessary to additionally provide a voltage output terminal from the channel resistance detection unit in the power semiconductor module. Furthermore, since a part of the area of the switching element of the main current is divided and assigned to the channel resistance detection unit, there is a disadvantage that the area of the switching element is reduced.

  In the patent document 2, as a method of detecting the temperature of the element, an example of a thermistor and a diode for temperature detection is described. However, in these detection methods, the detection element is placed at a distance from the power semiconductor element in order to secure the electrical insulation characteristics, so there is a temperature difference from the power semiconductor element of the embodiment and the time response to temperature fluctuation is also different. . Therefore, there is a possibility that the timing of the change control of the gate resistance described in Patent Document 2 may be shifted or the change amount of the resistance value may be excessive or insufficient. Further, in the switching operation for the inductive load using the SiC-MOSFET type power semiconductor element, the switching loss is small in the high temperature region as described above, and the voltage change rate (dv / dt) and the current change rate (di / dt). Is high compared to the low temperature range. Furthermore, if the gate resistance is further reduced to increase dv / dt and di / dt, the strength of the high frequency spike noise generated in the switching transient waveform increases and the value of the noise generated from the power converter increases. Problems arise.

  Accordingly, the present invention has been made to overcome the problems of the prior art described above, and the element temperature of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module is detected from the electric characteristics of the element, and the detection result is obtained. Based on the power loss generated in the low temperature region of the element, it is a problem to reduce the switching loss.

  The present invention includes a plurality of means for solving the above-described problems. For example, the power conversion apparatus according to the present invention includes a plurality of power semiconductor modules and a plurality of gate drive circuits. The plurality of power semiconductor modules have a power semiconductor of the upper arm and a power semiconductor of the lower arm integrally in a common module or individually in separate modules, and the power of the upper arm The semiconductor and the power semiconductor of the lower arm constitute a half bridge circuit, and the drain terminal of the power semiconductor of the upper arm is a high potential terminal, and the source terminal of the power semiconductor of the upper arm and the power semiconductor of the lower arm The drain terminal is commonly connected to the intermediate potential terminal, and the source terminal of the power semiconductor of the lower arm is a low potential terminal, and the upper arm The gate terminal and the source sense terminal of the power semiconductor and the power semiconductor of the lower arm are respectively connected to the gate drive circuit for the upper arm and the gate drive circuit for the lower arm via the gate wiring and the source sense wiring, respectively. Each of the plurality of gate drive circuits connected is a gate drive terminal that outputs a gate drive voltage, a source sense drive terminal that outputs a reference potential of the potential of the gate drive terminal, and a high that configures the gate drive voltage. A first power supply terminal to which a potential side potential is applied, a second power supply terminal to which a low potential side potential constituting the gate drive voltage is applied, a drive control signal terminal for controlling the gate drive voltage, and a gate Two or more gate resistance switching circuits including a voltage threshold detection determination circuit, a first gate resistance switching circuit, and a second gate resistance switching circuit A turn-on gate resistor connected to the first gate resistance switching circuit and having a variable resistance function, and a second gate resistance switching circuit connected to the second gate resistance switching circuit and turned off when the variable resistance function is provided The gate voltage threshold detection determination circuit includes a first input terminal for inputting a gate voltage of the power semiconductor, and a second input for inputting a source voltage of the power semiconductor And the second input terminal is connected to the source sense drive terminal, and the gate voltage is applied to the first power supply terminal of the gate drive circuit and the second power supply terminal of the gate drive circuit, respectively. A first power supply terminal of the threshold detection determination circuit and a second power supply terminal of the gate voltage threshold detection determination circuit are connected to the drive control signal terminal of the gate drive circuit. A control reference signal terminal is connected, a first output terminal is connected to the control signal terminal of the first gate resistance switching circuit, and a second output terminal is connected to the control signal terminal of the second gate resistance switching circuit. And a control signal of the first gate resistance switching circuit based on a voltage between the input terminals which is a potential difference between the first input terminal and the second input terminal and a potential of the control reference signal terminal. An instruction to switch the value of the gate resistance is given to at least one of the terminal and the control signal terminal of the second gate resistance switching circuit.

  According to the present invention, it is possible to suppress the increase in switching loss at a low temperature to reduce the loss of the entire power conversion device.

It is a circuit block diagram which shows the structure of Example 1 which is 1st Embodiment of the power converter device of this invention. It is a figure which shows the transient response waveform at the time of turn-on obtained from Example 1 of this invention. It is a figure which shows the transient response waveform at the time of turn-off obtained from Example 1 of this invention. It is a figure which shows the comparison with the transient response waveform obtained from Example 1 of this invention, and the transient response waveform obtained using the conventional structure of the same element temperature. It is explanatory drawing which showed typically the influence by load current regarding the reduction effect of the switching loss obtained using the 1st thru | or 3rd Example of the power converter device of this invention. It is a circuit block diagram which shows the structure of Example 2 which is 2nd Embodiment of the power converter device of this invention. It is a 3rd embodiment of a power conversion device of the present invention, and is a figure showing the composition of Example 3 which is one example of the power conversion device which materialized the internal configuration of the portion of a gate voltage threshold detection judging circuit. . It is a graph which shows the element temperature dependence of the energy loss (conduction loss and switching loss) of the general power converter device which mounts the power semiconductor module which applied the SiC-MOSFET type power semiconductor element. It is explanatory drawing which shows the circuit format of the conventional power converter device containing a power semiconductor module and a gate drive circuit. It is explanatory drawing which shows the transient response waveform at the time of the turn-on of the power semiconductor module mounted in the conventional power converter device. It is explanatory drawing which shows the temperature dependence of the transient response waveform at the time of turn-on of the power semiconductor module mounted in the conventional power converter device. It is explanatory drawing which shows an example of the cause of the temperature dependence of the transient response waveform at the time of turn-off of the power semiconductor module mounted in the conventional power converter device. It is explanatory drawing which shows the element temperature dependence of the gate-source sense terminal voltage during the gate plateau period of the power semiconductor module mounted in the conventional power converter device.

  The power converter of the present invention constitutes a half bridge circuit using a power semiconductor module, and the gate drive circuit for driving the power semiconductor module comprises a gate voltage threshold detection judging circuit, a gate resistance switching circuit, and a variable resistance function. Provided with gate resistance. The gate voltage threshold detection detection circuit compares the level of the gate-source sense terminal voltage based on the threshold voltage of the built-in gate voltage threshold generation circuit with the voltage between the gate-source sense terminals of the power semiconductor module as an input signal. The element temperature of the SiC-MOSFET type power semiconductor element inside the power semiconductor module is determined, and if it is a low temperature area, a switching signal is transmitted to the control signal terminal of the gate switching circuit to change and control the gate resistance value.

  Hereinafter, an example of an embodiment of a power converter of the present invention is explained as each example using a drawing.

<Example of overall circuit configuration>
The structure of the power converter device which concerns on FIG. 1 at Example 1 which is the 1st Embodiment of this invention is shown. The power conversion device according to this embodiment includes a plurality of power semiconductor modules 1a-n and 1b-n (n is an arbitrary natural number having a maximum value as the parallel number of the plurality of power semiconductor modules connected in parallel to each other. And a plurality of gate drive circuits 2a and 2b.

  The plurality of power semiconductor modules include an upper arm power semiconductor 11 (the upper power semiconductor 11 of the two power semiconductors 11 in the figure) and a lower arm power semiconductor 11 (the lower side of the two power semiconductors 11 in the figure). The power semiconductor 11) is integrated with a common module or separately in separate modules. That is, in FIG. 1, the power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm are mounted on separate power semiconductor modules, that is, the upper power semiconductor module 11a-n and the lower power semiconductor module 11b, respectively. In the embodiment, the present invention is not limited to this embodiment. For example, the power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm are integrated into a common power semiconductor module. The form (not shown) mounted on is also within the scope of the present invention.

  The power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm constitute a half bridge circuit. The drain terminal D1 of the power semiconductor 11 of the upper arm is a high potential terminal. The source terminal S1 of the power semiconductor of the upper arm and the drain terminal D2 of the power semiconductor of the lower arm are commonly connected to the intermediate potential terminal. The source terminal S2 of the lower arm power semiconductor is a low potential terminal.

  The gate terminals G1 and G2 of the power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm, and the source sense terminals Ss1 and Ss2 respectively drive the gate for the upper arm via the gate wiring 41 and the source sense wiring 42. Circuit 2a and gate drive circuit 2b for the lower arm are mutually connected.

  Each of the plurality of gate drive circuits 2a and 2b includes a gate drive terminal G0 that outputs a gate drive voltage, a source sense drive terminal Ss0 that outputs a reference potential of the potential of the gate drive terminal G0, and a high voltage that constitutes the gate drive voltage. A first power supply terminal GSH to which a potential side potential is applied, a second power supply terminal GSL to which a low potential side potential constituting a gate drive voltage is applied, a drive control signal terminal SIG for controlling the gate drive voltage, Two or more gate resistance switching circuits including a gate voltage threshold value detection determination circuit 3, a first gate resistance switching circuit 28, and a second gate resistance switching circuit 29, and the first gate resistance switching circuit 28. And a turn-on gate resistor 33 having a variable resistance function, and a second gate resistance switching circuit 29 and having a variable resistance function for turn-off Comprising a chromatography sheet resistance 34.

  The gate voltage threshold detection determination circuit 3 has a first input terminal G0 for inputting a gate voltage of the power semiconductor 11, and a second input terminal Ss0 for inputting a source voltage of the power semiconductor 11. A second input terminal Ss0 is connected to the source sense drive terminal Ss0. The first power supply terminal GSH of the gate voltage threshold detection determination circuit 3 and the gate voltage threshold detection determination for the first power supply terminal GSH of the gate drive circuits 2a and 2b and the second power supply terminal GSL of the gate drive circuits 2a and 2b The second power supply terminal GSL of the circuit 3 is connected. A control reference signal terminal SIG is connected to the drive control signal terminals SIG of the gate drive circuits 2a and 2b. The first output terminal CNTON is connected to the control signal terminal of the first gate resistance switching circuit 28, and the second output terminal DNTOFF is connected to the control signal terminal of the second gate resistance switching circuit 29. Due to the above connection relationship, the gate voltage threshold value detection determination circuit 3 generates the voltage between the input terminals, which is the potential difference between the first input terminal G0 and the second input terminal Ss0, and the potential of the control reference signal terminal SIG. Based on at least one of the control signal terminal of the first gate resistance switching circuit 28 and the control signal terminal of the second gate resistance switching circuit 29, that is, at the time of turn-on, the control signal terminal of the first gate resistance switching circuit 28 In addition, at the time of the turn-off, the operation of giving the switching instruction of the value of the gate resistance to the control signal terminal of the second gate resistance switching circuit 29 is performed.

  The power conversion device according to the present embodiment has the gate voltage threshold detection determination circuit 3, the first resistance switching device 28, and the second power voltage conversion device inside the gate drive circuit 2 in addition to the configuration of the conventional power conversion device shown in FIG. And the gate drive resistance RgON2 (33), and the gate drive resistance RgOFF2 (34). The configuration of the conventional power conversion device shown in FIG. 9 will be described later.

  In the configuration of the power conversion device according to the present embodiment, the switches of the resistance change switch elements 28 and 29 are opened and closed according to the voltage values output from the terminals CNTON and CNTOFF of the gate voltage threshold detection determination circuit 3, and the gate drive resistance RgON2 In addition, it is possible to switch between the resistance value of the gate drive resistor RgOFF2 operating as the gate drive resistor or being invalidated by being short-circuited by the switch element. In the case of turn-on switching, a gate drive resistance to which the values of the gate drive resistances RgON1 and RgON2 are added is generated in the path from the terminal GSH to which the gate drive voltage VGSH is applied to the gate drive circuit output terminal G0. Depending on the operation of the gate voltage threshold value detection determination circuit 3 to be described later, the resistance changeover switch element 28 is short-circuited, and the effective gate drive resistance value can be reduced from the sum of RgON1 + RgON2 to RgON1. Similarly, in the case of turn-off switching, a gate drive resistance that is the sum of gate drive resistances RgOFF1 and RgOFF2 is generated in a path from the terminal GSL to which the gate drive voltage VGSL is applied to the gate drive circuit output terminal G0. By the output signal control of the gate voltage threshold detection determination circuit 3, the resistance switching element 29 is short-circuited, and the effective gate drive resistance can be reduced from the sum of RgOFF1 + RgOFF2 to only the value of RgOFF1.

  The gate voltage threshold detection determination circuit 3 receives the difference potential between the gate terminal G0 and the source sense terminal Ss0, compares it with the determination threshold voltage VGPRg set in advance internally, and controls the gate drive resistance for turn-on according to the determination result. The control signal CNTOFF of the signal CNTON and the turn-off gate drive resistor is changed. In addition, by monitoring the control signal SIG of the gate drive circuit 2 itself, it has a function of switching the output of the control signal to two states of enabling and disabling. The invalidation of the control signals CNTON and CNTOFF prevents the gate voltage threshold value detection / determination circuit 3 from malfunctioning when noise is applied to the potential of the gate terminal G0 or during the period in which the OFF state is maintained.

<< Configuration of conventional circuit >>
FIG. 9 shows a configuration of a conventional power converter that forms the basis of the power converter according to the present embodiment. The main circuit of the power converter includes the power semiconductor module 1, the gate drive circuit 2, the power supply 51, and the load inductance 52 (Lload).

  The power semiconductor module 1 is shown in a one-arm configuration, and a plurality of modules (1a-1 to 1a-3, 1b-1 to 1b-3) are connected in parallel to form a half bridge, and a power semiconductor for the upper arm The module 1a and the lower arm module 1b are connected in cascade. The power supply 51 is connected between the drain terminal D1 of the upper arm module 1a and the source terminal S2 of the lower arm module 1b. The load inductance 52 may be equivalently connected to the S2 terminal of the lower arm module depending on the inflow and outflow of current, but in the present specification, the case is connected to the D1 terminal of the upper arm module I will explain. In addition, although the bus-bar which can send a heavy current is used for the connection between the said power semiconductor module, a power supply, and load inductance, in FIG. 9, description is omitted.

  A gate drive circuit 2 is used to control the switching operation of the power semiconductor module 1. The upper arm gate drive circuit 2a has power supply terminals GSH and GSL, a drive control signal terminal SIG, a gate drive terminal G0 and a source sense terminal Ss0, and the power semiconductor module 1a via the gate line 41 and the source sense line 42. And the source sense terminal Ss1. The lower arm gate drive circuit 2b is connected to the gate terminal G2 and the source sense terminal Ss2 of the power semiconductor module 1b via the gate wiring 41 and the source sense wiring 42.

  A predetermined power supply voltage at which the drive circuit 2 can operate is applied between the power supply terminals GSH and GSL of the gate drive circuit 2. Another control signal of the upper arm control signal Vsiga and the lower arm control signal Vsigb is applied to the drive control signal terminal SIG to control the switching operation.

  The power semiconductor module 1 is configured by one or more SiC-MOSFET type power semiconductor devices 11 and one or more diode devices 12 for return. The drain of the power semiconductor device 11 is connected to the drain terminal D1, and the source of the power semiconductor device 11 is connected to the source terminal S1. If the current rating of the power semiconductor module exceeds the ratings of the power semiconductor element 11 and the free wheeling diode element 12, they are connected in parallel using a plurality of elements.

  The gate of the power semiconductor element 11 is connected to the gate terminal G1 (G2), and the source sense terminal Ss1 (Ss2) to which the gate drive voltage is applied in pairs with the G1 (G2) is the power semiconductor element 11 Connected to the source.

  The gate driving circuit 2 includes a voltage dividing circuit 21 and a voltage dividing circuit 22, a voltage dividing capacitor 23 and a voltage dividing capacitor 24, a drive signal control circuit 25, a high potential side switch element 26 and a low potential side switch element 27, and a gate drive for turn-on. A resistor RgON1 (31) and a turn-off gate drive resistor RgOFF1 (32). The voltage dividing circuit 21 and the voltage dividing circuit 22, and the voltage dividing capacitor 23 and the voltage dividing capacitor 24 divide the voltage VGD applied between the power supply terminals GSH and GSL of the gate drive circuit 2 to obtain the source sense terminal Ss0. The potential VSs0 is determined. The drive signal control circuit 25 uses the control signal voltage VSIG input to the drive control signal terminal SIG as an input signal to drive the control terminals of the high potential side switch element 26 and the low potential side switch element 27. The turn-on gate drive resistor RgON1 (31), the turn-off gate drive resistor RgOFF1 (32), and the switch element 26 and the switch element 27 are connected in series between the terminal GSH and the terminal GSL as shown in FIG. A node connecting the high potential side switch element 26 and the low potential side switch element 27 is referred to as the gate drive terminal G0. When drive signal control circuit 25 changes high-potential side switch element 26 from off (release) to on (close) and low-potential side switch element 27 from on to off, terminal G0 is connected through resistor RgOFF1 to VGSL. , Changes the state to VGSH via the resistor RgON1, and turns on the power semiconductor module. When the turn-off operation is performed, the reverse control is performed, and when the high potential side switch element 26 changes from on to off and the low potential side switch element 27 changes from off to on, the terminal G0 is connected to VGSH via the resistor RgON1. It changes from the connected state to the state connected to VGSL via the resistor RgOFF1.

<< Transient waveform of conventional circuit >>
The operation of the transient waveform will be described with reference to FIG. The power semiconductor module 1a shows a transient response waveform when the power semiconductor module 1b is turned on while the power semiconductor module 1b is turned on. Items showing waveforms are a drive control signal Vsigb, a gate-source sense terminal voltage Vgs2 of the module 1b (voltage between the gate terminal G2 and the source sense terminal VSs2), a gate drive current Ig2 flowing into the terminal G2, The source main current Is2 flowing out from the source terminal S2, and the drain terminal D2 and source terminal S2 of the module 1b, and the voltage Vds2 between the terminals.

  At the trigger time t1 of Vsig, the potential changes from VL to VH, and at time t2 after a certain delay time (td1), the high potential side potential VGSH inside the gate drive circuit 2 and the VSs2 of the module source sense terminal voltage Meanwhile, a positive step voltage is applied from VGSL (e.g. -10 V) to VGSH (e.g. +15 V).

  The gate-source sense terminal voltage Vgs2 that determines the turn-on operation of the module transiently responds with a CR time constant due to the input capacitance Ciss of the module and the turn-on drive resistor RgON1 generated in the gate drive path, and starts increasing toward VGSH.

  The gate current Ig2 flowing from the terminal G2 shows a transient response when the step voltage is applied to the series circuit of the Ciss and RgON1, and decreases with the gate peak current Ig2peak as a maximum value.

  At time t3, Vgs2 reaches the threshold voltage VTH of the SiC-MOSFET type power semiconductor element, and the current Is2 begins to flow between the drain and source terminals of the power semiconductor element.

  At time t4, the value of Is2 reaches the load current value Iload. Thereafter, in a period from time t4 to time t5, the drain-source terminal voltage Vds2 drops from the power supply voltage Vcc to the on-voltage VON1 at the time of Iload conduction, while flowing a constant Is2 (= Iload). In the period from t4 to t5, the voltage Vgs2 between the gate and the source sensing terminal tends to increase corresponding to the voltage drop of Vds2. This tendency is the static characteristics of the SiC-MOSFET type power semiconductor device in which the voltage Vgs between the gate and the source sense changes (increases) when Vds changes (decreases) under the condition that the main current Iload flows in constantly. Is to reflect. The value of the gate drive current Ig2 decreases from IGP1 to IGP2 according to the change of Vgs2.

  In the period from time t5 to time t6, the changes of the main currents Is2 and Vds2 are almost complete, but Vgs2 changes so as to reach the voltage value (VDSH) of the input step response, and accordingly, Ig2 Asymptotically approaches the zero current value, the ON resistance decreases as the Vgs2 value increases, and the ON voltage changes to VON2, which is a steady-state VON lower than VON1. The above is the operation of the switching transient response at turn-on.

  An object of the present invention is to reduce switching loss in the low temperature region of the device temperature. The switching loss is determined according to the turn-on loss EonI determined in accordance with the change rate dIs2 / dt of the source current in the (t4-t3) period in FIG. 10 and the change rate dVds2 / dt in the source current in the (t5-t4) period. It is the sum of the turn-on loss EonV.

<Temperature dependence of transient waveform of conventional circuit>
FIG. 11 schematically shows the dependency of the turn-on switching transient response of the SiC-MOSFET type power semiconductor device on the device temperature. The example of a waveform in case element temperature is high temperature (solid line: for example 150 degreeC) and low temperature (dotted line: for example -50 degreeC) is shown.

In the transient response of the gate-source sense terminal voltage Vgs2, the threshold voltage VTH increases as the temperature (LT) decreases. Therefore, the flow-out timing t3 _LT of the source terminal current Is2 is delayed as compared with the high temperature (HT). The potential of Vgs2 at timing t4 when Is2 reaches the steady value Iload and Vds2 starts to decrease is referred to as a gate plateau start potential (VGP1). As the element temperature decreases, VTH increases and has a relationship of VTH _LT > VTH _HT . On the other hand, VGP1 also increases at a low temperature, and a relationship of VGP1 _LT > VGP1 _HT occurs. As described above, in Non-Patent Document 2, the relationship between the gate plateau voltage VGP1 which is one of the characteristics of the power semiconductor device and the load current Iload is formulated, and VGP1 meets Iload with VGP1GPVTH + Iload / It has become clear that it has a relationship of gm. From this equation, the difference voltage of VGP−VTH is determined by the current Iload and the mutual conductance gm. When Iload is determined to a predetermined value, when the temperature dependence of gm is small, the differential voltage of VGP-VTH is substantially constant regardless of the temperature. Therefore, the difference voltage _{(VGP1 LT -VTH LT) (VGP1} HT -VTH HT) is _equivalent, it can be said that the difference in transit time of (t4 _{LT -t3} LT) and _{(t4 HT -t3} HT) small. The transient response from the time t3 to the time t4 is a time constant determined by the product of the turn-on resistance RgON1 and the input capacitance Ciss of the element, and the temperature dependency of the time constant is small, and the temperature dependency of the value of the differential voltage is also small. is there. The period (t4-t3) is a change (increase) period of the source current, that is, the value of dIs2 / dt has little temperature dependency. Therefore, it can be said that, among the turn-on switching loss Eon, the value of EonI whose main factor is dIs2 / dt is less dependent on the element temperature.

Next, of the turn-on switching loss Eon, the temperature dependence of the period (t5-t4) where dVds2 / dt is the main factor is examined. After Vgs2 reaches VGP1 (t4), it changes to VGP2 (t5), and Vds2 decreases from Vcc to ON voltage VON1 during that period. The length of this period (t5-t4) is determined by the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor element and its charging current Ig2. Since the temperature dependency of Cgd is negligible, the temperature dependency of Ig2 is dominant. Ig2 is linked to the Vgs waveform in FIG. 11. From the relationship of VGP1 _LT > VGP1 _HT , VRg applied to the gate resistance RgON1 at the turn-on determined by the difference voltage between VGP and VGSH is VRg _LT <VRg _HT It becomes the relationship. Gate current Ig2 from the temperature dependence of _VRg, since a relationship of Ig LT _{<Ig HT,} duration of charging without Cgd temperature dependence, namely (t5-t4) _{is, (t5 HT -t4 HT) <} ( FIG. 11 shows that t5 _LT −t4 _LT ). Further, in a low temperature region is remarkable increase in the Vgs2 of the period from VGP1 _LT to VGP2 _LT, more _{VRg LT} have smaller tendency against _{VRg HT.} From the above study, in the low temperature turn-on waveform, the potentials of VGP1 and VGP2 fluctuate to higher potentials compared to the high temperature, the value of gate current Ig decreases, and the change period of decreasing Vds2 becomes longer, It is apparent that the value of EonV determined by dVds2 / dt among the turn-on switching losses Eon is increased.

Here, the values of VGP1 and VGP2 are arranged. When a power semiconductor module using a SiC-MOSFET type power element performs a switching operation with respect to an inductive load, a predetermined load current is defined as Iload, and a threshold including the element temperature (T) dependence of the power semiconductor module is defined as VTH. (T), the mutual conductance of the power semiconductor module when the voltage between the drain terminal and the source terminal of the power semiconductor module is the on-voltage is gm (VON), and the gate-plateau voltage VGP2 is
VGP2≈VTH (T) + Iload / gm (VON)
Can be estimated.

When the mutual conductance when the voltage between the drain terminal and the source terminal of the power semiconductor module is the power supply voltage (Vcc) is gm (Vcc), the gate plateau voltage VGP1 is
VGP1 = VTH (T) + Iload / gm (Vcc)
Can be estimated.
Since gm (VON) <gm (Vcc), when the element temperature is constant,
The relationship VGP1 <VGP2 is generated to generate a transient response of the gate plateau voltage shown in FIGS.

  From the above description of the transient response at turn-on using FIGS. 10 and 11, it is clear that the device temperature dependency of the SiC-MOSFET type power semiconductor device increases the switching loss in a low temperature region. The same problem occurs at turn-off.

  FIG. 12 schematically shows the dependency of the switching transient response at turn-off of the SiC-MOSFET type power semiconductor device on the device temperature. The example of a waveform in case element temperature is high temperature (solid line: for example 150 degreeC) and low temperature (dotted line: for example -50 degreeC) is shown.

  In the transient response of the gate-source sense terminal voltage Vgs2, first, Vgs2 decreases from the positive drive voltage VGSH toward VGSL at time t2. The time constant is a CR time constant determined by the product of the gate resistance RgOFF1 and the input capacitance Ciss of the power semiconductor element.

At time t3, the source current Is2 remains constant, Vgs2 decreases to the value of the gate plateau voltage VGP2, and Vds2 starts to increase from the potential of VON2. The value of VGP2 is different depending on the temperature of the element, the low temperature (LT) and high temperature _(HT), a relationship of _(VGP2 LT> VGP2 _HT). The temperature dependency of VGP2 is, as described above, because VGP2 ≒ VTH + Iload / gm, and the VTH term decreasing with increasing temperature is dominant.

  In the period from time t3 to t4, the applied voltage of the feedback capacitor Cgd of the SiC-MOSFET type power semiconductor element is increased, so that the gate current Ig2 becomes a charging current. As Vds2 increases, Vgs2, that is, the gate plateau voltage also decreases, and changes from VGP2 (time t3) to VGP1 (time t4). The voltage fluctuation from VGP2 to VGP1 is determined by the static characteristic (Id2-Vds2 characteristic) of the SiC-MOSFET type power semiconductor device. Under the condition that the current Is2 is constant, the change rate of Vgs2 to Vds2 is different, and the change rate is larger as the temperature is lower. Therefore, in the gate plateau voltage region, not only the feedback capacitance Cgd but also a change in Vgs2 from VGP2 to VGP1 occurs in the gate current Ig2, so the gate-source input capacitance of the SiC-MOSFET type power semiconductor device The charge current is also applied to Cgs. For this reason, Ig2 is shunted into the Cgd charging current and the Cgs charging current at the gate terminal of the SiC-MOSFET type power semiconductor element, and the charging current to Cgd that increases Vds2 decreases. In particular, in the region where the element temperature is low, the fluctuation of Vgs2 from VGP2 to VGP1 is large, so the effective gate current value for charging Cgd in that period is the gate flowing through the gate terminal G2 of the power semiconductor module 1. It decreases with respect to the current Ig2, and the Cgs charging time (time t4-t3) becomes longer.

  Time t5 is the time when the source current Is2 decreases from the value of Iload and decreases to zero current. In this period (t4 to t5), Vgs2 decreases from VGP1 to VTH. The time required for the reduction is determined by the time constant of Vgs2, and is determined by the gate resistance RgOFF1 and Cgs of the SiC-MOSFET type power semiconductor element, and therefore the dependence on the element temperature is small. Therefore, the Eoff generation period in which dIs 2 / dt is the main factor, that is, Eoff I generated in the period (t 4 to t 5) has less dependence on the element temperature. From the above description, the switching loss during turn-off operation of the SiC-MOSFET type power semiconductor device is dependent on the device temperature at the loss EoffV of the voltage change period mainly due to dVds2 / dt, and increases in the low temperature region. On the other hand, it can be said that the loss EoffI in the current change period whose main factor is dIs2 / dt is less dependent on the element temperature.

  As shown in the object of the present invention, it is important to reduce the switching loss occurring in the SiC-MOSFET type power semiconductor device in the low temperature region. In particular, in the switching operation, the device temperature dependency of the switching loss (EonV and EoffV) generated in the change period of the main voltage (Vds) is large, and it is necessary to reduce it in the low temperature region.

  FIG. 13 shows the Vds voltage dependency of the gate plateau period when the gate-source voltage Vgs of the SiC-MOSFET type power device is turned on. The horizontal axis of the Vds voltage ranges from the VON1 voltage to the power supply voltage Vcc, and the characteristics of Vgs in the gate-plate period are schematically shown. Here, VGP1 indicates the potential on the low potential side (starting voltage at turn-on) of Vgs in the gate plateau period in the case of the same device temperature, and VGP2 indicates the Vgs in the gate plateau period in the same device temperature. Indicates the potential on the high potential side (the end voltage at turn-on). The lower the element temperature, the higher the Vgs potential during the gate-plateau period. As described above, in the switching operation at turn-on, the temperature dependency of the switching loss generated in the change period of the main voltage (Vds) depends on the magnitude of the potential of VGP1 to VGP2 in FIG. And the value of Ig, which is the charging current, varies (decreases) in the low temperature region.

<< Setting range of determination threshold value VGPRg according to this embodiment of the present invention >>
Therefore, in the present invention, it is determined whether or not the element temperature is in a low temperature region, and in the case of a low temperature region, an increase in switching loss is suppressed by increasing the gate current Ig. As means for realizing this, it will be described below that the element temperature is determined based on the voltage value during the gate plateau period, and that the gate resistance that can be varied to increase the gate current Ig is controlled (resistance value is reduced). The reference value of the voltage value during the gate-plateau period and the value of the Vgs determination threshold value (VGPRg) for controlling the gate resistance is set in the range shown in FIG. 13 as an example. Particularly in the low temperature region (LT) where the switching loss is reduced, the determination threshold VGPRg is set near the gate / plateau start voltage VGP1LT so that the gate resistance is reduced during most of the gate / plateau period. At an intermediate temperature (MT) where the switching loss is small, it is set near the ending voltage VGP2MT of the gate plateau period so that the change to the switching loss due to the reduction of the gate resistance is small.

<< Effects of the present embodiment >>
According to the present embodiment, the switching loss in the low temperature region can be reduced with respect to the intermediate temperature region by the above setting. In the high temperature region where the switching loss is small, the gate resistance is reduced after the switching operation is completed, so that the switching loss is kept small without fluctuation. Note that depending on the specifications that the power converter requires for the power semiconductor module, switching loss may need to be significantly reduced even in the intermediate temperature range, so the setting value of the determination threshold voltage (VGPRg) of Vgs is shown in the figure. Although it is not limited to the range shown in 13, if the low temperature of the temperature range where the switching loss is desired to be reduced is referred to as LT and the high temperature side is referred to as MT, the value of VGPRg is set between VGP1 _MT and VGP2 _LT It is necessary to.

<< One example of overall circuit configuration to reduce high frequency noise components >>
FIG. 6 shows an overall circuit configuration of Example 2 which is the second embodiment of the present invention. The present embodiment is a modification of the first embodiment. In this embodiment, the power semiconductor modules 1c and 1d constituting the upper and lower arms are connected to the gate terminal G1 (G2) and the gate sense terminal Gs1 (Gs2) of the power semiconductor module from the gate of the SiC-MOSFET type power element mounted inside. ). The terminal Gs1 is connected to the gate sense terminal Gs1 from the gate of the power element through the high resistance Rgs1 (Rgs2), and the Gs1 terminal is connected to the source sense terminal Ss1 (Ss2) terminal through the capacitor. Although the present embodiment is different from the first embodiment in the above points, the other points are common to the first embodiment. Here, the CR time constant determined by Rgs1 and Cgs1 reduces the high-frequency noise at the time of switching while the transient response of the gate-source sense terminal Vgs described with reference to FIGS. 11 and 12 is the terminal Gs1 (Gs2) And the terminal Ss1 (Ss2) are adjusted so that the CR constant is transmitted.

  The gate drive circuits 2c and 2d each include a gate terminal G0, a gate sense terminal Gs0, and a source sense terminal Ss0. The gate terminals G1 (G2) of the power semiconductor modules 1c and 1d are connected to the gate terminals G0 of the gate drive circuits 2c and 2d via the gate wiring 41, respectively. The gate sense terminals Gs1 (Gs2) of the power semiconductor modules 1c and 1d are connected to the gate sense terminals Gs0 of the gate drive circuits 2c and 2d through the gate wiring 43. Similarly, the gate sense terminals Ss1 (Ss2) of the power semiconductor modules 1c and 1d are connected to the source sense terminals Ss0 of the gate drive circuits 2c and 2d via the gate wiring 42.

<< Effects of the present embodiment >>
According to the present embodiment, by using the power semiconductor modules 1c and 1d and the gate drive circuits 2c and 2d shown in FIG. 6, the gate voltage threshold value detection / determination circuit is compared with the configuration of the first embodiment shown in FIG. It is possible to reduce the high frequency noise component of the Vgs waveform input to the Accordingly, an effect of reducing the number of false detections of threshold determination performed based on the potential difference between the gate terminal G0 and the source sense terminal Ss0 of the gate voltage threshold detection determination circuit built in the gate drive circuits 2c and 2d can be obtained. .

<< Example of the configuration and function of the gate voltage threshold detection circuit >>
FIG. 7 shows a partial circuit configuration of Example 3 which is the third embodiment of the present invention. The present embodiment is an example in which the internal circuit configuration of the gate voltage threshold detection determination circuit 3 of the first embodiment or the second embodiment is embodied, and thus is a modification of the first embodiment or the second embodiment. The second embodiment differs from the first and second embodiments in that the internal circuit configuration of the gate voltage threshold detection determination circuit 3 is embodied, but the other points are the same as the first or second embodiment. The gate voltage threshold detection / determination circuit 3 includes two circuits: a detection / determination circuit 3a that outputs a control signal CNTON for a turn-on gate drive resistor, and a detection / determination circuit 3b that outputs a control signal CNTOFF for a turn-off gate drive resistor. The configuration will be described by taking the threshold detection determination circuit 3a as an example. The gate threshold value generation circuit 101 operates using VGSH and VGSL as power supply voltages, and outputs a detection threshold voltage VGPRgON of a VGS value at a preset turn-on time. The amplifier 103 amplifies the difference voltage between the voltage at the gate terminal G0 and VGPRgON, and the Schmitt trigger type comparator 104 determines the magnitude of the output voltage of the amplifier 103 based on the comparison voltage VCOMP output from the comparison voltage generation circuit 105. Then, a binary high and low voltage signal is generated as an output voltage of the control signal CNTON. This voltage signal serves as a control signal for the resistance switching elements 28 and 29 shown in FIGS. 1 and 6, and for example, the resistance switching elements 28 and 29 are open when the potential is low, and shorted when the potential is high. To achieve. The amplifier control power supply 106 refers to the control signal SIG of the gate drive circuit 2 itself, and the power semiconductor module referring to the gate voltage is a switching period only when the turn-on operation is instructed. The power supply voltage supplied to the comparator 104 is output at a predetermined value, and, for example, a high potential signal can be output by the output of the comparator 104, and control is performed so that the state of the resistance changeover switch element can be changed. On the other hand, except when the power semiconductor module referring to the gate voltage is in a switching period and turn-on operation is instructed, the power supply voltage to the comparator 104 is output at a value lower than a predetermined voltage. The output of the comparator 104 does not depend on the input potential of the comparator 104. For example, only the low potential signal is output to make the state of the resistance switching element unchanged, and the power supply terminal of the gate voltage threshold detection judgment circuit 3 or the gate drive circuit 2 Even when the potential of the signal fluctuates due to noise or the like, it functions to suppress the output of a control signal that causes a malfunction.

  Similar to the threshold detection determination circuit 3a, the threshold detection determination circuit 3b amplifies the difference voltage between the voltage at the gate terminal G0 and VGPRgOFF based on the threshold voltage VGPRgOFF output from the gate threshold generation circuit 102, and the Schmitt trigger type. The comparator 104 determines the magnitude of the output voltage of the amplifier 103 on the basis of the comparison voltage VCOMP output from the comparison voltage generation circuit 105, and generates a binary high and low voltage signal which is an output voltage of the control signal CNTOFF.

  With the configuration of the gate voltage threshold value detection / determination circuit 3 shown in the present embodiment, the value of the gate resistance at turn-on (RgON1 + RgON2 or RgON1) and the value of the gate resistance at turn-off (RgOFF1 + RgOFF2 or RgOFF1) are controlled independently. Thus, the operations described in the first and second embodiments can be realized while maintaining high noise resistance.

<< Example of transient waveform when the present invention is applied >>
The transient response during the switching operation of the circuit of the present invention shown in Examples 1 to 3 is schematically shown in FIG. This is an example of turning on the power semiconductor module 1b of the lower arm of the first embodiment (FIG. 1). The gate-source sense terminal voltage Vgs2 rises at the time t2, similarly to the transient response operation (FIG. 11) of the conventional circuit shown in FIG. At this time, when the element temperature of the power semiconductor module is low temperature (LT), a waveform shown by a dotted line is obtained, and when it is an intermediate temperature (MT), a waveform shown by a solid line. According to the temperature dependence of the gate plateau voltage of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module illustrated in FIG. 13, the gate plateau potential is higher in the low temperature region than in the intermediate temperature region, The gate plateau period itself becomes longer. As described above, in the low temperature region, the difference voltage between the high potential VGSH of the gate driving circuit and Vgs2 during the gate plateau period decreases, and the value of the gate current Ig2 decreases. By adopting the circuit configuration shown in the first to third embodiments, the value of the gate voltage determination threshold value VGPRgON shown in FIG. 2 can be set. The setting range of determination threshold VGPRgON is, as described in the description of FIG. 13, up to the maximum voltage VGP2LT of Vgs2 in the gate plateau period at the low temperature with a potential higher than the gate plateau voltage VGP1MT at the intermediate temperature. The value of VGPRgON is set in the range. At time t3 _MT and t3 _LT , Vgs2 exceeds the threshold value VTH of the SiC-MOSFET type power element, and the source current Is2 starts to flow. Assuming that Vgs2 at time t4 when the source current has increased to the same value as the load current Iload is the gate plateau start voltage VGP1, the value of VGP1 _{MT at} an intermediate temperature with respect to VGP1 _LT at low temperature is VGP1 _MT <VGP1 _LT There is a large and small relationship. In the process of increasing Vgs2 from VGP1 to the gate / plateau end voltage VGP2, according to the present invention, the preset determination threshold VGPRgON is reached (time tx _LT and tx _MT ), and control is performed to reduce the gate resistance value. As shown in the transient response waveform of RgON @ LT in FIG. 2, the resistance value is reduced from the resistance value of RgON1 + RgON2 to only RgON1 at time txLT. In addition, although the delay time accompanying the circuit operation of Example 1 thru | or Example 3 arises in change control of gate resistance value, since the delay time is small with respect to the switching operation | movement of this invention, it omits from description. .

<< Effects of the present embodiment >>
According to this embodiment, the gate current Ig2 increases at time tx _LT due to the change of the value of RgON, and the change rate dVds2 @ LT / dt of Vds2 decreasing from time t4 _LT is more steep change rate dVds2 Change to '@ LT / dt. Due to this action, the time required for turn-on switching can be shortened in the low temperature region, and the effect of reducing the value of the switching loss Eon at the time of turn-on can be obtained. The above describes the effect of the present invention at a low temperature. However, in the case of the intermediate temperature indicated by the solid line in FIG. 2, the change timing at which the gate resistance decreases at the intermediate temperature by the setting of the determination threshold voltage VGPRgON is Time tx _MT . Since the time tx _MT is after the change time t5 _MT of Vds2 at the intermediate temperature has passed, the time when the gate resistance is reduced is outside the period when the switching loss occurs. Therefore, at an intermediate temperature, the switching loss can be maintained at a characteristic equivalent to that of the conventional circuit. In Vds2 in FIG. 2, the effect of the first embodiment is that the slope of the Vds2 voltage drop changes to a steep state at time tx _LT . In the second embodiment, when performing gate resistance control based on Vgs2, when high-frequency noise is superimposed on the transient waveform of Vgs2, the number of malfunction occurrences in gate resistance control is compared with the circuit configuration of the first embodiment. The effect is that it can be reduced.

Similar to the turn-on operation, even in the turn-off operation shown in FIG. 3, the configurations shown in the first to third embodiments can reduce the switching loss when the element temperature is low. In the case of turn-off, the value of the detection threshold voltage VGPRgOFF set in the internal circuit of the gate voltage threshold detection determination circuit 3 shown in the third embodiment is a voltage higher than the gate plateau voltage VGP1 _MT at an intermediate temperature, and at low temperature By setting the voltage lower than VGP2 _LT , the effect of the present invention can be obtained. Due to VGPRgOFF set in the above range, the gate-plateau voltage at low temperature becomes VGPRgOFF or less when the drain-source voltage Vds2 is increasing, the gate voltage threshold detection detection circuit 3 operates, and the gate at turn-on The drive resistance is reduced from (RgOFF1 + RgOFF2) to RgOFF1. By reducing the gate drive resistance, the absolute value of the gate drive current Ig2 is increased, and the charging time of the feedback capacitor Cgd of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module is shortened. Accordingly, the time required for the turn-off operation at a low temperature is shortened, and in particular, the value of the switching loss Eoff at the turn-off can be reduced by shortening the rising time of the voltage Vds2.

Similar to the description of the effect of the present invention at turn-on, the above describes the effect of the present invention on the switching at turn-off at low temperature, but in the case of the intermediate temperature shown by the solid line in FIG. The setting of the threshold voltage VGPRgOFF shows the case where the gate resistance decreases during the switching period also in the case of the intermediate temperature. The change timing of the gate resistance at the intermediate temperature is time tx _MT . Since the time tx _MT is before the change end time t4 _MT of Vds2 at the intermediate temperature, the gate resistance can be reduced and the switching loss can be reduced. By making it possible to individually set the values of VGPRgON and VGPRgOFF, it is possible to separately set the element temperature for obtaining the effect of reducing the switching loss at the time of turn-on and turn-off. In Vds2 in FIG. 3 as well, the slope of the Vds2 voltage drop changes from dVds2 @ LT / dt to a steeper change rate dVds2 '@ LT / dt steeply at time tx _LT . It is. Similar to the turn-on, in the second embodiment, when performing gate resistance control based on Vgs2, when high-frequency noise is superimposed on the transient waveform of Vgs2, gate resistance control is performed with respect to the circuit configuration of the first embodiment. It is advantageous that the number of malfunctions can be reduced.

  Here, using the transient waveform at the time of turn-on (FIG. 4), the operation in the case where the conventional operation and the present invention are applied to the same device temperature is compared. As shown in FIG. 4, by applying the present invention, the absolute value of the gate drive current Ig2 is increased after time txLT to charge the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor device mounted on the power semiconductor module. Time is shortened. The time required for the turn-on operation is shortened. In particular, the value of the switching loss Eon at the turn-on can be reduced by shortening the drop time of the voltage Vds2.

<Example of determining the gate plateau voltage according to the load current value>
FIG. 5 shows the relationship between the effect of the present invention and the load current value Iload according to the fourth embodiment which is the fourth embodiment of the present invention. The description of the present invention described in the first to third embodiments is premised on a constant load current Iload. In an actual power converter, the value of the load current changes depending on the load inductance and the control command of the power semiconductor module that drives the load inductance. The dependency of the element temperature and the switching loss is schematically shown using the load current Iload as a parameter.

  As described above, in Non-Patent Document 2, the relationship between the gate plateau voltage VGP, which is one of the characteristics of the power semiconductor device, and the load current Iload is formulated, and VGP is equal to Iload and VGP ≒ VTH + Iload / It has become clear that it has a relationship of gm. That is, if the threshold voltage VTH and the mutual conductance gm of the SiC-MOSFET type power element are constant, the value of the gate plateau voltage VGP increases or decreases in proportion to the load current Iload. Here, the switching loss itself also depends on the magnitude of the load current Iload, and the switching loss Esw increases as Iload increases.

  The fourth embodiment of the present invention is to determine the value of the determination threshold voltage VGPRg of Vgs based on both the load current Iload and the element temperature. FIG. 5 shows that when the element temperature is an intermediate temperature (TMT), the value of VGPRg is determined under the condition of the load current Iload1.

<< Effects of the present embodiment >>
According to the present embodiment, if the load current is Iload1 by the above setting, the effect of the present invention described in the first to third embodiments can be obtained in the region where the element temperature is lower than TMT. Even in the case of a load current Iload2 smaller than Iload1, the effect of the present invention can be obtained in the region lower than TMT2. The result of Esw being reduced by the effect is shown by a dotted line in FIG. When the load current is a large current indicated by Iload1, the switching loss is reduced from EswLT1 to EswLT1 ′ in the range from the intermediate temperature TMT1 to a low temperature. Even in the case of Iload2 smaller than Iload1, the switching loss can be reduced at a temperature lower than low temperature TMT2 (where TMT2 <TMT1), and decreases to EswLT2 '.

  As described above, the power loss of the power conversion device can be reduced by setting the switching loss reduction effect based on the fluctuation of the VGP voltage due to the load current.

  Further, in the first to fourth embodiments, the present invention is effective in the turn-off operation as well as in the turn-on operation, and the switching loss is reduced even in the turn-on operation or the turn-off operation only. The effect is obtained.

  In addition, the setting value of the detection threshold voltage VGPRg described above is a setting example that is particularly effective for reducing switching loss at low temperatures, and when it is desired to reduce switching losses in a wide range such as low temperature to intermediate temperature. Switching loss can be reduced by appropriately adjusting and setting the value of VGPRg.

1a, 1b: power semiconductor modules 1c, 1d: power semiconductor modules with gate sense terminals 2a, 2b: gate drive circuits 2c, 2d: gate drive circuits connectable to power semiconductor modules with gate sense terminals 3: gate Voltage threshold detection circuit 31-34: Gate drive resistance 41, 42: Gate wiring 51: Power supply 52: Load inductance 101, 102: Gate threshold generation circuit 103: Amplifier 104: Schmitt trigger type comparator 105: Comparison potential generation circuit 106: Amplifier control power supply

Claims (12)

A power conversion device comprising a plurality of power semiconductor modules and a plurality of gate drive circuits,
The plurality of power semiconductor modules have an upper arm power semiconductor and a lower arm power semiconductor integrally in a common module or individually in separate modules,
The power semiconductor of the upper arm and the power semiconductor of the lower arm constitute a half bridge circuit, the drain terminal of the power semiconductor of the upper arm is a high potential terminal, the source terminal of the power semiconductor of the upper arm and the lower semiconductor The drain terminal of the power semiconductor of the arm is commonly connected to the intermediate potential terminal, and the source terminal of the power semiconductor of the lower arm is a low potential terminal,
A gate terminal and a source sense terminal of the power semiconductor of the upper arm and the power semiconductor of the lower arm are respectively connected to the gate drive circuit for the upper arm and the gate for the lower arm via a gate wiring and a source sense wiring. Connected to the drive circuit,
Each of the plurality of gate drive circuits is
A gate drive terminal for outputting a gate drive voltage;
A source sense drive terminal for outputting a reference potential of the potential of the gate drive terminal;
A first power supply terminal to which a high potential side potential constituting the gate drive voltage is applied;
A second power supply terminal to which a low potential side potential forming the gate drive voltage is applied;
A drive control signal terminal for controlling the gate drive voltage;
A gate voltage threshold value detection determination circuit;
Two or more gate resistance switching circuits including a first gate resistance switching circuit and a second gate resistance switching circuit;
A turn-on gate resistor connected to the first gate resistor switching circuit and having a variable resistance function;
A turn-off gate resistor connected to the second gate resistor switching circuit and having a variable resistance function;
The gate voltage threshold detection determination circuit
A first input terminal for inputting a gate voltage of the power semiconductor, and a second input terminal for inputting a source voltage of the power semiconductor;
The second input terminal is connected to the source sense drive terminal;
The first power supply terminal of the gate voltage threshold detection detection circuit and the second power supply terminal of the gate drive circuit are connected to the first power supply terminal of the gate drive circuit and the second power supply terminal of the gate drive circuit, respectively. The power terminal is connected,
A control reference signal terminal is connected to the drive control signal terminal of the gate drive circuit,
A first output terminal is connected to a control signal terminal of the first gate resistance switching circuit;
A second output terminal is connected to the control signal terminal of the second gate resistance switching circuit;
A control signal terminal of the first gate resistance switching circuit based on a voltage between input terminals, which is a potential difference between the first input terminal and the second input terminal, and a potential of the control reference signal terminal; A power conversion device characterized by giving a switching instruction of a value of gate resistance to at least one of control signal terminals of the second gate resistance switching circuit. In the power converter according to claim 1,
The power conversion device according to claim 1, wherein the first input terminal of the gate voltage threshold detection determination circuit is connected to the gate drive terminal. The power conversion device according to claim 2,
At least one of the power semiconductors is a SiC-MOSFET type power semiconductor element,
The drain of one or more of the SiC-MOSFET type power semiconductor devices connected in parallel is used as the drain terminal of the power semiconductor module,
A power converter characterized in that a source of the SiC-MOSFET type power semiconductor element is a source terminal and a source sense terminal of the power semiconductor module. In the power converter according to claim 1,
Each of the plurality of gate drive circuits further comprises a gate voltage sense terminal for detecting a gate voltage of the power semiconductor module,
The power conversion device according to claim 1, wherein the first input terminal of the gate voltage threshold detection determination circuit is connected to the gate voltage sense terminal. The power conversion device according to claim 4,
At least one of the power semiconductors is a SiC-MOSFET type power semiconductor element,
The drain of one or more of the SiC-MOSFET type power semiconductor devices connected in parallel is used as the drain terminal of the power semiconductor module,
The source of the SiC-MOSFET type power semiconductor element is a source terminal and a source sense terminal of the power semiconductor module,
The gate of the SiC-MOSFET type power semiconductor element is a gate drive terminal of the power semiconductor module,
The gate is connected to a first terminal of a first resistor, a second terminal of the first resistor is connected to a first terminal of a first capacitor, and a second terminal of the first capacitor Is connected to the source sense terminal or the source terminal, and the second terminal of the first resistor is a gate sense terminal of the power semiconductor module. In the power converter according to claim 1,
The gate voltage threshold detection determination circuit
A first threshold voltage detection circuit including a first gate voltage threshold voltage generation circuit, a first gate voltage detection circuit, a first gate voltage judgment circuit, and a first gate voltage detection circuit control power supply;
A second gate voltage threshold generation circuit; a second gate voltage detection circuit; a second gate voltage determination circuit; and a second threshold voltage detection determination circuit having a second gate voltage detection circuit control power supply. Consists of
The first gate voltage detection circuit includes a first input terminal of the gate voltage threshold value detection determination circuit and a preset first value based on the potential of the second input terminal of the gate voltage threshold value detection determination circuit. A potential difference obtained by amplifying the potential difference with the output terminal of the first gate voltage threshold value generation circuit that outputs the element temperature determination threshold value is output to the output terminal;
The first gate voltage determination circuit compares the output voltage of the first gate voltage detection circuit with a comparison voltage, and outputs a switching signal of the first gate resistance switching circuit.
The first gate voltage detection circuit control power supply controls a power supply potential supplied to the first gate voltage determination circuit, and a switching control signal input to the control reference signal terminal of the gate voltage threshold detection determination circuit is used. Reference is made to control to output the output potential of the first gate voltage determination circuit when a turn-on instruction is given,
The second gate voltage detection circuit has a first input terminal of the gate voltage threshold value detection determination circuit and a preset second value based on the potential of the second input terminal of the gate voltage threshold value detection determination circuit. A potential difference obtained by amplifying a potential difference with the output terminal of the second gate voltage threshold generation circuit that outputs the element temperature determination threshold is output to the output terminal;
The second gate voltage determination circuit compares the output voltage of the second gate voltage detection circuit with a comparison voltage, and outputs a switching signal of the second gate resistance switching circuit.
The second gate voltage detection circuit control power supply controls a power supply potential supplied to the second gate voltage determination circuit, and a switching control signal input to the control reference signal terminal of the gate voltage threshold detection determination circuit is used. A power conversion apparatus characterized by performing control to output an output potential of the second gate voltage determination circuit when a turn-off instruction is performed with reference. The power conversion device according to claim 6, wherein
The power semiconductor module is configured to perform a switching operation on an inductive load;
The power semiconductor when the predetermined load current is I, the threshold value including the element temperature (T) dependence of the power semiconductor module is VTH (T), and the voltage between the drain terminal and the source terminal of the power semiconductor module is the on-voltage The transconductance of the module is gm (VON), and the gate plateau voltage VGP2 is VGP2 = VTH (T) + I / gm (VON)
If
Potential difference between the element temperature determination threshold voltage output from the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit Is set to the VGP2 or lower. The power conversion device according to claim 7,
When the voltage between the drain terminal and the source terminal of the power semiconductor module is equal to the power supply voltage (Vcc) of the power converter, the mutual conductance of the power semiconductor module at the on voltage is gm (Vcc), and the gate plateau voltage VGP1. VGP1 = VTH (T) + I / gm (Vcc)
If
Potential difference between the element temperature determination threshold voltage output from the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit Is set to VGP1 or higher. The power conversion device according to claim 8, wherein
The gate plateau voltage VGP2 _LT when the element temperature T defining the gate plateau voltage VGP2 is the temperature T _L at a low temperature is VGP2 _LT = VTH ( _TL ) + I / gm (VON)
If
Potential difference between the element temperature determination threshold voltage output from the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit Is set to be equal to or less than the VGP2 _LT . The power conversion device according to claim 9, wherein
The gate plateau voltage gate plateau voltage when the element temperature T that define VGP1 is at a temperature T _M at intermediate temperature VGP1 _MT to _{VGP1 MT = VTH (T M)} + I / gm (VON)
If
Potential difference between the element temperature determination threshold voltage output from the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit Is set to the VGP1 _MT or more. The power conversion device according to claim 10,
The low temperature T _L that defines the gate plateau voltage VGP2 _LT is −25 ° C.
The temperature T _M at the intermediate temperature defining the gate plateau voltage VGP1 _MT is set to + 25 ° C.
Power converter characterized in that. The power conversion device according to claim 11,
A power converter characterized in that the gate plateau voltage VGP1 and the gate plateau voltage VGP2 are determined according to a predetermined load current I.

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