JP2019125789A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having good electrical characteristics and high productivity and a method for manufacturing the same. A transistor 100 has a conductive layer 106 between a substrate 102 and an insulating layer 104. The conductive layer 106 has a portion that overlaps with the semiconductor layer 108 via the insulating layer 104. The conductive layer 106 has a function as a first gate electrode, and the conductive layer 112 has a function as a second gate electrode. Further, a part of the insulating layer 104 functions as a first gate insulating layer, and a part of the insulating layer 110 functions as a second gate insulating layer. The entire semiconductor layer 108 in the channel width direction is covered with the conductive layers 112 and 106 via the insulating layers 110 and 104. With such a configuration, the semiconductor layer 108 can be electrically surrounded by the electric field generated by the pair of gate electrodes. [Selection diagram] Fig. 2

Description

One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. In particular, one embodiment of the present invention relates to a semiconductor device including an oxide semiconductor film and a method for manufacturing the semiconductor device.

Note that one embodiment of the present invention is not limited to the above technical field. Semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, and driving methods thereof are given as technical fields of one embodiment of the present invention disclosed in this specification and the like Or their production methods can be mentioned as an example.

Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A transistor, a semiconductor circuit, an arithmetic device, a memory device, and the like are one embodiment of a semiconductor device. In addition, an imaging device, an electro-optical device, a power generation device (including a thin film solar cell, an organic thin film solar cell, and the like), and an electronic device may include a semiconductor device.

Oxide semiconductors have attracted attention as semiconductor materials applicable to transistors. For example, in Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers,
The field effect mobility (simply mobility or μFE) can be obtained by the oxide semiconductor layer to be a channel contains indium and gallium and the proportion of indium is larger than the proportion of gallium.
Semiconductor devices are disclosed.

JP, 2014-7399, A

An object of one embodiment of the present invention is to provide a semiconductor device with favorable electrical characteristics. Another object is to provide a semiconductor device with stable electrical characteristics. Another object is to provide a method for manufacturing a semiconductor device with high productivity. Another object is to reduce the temperature of a manufacturing process of a semiconductor device. Another object is to provide a method for manufacturing a semiconductor device with high yield. Another object is to provide a semiconductor device using a flexible substrate.

Note that the descriptions of these objects do not disturb the existence of other objects. One aspect of the present invention is not required to solve all of these problems. In addition, problems other than the above can be extracted from the description of the specification and the like.

One embodiment of the present invention is a method for manufacturing a semiconductor device, which includes a first step of forming an island-shaped oxide semiconductor layer over a first insulating film, and a second insulating layer covering the oxide semiconductor layer. A second step of forming a film, a third step of forming a third insulating film on the second insulating film, and a first step of forming the third insulating film on the third insulating film
And forming a first conductive film, a third insulating film, and a second insulating film into an island shape, and exposing a portion of the oxide semiconductor layer. And a sixth step of forming a fourth insulating film in contact with the exposed portion of the oxide semiconductor layer; and a seventh step of performing a first heat treatment. The first to seventh steps are performed in this order. The first conductive film also contains a metal or an alloy. The first insulating film and the second insulating film each contain oxygen. The third insulating film contains metal and oxygen. The fourth insulating film contains nitrogen.

Further, in the above, between the second step and the third step, an eighth step of forming a second conductive film on the second insulating film, and a second step via the second conductive film. It is preferable to have a ninth step of supplying oxygen to the second insulating film and a tenth step of removing the second conductive film.

In the above, in the ninth step, oxygen plasma treatment is preferably performed in a state where a bias voltage is applied between the pair of electrodes using a device having a pair of parallel plate electrodes.

In the above, the third insulating film preferably contains aluminum or hafnium and oxygen.

In the above, the third insulating film is preferably formed by a sputtering method in an atmosphere containing oxygen.

In the above, it is preferable to have an eleventh step of performing oxygen plasma treatment on the first insulating film before the first step.

Another embodiment of the present invention is a semiconductor device including a first insulating film, a second insulating film, a third insulating film, a fourth insulating film, a semiconductor layer, and a first conductive layer. is there. The semiconductor layer is provided on the first insulating film. The second insulating film, the third insulating film, and the first conductive layer are stacked on the semiconductor layer in this order, and the top shapes thereof substantially match. The fourth insulating film is
The semiconductor layer, the second insulating film, the third insulating film, and the first conductive layer are provided to be in contact with a part of the semiconductor layer which does not overlap with the first conductive layer. The semiconductor layers are indium, gallium,
Contains zinc and oxygen. The first conductive layer comprises a metal or an alloy. The first insulating film and the second insulating film contain oxygen. The third insulating film contains metal and oxygen. The fourth insulating film contains hydrogen and nitrogen.

In the above, the second insulating film preferably contains aluminum or hafnium.

In the above, in the semiconductor layer, the atomic ratio of indium, gallium, and zinc is 5
It is preferable to have a region that is 1: 6 or its vicinity.

In the above, it is preferable that the second conductive layer be provided below the first insulating film, and the second conductive layer have a portion overlapping with the semiconductor layer.

In the above, the first insulating film is preferably provided over the layer containing an organic compound.

According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. Alternatively, a semiconductor device with stable electrical characteristics can be provided. Alternatively, a method for manufacturing a semiconductor device with high productivity can be provided. Alternatively, the temperature of the manufacturing process of the semiconductor device can be lowered. Alternatively, a method for manufacturing a semiconductor device with high yield can be provided. Alternatively, a semiconductor device using a flexible substrate can be provided.

Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these can be extracted from the description of the specification, drawings, claims and the like.

Configuration example of a transistor. Configuration example of a transistor. 7A to 7D illustrate an example of a method for manufacturing a transistor. 7A to 7D illustrate an example of a method for manufacturing a transistor. 7A to 7D illustrate an example of a method for manufacturing a transistor. 7A to 7D illustrate an example of a method for manufacturing a transistor. Configuration example of a transistor. Configuration example of a transistor. Configuration example of a transistor. Configuration example of a transistor. FIG. FIG. 2 is a cross-sectional view of a display device. FIG. 2 is a cross-sectional view of a display device. FIG. 2 is a cross-sectional view of a display device. FIG. 2 is a cross-sectional view of a display device. FIG. 2 is a cross-sectional view of a display device. FIG. 18 is a block diagram and a circuit diagram of a display device. FIG. 14 is a block diagram of a display device. Configuration example of display module. Configuration example of an electronic device. Configuration example of an electronic device. Configuration example of an electronic device. The structural example of a television apparatus. Electrical characteristics of the transistor.

Hereinafter, embodiments will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be practiced in many different aspects and that the form and details can be variously changed without departing from the spirit and scope thereof . Therefore, the present invention should not be construed as being limited to the description of the embodiments below.

Also, in the drawings, the size, layer thicknesses, or areas may be exaggerated for clarity. Therefore, it is not necessarily limited to the scale. The drawings schematically show ideal examples, and are not limited to the shapes or values shown in the drawings.

In addition, the ordinal numbers “first”, “second”, and “third” used in the present specification are given to avoid confusion of the constituent elements, and are not limited numerically. I will add it.

Further, in the present specification, the terms indicating the arrangement such as “above” and “below” are used for the sake of convenience to explain the positional relationship between the components with reference to the drawings. In addition, the positional relationship between the components is appropriately changed in accordance with the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification, and can be appropriately rephrased depending on the situation.

Further, in this specification and the like, a transistor is an element having at least three terminals of a gate, a drain, and a source. A channel region is provided between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and a current is generated between the source and the drain through the channel formation region. Can flow In the present specification and the like, a channel region refers to a region through which current mainly flows.

In addition, the functions of the source and the drain may be switched when adopting transistors of different polarities or when the direction of current changes in circuit operation. Therefore, in this specification and the like, the terms “source” and “drain” can be used interchangeably.

Further, in the present specification and the like, the term "electrically connected" includes the case where they are connected via "something having an electrical function". Here, the “thing having an electrical function” is not particularly limited as long as it can transmit and receive electrical signals between connection targets. For example, “those having some electrical action” include electrodes, wirings, switching elements such as transistors, resistance elements, inductors, capacitors, elements having various other functions, and the like.

Moreover, in this specification etc., the "parallel" means the state by which two straight lines are arrange | positioned by the angle of -10 degrees or more and 10 degrees or less. Therefore, the case of -5 degrees or more and 5 degrees or less is also included. Also, "vertical" means that two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, the case of 85 degrees or more and 95 degrees or less is also included.

In the present specification and the like, the term "membrane" and the term "layer" can be interchanged with each other. For example, it may be possible to change the term "conductive layer" to the term "conductive film". Or, for example, the term "insulating film" is referred to as "insulating layer"
It may be possible to change to the term.

In the present specification and the like, an off-state current is a drain current when the transistor is in an off state (also referred to as a non-conduction state or a cutoff state) unless otherwise specified. In the off state, unless otherwise noted, in the n-channel transistor, the voltage V between the gate and the source is
In the p-channel transistor, the voltage Vgs between the gate and the source is higher than the threshold voltage Vth in the state where gs is lower than the threshold voltage Vth. For example, the off-state current of an n-channel transistor means that the voltage Vgs between the gate and the source is equal to the threshold voltage Vt.
It may say the drain current when it is lower than h.

The off current of the transistor may depend on Vgs. Therefore, that the off-state current of the transistor is less than or equal to I may mean that there is a value of Vgs at which the off-state current of the transistor is less than or equal to I. The off-state current of the transistor may refer to the off-state current in the off state at the given Vgs, the off state at the Vgs in the given range, or the off state at the Vgs at which a sufficiently reduced off current is obtained.

As an example, the threshold voltage Vth is 0.5 V, the drain current at Vgs of 0.5 V is 1 × 10 ⁻⁹ A, and the drain current at Vgs of 0.1 V is 1 × 10 ^−1
3 A, drain current at Vgs of −0.5 V is 1 × 10 ⁻¹⁹ A, V g is
Assume an n-channel transistor such that the drain current at s of -0.8 V is 1 x 10 ^-22 A. Since the drain current of the transistor is 1 × 10 ⁻¹⁹ A or less at Vgs of −0.5 V or Vgs in the range of −0.5 V to −0.8 V, the off current of the transistor is 1 It may be said that x 10 ^-19 A or less. Since Vgs in which the drain current of the transistor is 1 × 10 ⁻²² A or less exists, it may be said that the off-state current of the transistor is 1 × 10 ⁻²² A or less.

Further, in this specification and the like, the off-state current of a transistor having a channel width W may be expressed by a current value flowing around the channel width W. Also, it may be represented by a current value flowing around a predetermined channel width (for example, 1 μm). In the latter case, the unit of the off current may be represented by a unit having a dimension of current / length (for example, A / μm).

The off current of the transistor may depend on temperature. In the present specification, the off current may represent an off current at room temperature, 60 ° C., 85 ° C., 95 ° C., or 125 ° C., unless otherwise specified. Alternatively, at a temperature at which the reliability of a semiconductor device or the like including the transistor is ensured, or at a temperature at which a semiconductor device or the like including the transistor is used (for example, any one of 5 ° C. to 35 ° C.). It may represent an off current. The off-state current of the transistor is less than or equal to I: room temperature, 60 ° C., 85 ° C., 95 ° C., 125 ° C.,
The temperature of the transistor at which the reliability of the semiconductor device including the transistor is ensured, or the temperature at which the semiconductor device or the like including the transistor is used (for example, any one temperature of 5.degree. C. to 35.degree. C.) It may indicate that there is a value of Vgs at which the off current is less than or equal to I.

The off current of the transistor may depend on the voltage Vds between the drain and the source. In the present specification, the off current is 0.1 V, 0.8 V, Vds, unless otherwise specified.
It may represent an off current at 1 V, 1.2 V, 1.8 V, 2.5 V, 3 V, 3.3 V, 10 V, 12 V, 16 V, or 20 V. Alternatively, Vds may represent an off current in Vds for which reliability of a semiconductor device or the like including the transistor is ensured, or Vds used in a semiconductor device or the like including the transistor. The off-state current of the transistor is less than or equal to I if Vds is 0.1 V, 0.8 V, 1 V, 1.2 V, 1.8 V,
2.5 V, 3 V, 3.3 V, 10 V, 12 V, 16 V, 20 V, Vds in which the reliability of a semiconductor device including the transistor is ensured, or Vds used in a semiconductor device including the transistor, The off-state current of the transistor at
It may indicate that the value of gs exists.

In the above description of the off current, the drain may be read as a source. That is, the off current may refer to the current flowing through the source when the transistor is in the off state.

In the present specification and the like, a leak current may be described in the same meaning as an off current. Further, in this specification and the like, an off-state current may indicate a current flowing between a source and a drain, for example, when the transistor is in the off state.

Further, in this specification and the like, the threshold voltage of a transistor refers to the gate voltage (Vg) when a channel is formed in the transistor. Specifically, the threshold voltage of a transistor is the maximum slope in a curve (Vg-√Id characteristic) in which the gate voltage (Vg) is plotted on the horizontal axis and the square root of the drain current (Id) is plotted on the vertical axis. Gate voltage (Vg) at the intersection of a straight line obtained by extrapolating a certain tangent line and the square root of the drain current (Id) 0 (Id is 0A)
It may point to). Alternatively, with respect to the threshold voltage of a transistor, a gate having a channel length of L and a channel width of W and a value of Id [A] × L [μm] / W [μm] of 1 × 10 ⁻⁹ [A] It may indicate voltage (Vg).

In the present specification and the like, even when it is described as "semiconductor", for example, when the conductivity is sufficiently low, it may have characteristics as an "insulator". In addition, "semiconductor" and "
In some cases, the boundaries are vague and indistinguishable from “insulator”. Therefore, the “semiconductor” and the “insulator” described in the present specification and the like may be paraphrased in some cases.

In the present specification and the like, even when the term "semiconductor" is used, for example, when the conductivity is sufficiently high, it may have characteristics as a "conductor". In addition, "semiconductor" and "
The boundary may be vague and indistinguishable from "conductor". Therefore, the “semiconductor” and the “conductor” described in the present specification and the like may sometimes be paraphrased to each other.

In the present specification and the like, In: Ga: Zn = 4: 2: 3 or its vicinity is the sum of the number of atoms, and when In is 4, Ga is 1 or more and 3 or less (1 ≦ Ga ≦ 3) and Zn
Is 2 or more and 4 or less (2 ≦ Zn ≦ 4). Further, with In: Ga: Zn = 5: 1: 6 or its vicinity, when In is 5 with respect to the total number of atoms, Ga is greater than 0.1 and is 2 or less (
0.1 <Ga ≦ 2), and Zn is 5 or more and 7 or less (5 ≦ Zn ≦ 7). Also In:
Ga: Zn = 1: 1: 1 or its vicinity means that when In is 1 with respect to the total number of atoms,
Ga is more than 0.1 and 2 or less (0.1 <Ga ≦ 2), Zn is more than 0.1 and 2
It is set as the following (0.1 <Zn <= 2).

In the present specification and the like, a metal oxide is a metal oxide in a broad expression. A metal oxide is an oxide insulator, an oxide conductor (including a transparent oxide conductor), an oxide semiconductor (also referred to as an oxide semiconductor or simply OS).
And so on. For example, in the case where a metal oxide is used for the active layer of the transistor, the metal oxide may be referred to as an oxide semiconductor. That is, in the case where the metal oxide has at least one of an amplification action, a rectification action, and a switching action, the metal oxide can be called a metal oxide semiconductor, which is abbreviated as OS. In the case of describing an OS FET, the transistor can be put in another way as a transistor including a metal oxide or an oxide semiconductor.

In the present specification and the like, metal oxides having nitrogen are also metal oxides (metal ox
Sometimes referred to as ide). In addition, metal oxides having nitrogen, metal oxynitrides (me
It may be called tal oxynitride).

In the present specification, etc., CAAC (c-axis aligned crysta
l) and CAC (Cloud-Aligned Composite) may be described. Note that CAAC represents an example of a crystal structure, and CAC represents an example of a function or a structure of a material.

Further, in this specification and the like, CAC-OS or CAC-metal oxide has a conductive function in a part of the material and an insulating function in a part of the material, and the entire material is a semiconductor. Have the function of CAC-OS or CAC-metal oxi
In the case where de is used for the active layer of the transistor, the conductive function is a function of flowing electrons (or holes) serving as carriers, and the insulating function is a function which does not flow electrons serving as carriers. CAC-OS or CAC-metal has a function of switching (On / Off) function by causing the conductive function and the insulating function to be complementary to each other.
It can be applied to oxide. CAC-OS or CAC-metal oxi
In de, by separating each function, both functions can be maximized.

In the present specification and the like, CAC-OS or CAC-metal oxide is
It has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, in the material, the conductive region and the insulating region may be separated at the nanoparticle level. In addition, the conductive region and the insulating region may be unevenly distributed in the material. In addition, the conductive region may be observed as connected in a cloud shape with a blurred periphery.

In the case of CAC-OS or CAC-metal oxide, a conductive region, and
The insulating regions are each 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 n
It may be dispersed in the material at a size of m or less.

Further, CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal ox
The ide is composed of a component having a wide gap resulting from the insulating region and a component having a narrow gap resulting from the conductive region. In the case of this configuration, when the carrier flows, the carrier mainly flows in the component having the narrow gap. In addition, the component having the narrow gap acts complementarily to the component having the wide gap, and the carrier also flows to the component having the wide gap in conjunction with the component having the narrow gap. Therefore, when the above-described CAC-OS or CAC-metal oxide is used for the channel region of a transistor, high current driving force, that is, high on current, and high field effect mobility can be obtained in the on state of the transistor.

That is, CAC-OS or CAC-metal oxide is a matrix composite (matrix composite), or a metal matrix composite (metal)
It can also be called matrix composite).

An example of the crystal structure of the metal oxide is described. Note that, in the following, an example of a metal oxide film formed by a sputtering method using an In—Ga—Zn oxide target (In: Ga: Zn = 4: 2: 4.1 [atomic number ratio]) Explain as. A metal oxide formed by sputtering at a substrate temperature of 100 ° C. or more and 130 ° C. or less using the above target is referred to as sIGZO and a substrate temperature of room temperature (RT) using the above target.
A metal oxide formed by sputtering is called tIGZO. For example, sIGZ
O has a crystal structure of either nc (nano crystal) or CAAC or both. In addition, tIGZO has a nc crystal structure. In addition, room temperature said here (
R. T. ) Includes the temperature when the substrate is not intentionally heated. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without orientation in the a-b plane.

In this specification and the like, a display panel which is one mode of a display device has a function of displaying (outputting) an image or the like on a display surface. Thus, the display panel is an aspect of the output device.

Further, in the present specification and the like, a substrate of the display panel is
inted Circuit) or TCP (Tape Carrier Packa)
COG (Chip On) to which a connector such as ge) is attached or a substrate
A device in which an IC is mounted by a glass method or the like may be referred to as a display panel module, a display module, or simply a display panel or the like.

In the present specification and the like, the touch sensor is touched by an object such as a finger or a stylus.
It has a function of detecting pressing or approaching. Moreover, you may have the function to detect the positional information. Thus, the touch sensor is an aspect of the input device. For example, the touch sensor can be configured to have one or more sensor elements.

Further, in this specification and the like, a substrate having a touch sensor may be referred to as a touch sensor panel or simply a touch sensor or the like. Further, in this specification and the like, a touch sensor panel module, a touch sensor in which a connector such as FPC or TCP is attached to a substrate of a touch sensor panel, or a IC in which an IC is mounted by a COG method or the like on a substrate is used. It may be called a module, a sensor module, or simply a touch sensor or the like.

In this specification and the like, a touch panel which is an aspect of a display device has a function of displaying (outputting) an image or the like on a display surface and a touch or a detection object such as a finger or a stylus on the display surface.
And a function as a touch sensor that detects approaching or the like. Therefore, the touch panel is an aspect of the input / output device.

The touch panel can also be called, for example, a display panel with a touch sensor (or a display device) or a display panel with a touch sensor function (or a display device).

The touch panel can also be configured to have a display panel and a touch sensor panel. Alternatively, the inside or the surface of the display panel may have a function as a touch sensor.

Further, in the present specification and the like, a touch panel with a connector such as FPC or TCP attached thereto, or a substrate with an IC mounted by a COG method, etc., is a touch panel module, a display module, or simply a touch panel. It may be called etc.

Embodiment 1
In this embodiment, a method for manufacturing a semiconductor device of one embodiment of the present invention and a structure of a semiconductor device that can be manufactured by the method will be described.

One embodiment of the present invention is a method for manufacturing a transistor including a semiconductor layer in which a channel is formed, a gate insulating layer over the semiconductor layer, and a gate electrode over the gate insulating layer over a formation surface. The semiconductor layer is configured to include a metal oxide exhibiting semiconductor characteristics (hereinafter, also referred to as an oxide semiconductor). In addition, the gate insulating layer contains an oxide.

When many oxygen vacancies exist in the oxide semiconductor, the density of defect states in the oxide semiconductor increases, which adversely affects the electrical characteristics of the transistor. Furthermore, oxygen vacancies in oxide semiconductors are
It may act as a hydrogen source in the film by acting on hydrogen atoms in the film. Therefore, a transistor with excellent electrical characteristics can be realized by introducing a sufficient amount of oxygen into the semiconductor film and reducing oxygen vacancies in a manufacturing process of the transistor.

As a method of reducing oxygen vacancies in a semiconductor film, an oxide film which can release oxygen by heating is disposed in the vicinity of the semiconductor film and heat treatment is performed to transmit oxygen from the oxide film to the semiconductor film. The method of supply can be used. At this time, as the temperature of the heat treatment is higher, more oxygen can be supplied to the semiconductor film.

Further, more oxygen can be supplied to the semiconductor film by adding much oxygen to the insulating film which functions as a gate insulating layer over the semiconductor film.

Therefore, in one embodiment of the present invention, the following process is performed as a process for supplying oxygen to the gate insulating layer.

First, an insulating film containing an oxide is formed over the semiconductor layer as a gate insulating layer. Then, a metal oxide film is formed to cover the insulating film. The metal oxide film is formed, for example, by sputtering under an atmosphere containing oxygen. Thus, oxygen can be supplied to the insulating film at the time of forming the metal oxide film.

Here, as the metal oxide film, an insulating film in which oxygen is less likely to be diffused than silicon oxide is preferably used. In particular, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (also referred to as hafnium aluminate), or the like is preferably used. Thus, oxygen in the insulating film can be effectively prevented from diffusing to the outside due to heat or the like applied when forming the metal oxide film. As a result, after the metal oxide film is formed, an extremely large amount of oxygen can be contained in the insulating film.

The higher the ratio (oxygen flow rate ratio) of the oxygen flow rate to the total flow rate of the film forming gas introduced into the film forming chamber of the film forming apparatus, the metal oxide film can increase oxygen taken into the insulating film. For example, the oxygen flow rate ratio when the total flow rate of the film forming gas is 100%, or the oxygen partial pressure in the film forming chamber is 20% to 100%, preferably 30% to 100%, and more preferably 40%.
It is more than 100%, preferably more than 50% and less than 100%.

Further, in the case where the metal oxide film has an insulating property, the metal oxide film functions as part of the gate insulating layer. At this time, it is preferable to use a material having a dielectric constant higher than that of silicon oxide for the metal oxide film because the gate voltage can be lowered. Note that in the case where the metal oxide film has conductivity, the metal oxide film functions as part of the gate electrode.

Further, prior to depositing the metal oxide film, the following process may be performed to supply oxygen to the insulating film which functions as a gate insulating layer.

First, an extremely thin conductive film is formed on the insulating film. Then, oxygen is supplied to the insulating film through the conductive film. At this time, the conductive film is processed during the process of supplying oxygen to the insulating film,
It functions as a cap film which prevents oxygen from being released from the insulating film. Accordingly, a large amount of excess oxygen in the insulating film can be contained.

As a process for supplying oxygen into the insulating film through the conductive film, plasma treatment in an oxygen atmosphere (also referred to as oxygen plasma treatment) is preferably used. At this time, it is preferable to perform plasma treatment in a state where a bias voltage is applied between the pair of electrodes, using a processing device having a pair of parallel plate electrodes as the processing device. By providing the conductive film over the insulating film, oxygen can be more efficiently supplied.

Note that the method of supplying oxygen is not limited to this. For example, oxygen may be supplied to the insulating film through the conductive film by an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like. At this time, the conductive film can function as a relaxation layer which relieves damage to the insulating film.

Note that the conductive film is preferably removed after the treatment. When the conductive film is insulated by oxygen plasma treatment, the conductive film can function as part of the gate insulating layer without being removed. However, particularly when a metal is used as the conductive film, the conductive film may be embrittled due to insufficient insulation or treatment, so it is preferable to remove the conductive film.

In addition, it is preferable to use a conductive material containing a metal or an alloy for the gate electrode of the transistor. Accordingly, resistance of a gate electrode and a wiring formed using the same conductive film as that of the gate electrode can be reduced, and parasitic resistance of a circuit including a transistor can be reduced.

On the other hand, when a conductive film containing a metal or an alloy is provided in contact with an insulating film which easily releases oxygen, oxygen in the insulating film may diffuse into the conductive film. Therefore, when the semiconductor layer, the gate insulating layer, and the gate electrode containing a metal or an alloy are stacked, part of oxygen released from the gate insulating layer is diffused to the gate electrode side. The amount of oxygen that diffuses into the layer may be reduced. In addition, oxidation of the gate electrode may increase the electrical resistance.

However, in one embodiment of the present invention, a metal oxide film to which oxygen is not easily diffused can be held between a gate insulating layer supplied with a large amount of oxygen and a gate electrode containing a metal or an alloy. . Thus, diffusion of oxygen released from the gate insulating layer to the gate electrode side is suppressed, and most of the diffusion can be supplied to the semiconductor layer. Therefore, an extremely large amount of oxygen can be supplied to the semiconductor layer. As a result, even in the case of using a material in which an oxygen vacancy is easily generated in the semiconductor layer, a transistor having high reliability and high stability can be realized.

A metal oxide that can be used for the semiconductor layer can be formed by a sputtering method or the like, and thus can be used for a semiconductor layer of a transistor included in a large display device. Further, a transistor using a metal oxide can be manufactured by improving and utilizing a part of production equipment of a transistor using amorphous silicon. Therefore, new capital investment can be suppressed. In addition, since a transistor using a metal oxide has high field effect mobility,
A high-performance display device in which a drive circuit is integrally formed can be realized.

  Hereinafter, more specific examples will be described with reference to the drawings.

[Configuration Example 1]
First, structural examples of a transistor that can be manufactured by the method for manufacturing a semiconductor device of one embodiment of the present invention will be described.

1A is a top view of the transistor 100A, FIG. 1B corresponds to a cross-sectional view of a cross section taken along dashed-dotted line A1-A2 shown in FIG. 1A, and FIG. 1A corresponds to a cross-sectional view taken along a dashed-dotted line B1-B2 shown in FIG. In FIG. 1 (A),
Some components (such as a gate insulating layer) of the transistor 100A are omitted in the drawing. In addition, the direction of the dashed-dotted line A1-A2 may be referred to as a channel length direction, and the direction of the dashed-dotted line B1-B2 may be referred to as a channel width direction. In the top view of the transistor, as in FIG. 1A, some of the components may be omitted and illustrated in the following drawings.

The transistors 100A illustrated in FIGS. 1A, 1B, and 1C are so-called top gate transistors.

The transistor 100A includes the insulating layer 104 over the substrate 102, the semiconductor layer 108 over the insulating layer 104, the insulating layer 110 over the semiconductor layer 108, the metal oxide layer 114 over the insulating layer 110, and the metal oxide layer 114. The conductive layer 112 includes the above conductive layer 112, the insulating layer 104, the semiconductor layer 108, and the insulating layer 116 over the conductive layer 112. The portion of the semiconductor layer 108 overlapping with the conductive layer 112 functions as a channel formation region.

The semiconductor layer 108 preferably contains a metal oxide. In particular, the semiconductor layer 108 is
And M (M is gallium, aluminum, silicon, boron, yttrium, tin, copper,
It is preferable to have Zn and one or more selected from vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium) and Zn. In particular, M is preferably Al, Ga, Y or Sn.

The semiconductor layer 108 preferably includes a region in which the atomic ratio of In is larger than the atomic ratio of M. As the atomic ratio of In is larger, the field-effect mobility of the transistor can be improved.

Here, in the case of a metal oxide containing In, Ga, and Zn, the bonding force between In and oxygen is weaker than the bonding force between Ga and oxygen, and therefore, when the atomic ratio of In is large, the metal oxide film There is a tendency for oxygen deficiency to form. In addition, the same tendency is obtained when the metal element indicated by M is used instead of Ga. When many oxygen vacancies are present in the metal oxide film, the electrical characteristics of the transistor and the reliability thereof are degraded.

However, in one embodiment of the present invention, a very large amount of oxygen can be supplied to the semiconductor layer 108 including a metal oxide; therefore, a metal oxide material with a large atomic ratio of In can be used. Thus, a transistor having extremely high field effect mobility, stable electrical characteristics, and high reliability can be realized.

For example, a metal oxide in which the atomic ratio of In is at least 1.5 times, at least 2 times, at least 3 times, at least 3.5 times, or at least 4 times the atomic ratio of M It can be used suitably.

In particular, the ratio of the number of In, M, and Zn in the semiconductor layer 108 is expressed as In: M: Zn = 5: 1.
: 6 or its vicinity is preferable. Here, in the vicinity, when In is 5, M is 0..
5 or more and 1.5 or less, and Zn is 5 or more and 7 or less.

Note that the semiconductor layer 108 is not limited to the above composition. For example, In of the semiconductor layer 108
Preferably, the ratio of the number of atoms of M, M, and Zn is In: M: Zn = 4: 2: 3 or near.

In addition, as the composition of the semiconductor layer 108, the ratio of the number of In, M, and Zn atoms in the semiconductor layer 108 may be approximately equal. That is, the ratio of the number of atoms of In, M and Zn is In: M:
A material of Zn = 1: 1: 1 or near may be included.

When the semiconductor layer 108 has a region in which the atomic ratio of In is larger than the atomic ratio of M, the field-effect mobility of the transistor 100A can be increased. Specifically, the field-effect mobility of the transistor 100A can exceed 10 cm ² / V _s , more preferably, the field-effect mobility of the transistor 100A can exceed 30 cm ² / V _s .

For example, by using the above-described transistor with high field-effect mobility for a gate driver for generating a gate signal, a display device with a narrow frame width (also referred to as a narrow frame) can be provided. In addition, the above-described transistor with high field-effect mobility is used for a source driver that supplies a signal from a signal line included in a display device (in particular, a demultiplexer connected to an output terminal of a shift register included in the source driver). Thus, a display device with a small number of wirings connected to the display device can be provided.

Note that even when the semiconductor layer 108 has a region in which the atomic ratio of In is larger than the atomic ratio of M, if the crystallinity of the semiconductor layer 108 is high, the field effect mobility may be low.

As crystallinity of the semiconductor layer 108, for example, X-ray diffraction (XRD: X-Ray Diff
analysis using a reaction, or a transmission electron microscope (TEM: Trans
It can be analyzed by analysis using a mission Electron Microscope.

In addition, the semiconductor layer 108 has a region 108 n in a region which does not overlap with the conductive layer 112 and is in contact with the insulating layer 116. The region 108 n is a part of the semiconductor layer 108 and has a lower resistance than the channel formation region. Region 108 n is a region where carrier density is high,
Or, it can be rephrased as an n-type region or the like. Insulating layer 11 in contact with region 108 n
6 contains nitrogen or hydrogen. Thus, nitrogen or hydrogen in the insulating layer 116
By being added to n, the carrier density is increased, and a low resistance n-type region is obtained.

Note that the shape and the range of the region 108 n can be variously changed depending on the manufacturing conditions of the transistor and thus are not limited to the example illustrated in FIG. For example, the region 108 n may be located outside the region overlapping with the conductive layer 112. Alternatively, the region 108 n may be located in a region overlapping with the conductive layer 112. Note that the boundary between the area 108 n and the area other than the area 108 is often ambiguous, and is therefore indicated by a broken line in FIG.

The conductive layer 112 functioning as a gate electrode preferably contains a metal or an alloy. For example, as the conductive layer 112, a low-resistance conductive film such as a copper film or an aluminum film is preferably used. The conductive layer 112 may be a single layer or may have a stacked structure.

In addition, as illustrated in FIGS. 1A, 1B, and 1C, the transistor 100A includes an insulating layer 1;
An insulating layer 118 is provided on the substrate 16. In addition, the conductive layer 120 a and the conductive layer 120 b may be electrically connected to the region 108 n through the opening 141 a or the opening 141 b provided in the insulating layer 116 and the insulating layer 118, respectively.

Note that in this specification and the like, the insulating layer 104 is a first insulating film, the insulating layer 110 is a second insulating film, the insulating layer 116 is a third insulating film, and the insulating layer 118 is a fourth insulating film. And may be called respectively. The conductive layer 112 also has a function as a gate electrode, and the conductive layer 120
a has a function as a source electrode, and the conductive layer 120 b has a function as a drain electrode.

The insulating layer 110 functioning as a gate insulating layer has an excess oxygen region. When the insulating layer 110 has an excess oxygen region, excess oxygen can be supplied to the semiconductor layer 108. Thus, oxygen vacancies which may be formed in the semiconductor layer 108 can be compensated by excess oxygen, whereby a highly reliable semiconductor device can be provided.

The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film that prevents oxygen released from the insulating layer 110 from diffusing to the conductive layer 112 side. For the metal oxide layer 114, for example, a material which is less permeable to oxygen than at least the insulating layer 110 can be used.

As the metal oxide layer 114, an insulating material or a conductive material can be used. When the metal oxide layer 114 has insulating properties, it functions as part of the gate insulating layer. On the other hand, in the case where the metal oxide layer 114 has conductivity, it functions as part of the gate electrode.

In particular, as the metal oxide layer 114, an insulating material having a higher dielectric constant than silicon oxide is preferably used. In particular, it is preferable to use an aluminum oxide film, a hafnium oxide film, a hafnium aluminate film, or the like.

Further, a metal oxide film which does not contain nitrogen as its main component, such as an aluminum oxide film or a hafnium oxide film, can be used between the semiconductor layer 108 and the conductive layer 112 which functions as a gate electrode. Therefore, a nitrogen oxide (NO _x , x is more than 0 and 2 or less, preferably 1 or more and 2 or less, typically NO) in which the metal oxide layer 114 can form a level in the film.
The content of ₂ or NO) can be extremely low. Thus, a transistor with excellent electrical characteristics and reliability can be realized.

Aluminum oxide film, hafnium oxide film, hafnium aluminate film, etc. have a sufficiently high barrier property even when the film thickness is thin (for example, about 5 nm thick), so they can be formed thin and productivity is improved. It can be done. For example, the thickness of the metal oxide layer 114
The thickness can be 1 nm to 50 nm, preferably 3 nm to 30 nm. further,
The aluminum oxide film, the hafnium oxide film, and the hafnium aluminate film are characterized by having a dielectric constant higher than that of a silicon oxide film or the like. As described above, since a thin insulating film having a high dielectric constant can be formed as the metal oxide layer 114, the semiconductor layer 1 can be made as compared to the case of using a silicon oxide film or the like
The strength of the gate electric field applied to 08 can be increased. As a result, the drive voltage can be lowered and power consumption can be reduced.

Further, the metal oxide layer 114 is preferably formed using a sputtering apparatus. For example, in the case of forming an aluminum oxide film using a sputtering apparatus, oxygen can be favorably added to the semiconductor layer 108 by forming in an atmosphere containing oxygen gas. Also,
When an aluminum oxide film is formed using a sputtering apparatus, the film density can be increased, which is preferable.

In the case of using a conductive material for the metal oxide layer 114, an oxide conductive material such as indium oxide or indium tin oxide can be used.

Further, in the metal oxide layer 114, it is preferable that water and hydrogen do not easily diffuse. By this,
Even when the conductive layer 112 is formed using a material which easily diffuses water or hydrogen, diffusion of water or hydrogen into the insulating layer 110 or the semiconductor layer 108 can be prevented. In particular, an aluminum oxide film or a hafnium oxide film is preferable because of its high barrier property to water and hydrogen.

Note that in order to supply excess oxygen to the semiconductor layer 108, excess oxygen may be supplied to the insulating layer 104 formed below the semiconductor layer 108. In this case, the excess oxygen contained in the insulating layer 104 can also be supplied to the region 108 n. If excess oxygen is supplied into the region 108n, the resistance in the region 108n becomes high, which is not preferable. On the other hand, when the insulating layer 110 formed over the semiconductor layer 108 has excess oxygen, the excess oxygen can be selectively supplied only to the region overlapping with the conductive layer 112.

  Here, oxygen vacancies that may be formed in the semiconductor layer 108 will be described.

Oxygen vacancies formed in the semiconductor layer 108 are problematic because they affect transistor characteristics. For example, when oxygen vacancies are formed in the semiconductor layer 108, hydrogen is bonded to the oxygen vacancies and can be a carrier supply source. When a carrier supply source is generated in the semiconductor layer 108, a change in the electrical characteristics of the transistor 100A, typically, a shift in threshold voltage occurs. Therefore, in the semiconductor layer 108, the less oxygen vacancies, the better.

Therefore, in one embodiment of the present invention, the insulating film in the vicinity of the semiconductor layer 108, specifically, the insulating layer 110 formed above the semiconductor layer 108 contains excess oxygen. By transferring oxygen or excess oxygen from the insulating layer 110 to the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced.

Note that the insulating layer 104 located below the semiconductor layer 108 may contain excess oxygen. At this time, by transferring excess oxygen from the insulating layer 104 to the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be further reduced.

Here, impurities such as hydrogen or moisture mixed in the semiconductor layer 108 cause problems because they affect transistor characteristics. Therefore, in the semiconductor layer 108, it is preferable that the amount of impurities such as hydrogen or moisture be as low as possible.

It is preferable to use a metal oxide film which has a low impurity concentration and a low density of defect states as the semiconductor layer 108 because a transistor having excellent electrical characteristics can be manufactured. Here, the fact that the impurity concentration is low and the density of defect states is low (the number of oxygen vacancies is low) is referred to as high purity intrinsic or substantially high purity intrinsic. The high purity intrinsic or substantially high purity intrinsic metal oxide film can lower the carrier density because there are few sources of carriers. Therefore, in the transistor in which the channel region is formed in the metal oxide film, the threshold voltage is less likely to be negative (also referred to as normally on). In addition, since the high purity intrinsic or the substantially high purity intrinsic metal oxide film has a low defect state density, the trap state density may also be low. In addition, high purity intrinsic or substantially high purity intrinsic metal oxide films have extremely low off-state current, and even when the device has a channel width of 1 × 10 ⁶ μm and a channel length of 10 μm, the source electrode and the drain are When the voltage between electrodes (drain voltage) is in the range of 1 V to 10 V, the off current is below the measurement limit of the semiconductor parameter analyzer, ie 1 × 1.
A characteristic of 0 ⁻¹³ A or less can be obtained.

  The above is the description of the configuration example 1.

Hereinafter, a structural example of a transistor whose structure is partially different from that of Structural Example 1 will be described. In the following, the same parts as those of Configuration Example 1 may not be described. Further, in the drawings shown below, hatching patterns may be the same for portions having the same functions as in Configuration Example 1 and there may be cases where reference numerals are not given.

[Configuration Example 2]
FIGS. 2A, 2B, and 2C illustrate a transistor 100 which is partially different from the above-described structure example 1 in the structure.

FIG. 2A is a top view of the transistor 100, and FIG. 2B shows the transistor 100.
2C is a cross-sectional view of the transistor 100 in the channel width direction.

The transistor 100 is mainly different from Structural Example 1 in that the conductive layer 106 is provided between the substrate 102 and the insulating layer 104. The conductive layer 106 includes the semiconductor layer 108 with the insulating layer 104 interposed therebetween.
And the overlapping part.

In the transistor 100, the conductive layer 106 has a function as a first gate electrode (also referred to as a bottom gate electrode), and the conductive layer 112 has a function as a second gate electrode (also referred to as a top gate electrode). . Further, part of the insulating layer 104 functions as a first gate insulating layer, and part of the insulating layer 110 functions as a second gate insulating layer.

Note that the conductive layer 106 may be electrically connected to the conductive layer 112 through an opening provided in the insulating layer 104 and the insulating layer 110 in a region which is not illustrated. By this,
The same potential can be applied to the conductive layer 106 and the conductive layer 112.

The conductive layer 106 can be formed using the same material as the conductive layer 112, the conductive layer 120a, or the conductive layer 120b. In particular, the conductive layer 106 is preferably formed using a material containing copper because resistance can be reduced.

Further, as shown in FIG. 2A, the lengths of the conductive layer 112 and the conductive layer 106 are preferably longer than the length of the semiconductor layer 108 in the channel width direction. At this time, as shown in FIG.
As shown in the figure, the whole of the semiconductor layer 108 in the channel width direction is the insulating layer 110 and the insulating layer 104.
, And the conductive layer 112 and the conductive layer 106 are covered.

With such a structure, the semiconductor layer 108 can be electrically surrounded by an electric field generated by the pair of gate electrodes. At this time, in particular, the same potential is preferably applied to the conductive layer 106 and the conductive layer 112. Accordingly, an electric field for inducing a channel can be effectively applied to the semiconductor layer 108, so that the on-state current of the transistor 100 can be increased. Therefore, the transistor 100 can be miniaturized.

Note that a constant potential may be supplied to one of the pair of gate electrodes, and a signal for driving the transistor 100 may be supplied to the other. At this time, the potential applied to one of the electrodes causes the transistor 1 to
The threshold voltage when driving 00 by the other electrode can also be controlled.

[Component of semiconductor device]
Next, components included in the semiconductor device of the present embodiment will be described in detail.

〔substrate〕
The material of the substrate 102 and the like are not particularly limited, but at least the heat resistance needs to be able to withstand the heat treatment to be performed later. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like may be used as the substrate 102. Further, a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, or the like can be applied, and semiconductor elements are provided on these substrates. The substrate may be used as the substrate 102. When a glass substrate is used as the substrate 102, the sixth generation (1500 mm × 1850 mm), the seventh generation (1870 mm × 220)
0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280)
A large-sized display device can be manufactured by using a substrate with a size of 0 mm), a 10th generation (2950 mm × 3400 mm), or larger.

In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate.
It may form 0. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer can be used for separation from the substrate 102 and reprinting onto another substrate after a semiconductor device is partially or entirely completed thereon. At that time, the transistor 100 can be transferred to a substrate with low heat resistance or a flexible substrate.

[First insulating film]
As the insulating layer 104, a sputtering method, a CVD method, an evaporation method, pulsed laser deposition (
It can be formed by using a PLD method, a printing method, a coating method, or the like as appropriate. In addition, the insulating layer 104
For example, an oxide insulating film or a nitride insulating film can be formed as a single layer or a stack. Note that in order to improve interface characteristics with the semiconductor layer 108, at least a region in contact with the semiconductor layer 108 in the insulating layer 104 is preferably formed using an oxide insulating film. Further, by using an oxide insulating film which releases oxygen by heating as the insulating layer 104, oxygen contained in the insulating layer 104 can be moved to the semiconductor layer 108 by heat treatment.

The thickness of the insulating layer 104 can be 50 nm or more, or 100 nm to 3000 nm, or 200 nm to 1000 nm. By thickening the insulating layer 104, the amount of oxygen released from the insulating layer 104 can be increased, and interface states at the interface between the insulating layer 104 and the semiconductor layer 108 and oxygen vacancies contained in the semiconductor layer 108 can be reduced. It is possible.

As the insulating layer 104, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, Ga-Zn oxide, or the like may be used, and a single layer or stacked layers can be provided. In this embodiment mode, a stacked structure of a silicon nitride film and a silicon oxynitride film is used as the insulating layer 104. Thus, oxygen can be efficiently introduced into the semiconductor layer 108 by using the insulating layer 104 as a stacked structure, using a silicon nitride film on the lower layer side, and using a silicon oxynitride film on the upper layer side.

Alternatively, a film other than an oxide film such as a silicon nitride film can be used on the side of the insulating layer 104 in contact with the semiconductor layer 108. At this time, the surface of the insulating layer 104 in contact with the semiconductor layer 108 is preferably subjected to pretreatment such as oxygen plasma treatment to oxidize the surface of the insulating layer 104 or the vicinity of the surface.

[Conductive film]
The conductive layer 112 and the conductive layer 106 which function as a gate electrode, the conductive layer 120 a which functions as a source electrode, and the conductive layer 120 b which functions as a drain electrode include chromium (Cr).
, Copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), manganese (M)
n) metal elements selected from nickel (Ni), iron (Fe), cobalt (Co), or alloys containing the above-mentioned metal elements as components, or alloys formed by combining the above-described metal elements, etc. can do.

In addition, an oxide (In-Sn oxide) containing indium and tin in the conductive layer 112 and the conductive layer 106 which function as a gate electrode, the conductive layer 120 a which functions as a source electrode, and the conductive layer 120 b which functions as a drain electrode. , An oxide having indium and tungsten (In-W oxide), an oxide having indium, tungsten and zinc (In-W-Z)
n oxide), an oxide having indium and titanium (In-Ti oxide), an oxide having indium, titanium and tin (In-Ti-Sn oxide), an oxide having indium and zinc In-Zn oxide), an oxide having indium, tin and silicon (In-Sn)
An oxide conductor or a metal oxide film such as an oxide (Si oxide), an oxide having indium, gallium and zinc (In-Ga-Zn oxide) can also be applied.

Here, the oxide conductor is described. In the present specification, the oxide conductor is
It may be called (Oxide Conductor). As an oxide conductor, for example,
When oxygen vacancies are formed in the metal oxide and hydrogen is added to the oxygen vacancies, donor levels are formed in the vicinity of the conduction band. As a result, the metal oxide becomes highly conductive and becomes conductive. A conductive metal oxide can be referred to as an oxide conductor. In general, metal oxides are translucent to visible light because of their large energy gap. On the other hand, the oxide conductor is a metal oxide having a donor level near the conduction band. Therefore, the oxide conductor has a small influence of absorption by the donor level, and has the same transparency to visible light as a metal oxide.

Alternatively, the conductive layer 112 may have a stacked-layer structure of a conductive film containing the above-described oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. The wiring resistance can be reduced by using a conductive film containing a metal or an alloy. At this time, a conductive film including an oxide conductor is preferably applied to the side in contact with the insulating layer which functions as a gate insulating film.

In the conductive layer 112, the conductive layer 106, the conductive layer 120a, and the conductive layer 120b, Cu-X is used.
An alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. By using a Cu-X alloy film, it can be processed by a wet etching process,
It is possible to reduce the manufacturing cost.

In addition, the conductive layer 112, the conductive layer 106, the conductive layer 120a, and the conductive layer 120b preferably include one or more selected from titanium, tungsten, tantalum, and molybdenum among the above-described metal elements. It is suitable. In particular, the conductive layer 112, the conductive layer 106,
A tantalum nitride film is preferably used as the conductive layer 120 a and the conductive layer 120 b. The tantalum nitride film is conductive and has high barrier properties to copper or hydrogen. In addition, since the tantalum nitride film further releases less hydrogen from itself, the semiconductor layer 108
It can be suitably used as a conductive film in contact with the above or a conductive film in the vicinity of the semiconductor layer 108.

[Second insulating film]
As the insulating layer 110 which functions as a gate insulating film of the transistor 100, plasma enhanced chemical vapor deposition (PECVD: (Plasma Enhanced Chemical Va
(por deposition) method, sputtering method, etc., silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide film An insulating layer containing one or more of a tantalum film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film can be used. Note that the insulating layer 110 has a two-layer laminated structure or three
A layered structure of layers or more may be used.

In addition, the insulating layer 110 which is in contact with the semiconductor layer 108 which functions as a channel region of the transistor 100 is preferably an oxide insulating film, and a region (excess oxygen region) containing oxygen in excess of the stoichiometric composition is used. It is more preferable to have. In other words, the insulating layer 110 is an insulating film capable of releasing oxygen. Note that in order to provide an excess oxygen region in the insulating layer 110, for example, the insulating layer 110 is formed in an oxygen atmosphere, or the insulating layer 1 after film formation is formed.
10 may be heat-treated in an oxygen atmosphere.

In addition, when hafnium oxide is used as the insulating layer 110, the following effects can be obtained. Hafnium oxide has a higher dielectric constant than silicon oxide or silicon oxynitride. Therefore,
Since the film thickness of the insulating layer 110 can be increased as compared with the case of using silicon oxide, the leakage current due to the tunnel current can be reduced. That is, a transistor with small off current can be realized. Furthermore, hafnium oxide having a crystal structure has a high dielectric constant as compared to hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with low off current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic system and cubic system. However, one embodiment of the present invention is not limited to these.

In addition, the insulating layer 110 preferably has few defects, and typically, it is preferable that a signal observed by electron spin resonance (ESR) is small. For example, as the above-mentioned signal, E 'whose g value is observed at 2.001
The center is mentioned. The E 'center is due to dangling bonds of silicon. As the insulating layer 110, the spin density due to the E 'center is 3 × 10 ¹⁷ spins
A silicon oxide film having a density of at most ³ cm ³ , preferably at most 5 × 10 ¹⁶ spins / cm ³ ,
Alternatively, a silicon oxynitride film may be used.

[Semiconductor layer]
In the case where the semiconductor layer 108 is an In-M-Zn oxide, the atomic ratio of metal elements in a sputtering target used for forming the In-M-Zn oxide preferably satisfies In> M. As atomic ratio of metal elements of such sputtering target, In: M:
Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In: M: Zn = 2: 1: 3, I
n: M: Zn = 3: 1: 2, In: M: Zn = 4: 2: 4.1, In: M: Zn = 5: 1
: 6, In: M: Zn = 5: 1: 7, In: M: Zn = 5: 1: 8, In: M: Zn = 6
: 1: 6, In: M: Zn = 5: 2: 5 etc. are mentioned.

In the case where the semiconductor layer 108 is an In-M-Zn oxide, it is preferable to use a target including a polycrystalline In-M-Zn oxide as a sputtering target. The semiconductor layer 108 having crystallinity can be obtained by using a target including polycrystalline In-M-Zn oxide.
It becomes easy to form. Note that the atomic ratio of the semiconductor layer 108 to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal element contained in the above sputtering target. For example, the composition of the sputtering target used for the semiconductor layer 108 is In: Ga: Zn = 4
In the case of 2: 2 [4.1 atomic ratio], the composition of the semiconductor layer 108 to be deposited is In: Ga: Z.
It may be near n = 4: 2: 3 [atomic number ratio].

In addition, the semiconductor layer 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more. Thus, by using a metal oxide with a wide energy gap, the off-state current of the transistor can be reduced.

In addition, the semiconductor layer 108 preferably has a non-single-crystal structure. The non-single crystal structure is, for example,
CAAC-OS (C Axis Aligned Crystalline Oxide
Semiconductor), polycrystalline structure, microcrystalline structure, or amorphous structure.
In the non-single crystal structure, the amorphous structure has the highest density of defect states, and CAAC-OS has the lowest density of defect states.

[Third insulating film]
The insulating layer 116 has nitrogen or hydrogen. Examples of the insulating layer 116 include a nitride insulating film. The nitride insulating film can be formed using silicon nitride, silicon nitride oxide, silicon oxynitride, or the like. The hydrogen concentration contained in the insulating layer 116 is 1 ×
It is preferable that it is 10 < ²² > atoms / cm < ³ > or more. In addition, the insulating layer 116 is a semiconductor layer 1.
It is in contact with the area 108 n of 08. Accordingly, the concentration of impurities (nitrogen or hydrogen) in the region 108 n in contact with the insulating layer 116 is increased, and the carrier density of the region 108 n can be increased.

[Fourth insulating film]
As the insulating layer 118, an oxide insulating film can be used. In addition, as the insulating layer 118, a stacked film of an oxide insulating film and a nitride insulating film can be used. As the insulating layer 118, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide,
Hafnium oxide, gallium oxide, Ga-Zn oxide or the like may be used.

The insulating layer 118 is preferably a film which functions as a barrier film of hydrogen, water, or the like from the outside.

The thickness of the insulating layer 118 is 30 nm to 500 nm, or 100 nm to 400 n
It can be m or less.

[Example of manufacturing method of transistor]
Hereinafter, an example of a method for manufacturing the transistor of one embodiment of the present invention will be described. here,
The transistor 100 exemplified in Configuration Example 2 will be described as an example.

Note that thin films (insulating films, semiconductor films, conductive films, and the like) that constitute a semiconductor device are formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulse laser deposition (PLD: Pulse Laser Deposit).
ion method, atomic layer deposition (ALD)
It can be formed using a method or the like. As the CVD method, plasma chemical vapor deposition (PEC)
VD: Plasma Enhanced CVD), thermal CVD, and the like. Also,
Metalorganic chemical vapor deposition (MOCVD: Metal Organi) is one of the thermal CVD methods.
c There is CVD method.

In addition, thin films (insulating films, semiconductor films, conductive films, and the like) that constitute a semiconductor device are spin-coated,
It can be formed by a method such as dip, spray application, inkjet, dispense, screen printing, offset printing, doctor knife, slit coat, roll coat, curtain coat, knife coat and the like.

In addition, when processing a thin film forming the semiconductor device, the thin film can be processed using a photolithography method or the like. Other than that, the thin film may be processed by a nanoimprint method, a sand blast method, a lift-off method or the like. Alternatively, the island-shaped thin film may be formed directly by a film formation method using a shielding mask such as a metal mask.

As the photolithography method, there are typically the following two methods. One is a method of forming a resist mask on a thin film to be processed, processing the thin film by etching or the like, and removing the resist mask. The other is a method of processing the thin film into a desired shape by forming a thin film having photosensitivity, followed by exposure and development.

In the photolithography method, light used for exposure is, for example, i-ray (wavelength 365 nm),
A g-line (wavelength 436 nm), an h-line (wavelength 405 nm), or a mixture of these can be used. Besides, ultraviolet light, KrF laser light, ArF laser light or the like can also be used. Further, the exposure may be performed by the immersion exposure technique. Further, as light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-violet) or X-rays may be used. Also, instead of light used for exposure, an electron beam can be used. The use of extreme ultraviolet light, X-rays or electron beams is preferable because extremely fine processing is possible. In the case where exposure is performed by scanning a beam such as an electron beam, a photomask is not necessary.

For etching of the thin film, a dry etching method, a wet etching method, a sand blast method, or the like can be used.

Each of FIGS. 3 to 6 is a cross-sectional view in the channel length direction, which illustrates the method for manufacturing the transistor 100.

[Formation of Conductive Layer 106]
A conductive film is formed over the substrate 102 and processed by etching to form a conductive layer 106 which functions as a gate electrode (FIG. 3A).

[Formation of Insulating Layer 104]
Subsequently, the insulating layer 104 is formed to cover the substrate 102 and the conductive layer 106 (FIG. 3B).
. The insulating layer 104 is preferably formed by plasma CVD or the like.

Here, as shown in FIG. 3C, after the insulating layer 104 is formed, oxygen 132 is preferably added to the insulating layer 104. Examples of oxygen added to the insulating layer 104 include oxygen radicals, oxygen atoms, oxygen atom ions, oxygen molecular ions, and the like. Further, as the addition method, there are an ion doping method, an ion implantation method, a plasma treatment method and the like. Alternatively, after a film which suppresses release of oxygen is formed over the insulating layer 104, oxygen may be added to the insulating layer 104 through the film.

A conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten is used as the film which suppresses the above-described desorption of oxygen. be able to.

In the case of oxygen addition in plasma treatment, oxygen can be excited by microwaves to generate high-density oxygen plasma, whereby the oxygen addition amount to the insulating layer 104 can be increased. Further, by performing plasma treatment in an atmosphere containing oxygen, water, hydrogen, and the like adsorbed on the surface of the insulating layer 104 can be removed. Thereby, in the semiconductor layer 108 to be formed later,
Alternatively, water or hydrogen which may exist at the interface between the semiconductor layer 108 and the insulating layer 104 can be reduced.

In the case where silicon nitride, silicon nitride oxide, or the like is used as the insulating layer 104, hydrogen may be contained in the insulating layer 104. At this time, by performing the above-described plasma treatment or the like, at least the hydrogen concentration in the semiconductor layer 108 can be reduced.

[Formation of Semiconductor Layer 108]
Subsequently, the semiconductor layer 108 is formed over the insulating layer 104.

The metal oxide film to be the semiconductor layer 108 is preferably formed by a sputtering method using a metal oxide target.

In addition to the oxygen gas, an inert gas (eg, helium gas, argon gas, xenon gas, or the like) may be mixed in forming the metal oxide film. Note that the ratio of oxygen gas to the whole of the deposition gas at the time of depositing the metal oxide film (hereinafter also referred to as oxygen flow ratio) is 0% or more and 100% or less, preferably 5% or more and 20% or less It is preferable to do. By reducing the oxygen flow ratio and forming a metal oxide film with relatively low crystallinity, a transistor in which the on current is increased can be obtained.

In addition, as a film formation condition of the metal oxide film, the substrate temperature may be from room temperature to 180 ° C., preferably, the substrate temperature may be from room temperature to 140 ° C. The substrate temperature when forming the metal oxide film is
For example, when the temperature is higher than or equal to room temperature and lower than 140 ° C., productivity is preferably high. In addition, when the metal oxide film is formed with the substrate temperature set to room temperature or not intentionally heated, a metal oxide film with low crystallinity can be easily formed.

The thickness of the semiconductor layer 108 is 3 nm or more and 200 nm or less, preferably 3 nm
The thickness may be 100 nm or less, more preferably 3 nm to 60 nm.

Note that in the case of using a large glass substrate (e.g., sixth to tenth generations) as the substrate 102, the substrate 102 is not less than 200 ° C. and not more than 300 ° C. when the metal oxide film is formed. May be distorted (distorted or warped). Therefore, in the case of using a large glass substrate, deformation of the glass substrate can be suppressed by setting the substrate temperature at the time of forming the metal oxide film to a room temperature or more and less than 200 ° C.

In addition, high purification of the sputtering gas is also required. For example, oxygen gas or argon gas used as a sputtering gas has a dew point of -40.degree. C. or less, preferably -80.degree. C. or less, more preferably -100.degree. C. or less, more preferably -120.degree. C. or less. By using it, it is possible to prevent moisture and the like from being taken into the metal oxide film as much as possible.

In the case of forming a metal oxide film by sputtering, a chamber in the sputtering apparatus uses an adsorption vacuum pump such as a cryopump to remove as much as possible water and the like that become impurities for the metal oxide. High vacuum (5 × 10 ^-7 Pa to 1 × 10
It is preferable to exhaust to about ⁻⁴ Pa). In particular, the partial pressure of gas molecules corresponding to H ₂ O in the chamber (gas molecules corresponding to m / z = 18) is 1 × 10 ⁻⁴ Pa or less, preferably 5 × 10 ⁻⁵ during standby of the sputtering apparatus. It is preferable to set it as Pa or less.

Note that in order to process the formed metal oxide film into the semiconductor layer 108, either or both of a wet etching method and a dry etching method may be used.

After the metal oxide film is formed or processed into the semiconductor layer 108, heat treatment is performed,
The metal oxide film or the semiconductor layer 108 may be dehydrogenated or dehydrated. The heat treatment temperature is typically 150 ° C. or more and less than the strain point of the substrate, or 250 ° C. or more and 450 ° C. or less,
Or 300 ° C. or more and 450 ° C. or less.

The heat treatment can be performed in an inert atmosphere containing a rare gas such as helium, neon, argon, xenon, krypton, or nitrogen. Alternatively, after heating in an inert atmosphere, heating may be performed in an oxygen atmosphere. Preferably, the inert atmosphere and the oxygen atmosphere do not contain hydrogen, water, and the like. The treatment time may be 3 minutes or more and 24 hours or less.

For the heat treatment, an electric furnace, an RTA apparatus, or the like can be used. By using the RTA apparatus, heat treatment can be performed at a temperature higher than the strain point of the substrate for only a short time. Therefore, the heat treatment time can be shortened.

The hydrogen concentration in the metal oxide film obtained by SIMS is 5 × 10 ¹⁹ atoms by heat treatment after film formation while heating the metal oxide film or formation of the metal oxide film.
s / cm ³ or less, or 1 × 10 ¹⁹ atoms / cm ³ or less, 5 × 10 ¹⁸ atoms
/ Cm ³ or less, or 1 × 10 ¹⁸ atoms / cm ³ or less, or 5 × 10 ¹⁷ ato
It can be ms / cm ³ or less, or 1 × 10 ¹⁶ atoms / cm ³ or less.

[Formation of Insulating Layer 110]
Subsequently, the insulating layer 110 is formed over the semiconductor layer 108 and the insulating layer 104 (FIG. 3E).
).

As the insulating layer 110, an oxide film such as a silicon oxide film or a silicon oxynitride film is preferably formed using a plasma chemical vapor deposition apparatus (referred to as a PECVD apparatus or simply referred to as a plasma CVD apparatus). In this case, as the source gas, it is preferable to use a deposition gas containing silicon and an oxidizing gas. Typical examples of the deposition gas containing silicon include silane, disilane, trisilane, fluorosilane and the like. As an oxidizing gas,
There are oxygen, ozone, dinitrogen monoxide, nitrogen dioxide and the like.

In addition, PECVD in which the flow rate of the oxidizing gas is greater than 20 times and less than 100 times, or 40 times to 80 times that of the deposition gas as the insulating layer 110 and the pressure in the processing chamber is less than 100 Pa or 50 Pa or less By using the device, a silicon oxynitride film with a small amount of defects can be formed.

In addition, the substrate placed in the evacuated processing chamber of the PECVD apparatus is maintained at 280 ° C. to 350 ° C. as the insulating layer 110, the source gas is introduced into the processing chamber, and the pressure in the processing chamber is 20 Pa to 250 Pa. In the following, more preferably, a dense silicon oxide film or a silicon oxynitride film can be formed as the insulating layer 110 under the condition of supplying high frequency power to the electrode provided in the treatment chamber by setting the pressure to 100 Pa or more and 250 Pa or less.

Alternatively, the insulating layer 110 may be formed by PECVD using microwaves. Microwave refers to the frequency range of 300 MHz to 300 GHz. The microwave has a low electron temperature and a small electron energy. Also, in the supplied electric power, the rate used for accelerating electrons is small, and it can be used for dissociation and ionization of more molecules, and can excite high density plasma (high density plasma) . Thus, the insulating layer 110 with few defects can be formed with less plasma damage to the deposition surface and the deposit.

Further, the insulating layer 110 can be formed by a CVD method using an organosilane gas. As the organosilane gas, ethyl silicate (TEOS: chemical formula Si (OC ₂ H ₅ ) ₄ ),
Tetramethylsilane (TMS: chemical formula Si (CH ₃ ) ₄ ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH (OC ₂ H) _{5) 3),} or trisdimethylaminosilane _{(SiH (N (CH 3)} 2) 3) can be a silicon-containing compound, such as. By using a CVD method using an organosilane gas, the insulating layer 110 with high coverage can be formed.

[Formation of Conductive Film 130]
Subsequently, the conductive film 130 is formed to cover the insulating layer 110 (FIG. 4A).

As the conductive film 130, a metal oxide film, or a metal film or an alloy film can be used. The thickness of the conductive film 130 is preferably extremely thin, and can be, for example, 1 nm to 20 nm, preferably 2 nm to 15 nm, more preferably 3 nm to 10 nm, and typically about 5 nm.

As a metal oxide that can be used for the conductive film 130, for example, In—Sn oxide,
In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide,
In-Zn oxide, In-Sn-Si oxide, In-Ga-Zn oxide, etc. are mentioned.

Alternatively, as the conductive film 130, a metal film or an alloy film containing aluminum, titanium, chromium, iron, cobalt, nickel, copper, zinc, gallium, molybdenum, silver, indium, tin, tantalum, tungsten, or the like can be used.

Note that as the conductive film 130, a semiconductor film containing a compound semiconductor, an oxide semiconductor, or the like in addition to silicon, germanium, or the like may be used.

Here, a metal oxide is used as the conductive film 130 and a film is formed by a sputtering method or the like in an atmosphere containing oxygen because oxygen can be supplied to the insulating layer 110 even during film formation, which is preferable.

Oxygen supply treatment
Subsequently, a process of supplying oxygen 134 to the insulating layer 110 through the conductive film 130 (hereinafter, also referred to as an oxygen supply process) is performed (FIG. 4B).

As the oxygen supply treatment, plasma treatment in an oxygen atmosphere (also referred to as oxygen plasma treatment) is preferably used. By oxygenation into plasma, oxygen radicals, oxygen atoms, or oxygen ions can be added to the insulating layer 110 through the conductive film 130. The oxygen flow ratio in the gas introduced into the apparatus is preferably as high as possible, and is 50% to 100%, preferably 60% to 100%, more preferably 80% to 100%, and still more preferably 100%.

In particular, it is preferable to use a processing apparatus having a pair of parallel plate electrodes as the processing apparatus. At this time, more oxygen can be supplied to the insulating layer 110 by performing plasma treatment in a state in which a bias voltage is applied between the pair of electrodes. The bias voltage is applied so that, for example, oxygen ions in the oxygen plasma can easily move to the substrate side. Since oxygen ions in the oxygen plasma ^tend to be positively charged, such as O ⁺ or O ^{2 +} , for example, when a bias voltage is applied such that the electrode located on the substrate side has a negative potential, the oxygen ions move to the substrate side It becomes easy to do.

Here, in the case where the oxygen supply treatment is performed directly on the insulating layer 110 without providing the conductive film 130, part of the oxygen supplied to the insulating layer 110 may be released again to the outside. However, in this example of the manufacturing method, the conductive film 130 is provided over the insulating layer 110, whereby oxygen supplied to the insulating layer 110 can be prevented from being released again to the outside.
Further, damage to the insulating layer 110 can be alleviated by the conductive film 130.

Further, the conductive film 130 on the insulating layer 110 has an effect of easily attracting ionized oxygen when a bias voltage is applied between the pair of electrodes in the oxygen supply treatment.
Therefore, by providing the conductive film 130, the effect of applying a bias voltage can be synergistically enhanced.

In addition, it is preferable to use a dry etching apparatus, an ashing apparatus, a PECVD apparatus, or the like as the processing apparatus because another processing and an apparatus can be shared. In particular, it is preferable to use an ashing device.

Further, in the case where a bias voltage is applied between a pair of electrodes included in the processing apparatus, the bias voltage may be, for example, 10 V or more and 1 kV or less. Or, for example, the power density of the bias is 1
W / cm ² or more 5W / cm ² may be the following.

Note that the oxygen supply treatment is not limited to the above, and a method in which oxygen can be supplied to the insulating layer 110 through the conductive film 130 can be used. For example, oxygen may be supplied to the insulating film through the conductive film by an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like. Alternatively, heat treatment may be performed in an oxygen atmosphere. The conductive film 130 functions as a cap film to prevent the release of oxygen supplied to the insulating layer 110 even when such a process is used, and a relaxation layer which reduces damage to the insulating layer 110 It can function as

[Removal of Conductive Film 130]
The conductive film 130 may be embrittled by the oxygen supply treatment. In particular, in the case where a metal or an alloy is used for the conductive film 130, the conductive film 130 may be oxidized by the oxygen supply treatment to increase the resistance value, or may be partially etched to be a thin film. Therefore, conductive film 13
It is preferable to remove 0 by etching.

  FIG. 4C shows a cross-sectional view after the conductive film 130 is etched.

[Formation of Metal Oxide Layer 114]
Subsequently, the metal oxide layer 114 is formed over the insulating layer 110 (FIG. 4D).

The metal oxide layer 114 is preferably formed, for example, in an atmosphere containing oxygen. In particular,
The sputtering method is preferably performed in an atmosphere containing oxygen. Accordingly, oxygen 136 can be supplied to the insulating layer 110 when the metal oxide layer 114 is formed.

For example, as a film formation condition of the metal oxide layer 114, a metal oxide film is preferably formed by a reactive sputtering method using a metal target using oxygen as a film formation gas. When aluminum is used as the metal target, for example, an aluminum oxide film can be formed.

When the metal oxide layer 114 is formed, the higher the oxygen flow rate ratio (oxygen flow rate ratio) to the total flow rate of the film forming gas introduced into the film forming chamber of the film forming apparatus or the higher the oxygen partial pressure in the film forming chamber Layer 11
The oxygen supplied during 0 can be increased. The oxygen flow ratio or oxygen partial pressure is, for example, 50
% Or more and 100 or less, preferably 65% or more and 100% or less, more preferably 80% or more
It is 0 or less, more preferably 90% or more and 100%. In particular, it is preferable to set the oxygen flow ratio or the oxygen partial pressure to 100%.

As described above, by forming the metal oxide layer 114 by a sputtering method in an atmosphere containing oxygen, oxygen is supplied to the insulating layer 110 at the time of deposition of the metal oxide layer 114, and oxygen is supplied from the insulating layer 110. It is possible to prevent detachment. As a result, the insulating layer 110
It is possible to trap a great deal of oxygen. Then, much heat can be supplied to the semiconductor layer 108 by heat treatment performed later. As a result, oxygen vacancies in the semiconductor layer can be reduced, and a highly reliable transistor can be realized.

Note that after the metal oxide layer 114 is formed, part of the metal oxide layer 114, the insulating layer 110, and the insulating layer 104 may be etched to form an opening reaching the conductive layer 106.
Accordingly, the conductive layer 112 and the conductive layer 106 which are to be formed later can be electrically connected to each other through the opening.

[Formation of Conductive Film 112a]
Subsequently, a conductive film 112a is formed over the metal oxide layer 114 (FIG. 5A). Conductive film 1
12 a is a film to be the conductive layer 112 later.

The conductive film 112 a is preferably formed by a sputtering method using a sputtering target of metal or alloy.

[Etching of Conductive Film 112a, Metal Oxide Layer 114, Insulating Layer 110]
Subsequently, part of the conductive film 112a, the metal oxide layer 114, and the insulating layer 110 is etched to expose part of the semiconductor layer 108 (FIG. 5B).

Here, the conductive film 112 a, the metal oxide layer 114, and the insulating layer 110 are preferably processed using the same resist mask. Alternatively, the metal oxide layer 114 and the insulating layer 110 may be etched using the conductive layer 112 after etching as a hard mask.

Thus, the island-shaped conductive layer 112, the metal oxide layer 114, and the insulating layer 110 whose top surface shapes are approximately the same can be formed.

[Formation of Insulating Layer 116 and Insulating Layer 118]
Subsequently, the insulating layer 116 is formed to cover the semiconductor layer 108, the conductive layer 112, the insulating layer 104, and the like, and then the insulating layer 118 is formed (FIG. 5C).

Before forming the insulating layer 116, it is preferable to perform treatment to form an oxygen vacancy in the exposed portion of the semiconductor layer 108. For example, plasma treatment or heat treatment can be performed in an atmosphere containing no oxygen.

For example, plasma treatment is performed in an atmosphere containing a rare gas such as argon, nitrogen gas, hydrogen gas, or the like in a PECVD apparatus, and then a film formation gas of the insulating layer 116 is introduced to form the insulating layer 116. can do. Further, the insulating layer 118 is also preferably formed successively without being exposed to the air. Plasma treatment, deposition of insulating layer 116, insulating layer 11
The film formation of 8 may be performed in different film formation chambers, or any two or more of them may be performed in the same film formation chamber.

The insulating layer 116 is preferably a film containing at least one of nitrogen and hydrogen. For example, an insulating film containing hydrogen such as a silicon nitride film, a silicon nitride oxide film, or a silicon oxynitride film is preferably used. Such an insulating layer 116 as a semiconductor layer 1
By forming in contact with a part of 08, nitrogen or hydrogen can be supplied to the part to increase conductivity. Thus, a low-resistance region 108 n is formed in the semiconductor layer 108.

[Heat treatment]
After the insulating layer 116 and the insulating layer 118 are formed, heat treatment is performed. By heat treatment, oxygen is supplied from the insulating layer 110 to the semiconductor layer 108, so that oxygen vacancies in the semiconductor layer 108 can be reduced. Since the insulating layer 110 contains a large amount of excess oxygen, a sufficient amount of oxygen can be supplied to the semiconductor layer 108 even with relatively low temperature heat treatment.

Further, heat treatment causes part of oxygen vacancies in the semiconductor layer 108 to be bonded to hydrogen to form a region 1
The resistance of 08n can be further reduced. Note that the low-resistance region 108 n may not be formed in part of the semiconductor layer 108 when the insulating layer 116 is formed.

The higher the maximum temperature of the heat treatment, the better, but when a large substrate is used, for example, 45
0 ° C. or less, preferably 400 ° C. or less, more preferably 350 ° C. or less, more preferably 3
The temperature is 40 ° C. or less, more preferably 330 ° C. or less, and still more preferably 300 ° C. or less.

[Formation of Openings 141a and 141b]
Subsequently, a mask is formed by lithography at a desired position of the insulating layer 118, and then the insulating layer 118 and a part of the insulating layer 116 are etched to form the opening 141a and the opening 141b which reach the region 108n. (FIG. 6 (A)).

[Formation of Conductive Layers 120a and 120b]
Subsequently, a conductive film is formed over the insulating layer 118 so as to cover the opening 141a and the opening 141b, and the conductive film is processed into a desired shape, whereby the conductive layer 120a and the conductive layer 120b are formed. (FIG. 6 (B)).

Through the above steps, the transistor 100 can be manufactured. The cross-sectional view shown in FIG. 6 (B) is the same as the view shown in FIG. 2 (B).

According to this manufacturing method example, extremely large amount of oxygen can be supplied to the oxide insulating film in contact with the semiconductor layer. Therefore, oxygen vacancies in the semiconductor can be sufficiently reduced.
A transistor with excellent electrical characteristics can be realized.

In addition, for example, the maximum temperature required for manufacturing a transistor is 400.degree. C. or less, or 350.
The temperature can be reduced to C or less, or 340 or less, or 330 or less, or 300 or less, and productivity can be enhanced.

  The above is the description of the example of the manufacturing method.

[Configuration Example 3]
According to one embodiment of the present invention, since the transistor can be formed at low temperature, the transistor can be manufactured over a substrate with relatively low heat resistance. Hereinafter, as an example, a transistor provided on an organic resin substrate which is thin to have flexibility will be described.

7A and 7B show cross-sectional views of a transistor 100B described below. Note that
FIG. 2A can be referred to for the top view. The transistor 100B is mainly different from the transistor 100 illustrated in Configuration Example 2 in that the transistor 100B is provided on the substrate 102a instead of the substrate 102 and in that the insulating layer 103 is provided.

The substrate 102 a is thin enough to have flexibility (for example, a thickness of 100 nm or more and 100 or more).
A substrate such as an organic resin or the like can be used.

As an organic resin, a polyimide resin can be typically used. A polyimide resin is preferable because it is excellent in heat resistance. Besides these, acrylic resin, epoxy resin, polyamide resin, polyimide amide resin, siloxane resin, benzocyclobutene resin, phenol resin and the like can be used.

Organic resin is a mixed material of resin precursor and solvent by methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, knife coating, etc. A mixed material of a soluble resin material and a solvent is formed on a supporting substrate. After that, the solvent and the like are removed by heat treatment, and the material is cured, whereby the substrate 102a containing an organic resin can be formed.

For example, in the case of using a polyimide, a resin precursor in which an imide bond is generated by dehydration can be used. Alternatively, a material containing a soluble polyimide may be used.

As the insulating layer 103, an inorganic insulating film can be used. The insulating layer 103 is a substrate 10
It is preferable that the impurity contained in 2a functions as a barrier film which prevents diffusion to the transistor 100B.

Examples of the inorganic insulating film having high barrier properties include silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, and aluminum oxynitride.

In the case where the insulating layer 103 is a stacked film, an inorganic insulating film with high barrier property is preferably applied to at least one layer. For example, a two-layer structure in which a silicon oxynitride film and a silicon nitride film are stacked from the substrate 102a, or a three-layer structure in which a silicon oxynitride film, a silicon nitride film, and a silicon oxynitride film are stacked may be used.

Here, an example of a method for manufacturing the transistor 100B will be described. First, a resin layer to be the substrate 102a and an insulating layer 103 are stacked over a supporting substrate such as a glass substrate. Subsequently, a transistor is formed over the insulating layer 103 by a method similar to the above manufacturing method example.
After that, the support substrate and the substrate 102a are separated to form the flexible substrate 102a.
The upper transistor 100B can be manufactured.

Various methods can be used to separate the supporting substrate and the substrate 102a. For example, a method may be used in which the adhesion between the supporting substrate and the substrate 102 a is reduced by laser light irradiation from the supporting substrate side. At this time, a light absorption layer may be provided between the support substrate and the substrate 102a. As the light absorption layer, a material that can absorb part of light used for laser light can be used. For example, when an excimer laser with a wavelength of 308 nm is used as the laser light, a metal, a semiconductor, an oxide, or the like can be used as the light absorption layer. For example, a semiconductor film such as silicon, a metal film such as titanium or tungsten, an oxide film such as titanium oxide, tungsten oxide, indium oxide, or indium tin oxide can be used.

Alternatively, after the insulating layer 103 is formed over the supporting substrate and the transistor is manufactured, the insulating layer 103 and the substrate 102 a are bonded to each other by the adhesive layer 105 by separating the supporting substrate and the insulating layer 103. Good. A cross-sectional view in that case is shown in FIG. 7 (C). At this time, insulating layer 1
It is preferable to form a release layer between 03 and the support substrate. For example, as the peeling layer, a layer containing a high melting point metal material such as tungsten and a layer containing an oxide of the metal material are stacked, and silicon nitride, silicon oxide, silicon oxynitride, or the like is used as the insulating layer 103 thereover. An insulating layer containing an inorganic insulating material such as silicon nitride oxide can be stacked and used. At this time, peeling can be performed at the interface between tungsten and tungsten oxide, in tungsten oxide, or at the interface between tungsten oxide and the insulating layer.

[Configuration Example 4]
8A and 8B illustrate cross-sectional views of a transistor 100C described below. Note that
FIG. 2A can be referred to for the top view. The transistor 100C is mainly different from the transistor 100 exemplified in Configuration Example 2 in that the semiconductor layer 108 has a stacked structure.

The semiconductor layer 108 has a stacked structure in which the semiconductor layer 108 a and the semiconductor layer 108 b are stacked from the insulating layer 104 side.

  The semiconductor layer 108 b is preferably a film higher in crystallinity than the semiconductor layer 108 a.

The semiconductor layer 108 a and the semiconductor layer 108 b are preferably formed in succession without exposure to the air by using the same oxide target and changing deposition conditions.

For example, the oxygen flow ratio at the time of film formation of the semiconductor layer 108 a is smaller than the oxygen flow ratio at the time of film formation of the semiconductor layer 108 b. Alternatively, oxygen is not supplied at the time of deposition of the semiconductor layer 108 a. Thus, oxygen can be effectively supplied to the semiconductor layer 108 a at the time of forming the semiconductor layer 108 b. In addition, the semiconductor layer 108a has lower crystallinity than the semiconductor layer 108b.
A film with high electrical conductivity can be obtained. On the other hand, when the semiconductor layer 108b provided in the upper portion is a film having higher crystallinity than the semiconductor layer 108a, damage at the time of processing the semiconductor layer 108 or at the time of forming the insulating layer 110 can be suppressed. For example, the semiconductor layer 108a is
The CAAC-OS film can be used for the semiconductor layer 108b by using an -OS film.

More specifically, the oxygen flow rate ratio at the time of film formation of the semiconductor layer 108 a is 0% or more and less than 50%, preferably 0% or more and 30% or less, more preferably 0% or more and 20% or less, typically 10 And%. The oxygen flow ratio at the time of film formation of the semiconductor layer 108b is 50% to 100%, preferably 60% to 100%, more preferably 80% to 100%, and still more preferably 90% to 100%. Typically, it is 100%. Although the conditions such as pressure, temperature, and power at the time of film formation may be different between the semiconductor layer 108 a and the semiconductor layer 108 b, the conditions other than the oxygen flow ratio may be the same, and the film formation process may be performed. It is preferable because time can be shortened.

With such a stacked structure of the semiconductor layer 108, a transistor with excellent electrical characteristics and high reliability can be realized.

Note that the semiconductor layer 108a and the semiconductor layer 108b may be films having different compositions. At this time, in the case of using In-Ga-Zn oxide for both the semiconductor layer 108a and the semiconductor layer 108b, it is preferable to use an oxide target having a higher composition of In than the semiconductor layer 108b for the semiconductor layer 108a.

As shown in FIG. 8A, a low-resistance region 108na is provided in a region which does not overlap with the conductive layer 112 of the semiconductor layer 108a, and a low-resistance region is provided in a region which does not overlap with the conductive layer 112 of the semiconductor layer 108b. 108 nb are provided.

[Configuration Example 5]
9A and 9B show cross-sectional views of a transistor 100D exemplified below. Note that
FIG. 2A can be referred to for the top view. The transistor 100D is mainly different from the transistor 100 exemplified in Configuration Example 2 in that the semiconductor layer 108 has a stacked structure.

The semiconductor layer 108 has a stacked structure in which the semiconductor layer 108 c and the semiconductor layer 108 a are stacked from the insulating layer 104 side.

The semiconductor layer 108c is preferably a film higher in crystallinity than the semiconductor layer 108a.
The semiconductor layer 108c is preferably a film in which hydrogen and oxygen are less likely to be diffused than the semiconductor layer 108a.

In the case where an In—Ga—Zn oxide is used for the semiconductor layer 108 a and the semiconductor layer 108 c, it is preferable to use a material in which the semiconductor layer 108 c has a smaller composition of In than the semiconductor layer 108 a. Further, it is preferable to use a material in which the semiconductor layer 108c has a Zn composition higher than that of the semiconductor layer 108a. Thus, the barrier properties to hydrogen and oxygen of the semiconductor layer 108c can be improved. In particular, when the composition of Zn is increased, the crystallinity of the semiconductor layer 108c can be easily improved, so that the barrier property can be improved.

For example, in the semiconductor layer 108c, the ratio of the numbers of atoms of In, M, and Zn is In: M: Z.
It is preferable to use a film formed of a sputtering target in which n = 1: 3: 4, In: M: Zn = 1: 3: 2, or in the vicinity thereof.

By providing the semiconductor layer 108 c with high barrier properties between the semiconductor layer 108 a and the insulating layer 104, diffusion of oxygen and hydrogen from the insulating layer 104 to the semiconductor layer 108 a can be prevented. Therefore, hydrogen in the channel formation region of the semiconductor layer 108 a can be reduced, and a highly reliable transistor can be realized. In addition, the low-resistance region 108na of the semiconductor layer 108a
Since the supply of oxygen can prevent the increase in resistance, the resistance between the source and the drain can be lowered.

Note that as illustrated in FIG. 9A, a low-resistance region 108nc may be formed in a portion of the semiconductor layer 108c which does not overlap with the conductive layer 112.

[Configuration Example 6]
10A and 10B show cross-sectional views of a transistor 100E exemplified below. Note that FIG. 2A can be referred to for the top view. The transistor 100E is mainly different from the transistor 100 illustrated in Configuration Example 2 in that the semiconductor layer 108 has a stacked structure.

The semiconductor layer 108 has a stacked structure in which a semiconductor layer 108 c, a semiconductor layer 108 a, and a semiconductor layer 108 b are stacked from the insulating layer 104 side.

For the semiconductor layers 108a and the semiconductor layers 108b, the same films as those in Structural Example 4 can be used. The semiconductor layer 108c can be formed using the same film as that in Structural Example 5 described above.

With such a configuration, the semiconductor layer 108 c allows the insulating layer 104 to the semiconductor layer 10.
The semiconductor layer 108b can prevent damage and the like during processing while preventing diffusion of impurities to 8a. Thus, a transistor with excellent reliability can be realized.

  The above is the description of each configuration example.

At least a part of the structural example, the manufacturing method, and the drawings and the like which are exemplified in this embodiment can be implemented in appropriate combination with another structural example, a manufacturing method, a drawing, and the like.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

Second Embodiment
In this embodiment, an example of a display device including the transistor described in the above embodiment will be described.

[Example of configuration]
FIG. 11A is a top view illustrating an example of a display device. Display device 7 shown in FIG.
The pixel 00 is provided with a pixel portion 702 provided on the first substrate 701, a source driver circuit portion 704 and a gate driver circuit portion 706 provided on the first substrate 701, a pixel portion 702, a source driver circuit portion 704, And a sealing material 712 disposed so as to surround the gate driver circuit portion 706 and a second substrate 705 provided to face the first substrate 701. Note that the first substrate 701 and the second substrate 705 are attached to each other by a sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed by the first substrate 701, the sealant 712, and the second substrate 705. Although not shown in FIG. 11A, the first substrate 701 and the second substrate 70 are not shown.
A display element is provided between the five.

Further, in the display device 700, an FPC terminal portion 708 (FPC: Flexible printe) is formed in a region different from the region surrounded by the sealant 712 on the first substrate 701.
d circuit) is provided. The FPC terminal portion 708 includes the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the gate driver circuit portion 706.
Each is electrically connected. An FPC 716 is connected to the FPC terminal portion 708, and various signals and the like are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 by the FPC 716. Further, signal lines 710 are connected to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708, respectively. Various signals and the like supplied by the FPC 716 are transmitted through the signal line 710 to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FP.
C terminal portion 708 is provided.

In addition, a plurality of gate driver circuit portions 706 may be provided in the display device 700. In addition, although an example in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed over the same first substrate 701 as the pixel portion 702 is shown as the display device 700, the present invention is not limited to this structure. For example, only the gate driver circuit portion 706 may be formed on the first substrate 701, or only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit, a gate driver circuit, or the like is formed (eg, a driver circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) may be formed over the first substrate 701. . Note that there is no particular limitation on the method for connecting a driver circuit substrate formed separately, and a COG (Chip On Glass) method, a wire bonding method, or the like can be used.

The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 included in the display device 700 each include a plurality of transistors, and the transistor which is a semiconductor device of one embodiment of the present invention can be applied. .

In addition, the display device 700 can have various elements. As an example of the element,
For example, electroluminescent (EL) elements (EL elements including organic and inorganic substances, organic EL elements, inorganic EL elements, LEDs, etc.), light emitting transistor elements (transistors that emit light according to current), electron emitting elements, liquid crystal elements, electrons Ink element, electrophoretic element, electrowetting element, plasma display panel (PDP), MEMS (micro, micro
Electro mechanical system) Display (eg, grating light valve (GLV), digital micro mirror device (DMD), digital micro shutter (DMS) element, interferometric modulation (IMOD) element, etc.), piezoelectric ceramic display Etc.

In addition, an example of a display device using an EL element is an EL display. An example of a display device using an electron emission element is a field emission display (FE
D) or SED flat display (SED: Surface-conductio)
n Electron-emitter Display) and the like. Examples of a display device using a liquid crystal element include a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct view liquid crystal display, projection liquid crystal display) and the like. Examples of display devices using electronic ink elements or electrophoretic elements are as follows:
There is electronic paper etc. In the case of realizing a semi-transmissive liquid crystal display or a reflective liquid crystal display, part or all of the pixel electrodes may have a function as a reflective electrode. For example, some or all of the pixel electrodes may have aluminum, silver, or the like. In that case, it is also possible to provide a storage circuit such as an SRAM under the reflective electrode. This can further reduce power consumption.

Note that as a display method in the display device 700, a progressive method, an interlace method, or the like can be used. In addition, as color elements controlled by pixels at the time of color display, R
It is not limited to three colors of GB (R is red, G is green, B is blue). For example, it may be composed of four pixels of an R pixel, a G pixel, a B pixel, and a W (white) pixel. Or, like a pen tile array, two color components of RGB constitute one color component, and two color components differ
The color may be selected and configured. Alternatively, one or more colors of yellow, cyan, magenta and the like may be added to RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to the display device for color display, and can be applied to a display device for monochrome display.

In addition, a colored layer (also referred to as a color filter) is used to cause a display device to perform color display by using white light (W) in a backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, and the like).
) May be used. The colored layer is, for example, red (R), green (G), blue (B),
It is possible to use yellow (Y) etc. in combination as appropriate. By using a colored layer, color reproducibility can be enhanced as compared to the case where no colored layer is used. At this time, white light in a region not having a colored layer may be directly used for display by arranging a region having a colored layer and a region not having a colored layer. By disposing a region not having a colored layer in part, in bright display, a decrease in luminance due to the colored layer can be reduced, and power consumption can be reduced by about 20% to about 30%. However, when full-color display is performed using a self light emitting element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having respective luminescent colors. In some cases, power consumption can be further reduced by using a self-luminous element than in the case of using a colored layer.

Moreover, as a coloring method, in addition to a method (color filter method) in which a part of light emission from the above-mentioned white light emission is converted into red, green and blue by passing through a color filter, red, green and blue light emission A method (three-color method) to be used respectively or a method (color conversion method, quantum dot method) for converting part of light emission from blue light emission to red or green may be applied.

The display device 700A illustrated in FIG. 11B is a display device which can be suitably used for an electronic device having a large screen. For example, it can be suitably used for a television device, a monitor device, digital signage and the like.

The display device 700A includes a plurality of source driver ICs 721 and a pair of gate driver circuits 722.

The plurality of source driver ICs 721 are attached to the FPC 723 respectively. In the plurality of FPCs 723, one of the terminals is a substrate 701 and the other is a printed circuit board 72.
It is connected to 4 respectively. By bending the FPC 723, the printed substrate 724 can be provided on the back side of the pixel portion 702 and mounted on an electrical device.

On the other hand, the gate driver circuit 722 is formed on the substrate 701. Thereby, an electronic device with a narrow frame can be realized.

With such a configuration, a large-sized and high-resolution display device can be realized. For example, the present invention can be applied to a display having a screen size of 30 inches or more, 40 inches, 50 inches, or 60 inches or more. In addition, a display device with extremely high resolution such as full high definition, 4K2K, or 8K4K can be realized.

[Example of section configuration]
Hereinafter, structures in which a liquid crystal element and an EL element are used as display elements will be described with reference to FIGS. 12 and 13 are cross-sectional views taken along the alternate long and short dash line Q-R shown in FIG. 11, and are configured using liquid crystal elements as display elements. Also, FIG.
It is sectional drawing in the dashed-dotted line Q-R shown to, and is the structure using EL element as a display element.

First, the common parts shown in FIGS. 12 to 14 will be described first, and then the different parts will be described below.

[Description of Common Part of Display Device]
The display device 700 illustrated in FIGS. 12 to 14 includes a lead wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. In addition, the routing wiring portion 711 has a signal line 710. The pixel portion 702 also includes a transistor 750 and a capacitor 790. In addition, the source driver circuit portion 704 includes a transistor 752.

The transistors described in Embodiment 1 can be applied to the transistors 750 and 752.

The transistor used in this embodiment has the oxide semiconductor film which is highly purified and in which the formation of oxygen vacancies is suppressed. The transistor can reduce off current. Therefore, the holding time of an electric signal such as an image signal can be extended, and the writing interval can be set long in the power on state. Thus, the frequency of the refresh operation can be reduced, which leads to an effect of suppressing power consumption.

In addition, the transistor used in this embodiment can be driven at high speed because relatively high field-effect mobility can be obtained. For example, by using such a transistor which can be driven at high speed in a display device, the switching transistor in the pixel portion and the driver transistor used in the driver circuit portion can be formed over the same substrate. That is, as a separate drive circuit,
Since it is not necessary to use a semiconductor device formed of a silicon wafer or the like, the number of parts of the semiconductor device can be reduced. In addition, by using a transistor which can be driven at high speed also in the pixel portion, an image with high quality can be provided.

The capacitor 790 has a lower electrode which is formed through a step of processing the same conductive film as the first gate electrode of the transistor 750 and a conductive film which functions as a conductive film and a conductive which functions as a source electrode or a drain electrode of the transistor 750 And an upper electrode formed through the process of processing the same conductive film as the film. In addition, an insulating film formed through a step of forming an insulating film which is the same as an insulating film functioning as a first gate insulating film of the transistor 750 is formed between the lower electrode and the upper electrode; An insulating film formed through the step of forming the same insulating film as the insulating film which functions as a protective insulating film is provided. That is, the capacitor 790 has a stacked structure in which an insulating film functioning as a dielectric film is held between a pair of electrodes.

Further, in FIGS. 12 to 14, a planarization insulating film 770 is provided over the transistor 750, the transistor 752, and the capacitor 790.

12 to 14 illustrate the configuration in which the transistor having the same structure is used as the transistor 750 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704, the present invention is not limited to this. For example, different transistors may be used for the pixel portion 702 and the source driver circuit portion 704. Specifically, the pixel unit 7
A top gate transistor is used in 02, a bottom gate transistor is used in the source driver circuit portion 704, or a bottom gate transistor is used in the pixel portion 702, and a top gate transistor is used in the source driver circuit portion 704. The structure used etc. are mentioned. Note that the above source driver circuit unit 704 may be read as a gate driver circuit unit.

In addition, the signal line 710 is formed through the same process as a conductive film which functions as a source electrode and a drain electrode of the transistors 750 and 752. For example, in the case of using a material containing a copper element as the signal line 710, signal delay due to wiring resistance and the like can be reduced and display on a large screen can be performed.

Further, the FPC terminal portion 708 includes the connection electrode 760, the anisotropic conductive film 780, and the FPC 71.
Have six. Note that the connection electrode 760 is formed through the same process as a conductive film which functions as a source electrode and a drain electrode of the transistors 750 and 752. The connection electrode 760 is electrically connected to a terminal included in the FPC 716 through an anisotropic conductive film 780.

For example, a glass substrate can be used as the first substrate 701 and the second substrate 705. Alternatively, a flexible substrate may be used as the first substrate 701 and the second substrate 705. Examples of the flexible substrate include a plastic substrate and the like.

In addition, a structure body 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer, and the distance between the first substrate 701 and the second substrate 705
To control the cell gap). Note that a spherical spacer may be used as the structure 778.

In addition, on the second substrate 705 side, a light shielding film 738 functioning as a black matrix,
A coloring film 736 functioning as a color filter and an insulating film 734 in contact with the light shielding film 738 and the coloring film 736 are provided.

[Configuration Example of Display Device Using Liquid Crystal Element]
A display device 700 illustrated in FIG. 12 includes a liquid crystal element 775. The liquid crystal element 775 includes the conductive film 772, the conductive film 774, and the liquid crystal layer 776. The conductive film 774 is a second substrate 705.
It is provided on the side and has a function as a counter electrode. The display device 700 illustrated in FIG. 12 can display an image by controlling transmission and non-transmission of light by changing the alignment state of the liquid crystal layer 776 by a voltage applied to the conductive films 772 and 774.

The conductive film 772 is electrically connected to a conductive film which functions as a source electrode or a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770 and functions as a pixel electrode, that is, one electrode of a display element.

As the conductive film 772, a conductive film which is translucent to visible light or a conductive film which is reflective to visible light can be used. As a conductive film having translucency in visible light,
For example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used. As a conductive film which is reflective in visible light, for example, a material containing aluminum or silver may be used.

In the case of using a conductive film which is reflective to visible light as the conductive film 772, the display device 700 can
It becomes a reflection type liquid crystal display device. Further, in the case of using a conductive film which is translucent to visible light as the conductive film 772, the display device 700 is a transmissive liquid crystal display device. In the case of a reflective liquid crystal display device, a polarizing plate is provided on the viewing side. On the other hand, in the case of a transmissive liquid crystal display device, a pair of polarizing plates which sandwich a liquid crystal element is provided.

By changing the structure over the conductive film 772, the driving method of the liquid crystal element can be changed. An example of this case is shown in FIG. Further, the display device 700 illustrated in FIG. 13 is an example of a configuration using a lateral electric field method (for example, FFS mode) as a driving method of a liquid crystal element. Figure 13
In the case of the structure shown in the above, the insulating film 773 is provided over the conductive film 772 and the conductive film 774 is provided over the insulating film 773. In this case, the conductive film 774 has a function as a common electrode (also referred to as a common electrode), and alignment of the liquid crystal layer 776 by an electric field generated between the conductive film 772 and the conductive film 774 through the insulating film 773. You can control the state.

Although not shown in FIGS. 12 and 13, an alignment film may be provided on one or both of the conductive films 772 and 774 on the side in contact with the liquid crystal layer 776. Although not shown in FIGS. 12 and 13, an optical member (optical substrate) such as a polarization member, a retardation member, or an anti-reflection member may be provided as appropriate. For example, circularly polarized light by a polarizing substrate and a retardation substrate may be used. In addition, a backlight, a sidelight, or the like may be used as a light source.

When a liquid crystal element is used as the display element, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, polymer network liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, or the like can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

In addition, in the case of adopting the in-plane switching mode, liquid crystal exhibiting a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and is a phase which appears immediately before the cholesteric liquid phase is changed to the isotropic phase when the temperature of the cholesteric liquid crystal is raised. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which several weight% or more of a chiral agent is mixed is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic, so alignment processing is unnecessary. In addition, since it is not necessary to provide an alignment film, rubbing processing is also unnecessary, so electrostatic breakdown caused by rubbing processing can be prevented, and defects and breakage of the liquid crystal display device in the manufacturing process can be reduced. .
In addition, liquid crystal materials exhibiting a blue phase have a small viewing angle dependency.

In the case of using a liquid crystal element as a display element, TN (Twisted Nematic
) Mode, IPS (In-Plane-Switching) mode, FFS (Frin)
ge Field Switching mode, ASM (Axially Symme)
tric aligned Micro-cell mode, OCB (Optical)
Compensated Birefringence mode, FLC (Ferroe)
lectric Liquid Crystal) mode, AFLC (AntiFerr)
oelectric Liquid Crystal mode, ECB (Electri)
It is possible to use a cally controlled mode, a guest host mode, or the like.

Alternatively, a normally black liquid crystal display device, for example, a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used. There are several vertical alignment modes, for example, MVA (Multi-Domain Vertical Alignment).
), PVA (Patterned Vertical Alignment) mode, ASV mode, etc. can be used.

[Display device using light emitting element]
A display device 700 illustrated in FIG. 14 includes a light emitting element 782. The light-emitting element 782 includes the conductive film 772, the EL layer 786, and the conductive film 788. The display device 700 illustrated in FIG. 14 can display an image when the EL layer 786 included in the light emitting element 782 provided for each pixel emits light. Note that the EL layer 786 includes an organic compound or an inorganic compound such as a quantum dot.

Materials usable for the organic compound include fluorescent materials and phosphorescent materials. In addition, as materials that can be used for quantum dots, colloidal quantum dot materials, alloy quantum dot materials, core-shell quantum dot materials, core quantum dot materials,
Etc. Alternatively, a material containing group 12 and group 16, group 13 and group 15, or group 14 and group 16 may be used. Or cadmium (Cd), selenium (Se),
Zinc (Zn), Sulfur (S), Phosphorus (P), Indium (In), Tellurium (Te), Lead (P)
b) A quantum dot material having an element such as gallium (Ga), arsenic (As), aluminum (Al) or the like may be used.

In the display device 700 illustrated in FIG. 14, the insulating film 7 is formed over the planarization insulating film 770 and the conductive film 772.
30 are provided. The insulating film 730 covers part of the conductive film 772. Note that the light emitting element 782
Is a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and the EL layer 7
It transmits the light emitted by 86. Although the top emission structure is illustrated in the present embodiment, the present invention is not limited to this. For example, the invention can be applied to a bottom emission structure in which light is emitted to the conductive film 772 side, and a dual emission structure in which light is emitted to both the conductive film 772 and the conductive film 788.

A coloring film 736 is provided at a position overlapping with the light emitting element 782, and a light shielding film 738 is provided at a position overlapping with the insulating film 730, the lead wiring portion 711, and the source driver circuit portion 704. The coloring film 736 and the light shielding film 738 are covered with an insulating film 734. Further, a sealing film 732 is filled between the light emitting element 782 and the insulating film 734. Note that FIG.
In the display device 700 shown in the above, the configuration in which the colored film 736 is provided is illustrated, but the present invention is not limited to this. For example, in the case where the EL layer 786 is formed in an island shape for each pixel, that is, in a case where the EL layer 786 is formed separately, the coloring film 736 may be omitted.

[Configuration Example of Providing Input / Output Device on Display Device]
In addition, the display device 700 illustrated in FIGS. 12 to 14 may be provided with an input / output device. As the said input-output device, a touch panel etc. are mentioned, for example.

A configuration in which the touch panel 791 is provided in the display device 700 shown in FIG. 13 is shown in FIG. 15, and a configuration in which the touch panel 791 is provided in the display device 700 shown in FIG.

15 is a cross-sectional view of the configuration in which the touch panel 791 is provided in the display device 700 shown in FIG. 13, and FIG. 16 is a cross-sectional view in the configuration of providing the touch panel 791 in the display device 700 shown in FIG.

  First, the touch panel 791 shown in FIGS. 15 and 16 will be described below.

The touch panel 791 illustrated in FIGS. 15 and 16 is a so-called in-cell touch panel provided between the substrate 705 and the coloring film 736. The touch panel 791 has a light shielding film 738
And the colored film 736 may be formed on the substrate 705 side.

Note that the touch panel 791 includes a light shielding film 738, an insulating film 792, an electrode 793, an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. For example, it is possible to detect a change in capacitance between the electrode 793 and the electrode 794 that may occur when a detected object such as a finger or a stylus approaches.

In the upper part of the transistor 750 shown in FIGS.
The intersection with the electrode 794 is clearly shown. The electrode 796 is electrically connected to two electrodes 793 sandwiching the electrode 794 through an opening provided in the insulating film 795. Note that FIG.
16A and 16B illustrate the structure in which the region where the electrode 796 is provided is provided in the pixel portion 702, the present invention is not limited to this. For example, the region may be formed in the source driver circuit portion 704.

The electrode 793 and the electrode 794 are provided in a region overlapping with the light shielding film 738. Also, FIG.
It is preferable that the electrode 793 be provided so as not to overlap with the light emitting element 782 as shown in FIG. In addition, as illustrated in FIG. 16, the electrode 793 is preferably provided so as not to overlap with the liquid crystal element 775. In other words, the electrode 793 has an opening in a region overlapping with the light-emitting element 782 and the liquid crystal element 775. That is, the electrode 793 has a mesh shape. With such a configuration, the electrode 793 can be configured not to block light emitted from the light emitting element 782. Alternatively, the electrode 793 can be configured not to block light transmitted through the liquid crystal element 775. Therefore, since the decrease in luminance due to the disposition of the touch panel 791 is extremely small, a display device with high visibility and reduced power consumption can be realized. Note that the electrode 794 may have a similar structure.

Further, since the electrode 793 and the electrode 794 do not overlap with the light-emitting element 782, a metal material with low visible light transmittance can be used for the electrode 793 and the electrode 794. Or electrode 7
Since the electrodes 93 and 794 do not overlap with the liquid crystal element 775, a metal material with low visible light transmittance can be used for the electrodes 793 and 794.

Therefore, the resistance of the electrode 793 and the electrode 794 can be reduced as compared with an electrode using an oxide material having high visible light transmittance, and sensor sensitivity of the touch panel can be improved.

For example, conductive nanowires may be used for the electrodes 793, 794, and 796. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 n.
The size may be m or less, more preferably 5 nm or more and 25 nm or less. In addition, as the nanowires, metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires, carbon nanotubes, or the like may be used. For example, the electrodes 793, 7
When using Ag nanowire for any one or all of 94 and 796, the light transmittance in visible light can be 89% or more, and the sheet resistance value can be 40 Ω / sq or more and 100 Ω / sq or less.

Moreover, in FIG.15 and FIG.16, although it illustrated about the structure of the in-cell type touch panel, it is not limited to this. For example, a so-called on-cell touch panel formed on the display device 700 or a so-called out-cell touch panel used by being attached to the display device 700 may be used.

Thus, the display device of one embodiment of the present invention can be used in combination with various types of touch panels.

At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples, drawings, and the like.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

Third Embodiment
In this embodiment, a display device including the semiconductor device of one embodiment of the present invention is described with reference to FIG.

The display device illustrated in FIG. 17A includes a region including a pixel of a display element (hereinafter referred to as a pixel portion 502) and a circuit portion which is provided outside the pixel portion 502 and includes a circuit for driving the pixel (see FIG.
Hereinafter, the drive circuit portion 504) and a circuit having a protection function of an element (hereinafter referred to as a protection circuit 50).
6) and a terminal portion 507. Note that the protective circuit 506 may not be provided.

It is preferable that part or all of the driver circuit portion 504 be formed over the same substrate as the pixel portion 502. Thereby, the number of parts and the number of terminals can be reduced. Drive circuit unit 504
When part or all of the driver circuit portion 504 is not formed over the same substrate as the pixel portion 502, part or all of the driver circuit portion 504 can be formed using COG or TAB (Tape Automated B).
can be implemented by

The pixel portion 502 includes a circuit (hereinafter referred to as a pixel circuit 501) for driving a plurality of display elements arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The driver circuit portion 504 outputs a signal (scanning signal) for selecting a pixel (hereinafter referred to as a gate driver 504a) and a circuit for supplying a signal (data signal) for driving a display element of the pixel (data signal). Hereinafter, a driver circuit such as a source driver 504 b) is included.

The gate driver 504 a includes a shift register and the like. The gate driver 504a is
A signal for driving the shift register is input through the terminal portion 507, and the signal is output. For example, the gate driver 504a receives a start pulse signal, a clock signal, and the like, and outputs a pulse signal. The gate driver 504a has a function of controlling the potentials of wirings (hereinafter, referred to as scan lines GL_1 to GL_X) to which scan signals are supplied. Note that a plurality of gate drivers 504 a may be provided, and the scan lines GL_1 to GL_X may be divided and controlled by the plurality of gate drivers 504 a. Alternatively, the gate driver 504a has a function capable of supplying an initialization signal. However, the present invention is not limited to this.
4a can also supply another signal.

The source driver 504 b includes a shift register and the like. The source driver 504 b is
In addition to the signal for driving the shift register, the signal (image signal) that is the source of the data signal is input through the terminal portion 507. The source driver 504 b has a function of generating a data signal to be written to the pixel circuit 501 based on an image signal. In addition, the source driver 504 b has a function of controlling output of a data signal in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, and the like. Further, the source driver 504 b has a function of controlling the potentials of wirings (hereinafter referred to as data lines DL_1 to DL_Y) to which data signals are supplied. Alternatively, the source driver 504 b has a function capable of supplying an initialization signal. However, without being limited to this, the source driver 504 b can also supply another signal.

The source driver 504 b is configured using, for example, a plurality of analog switches.
The source driver 504 b sequentially turns on the plurality of analog switches to
A signal obtained by time-dividing an image signal can be output as a data signal. Alternatively, the source driver 504 b may be configured using a shift register or the like.

Each of the plurality of pixel circuits 501 receives a pulse signal through one of the plurality of scanning lines GL to which a scanning signal is applied, and receives a data signal through one of the plurality of data lines DL to which the data signal is applied. It is input. In each of the plurality of pixel circuits 501, writing and holding of data of a data signal are controlled by the gate driver 504a. For example, in the pixel circuit 501 in the m-th row and the n-th column, a pulse signal is input from the gate driver 504a through the scanning line GL_m (m is a natural number less than or equal to X), and the data line DL_n (m is a value corresponding to the potential of the scanning line GL_m).
A data signal is input from the source driver 504 b through n is a natural number less than or equal to Y).

The protective circuit 506 illustrated in FIG. 17A includes, for example, the gate driver 504 a and the pixel circuit 5.
It is connected to the scanning line GL which is a wiring between 01. Alternatively, the protection circuit 506 is connected to a data line DL which is a wiring between the source driver 504 b and the pixel circuit 501. Alternatively, the protective circuit 506 can be connected to a wiring between the gate driver 504 a and the terminal portion 507. Alternatively, the protective circuit 506 can be connected to a wiring between the source driver 504 b and the terminal portion 507. Note that a terminal portion 507 refers to a portion provided with a terminal for inputting a power supply, a control signal, and an image signal from an external circuit to the display device.

The protective circuit 506 is a circuit which brings a wiring and another wiring into conduction when the wiring to which the protection circuit 506 is connected is supplied with a potential outside the predetermined range.

As shown in FIG. 17A, the pixel portion 502 and the driver circuit portion 504 are each provided with a protective circuit 50.
By providing 6, the ESD (Electro Static Discharge:
It is possible to increase the resistance of the display device to an overcurrent generated by electrostatic discharge or the like.
However, the configuration of the protection circuit 506 is not limited to this. For example, the protection circuit 506 may be connected to the gate driver 504 a or the protection circuit 506 may be connected to the source driver 504 b. Alternatively, the protective circuit 506 can be connected to the terminal portion 507.

Although FIG. 17A illustrates an example in which the driver circuit portion 504 is formed by the gate driver 504 a and the source driver 504 b, the present invention is not limited to this configuration. For example, only the gate driver 504 a may be formed, and a substrate (for example, a driver circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) on which a separately prepared source driver circuit is formed may be mounted.

Here, FIG. 18 shows a configuration different from that of FIG. In FIG. 18, a pair of source lines (for example, the source line DLa1 and the source line DLb1) are disposed so as to sandwich a plurality of pixels arranged in the source line direction. In addition, two adjacent gate lines (for example, gate line GL_1
And the gate line GL_2) are electrically connected.

The pixels connected to the gate line GL_1 are connected to one of the source lines (the source line DLa1, the source line DLa2, etc.), and the pixels connected to the gate line GL_2 are the other source line (the source line DLb1, the source Are connected to line DLb2 etc.).

With such a configuration, two gate lines can be selected simultaneously. Thus, the length of one horizontal period can be doubled as compared with the configuration shown in FIG. Therefore, it is easy to increase the resolution and the screen size of the display device.

In addition, the plurality of pixel circuits 501 illustrated in FIG. 17A and FIG. 18 are, for example, illustrated in FIG.
Can be configured as shown in FIG.

The pixel circuit 501 illustrated in FIG. 17B includes a liquid crystal element 570, a transistor 550, and a capacitor 560. The transistor described in the above embodiment can be applied to the transistor 550.

The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set in accordance with the specification of the pixel circuit 501. The alignment state of the liquid crystal element 570 is set by the data to be written. Note that a common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 570 included in each of the plurality of pixel circuits 501. Further, different potentials may be applied to one of the pair of electrodes of the liquid crystal element 570 of the pixel circuit 501 in each row.

For example, as a method of driving a display provided with the liquid crystal element 570, a TN mode, an STN mode, a VA mode, an ASM (Axially Symmetric Aligned M) can be used.
icro-cell mode, OCB (Optically Compensated)
Birefringence) mode, FLC (Ferroelectric Liqu)
id Crystal) mode, AFLC (AntiFerroelectric Li
quid crystal mode, MVA mode, PVA (patterned Ve
rtical alignment) mode, IPS mode, FFS mode, or TBA
(Transverse Bend Alignment) mode or the like may be used.
Further, as a method of driving the display device, ECB (Electric
ally Controlled Birefringence mode, PDLC (P
olymer dispersed liquid crystal) mode, PNLC
(Polymer Network Liquid Crystal) mode, guest host mode, etc. However, the present invention is not limited to this, and various liquid crystal elements and driving methods thereof can be used.

In the m-th row and n-th pixel circuit 501, one of the source and drain electrodes of the transistor 550 is electrically connected to the data line DL_n, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. Ru. Further, the gate electrode of the transistor 550 is connected to the scanning line G.
It is electrically connected to L_m. The transistor 550 has a function of controlling data writing of a data signal by being turned on or off.

One of the pair of electrodes of capacitive element 560 is a wiring to which a potential is supplied (hereinafter referred to as potential supply line VL).
And the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. Note that the value of the potential of the potential supply line VL is appropriately set in accordance with the specification of the pixel circuit 501. The capacitor element 560 has a function as a storage capacitor for storing written data.

For example, in a display device including the pixel circuit 501 in FIG. 17B, for example, FIG.
The pixel circuits 501 in the respective rows are sequentially selected by the gate driver 504a shown in FIG. 4A, and the transistor 550 is turned on to write data signal data.

The pixel circuit 501 to which data is written is brought into the holding state by the transistor 550 being turned off. Images can be displayed by sequentially performing this on a row-by-row basis.

In addition, the plurality of pixel circuits 501 illustrated in FIG. 17A can have a configuration illustrated in FIG. 17C, for example.

The pixel circuit 501 illustrated in FIG. 17C includes transistors 552 and 554, a capacitor 562, and a light-emitting element 572. Transistor 552 and transistor 554
The transistor described in the above embodiment can be applied to one or both of the transistors.

One of the source electrode and the drain electrode of the transistor 552 is electrically connected to a wiring (hereinafter referred to as a signal line DL_n) to which a data signal is supplied. Furthermore, transistor 55
The gate electrode 2 is electrically connected to a wiring (hereinafter referred to as a scan line GL_m) to which a gate signal is applied.

The transistor 552 has a function of controlling data writing of a data signal by being turned on or off.

One of the pair of electrodes of capacitive element 562 is a wiring to which a potential is applied (hereinafter referred to as potential supply line VL).
And the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

  The capacitor element 562 has a function as a storage capacitor for storing written data.

One of the source electrode and the drain electrode of the transistor 554 is electrically connected to the potential supply line VL_a. Further, the gate electrode of the transistor 554 is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

One of the anode and the cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 554.

As the light emitting element 572, an organic electroluminescent element (also referred to as an organic EL element) or the like can be used, for example. However, the light emitting element 572 is not limited to this, and an inorganic EL element containing an inorganic material may be used.

Note that the high power supply potential VDD is applied to one of the potential supply line VL_a and the potential supply line VL_b, and the low power supply potential VSS is applied to the other.

In the display device including the pixel circuit 501 in FIG. 17C, for example, the pixel circuits 501 in each row are sequentially selected by the gate driver 504a illustrated in FIG. 17A, and the transistor 552 is turned on to output data signal data. Write.

The pixel circuit 501 to which data is written is brought into the holding state by the transistor 552 being turned off. Further, the amount of current flowing between the source electrode and the drain electrode of the transistor 554 is controlled in accordance with the potential of the written data signal, and the light emitting element 572 emits light with luminance according to the amount of current flowing. Images can be displayed by sequentially performing this on a row-by-row basis.

At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples, drawings, and the like.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

Embodiment 4
In this embodiment, a display module and an electronic device each including the semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[1. Display module]
The display module 7000 illustrated in FIG. 19 includes a touch panel 7004 connected to the FPC 7003 between the upper cover 7001 and the lower cover 7002, a display panel 7006 connected to the FPC 7005, a backlight 7007, a frame 7009, and a printed substrate 701.
0, having a battery 7011

  The semiconductor device of one embodiment of the present invention can be used for the display panel 7006, for example.

The shapes and sizes of the upper cover 7001 and the lower cover 7002 can be changed as appropriate in accordance with the sizes of the touch panel 7004 and the display panel 7006.

The touch panel 7004 can be used by overlapping a resistive touch panel or a capacitive touch panel with the display panel 7006. In addition, the opposite substrate (the sealing substrate) of the display panel 7006 can have a touch panel function. In addition, display panel 7
It is also possible to provide an optical sensor in each pixel of 006 to make an optical touch panel.

The backlight 7007 has a light source 7008. Although FIG. 19 illustrates the configuration in which the light source 7008 is disposed on the backlight 7007, the present invention is not limited to this. For example, the light source 7008 may be disposed at an end portion of the backlight 7007 and a light diffusion plate may be further used. Note that in the case of using a self-luminous light emitting element such as an organic EL element or in the case of a reflective panel or the like, the backlight 7007 may not be provided.

The frame 7009 has a function as an electromagnetic shield for blocking an electromagnetic wave generated by the operation of the printed substrate 7010, in addition to a protective function of the display panel 7006. The frame 7009 may have a function as a heat sink.

The printed circuit board 7010 has a power supply circuit and a signal processing circuit for outputting a video signal and a clock signal. As a power supply for supplying power to the power supply circuit, an external commercial power supply may be used, or a power supply using a separately provided battery 7011 may be used. The battery 7011 can be omitted when using a commercial power supply.

In addition, the display module 7000 may be additionally provided with a member such as a polarizing plate, a retardation plate, or a prism sheet.

[2. Electronic device 1]
Next, FIGS. 20A to 20E illustrate an example of the electronic device.

FIG. 20A is a view showing the appearance of the camera 8000 in a state in which the finder 8100 is attached.

The camera 8000 includes a housing 8001, a display portion 8002, an operation button 8003, a shutter button 8004, and the like. Further, a detachable lens 8006 is attached to the camera 8000.

Here, as the camera 8000, the lens 8006 can be removed from the housing 8001 and replaced, but the lens 8006 and the housing may be integrated.

The camera 8000 can capture an image by pressing the shutter button 8004. In addition, the display portion 8002 has a function as a touch panel, and an image can be taken by touching the display portion 8002.

A housing 8001 of the camera 8000 has a mount having an electrode, and a finder 810
In addition to 0, a strobe device or the like can be connected.

The finder 8100 includes a housing 8101, a display portion 8102, a button 8103, and the like.

The housing 8101 has a mount that engages with the mount of the camera 8000, and the finder 8100 can be attached to the camera 8000. In addition, the mount includes an electrode, and an image or the like received from the camera 8000 can be displayed on the display portion 8102 through the electrode.

The button 8103 has a function as a power button. Display of the display portion 8102 can be turned on / off by a button 8103.

The display device of one embodiment of the present invention can be applied to the display portion 8002 of the camera 8000 and the display portion 8102 of the finder 8100.

Although the camera 8000 and the finder 8100 are separate electronic devices in FIG. 20A and are detachable from each other, the housing 8001 of the camera 8000 has a built-in finder having a display device. It is also good.

  FIG. 20B is a view showing the appearance of the head mounted display 8200.

The head mount display 8200 includes a mounting portion 8201, a lens 8202, and a main body 82.
03, a display portion 8204, a cable 8205 and the like are included. Further, a battery 8206 is incorporated in the mounting portion 8201.

The cable 8205 supplies power from the battery 8206 to the main body 8203. Body 82
Reference numeral 03 denotes a wireless receiver or the like, which can display video information such as received image data on the display unit 8204. In addition, by using the camera provided in the main body 8203 to capture the movement of the eyeballs and eyelids of the user and calculating the coordinates of the user's viewpoint based on the information, using the user's viewpoint as an input means it can.

In addition, in the mounting portion 8201, a plurality of electrodes may be provided at a position where the user touches. The main body 8203 detects the current flowing to the electrodes as the user's eye moves,
You may have a function which recognizes a user's viewpoint. Moreover, you may have a function which monitors a user's pulse by detecting the electric current which flows into the said electrode. Also, the mounting unit 820
1 may include various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function of displaying biological information of the user on the display unit 8204. In addition, the movement of the head of the user may be detected, and the image displayed on the display portion 8204 may be changed in accordance with the movement.

  The display device of one embodiment of the present invention can be applied to the display portion 8204.

FIGS. 20C, 20D, and 20E show the appearance of the head mounted display 8300. FIG. The head mounted display 8300 includes a housing 8301, a display portion 8302, a band-like fixing tool 8304, and a pair of lenses 8305.

The user can view the display on the display portion 8302 through the lens 8305.
Note that the display portion 8302 is preferably curved and disposed. By arranging the display portion 8302 in a curved manner, the user can feel a high sense of reality. Note that although the present embodiment exemplifies a structure in which one display portion 8302 is provided, the present invention is not limited to this. For example, two display portions 8302 may be provided. In this case, when one display unit is disposed in one eye of the user, it is possible to perform three-dimensional display or the like using parallax.

Note that the display device in one embodiment of the present invention can be applied to the display portion 8302. Since the display device including the semiconductor device of one embodiment of the present invention has extremely high definition, the pixel is not viewed by the user even when enlarged using the lens 8305 as illustrated in FIG. More realistic images can be displayed.

[3. Electronic device 2]
Next, an example of the electronic device illustrated in FIGS. 20A to 20E and a different electronic device will be described with reference to FIG.
1 (A) to 21 (G).

The electronic devices illustrated in FIGS. 21A to 21G include a housing 9000, a display portion 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (power , Displacement, position, velocity, acceleration, angular velocity, number of rotations, distance,
Light, liquid, magnetism, temperature, chemical, voice, time, hardness, electric field, current, voltage, power, radiation,
Flow rate, humidity, inclination, vibration, odor or infrared (including the function of measuring infrared), microphone 9008, and the like.

The electronic devices illustrated in FIGS. 21A to 21G have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function to display date or time, etc., various software (programs)
Are recorded in a recording medium, a function to control processing according to the function, a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to transmit or receive various data using the wireless communication function A program or data can be read out and displayed on the display portion. Note that the electronic device illustrated in FIGS. 21A to 21G can have various functions without limitation to the above. Although not illustrated in FIGS. 21A to 21G, the electronic device may have a plurality of display portions. In addition, a camera or the like is provided in the electronic device, and a function to capture a still image, a function to capture a moving image, a function to save the captured image in a recording medium (externally or incorporated in the camera), and a display unit And the like.

  The details of the electronic devices illustrated in FIGS. 21A to 21G will be described below.

FIG. 21A is a perspective view of the television set 9100. FIG. Television equipment 9
The display unit 9001 can incorporate a display unit 9001 having a large screen, for example, 50 inches or more, or 100 inches or more.

FIG. 21B is a perspective view showing the portable information terminal 9101. The portable information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, an information browsing apparatus, and the like. Specifically, it can be used as a smartphone. The portable information terminal 9101 is
A speaker 9003, a connection terminal 9006, a sensor 9007, and the like may be provided. In addition, the portable information terminal 9101 can display text and image information on the plurality of surfaces. For example, 3
Of the three operation buttons 9050 (also referred to as operation icons or simply icons) on the display portion 9001
Can be displayed on one side. In addition, a display portion 900 shows information 9051 indicated by a dashed rectangle.
It can be displayed on the other side of one. In addition, as an example of the information 9051, a display notifying an incoming call such as an e-mail, a social networking service (SNS) or a telephone,
There are titles such as e-mail and SNS, names of senders such as e-mail and SNS, date and time, time, remaining amount of battery, strength of antenna reception, and the like. Alternatively, instead of the information 9051, an operation button 9050 or the like may be displayed at the position where the information 9051 is displayed.

FIG. 21C is a perspective view showing the portable information terminal 9102. The portable information terminal 9102 has a function of displaying information on three or more surfaces of the display portion 9001. Here, information 9052,
An example in which the information 9053 and the information 9054 are displayed on different sides is shown. For example, the user of the portable information terminal 9102 can confirm the display (here, information 9053) in a state where the portable information terminal 9102 is stored in the chest pocket of the clothes. Specifically, the telephone number or the name or the like of the caller of the incoming call is displayed at a position where it can be observed from above the portable information terminal 9102. The user can check the display without taking out the portable information terminal 9102 from the pocket, and can judge whether or not to receive a call.

FIG. 21D is a perspective view showing a wristwatch-type portable information terminal 9200. The portable information terminal 9200 can execute various applications such as mobile phone, electronic mail, text browsing and creation, music reproduction, Internet communication, computer games and the like. In addition, the display portion 9001 is provided with a curved display surface, and can perform display along the curved display surface. In addition, the portable information terminal 9200 can execute near-field wireless communication according to the communication standard. For example, it is possible to make a hands-free call by intercommunicating with a wireless communicable headset. In addition, the portable information terminal 9200 has a connection terminal 9006, and can directly exchange data with another information terminal through a connector. In addition, charging can be performed through the connection terminal 9006. In addition, charge operation is connection terminal 900
You may carry out by wireless electric power feeding not via 6.

21E, 21F, and 21G are perspective views showing the foldable portable information terminal 9201. FIG. FIG. 21E is a perspective view of the portable information terminal 9201 in a developed state, and FIG.
FIG. 21G is a perspective view of a state in which the portable information terminal 9201 is folded, and FIG. 21G is a perspective view of the state in which (F) is in the process of changing from one side to the other. is there. The portable information terminal 9201 is excellent in portability in the folded state, and excellent in viewability of display due to a wide seamless display area in the expanded state. Mobile information terminal 92
The display unit 9001 of the 01 has three casings 9000 connected by hinges 9055.
It is supported by By bending between the two housings 9000 via the hinge 9055, the portable information terminal 9201 can be reversibly deformed from the expanded state to the folded state. For example, the portable information terminal 9201 can be bent with a curvature radius of 1 mm or more and 150 mm or less.

The electronic device described in this embodiment is characterized by having a display portion for displaying some kind of information. Note that the semiconductor device of one embodiment of the present invention can also be applied to an electronic device that does not have a display portion.

At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples, drawings, and the like.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

Fifth Embodiment
In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to the drawings.

The electronic devices described below each include the display device of one embodiment of the present invention in a display portion.
Therefore, it is an electronic device in which high resolution is realized. In addition, an electronic device in which a high resolution and a large screen are compatible can be provided.

In the display portion of the electronic device of one embodiment of the present invention, for example, full high-definition television, 4K2K, 8K4
An image having a resolution of K, 16K8K, or higher can be displayed. In addition, the screen size of the display unit may be 20 inches or more diagonally, 30 inches or more diagonally, 50 inches diagonally or more, 60 inches diagonally or more, or 70 inches diagonally or more.

Examples of the electronic device include a television device, a desktop or notebook personal computer, a monitor for a computer, digital signage (Digit
al Signage: Electronic devices equipped with relatively large screens such as large game machines such as electronic signboards and pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game devices, portable information terminals, Sound reproduction apparatus etc. are mentioned.

The electronic device or lighting device of one embodiment of the present invention is an inner wall or an outer wall of a house or a building,
Or, it can be incorporated along the curved surface of the interior or exterior of a car.

The electronic device of one embodiment of the present invention may have an antenna. By receiving the signal with the antenna, display of images, information, and the like can be performed on the display portion. In addition, when the electronic device includes an antenna and a secondary battery, the antenna may be used for contactless power transmission.

The electronic device of one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation number, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, It may have a function of measuring voltage, power, radiation, flow, humidity, inclination, vibration, odor or infrared.

The electronic device of one embodiment of the present invention can have various functions. For example, a function of displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar, a function of displaying date or time, etc., a function of executing various software (programs), wireless communication A function, a function of reading a program or data recorded in a recording medium, or the like can be provided.

FIG. 22A shows an example of a television set. The television set 7100 has a housing 7.
A display unit 7500 is incorporated in the display unit 101. Here, the housing 7 is provided by the stand 7103.
The structure which supported 101 is shown.

  The display device of one embodiment of the present invention can be applied to the display portion 7500.

The television set 7100 illustrated in FIG. 22A can be operated by an operation switch of the housing 7101 or a separate remote controller 7111. Or, the display unit 75
00 may have a touch sensor, or may be operated by touching the display portion 7500 with a finger or the like. The remote controller 7111 may have a display unit for displaying information output from the remote controller 7111. Channels and volume can be controlled with an operation key or a touch panel included in the remote controller 7111, and a video displayed on the display portion 7500 can be manipulated.

Note that the television set 7100 is provided with a receiver, a modem, and the like. The receiver can receive a general television broadcast. In addition, by connecting to a wired or wireless communication network via a modem, one-way (from a sender to a receiver) or two-way (between a sender and a receiver, between receivers, etc.) information communication is performed. It is also possible.

A notebook personal computer 7200 is shown in FIG. The laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. The display portion 7500 is incorporated in the housing 7211.

  The display device of one embodiment of the present invention can be applied to the display portion 7500.

FIGS. 22C and 22D show an example of digital signage (digital signage).

A digital signage 7300 illustrated in FIG. 22C includes a housing 7301, a display portion 7500, and the like.
And a speaker 7303 and the like. Furthermore, an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like can be included.

22D shows a digital signage 740 attached to a cylindrical column 7401.
It is 0. The digital signage 7400 has a display 7500 provided along the curved surface of the column 7401.

In FIGS. 22C and 22D, the display device of one embodiment of the present invention can be applied to the display portion 7500.

As the display portion 7500 is wider, the amount of information that can be provided at one time can be increased. Also, the wider the display portion 7500 is, the easier it is for a person to notice, and for example, advertising effects can be enhanced.

By applying a touch panel to the display portion 7500, not only an image or a moving image can be displayed on the display portion 7500, but also a user can operate intuitively, which is preferable. Moreover, when using for the application for providing information, such as route information or traffic information, usability can be improved by intuitive operation.

Also, as shown in FIGS. 22C and 22D, the digital signage 7300 or the digital signage 7400 can cooperate with the information terminal 7311 or information terminal 7411 such as a smartphone possessed by the user by wireless communication. Is preferred. For example, information of an advertisement displayed on the display portion 7500 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Further, the display of the display portion 7500 can be switched by operating the information terminal 7311 or the information terminal 7411.

In addition, it is possible to make the digital signage 7300 or the digital signage 7400 execute a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). Thus, an unspecified number of users can simultaneously participate in and enjoy the game.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

Sixth Embodiment
In this embodiment, an example of a television set to which a display device including the semiconductor device of one embodiment of the present invention can be applied is described with reference to drawings.

  FIG. 23A shows a block diagram of a television set 600. FIG.

In the drawings attached to this specification, components are classified according to functions and block diagrams are shown as blocks independent of each other. However, it is difficult to completely divide actual components according to functions, and A component may be involved in more than one function.

The television apparatus 600 includes a control unit 601, a storage unit 602, a communication control unit 603, an image processing circuit 604, a decoder circuit 605, a video signal reception unit 606, a timing controller 6.
A source driver 608, a gate driver 609, a display panel 620, and the like are included.

The display device illustrated in the above embodiment can be applied to the display panel 620 in FIG. Thus, a television set 600 which is large and has high resolution and is excellent in visibility can be realized.

The control unit 601 is, for example, a central processing unit (CPU: Central Process
can function as a g unit). For example, the control unit 601 has a system bus 63.
A storage unit 602, a communication control unit 603, an image processing circuit 604, a decoder circuit 605 via 0.
And a function of controlling components such as the video signal reception unit 606.

Transmission of signals is performed between the control unit 601 and each component via a system bus 630. In addition, the control unit 601 has a function of processing a signal input from each component connected via the system bus 630, a function of generating a signal to be output to each component, and the like. Control each component.

The storage unit 602 functions as a register accessible by the control unit 601 and the image processing circuit 604, a cache memory, a main memory, a secondary memory, and the like.

As a storage device that can be used as a secondary memory, for example, a storage device to which a rewritable non-volatile storage element is applied can be used. For example, flash memory,
MRAM (Magnetoresistive Random Access Memo
ry), PRAM (Phase change RAM), ReRAM (Resista)
nce RAM), FeRAM (Ferroelectric RAM), etc. can be used.

Also, as a storage device that can be used as a temporary memory such as a register, cache memory, main memory, etc., DRAM (Dynamic RAM), SRAM (Sta
A volatile storage element such as tic random access memory) may be used.

For example, as a RAM provided in the main memory, a DRAM, for example, is used, and a memory space is virtually allocated and used as a work space of the control unit 601. Storage unit 602
The operating system, application programs, program modules, program data, etc. stored in are loaded into the RAM for execution. These data, programs, and program modules loaded into the RAM are directly accessed and operated by the control unit 601.

On the other hand, BIOS does not require rewriting in ROM (Basic Input / Out)
put System), firmware, etc. can be stored. As ROM,
Mask ROM, OTPROM (One Time Programmable Rea
d Only Memory), EPROM (Erasable Programmab)
le Read Only Memory) or the like can be used. As an EPROM, a UV-EPROM (Ultra-V) that enables erasing of stored data by ultraviolet irradiation.
iolet Erasable Programmable Read Only Me
mory), EEPROM (Electrically Erasable Progr)
There are an ammable read only memory), a flash memory and the like.

In addition to the storage unit 602, a removable storage device may be connectable.
For example, a hard disk drive (Hard Disk) that functions as a storage device
Drive: HDD) or Solid State Drive (Solid State Dri)
ve: recording media drive such as SSD), flash memory, Blu-ray disc,
It is preferable to have a terminal connected to a recording medium such as a DVD. Thereby, the video can be recorded.

The communication control unit 603 has a function of controlling communication performed via a computer network. For example, in response to an instruction from the control unit 601, a control signal for connecting to the computer network is controlled, and the signal is transmitted to the computer network. As a result, the Internet, intranet, extranet, personal area network (PAN), and the like that are the foundation of the World Wide Web (WWW).
LAN (Local Area Network), CAN (Campus Area)
Network), MAN (Metropolitan Area Network),
WAN (Wide Area Network), GAN (Global Area N)
etwork) can be connected and communication can be performed.

Also, the communication control unit 603 has a function of communicating with a computer network or another electronic device using a communication standard such as Wi-Fi (registered trademark), Bluetooth (registered trademark), ZigBee (registered trademark), etc. It is also good.

The communication control unit 603 may have a function of communicating by wireless. For example, an antenna and a high frequency circuit (RF circuit) may be provided to transmit and receive an RF signal. The high frequency circuit is a circuit for mutually converting an electromagnetic signal and an electric signal in a frequency band defined by the local laws, and wirelessly communicating with another communication device using the electromagnetic signal. Several tens of kHz to several tens of GHz are generally used as a practical frequency band. The high frequency circuit connected to the antenna includes high frequency circuit units corresponding to a plurality of frequency bands, and the high frequency circuit unit includes an amplifier
Can be configured to include an amplifier), a mixer, a filter, a DSP, an RF transceiver, and the like.

The video signal reception unit 606 includes, for example, an antenna, a demodulation circuit, an AD conversion circuit (analog-digital conversion circuit), and the like. The demodulation circuit has a function of demodulating a signal input from the antenna. The AD conversion circuit also has a function of converting a demodulated analog signal into a digital signal. The signal processed by the video signal reception unit 606 is sent to the decoder circuit 605.

The decoder circuit 605 has a function of decoding video data included in the digital signal input from the video signal reception unit 606 according to the specification of the broadcast standard to be transmitted, and generating a signal to be transmitted to the image processing circuit. For example, as a broadcast standard in 8K broadcast, H.264 and H.264 265
| MPEG-H High Efficiency Video Coding (abbreviation: HEVC) and the like.

As broadcast radio waves that can be received by the antenna of the video signal reception unit 606, terrestrial waves,
Or radio waves transmitted from satellites. Further, as broadcast radio waves that can be received by an antenna, there are analog broadcasting, digital broadcasting, etc., and also, there are broadcasting of only video and audio, or audio. For example, UHF band (about 300 MHz to 3 GHz) or VHF band (30
A broadcast radio wave transmitted in a specific frequency band of MHz to 300 MHz can be received. Further, for example, by using a plurality of data received in a plurality of frequency bands, the transfer rate can be increased, and more information can be obtained. Thus, an image having a resolution exceeding full high vision can be displayed on the display panel 620.
For example, an image having a resolution of 4K2K, 8K4K, 16K8K, or higher can be displayed.

Further, the video signal receiving unit 606 and the decoder circuit 605 may be configured to generate a signal to be transmitted to the image processing circuit 604 by using broadcast data transmitted by a data transmission technique via a computer network. At this time, when the signal to be received is a digital signal, the video signal receiving unit 606 may not have a demodulation circuit, an A-D conversion circuit, and the like.

The image processing circuit 604 has a function of generating a video signal to be output to the timing controller 607 based on the video signal input from the decoder circuit 605.

The timing controller 607 also outputs signals (such as clock signals and start pulse signals) to be output to the gate driver 609 and the source driver 608 based on synchronization signals included in video signals and the like processed by the image processing circuit 604. Has a function to generate. Also,
The timing controller 607 has a function of generating a video signal to be output to the source driver 608 in addition to the above signals.

The display panel 620 has a plurality of pixels 621. Each pixel 621 has a gate driver 6
And 09 are driven by signals supplied from the source driver 608. Here, an example of a display panel having a resolution according to the 8K4K standard, in which the number of pixels is 7680 × 4320, is shown. Note that the resolution of the display panel 620 is not limited to this, and may be a resolution according to a standard such as full high vision (the number of pixels 1920 × 1080) or 4K2K (the number of pixels 3840 × 2160).

The control unit 601 and the image processing circuit 604 illustrated in FIG. 23A can include, for example, a processor. For example, the control unit 601 is a central processing unit (CPU: Ce
A processor that functions as an ntral processing unit can be used. Further, as the image processing circuit 604, for example, DSP (Digital Sign)
al Processor), GPU (Graphics Processing Un)
Other processors such as it) can be used. The control unit 601 and the image processing circuit 60
4. The above processor is FPGA (Field Programmable Gate)
Array) and FPAA (Field Programmable Analog Ar)
The configuration may be realized by PLD (Programmable Logic Device) such as ray.

A processor performs various data processing and program control by interpreting and executing instructions from various programs. The program that can be executed by the processor may be stored in a memory area of the processor or may be stored in a separately provided storage device.

In addition, two or more functions of the control unit 601, the storage unit 602, the communication control unit 603, the image processing circuit 604, the decoder circuit 605, the video signal reception unit 606, and the timing controller 607 have one or more functions. Integrated into a single IC chip, system LSI
May be configured. For example, a system LSI including a processor, a decoder circuit, a tuner circuit, an AD conversion circuit, a DRAM, an SRAM, and the like may be used.

Note that an oxide semiconductor can be used for a channel formation region in the control portion 601 or an IC or the like included in another component, and a transistor with extremely low off-state current can be used. Since the transistor has extremely low off-state current, the data retention period can be secured for a long time by using the transistor as a switch for retaining charge (data) flowing into a capacitor functioning as a memory element. it can. The controller 601 controls this characteristic.
And so on, the control unit 601 is operated only when necessary, and in other cases, normally-off computing can be performed by saving the information of the immediately preceding process in the storage element. Become. Thus, power consumption of the television set 600 can be reduced.

Note that the structure of the television set 600 illustrated in FIG. 23A is an example, and it is not necessary to include all the components. The television set 600 may have necessary components out of the components shown in FIG. In addition, the television set 600 is shown in FIG.
You may have components other than the component shown to these.

For example, the television set 600 may have an external interface, an audio output portion, a touch panel unit, a sensor unit, a camera unit, and the like in addition to the configuration shown in FIG. For example, as an external interface, for example, USB (University
al Serial Bus) terminal, LAN (Local Area Network)
External connection terminals such as connection terminals, power supply terminals, audio output terminals, audio input terminals, video output terminals, video input terminals, etc., transceivers for optical communication using infrared light, visible light, ultraviolet light, etc. And physical buttons provided on the case. Also, for example, as a sound input / output unit, there are a sound controller, a microphone, a speaker, and the like.

  Hereinafter, the image processing circuit 604 will be described in more detail.

The image processing circuit 604 preferably has a function of executing image processing based on the video signal input from the decoder circuit 605.

Examples of the image processing include noise removal processing, tone conversion processing, color tone correction processing, and luminance correction processing. Examples of the color tone correction process and the brightness adjustment process include gamma correction.

Further, the image processing circuit 604 preferably has a function of executing processing such as inter-pixel interpolation processing accompanying resolution up-conversion and processing such as inter-frame interpolation accompanying frame frequency up conversion.

For example, as noise removal processing, mosquito noise that occurs around an outline of a character or the like,
It removes various noises such as block noise that occurs in high-speed moving images, random noise that causes flicker, and dot noise that occurs due to resolution upconversion.

The gradation conversion process is a process of converting the gradation of an image into a gradation corresponding to the output characteristic of the display panel 620. For example, when increasing the number of gradations, for an image input with a small number of gradations,
A process of smoothing the histogram can be performed by interpolating and assigning the gradation value corresponding to each pixel. In addition, the dynamic range (HDR) extends the dynamic range
Processing is also included in tone conversion processing.

Further, the inter-pixel interpolation process interpolates data that is not originally present when up-converting the resolution. For example, it references pixels around the target pixel and interpolates the data to display their intermediate colors.

The color tone correction process is a process for correcting the color tone of an image. The luminance correction processing is processing for correcting the brightness (luminance contrast) of an image. For example, the television device 600
The type, brightness, color purity or the like of the illumination disposed in the space where the image is provided is detected, and the brightness and the color tone of the image displayed on the display panel 620 are corrected accordingly. Alternatively, it has a function to match the image to be displayed with the images of various scenes in the image list stored in advance, and correct the image to be displayed with the brightness and tone suitable for the image of the closest scene. May be

Inter-frame interpolation generates an image of a frame (interpolated frame) which does not originally exist when increasing the frame frequency of a displayed image. For example, an image of an interpolation frame to be inserted between two images is generated from the difference between two images. Alternatively, images of a plurality of interpolation frames can be generated between two images. For example, when the frame frequency of the video signal input from the decoder circuit 605 is 60 Hz, the frame frequency of the video signal output to the timing controller 607 is doubled by generating a plurality of interpolation frames.
It can be increased to 20 Hz, or 4 times 240 Hz, or 8 times 480 Hz, and so on.

In addition, the image processing circuit 604 preferably has a function of executing image processing using a neural network. FIG. 23A shows an example in which the image processing circuit 604 has a neural network 610.

For example, the neural network 610 can perform feature extraction from image data included in a video, for example. Further, the image processing circuit 604 can select an optimal correction method according to the extracted feature or select a parameter used for correction.

Alternatively, the neural network 610 itself may have a function of performing image processing.
That is, by inputting the image data before the image processing to the neural network 610, the image data subjected to the image processing may be output.

Also, data of weighting factors used for the neural network 610 is stored in the storage unit 602 as a data table. The data table including the weighting factor can be updated to the latest one by the communication control unit 603 via the computer network, for example. Alternatively, the image processing circuit 604 may have a learning function, and the data table including the weighting factor may be updated.

FIG. 23B shows a schematic view of a neural network 610 which the image processing circuit 604 has.

In the present specification and the like, a neural network refers to a whole model that imitates a neural network of an organism, determines the connection strength between neurons by learning, and has a problem solving ability. A neural network has an input layer, an intermediate layer (also called a hidden layer), and an output layer.
Deep-learning neural networks that have two or more middle layers
Or called Deep Neural Network (DNN).

Further, in the present specification and the like, when describing a neural network, determination of a neuron-to-neuron coupling strength (also referred to as a weighting factor) from existing information may be referred to as “learning”. Further, in the present specification and the like, constructing a neural network using the coupling strength obtained by learning and deriving a new conclusion therefrom may be referred to as “inference”.

The neural network 610 has an input layer 611, one or more intermediate layers 612, and an output layer 613. Input data is input to the input layer 611. Output data is output from the output layer 613.

The input layer 611, the intermediate layer 612, and the output layer 613 each have a neuron 615. Here, the neuron 615 indicates a circuit element (product-sum operation element) capable of realizing a product-sum operation. In FIG. 23, the input / output direction of data between two neurons 615 included in two layers is indicated by an arrow.

Arithmetic processing in each layer is performed by a product-sum operation of the output of the neuron 615 possessed by the previous layer and the weighting factor. For example, assuming that the output of the i-th neuron in the input layer is x _i , the coupling strength (weighting coefficient) between the output x _i and the j-th neuron in the next intermediate layer 612 is w _j
When _i, the output _{y j} of the j-th neuron of the intermediate _{layer, y j = f (Σw ji} · x
_i ) Note that i and j are integers of 1 or more. Here, f (x) is an activation function, and a sigmoid function, a threshold function, etc. can be used. Similarly, each layer of neurons 615
The output of is the value obtained by operating the activation function on the product-sum operation result of the output of the neuron 615 in the previous layer and the weighting factor. Also, the layer-to-layer connection may be a total connection in which all neurons are connected to each other, or a partial connection in which some neurons are connected to each other. FIG. 23B shows the case of full coupling.

FIG. 23B shows an example in which three intermediate layers 612 are provided. The middle layer 612
The number of is not limited to this, as long as it has one or more intermediate layers. Also, one middle layer 61
The number of neurons included in 2 may be changed as appropriate according to the specification. For example, one middle layer 6
The number 12 of neurons may be more or less than the number of neurons 615 of the input layer 611 or the output layer 613.

A weighting factor that is an indicator of the coupling strength between the neurons 615 is determined by learning.
The learning may be performed by a processor included in the television device 600, but is preferably performed by a computer with a high computing performance such as a dedicated server or a cloud. The weighting factor determined by learning is stored in the storage unit 602 as a table, and the image processing circuit 6
It is used by being read by 04. Also, the table can be updated via the computer network as needed.

  The above is the description of the neural network.

This embodiment can be implemented in appropriate combination with at least a part of the other embodiments described in this specification.

  In this example, the transistor of one embodiment of the present invention was manufactured and its electrical characteristics were measured.

[Preparation of sample]
The structure of the manufactured transistor is the same as that of the transistor 100 illustrated in Embodiment 1 and FIG.
Can be used.

First, a tungsten film having a thickness of about 100 nm was formed by sputtering on a glass substrate, and this was processed to obtain a first gate electrode. Subsequently, a silicon nitride film having a thickness of about 400 nm was formed by plasma CVD as a first gate insulating layer. After the first gate insulating layer was formed, plasma treatment was performed continuously in vacuum in an atmosphere containing oxygen gas. The conditions for plasma processing are: temperature 350 ° C., pressure 40 Pa, power supply 3000 W, oxygen flow ratio 100%
The processing time was 300 seconds. Thereafter, the surface of the first gate insulating layer was washed with hydrofluoric acid.

Subsequently, a metal oxide film having a thickness of about 40 nm was formed on the first gate insulating layer, and this was processed to obtain a semiconductor layer. In the case of forming a metal oxide film, an In—Ga—Zn oxide target (In
: Ga: Zn = 5: 1: 7 [atomic number ratio]) using argon gas as a deposition gas under the condition that the substrate is not intentionally heated by a sputtering method, pressure 0.6 Pa, power supply power 2 .
It performed on the conditions of 5 kW. Note that the oxygen flow rate ratio at the time of film formation is 0%.

Subsequently, a silicon oxynitride film with a thickness of about 150 nm which is to be a second gate insulating layer was formed by plasma CVD. Then, under a nitrogen atmosphere, at a temperature of 350.degree. C. for one hour, the first
Heat treatment was performed.

  Subsequently, oxygen supply processing shown below was performed.

In the oxygen supply treatment, first, an oxide conductive film was formed over the second gate insulating layer, and then oxygen radical doping treatment was performed using an ashing apparatus. As the oxide conductive film, an oxide conductive film (hereinafter, also referred to as an ITSO film) having a thickness of about 5 nm was formed by a sputtering method using an indium tin oxide target containing silicon. The conditions for oxygen radical doping are IC
The P power was 0 W, the bias power was 4500 W, the pressure was 15 Pa, the oxygen flow ratio was 100%, the lower electrode temperature was 40 ° C., and the processing time was 300 seconds. Thereafter, the oxide conductive film is removed by etching,
The surface of the silicon oxynitride film was exposed.

Subsequently, a metal oxide film was formed over the second gate insulating layer by a sputtering method.
As the metal oxide film, an aluminum oxide film having a thickness of about 5 nm was formed by a reactive sputtering method using an aluminum target. As the film forming conditions, a mixed gas of argon gas and oxygen gas is used as a film forming gas under a condition that the substrate is not intentionally heated, a pressure of 0.8 Pa, and a power of 3 k.
It was W. In addition, the oxygen flow rate ratio at the time of film formation was 60%.

Subsequently, a molybdenum film having a thickness of about 100 nm was formed on the metal oxide film by a sputtering method. Subsequently, the molybdenum film, the aluminum oxide film, and the silicon oxynitride film were sequentially processed to obtain a second gate electrode, a metal oxide layer, and a second gate insulating layer. continue,
Plasma treatment was performed on the exposed portion of the semiconductor layer under an atmosphere of argon and nitrogen.

Subsequently, as a protective insulating layer covering the transistor, a silicon nitride film with a thickness of about 100 nm and a silicon oxynitride film with a thickness of about 300 nm were continuously formed by plasma CVD. Note that the deposition temperature of the protective insulating layer was 220 ° C. Thereafter, the temperature is 350 ° C. in a nitrogen atmosphere
The second heat treatment was performed under the condition of one hour. Subsequently, a part of the insulating layer covering the transistor was opened, and a titanium film, an aluminum film, and a titanium film were sequentially formed by sputtering, and then processed to obtain a source electrode and a drain electrode. After that, an acrylic film having a thickness of about 1.5 μm was formed as a planarization layer, and a third heat treatment was performed under a nitrogen atmosphere at a temperature of 250 ° C. for one hour.

  Through the above steps, a transistor formed over a glass substrate was obtained.

[Electrical characteristics of transistor]
Next, the Id-Vg characteristics of the transistor were measured for the manufactured sample. Note that
As a measurement condition of the Id-Vg characteristic of the transistor, a voltage applied to a conductive film functioning as a first gate electrode (hereinafter, also referred to as a gate voltage (Vg)) and a conductive film functioning as a second gate electrode The applied voltage (also referred to as Vbg) is 0 for -15 V to +20 V.
. The voltage was applied in steps of 25V. In addition, a voltage applied to a conductive film functioning as a source electrode (hereinafter, also referred to as a source voltage (Vs)) is 0 V (comm), and a voltage applied to a conductive film functioning as a drain electrode (hereinafter, drain voltage (Vd) Also referred to as 0.1 V and 10 V). The number of measurements was 20 for each sample.

The electrical characteristics of the transistor are shown in FIGS. 24 (A), (B), and (C). Figure 24 (A), (
B) and (C) show the results for transistors with channel lengths L of 6 μm, 3 μm and 2 μm, respectively. The channel width W of each transistor is 3 μm. Further, in each drawing of FIG. 24, the field effect mobility calculated from the condition Id-Vg characteristics in which Vd is 10 V is shown together.

As shown to each figure of FIG. 24, it has confirmed that the favorable electrical property was obtained. Also,
As shown in FIG. 24C, even under the condition that the channel length L is extremely short such as 2 μm, it can be seen that the variation is relatively small and good characteristics are obtained.

In addition, as shown in each of FIGS. 24A and 24B, characteristics with extremely high field effect mobility are obtained.
For example, in a transistor with a channel length of 2 μm, it was also confirmed that the maximum value of the field effect mobility when Vd is 10 V exceeds 50 cm ² / Vs.

From the above results, when a metal oxide film having a high barrier property to oxygen is provided between a gate insulating layer which has been sufficiently treated with oxygen and a metal gate electrode, an oxide having a very high content of indium is oxidized. It has been confirmed that good electrical characteristics can be obtained even when an object semiconductor film is used. In addition, it has been confirmed that various metal materials can be used for the second gate electrode, and the degree of freedom in selecting materials is increased. Thus, a highly reliable transistor having extremely high field effect mobility can be realized.

100 transistor 100A transistor 100B transistor 100C transistor 100E transistor 102 substrate 102a substrate 103 insulating layer 104 insulating layer 105 adhesive layer 106 conductive layer 108 semiconductor layer 108a semiconductor layer 108b semiconductor layer 108c semiconductor layer 108n region 108na region 108nb region 108nc region 110 insulation Layer 112 conductive layer 112a conductive film 116 insulating layer 118 insulating layer 120a conductive layer 130 conductive layer 132 conductive film 132 oxygen 134 oxygen 136 oxygen 141a opening 141b opening 501 pixel circuit 502 pixel portion 504 driving circuit portion 504a gate driver 504b source driver 506 protection circuit 507 terminal portion 550 transistor 552 transistor 554 transistor 560 Amount element 562 Capacitance element 570 Liquid crystal element 572 Light emitting element 600 Television device 601 Control unit 602 Memory unit 603 Communication control unit 604 Image processing circuit 605 Decoder circuit 606 Video signal reception unit 607 Timing controller 608 Source driver 609 Gate driver 610 Neural network 611 Input layer 612 Intermediate layer 613 Output layer 615 Neuron 620 Display panel 621 Pixel 630 System bus 700 Display device 700 A Display device 701 Substrate 702 Pixel portion 704 Source driver circuit portion 705 Substrate 706 Gate driver circuit portion 708 FPC terminal portion 710 Signal line 711 Wiring Part 712 Sealing material 716 FPC
721 Source Driver IC
722 gate driver circuit 723 FPC
724 printed substrate 730 insulating film 732 sealing film 734 insulating film 736 coloring film 738 light shielding film 750 transistor 752 transistor 760 connection electrode 770 planarization insulating film 772 conductive film 773 insulating film 774 conductive film 775 liquid crystal element 776 liquid crystal layer 778 structure 780 Anisotropic conductive film 782 Light emitting element 786 EL layer 788 Conductive film 790 Capacitive element 791 Touch panel 791 Insulating film 793 Electrode 794 Electrode 795 Insulating film 796 Electrode 797 Insulating film 7000 Display module 7001 Upper cover 7002 Lower cover 7003 FPC
7004 Touch panel 7005 FPC
7006 Display panel 7007 Backlight 7008 Light source 7009 Frame 7010 Printed circuit board 7011 Battery 7500 Display 7100 Television device 7101 Housing 7103 Stand 7111 Stand 7111 Remote controller 7200 Notebook personal computer 7211 Housing 7212 Keyboard 7213 Pointing device 7214 Digital connection port 7300 Digital Signage 7301 Case 7303 Speaker 7311 Information terminal 7400 Digital signage 7401 Column 7411 Information terminal 8000 Camera 8001 Case 8002 Display 8003 Operation button 8004 Shutter button 8006 Lens 8100 Finder 8101 Case 8102 Display 8103 Button 8200 Head mounted display 8201 Mounting unit 8 02 Lens 8203 body 8204 display 8205 cable 8206 battery 8300 head mount display 8301 housing 8302 display 8304 fixture 8305 lens 9000 housing 9001 display 9003 speaker 9005 operation key 9006 connection terminal 9007 sensor 9008 microphone 9050 operation button 9051 information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television apparatus 9101 Portable information terminal 9102 Portable information terminal 9200 Portable information terminal 9201 Portable information terminal

Claims (6)

An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode has a first conductive film containing an oxide conductor and a second conductive film containing a metal,
The semiconductor device, wherein the first conductive film is provided between the metal oxide layer and the second conductive film. An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode has a first conductive film containing an oxide conductor and a second conductive film containing a metal,
The first conductive film is provided between the metal oxide layer and the second conductive film,
The oxide semiconductor layer is made of In, M (M is gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, A semiconductor device comprising: a region containing one or more selected from hafnium, tantalum, tungsten, or magnesium), and Zn, wherein the atomic ratio of In is larger than the atomic ratio of M. An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode includes a first conductive film containing In, Sn, Si, and O, and a second conductive film containing Cu.
The semiconductor device, wherein the first conductive film is provided between the metal oxide layer and the second conductive film. An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode includes a first conductive film containing In, Sn, Si, and O, and a second conductive film containing Cu.
The first conductive film is provided between the metal oxide layer and the second conductive film,
The oxide semiconductor layer is made of In, M (M is gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, A semiconductor device comprising: a region containing one or more selected from hafnium, tantalum, tungsten, or magnesium), and Zn, wherein the atomic ratio of In is larger than the atomic ratio of M. An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode includes a first conductive film containing In, Zn, and O, and a second conductive film containing Cu.
The semiconductor device, wherein the first conductive film is provided between the metal oxide layer and the second conductive film. An oxide semiconductor layer,
An insulating layer above the oxide semiconductor layer,
A metal oxide layer above the insulating layer,
A gate electrode above the metal oxide layer;
The gate electrode includes a first conductive film containing In, Zn, and O, and a second conductive film containing Cu.
The first conductive film is provided between the metal oxide layer and the second conductive film,
The oxide semiconductor layer is made of In, M (M is gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, A semiconductor device comprising: a region containing one or more selected from hafnium, tantalum, tungsten, or magnesium), and Zn, wherein the atomic ratio of In is larger than the atomic ratio of M.

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