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JP2019179812A - Manufacturing method of multilayer varistor - Google Patents

Manufacturing method of multilayer varistor Download PDF

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JP2019179812A
JP2019179812A JP2018067353A JP2018067353A JP2019179812A JP 2019179812 A JP2019179812 A JP 2019179812A JP 2018067353 A JP2018067353 A JP 2018067353A JP 2018067353 A JP2018067353 A JP 2018067353A JP 2019179812 A JP2019179812 A JP 2019179812A
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external electrode
silver powder
silver
particle size
sintered body
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JP7012219B2 (en
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沙也佳 松本
Sayaka Matsumoto
沙也佳 松本
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Panasonic Intellectual Property Management Co Ltd
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Abstract

【課題】工程が簡略化された積層バリスタの製造方法を提供することを目的とする。【解決手段】バリスタ層12と内部電極13とを交互に積層した後一体焼成して焼結体11を得る工程と、焼結体11の側面に第1の銀ペーストを印刷で形成して焼き付けて第1の外部電極14を形成する工程と、第1の外部電極14の上に第2の銀ペーストを塗布して焼き付けて第2の外部電極15を形成する工程と、を備えた積層バリスタの製造方法であって、第1の銀ペーストは第1の銀粉にバインダおよび可塑剤を加えたものであり、第2の銀ペーストは第2の銀粉にバインダ、可塑剤、およびガラスフリットを加えたものであり、第2の銀粉の粒度分布の50%粒径を、第1の銀粉の粒度分布の50%粒径の3倍以上としたものである。【選択図】図1An object of the present invention is to provide a method for manufacturing a laminated varistor in which steps are simplified. A varistor layer (12) and internal electrodes (13) are alternately laminated and then integrally fired to obtain a sintered body (11), and a first silver paste is formed on a side surface of the sintered body (11) by printing and baked. Forming a first external electrode 14 and applying a second silver paste on the first external electrode 14 and baking to form a second external electrode 15. Wherein the first silver paste is obtained by adding a binder and a plasticizer to a first silver powder, and the second silver paste is obtained by adding a binder, a plasticizer, and a glass frit to a second silver powder. In this case, the 50% particle size of the particle size distribution of the second silver powder is at least three times the 50% particle size of the particle size distribution of the first silver powder. [Selection diagram] Fig. 1

Description

本発明は、各種電子機器をサージから保護するための積層バリスタの製造方法に関するものである。   The present invention relates to a method of manufacturing a laminated varistor for protecting various electronic devices from surges.

近年回路保護部品として表面実装用の電子部品として積層セラミックバリスタが開発されている。これらの電子部品は外部電極を持ち、この外部電極をはんだによって配線基板に電気的機械的に接続する。この外部電極のはんだへの濡れ性は外部電極表面に金属成分以外の成分の有無によって大きく左右され、この表面状態をできるだけ金属成分のみにするために様々な検討がされている。   In recent years, a multilayer ceramic varistor has been developed as an electronic component for surface mounting as a circuit protection component. These electronic components have external electrodes, and the external electrodes are electrically and mechanically connected to the wiring board by solder. The wettability of the external electrode with respect to the solder greatly depends on the presence or absence of components other than the metal component on the surface of the external electrode, and various studies have been made in order to make this surface state only the metal component as much as possible.

なお、この出願の発明に関連する先行技術文献情報としては、例えば、特許文献1が知られている。   As prior art document information related to the invention of this application, for example, Patent Document 1 is known.

特開平9−27405号公報Japanese Patent Laid-Open No. 9-27405

しかしながら、外部電極の表層にガラス成分が存在するとはんだ濡れ性が低下する可能性がある。そのため外部電極の表面にめっき層を形成することが行われているが、積層バリスタの外部電極にめっきを行おうとすると、その素体にもめっきが付着するため、外部電極以外の部分に絶縁膜を設けておく必要があり、工程の煩雑化につながっていた。   However, if a glass component is present on the surface layer of the external electrode, solder wettability may be reduced. For this reason, a plating layer is formed on the surface of the external electrode. However, if plating is performed on the external electrode of the laminated varistor, the plating also adheres to the element body, so that an insulating film is formed on portions other than the external electrode. It was necessary to provide this, which led to complicated processes.

本発明は上記課題を解決するために、バリスタ層と内部電極とを交互に積層した後一体焼成して焼結体を得る工程と、焼結体の側面に第1の銀ペーストを印刷で形成して焼き付けて第1の外部電極を形成する工程と、第1の外部電極の上に第2の銀ペーストを塗布して焼き付けて第2の外部電極を形成する工程と、を備えた積層バリスタの製造方法であって、第1の銀ペーストは第1の銀粉にバインダおよび可塑剤を加えたものであり、第2の銀ペーストは第2の銀粉にバインダ、可塑剤、およびガラスフリットを加えたものであり、第2の銀粉の粒度分布の50%粒径は、第1の銀粉の粒度分布の50%粒径の3倍以上としたものである。   In order to solve the above-mentioned problems, the present invention includes a step of alternately laminating varistor layers and internal electrodes and then integrally firing to obtain a sintered body, and forming a first silver paste on the side surface of the sintered body by printing And a step of forming a first external electrode by baking, and a step of applying a second silver paste on the first external electrode and baking to form a second external electrode. The first silver paste is obtained by adding a binder and a plasticizer to the first silver powder, and the second silver paste is obtained by adding a binder, a plasticizer, and a glass frit to the second silver powder. Therefore, the 50% particle size of the particle size distribution of the second silver powder is three times or more than the 50% particle size of the particle size distribution of the first silver powder.

以上のように行うことにより、第1の外部電極と内部電極との接合を強固にできるとともに、第1の銀粉と第2の銀粉の粒径が異なることで、焼成時の銀粒子成長速度が異なり、第2の銀ペースト中のガラス成分が第1の外部電極内に拡散する。このことにより第2の外部電極表面に存在するガラスを減らすことができ、第2の外部電極の上にめっき層を形成しなくても第2の外部電極に直接はんだ付けあるいは第2の外部電極にはんだディップを行うことができ、工程の簡略化を図ることができる。   By performing as described above, the bonding between the first external electrode and the internal electrode can be strengthened, and the silver particle growth rate at the time of firing can be increased by the difference in the particle diameters of the first silver powder and the second silver powder. Unlikely, the glass component in the second silver paste diffuses into the first external electrode. As a result, the glass present on the surface of the second external electrode can be reduced, and the second external electrode can be directly soldered to the second external electrode without forming a plating layer on the second external electrode. In addition, solder dipping can be performed, and the process can be simplified.

本発明の一実施の形態における積層バリスタの断面図Sectional drawing of the lamination | stacking varistor in one embodiment of this invention 本発明の一実施の形態における別の積層バリスタの断面図Sectional drawing of another laminated varistor in one embodiment of the present invention

以下、本発明の一実施の形態における積層バリスタについて、図面を参照しながら説明する。   Hereinafter, a laminated varistor according to an embodiment of the present invention will be described with reference to the drawings.

図1は本発明の一実施の形態における積層バリスタの断面図である。   FIG. 1 is a cross-sectional view of a laminated varistor according to an embodiment of the present invention.

焼結体11は、酸化亜鉛に酸化ビスマス等を添加し、可塑剤、バインダ等を混合し、シート成形したあと、内部電極用ペーストを印刷し、積層後、個片化した後、約900℃で焼成することによって得られる。内部電極用ペーストは、銀粉にバインダ等を混ぜたものであり、これを素体と同時焼成することにより内部電極13を構成し、バリスタ層12と内部電極13とを交互に積層した焼結体11を得る。この焼結体11を研磨剤と混ぜて面取りすることにより、角部の面取りを行なうとともに、内部電極13を焼結体11側面に露出させる。焼結体11の大きさは、幅約7mm、長さ約8mm、高さ約4mmとなっている。この焼結体11に含まれるガラス成分は、約0.4wt%となっている。   The sintered body 11 is obtained by adding bismuth oxide or the like to zinc oxide, mixing a plasticizer, a binder, and the like, forming a sheet, printing an internal electrode paste, laminating, separating, and then about 900 ° C. It is obtained by baking with. The internal electrode paste is a mixture of silver powder mixed with a binder and the like, which is fired simultaneously with the element body to form the internal electrode 13 and the varistor layers 12 and the internal electrodes 13 are alternately laminated. 11 is obtained. By chamfering the sintered body 11 with an abrasive, the corners are chamfered and the internal electrodes 13 are exposed on the side surfaces of the sintered body 11. The size of the sintered body 11 is about 7 mm in width, about 8 mm in length, and about 4 mm in height. The glass component contained in the sintered body 11 is about 0.4 wt%.

次に内部電極13が露出した側面がそろうように焼結体11を整列させ、露出した内部電極13を覆うように第1の銀ペーストを印刷し、約800℃で焼成することにより第1の外部電極14を形成する。第1の銀ペーストは、第1の銀粉にバインダおよび可塑剤を加えたものを用いている。第1の銀粉は粒度分布の50%粒径が約0.7μmの銀粉からなっている。   Next, the sintered body 11 is aligned so that the side surface where the internal electrode 13 is exposed, the first silver paste is printed so as to cover the exposed internal electrode 13, and is fired at about 800 ° C. The external electrode 14 is formed. The 1st silver paste uses what added the binder and the plasticizer to the 1st silver powder. The first silver powder is made of silver powder having a 50% particle size distribution of about 0.7 μm.

このように露出した内部電極13の上に銀からなる第1の外部電極14を直接形成するため、内部電極13と第1の外部電極14との電気的接続を安定なものとすることができる。第1の外部電極14の厚さは、約10μmとなっている。また第1の外部電極14は印刷により形成するため、ほぼ焼結体11の側面のみに設けられている。内部電極13どうしに挟まれたバリスタ層12は、電気的特性を決定する重要な領域となる。第1の外部電極14に銀粉にバインダ等を混ぜたペーストを用いているため、余計なものがこの領域に拡散することを防ぎ、電気的特性を安定化することができる。   Since the first external electrode 14 made of silver is directly formed on the exposed internal electrode 13, the electrical connection between the internal electrode 13 and the first external electrode 14 can be stabilized. . The thickness of the first external electrode 14 is about 10 μm. Further, since the first external electrode 14 is formed by printing, it is provided almost only on the side surface of the sintered body 11. The varistor layer 12 sandwiched between the internal electrodes 13 is an important region for determining electrical characteristics. Since a paste obtained by mixing a binder or the like with silver powder is used for the first external electrode 14, it is possible to prevent unnecessary material from diffusing into this region and to stabilize electrical characteristics.

次に第2の銀ペーストを第1の外部電極14を覆うように塗布し、乾燥後、約800℃で焼き付けることにより第2の外部電極15を形成する。第2の外部電極15の最大厚さは約20μmとなっている。第2の銀ペーストは、第2の銀粉にバインダ、可塑剤、およびガラスフリットを加えたものを用いている。ガラスフリットの量は、約15wt%としている。また第2の銀粉は粒度分布の50%粒径が約2.1μmの銀粉からなっている。このように第2の銀粉の粒度分布の50%粒径を、第1の銀粉の粒度分布の50%粒径の3倍以上とすることにより、焼成時の銀粒子成長速度が異なり、第2の銀ペースト中のガラス成分が第1の外部電極14内に拡散する。   Next, a second silver paste is applied so as to cover the first external electrode 14, dried, and baked at about 800 ° C. to form the second external electrode 15. The maximum thickness of the second external electrode 15 is about 20 μm. The 2nd silver paste uses what added the binder, the plasticizer, and the glass frit to the 2nd silver powder. The amount of glass frit is about 15 wt%. The second silver powder is made of silver powder having a 50% particle size distribution of about 2.1 μm. Thus, by setting the 50% particle size of the particle size distribution of the second silver powder to three times or more the 50% particle size of the particle size distribution of the first silver powder, the silver particle growth rate at the time of firing differs, and the second The glass component in the silver paste diffuses into the first external electrode 14.

このようにすることにより、第2の外部電極15を形成したあとの、断面から観察した第1の外部電極14のガラス成分の割合は約20%、第2の外部電極15のガラス成分の割合は約6%となっている。このように第1の外部電極14のガラス成分の割合を、第2の外部電極15のガラス成分の割合の2倍以上とすることにより、第2の外部電極15表面のガラス成分をほとんどなくすことができ、はんだ付け性の良い積層バリスタを得ることができる。   By doing in this way, the ratio of the glass component of the 1st external electrode 14 observed from the cross section after forming the 2nd external electrode 15 is about 20%, and the ratio of the glass component of the 2nd external electrode 15 Is about 6%. Thus, the glass component on the surface of the second external electrode 15 is almost eliminated by setting the ratio of the glass component of the first external electrode 14 to at least twice the ratio of the glass component of the second external electrode 15. Thus, a laminated varistor with good solderability can be obtained.

なお、焼結体11に含まれるガラス成分が多すぎると、第2の銀ペースト中のガラスが十分に焼結体11のほうに移動することができないため、焼結体11はガラス成分を3wt%以下とすることが望ましい。   If the sintered body 11 contains too much glass component, the glass in the second silver paste cannot sufficiently move toward the sintered body 11, so the sintered body 11 contains 3 wt% of the glass component. % Or less is desirable.

図2は本発明の一実施の形態における別の積層バリスタの断面図である。   FIG. 2 is a cross-sectional view of another laminated varistor according to an embodiment of the present invention.

図1の積層バリスタの第2の外部電極15にはんだディップを行うことによりはんだ16の層を形成し、リード端子18を接続する。このリード端子18は鉄またはリン青銅の板を所定の形状に打ち抜いた後、L字状に折り曲げたものを用いている。またこのリード端子18には、ニッケル、および錫のめっき層が形成され、外部電極と当接する領域にははんだ層17が設けられている。このようにして、リード端子18と外部電極とを当接させ、レーザ等で加熱してはんだ層17を溶かし、外部電極にリード端子18を接続し、リード端子付の積層バリスタを得ることができる。このようにすることにより、積層バリスタの形状が大きくなっても、ヒートサイクルに強い積層バリスタを得ることができる。   Solder dipping is performed on the second external electrode 15 of the multilayer varistor of FIG. 1 to form a layer of solder 16 and lead terminals 18 are connected. The lead terminal 18 is formed by punching an iron or phosphor bronze plate into a predetermined shape and then bending it into an L shape. The lead terminal 18 is formed with a nickel and tin plating layer, and a solder layer 17 is provided in a region in contact with the external electrode. In this way, the lead terminal 18 and the external electrode are brought into contact with each other, heated with a laser or the like to melt the solder layer 17, the lead terminal 18 is connected to the external electrode, and a laminated varistor with a lead terminal can be obtained. . By doing in this way, even if the shape of a laminated varistor becomes large, the laminated varistor strong against a heat cycle can be obtained.

本発明に係る積層バリスタの製造方法は、素体表面に絶縁膜を形成しなくてもはんだ付け性の良い積層バリスタを得ることができ、産業上有用である。   The method for producing a laminated varistor according to the present invention is industrially useful because a laminated varistor having good solderability can be obtained without forming an insulating film on the surface of the element body.

11 焼結体
12 バリスタ層
13 内部電極
14 第1の外部電極
15 第2の外部電極
16 はんだ
17 はんだ層
18 リード端子
DESCRIPTION OF SYMBOLS 11 Sintered body 12 Varistor layer 13 Internal electrode 14 1st external electrode 15 2nd external electrode 16 Solder 17 Solder layer 18 Lead terminal

Claims (3)

バリスタ層と内部電極とを交互に積層した後一体焼成して焼結体を得る工程と、前記焼結体の側面に第1の銀ペーストを印刷で形成して焼き付けて第1の外部電極を形成する工程と、前記第1の外部電極の上に第2の銀ペーストを塗布して焼き付けて第2の外部電極を形成する工程と、を備えた積層バリスタの製造方法であって、前記第1の銀ペーストは第1の銀粉にバインダおよび可塑剤を加えたものであり、前記第2の銀ペーストは第2の銀粉にバインダ、可塑剤、およびガラスフリットを加えたものであり、前記第2の銀粉の粒度分布の50%粒径は、前記第1の銀粉の粒度分布の50%粒径の3倍以上である積層バリスタの製造方法。 A step of alternately laminating varistor layers and internal electrodes and then firing them integrally to obtain a sintered body, and forming and baking a first silver paste on the side surface of the sintered body to form a first external electrode Forming a second external electrode by applying and baking a second silver paste on the first external electrode, the manufacturing method of the laminated varistor, 1 silver paste is obtained by adding a binder and a plasticizer to the first silver powder, and the second silver paste is obtained by adding a binder, a plasticizer, and a glass frit to the second silver powder. 2. A method for producing a laminated varistor, wherein the 50% particle size distribution of the silver powder of No. 2 is at least three times the 50% particle size distribution of the first silver powder. 前記第2の外部電極の焼き付け後の、断面から観察した前記第1の外部電極のガラス成分の割合は、前記第2の外部電極のガラス成分の割合の2倍以上である請求項1記載の積層バリスタの製造方法。 The ratio of the glass component of the first external electrode observed from a cross-section after baking of the second external electrode is at least twice the ratio of the glass component of the second external electrode. A method of manufacturing a laminated varistor. 前記焼結体はガラス成分が3wt%以下である請求項1記載の積層バリスタの製造方法。 The method for producing a laminated varistor according to claim 1, wherein the sintered body has a glass component of 3 wt% or less.
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JP2022028945A (en) * 2018-03-30 2022-02-16 パナソニックIpマネジメント株式会社 Manufacturing method of laminated varistor and laminated varistor
JP7300589B2 (en) 2018-03-30 2023-06-30 パナソニックIpマネジメント株式会社 Laminated varistor manufacturing method and laminated varistor

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