JP2019162845A - Liquid discharge device - Google Patents

Abstract

An object of the present invention is to provide a liquid ejecting apparatus capable of reducing a displacement generated in a piezoelectric element and a diaphragm due to an unintended voltage applied to the piezoelectric element. A drive circuit that outputs a drive signal from a drive signal output terminal, a reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal, a first electrode to which the drive signal is supplied, and the reference voltage A piezoelectric element having a second electrode to which a signal is supplied, the piezoelectric element being displaced by a potential difference generated between the first electrode and the second electrode; And a diaphragm provided between the cavity and the piezoelectric element, wherein the reference voltage circuit is configured to generate the reference voltage signal; A voltage detection unit that detects a voltage value of the reference voltage signal, when the voltage value of the reference voltage signal exceeds a first threshold, the voltage detection unit stops the operation of the voltage generation unit, and the reference Voltage signal output The terminal and the ground terminal are electrically connected, a liquid ejecting apparatus. [Selection diagram] FIG.

Description

  The present invention relates to a liquid ejection apparatus.

  As an ink jet printer (liquid ejecting apparatus) that ejects a liquid such as ink to print an image or a document, a printer using a piezoelectric element such as a piezoelectric element is known. Piezoelectric elements are provided in a print head corresponding to a plurality of nozzles that eject ink and cavities that store ink ejected from the nozzles. Then, when the piezoelectric element is displaced according to the drive signal, the diaphragm provided between the piezoelectric element and the cavity is bent, and the volume of the cavity is changed. As a result, a predetermined amount of ink is ejected from the nozzles at a predetermined timing, and dots are formed on the medium.

  In Patent Document 1, a drive signal generated based on print data is supplied to the upper electrode and a reference voltage is supplied to the lower electrode for a piezoelectric element that is displaced based on a potential difference between the upper electrode and the lower electrode. A liquid ejecting apparatus is disclosed that ejects ink by controlling the displacement of a piezoelectric element by controlling whether or not a drive signal is supplied by a selection circuit (switch circuit).

JP 2017-43007 A

  In a liquid ejecting apparatus that ejects ink based on the displacement of a piezoelectric element as described in Patent Document 1, when an unintended voltage is supplied to the piezoelectric element, an unintended displacement occurs in the piezoelectric element. When an unintended displacement occurs in the piezoelectric element, the diaphragm is also displaced based on the displacement. As a result, a larger displacement than expected occurs in the diaphragm, and an unintended stress is applied to the diaphragm.

  When such unintentional stress generated in the diaphragm is continuously applied for a long time, the stress concentrates around the contact point between the diaphragm and the cavity, and there is a possibility that a crack or the like is generated in the diaphragm.

  Furthermore, when a transition is made from a state in which an unintentional displacement has occurred in the diaphragm to a discharge operation, an unnecessary load is applied to the diaphragm, and the load may cause cracks or the like in the diaphragm.

  If a crack occurs in the diaphragm, the ink stored in the cavity leaks from the crack, and the amount of ink ejected varies with the change in the volume of the cavity. As a result, the ink ejection accuracy deteriorates.

  In particular, the reference voltage supplied to the lower electrode may be supplied in common to a plurality of piezoelectric elements in the print head. Therefore, when the reference voltage becomes an unintended potential, the displacement of the plurality of piezoelectric elements 60 and the diaphragm 621 is affected. That is, cracks may occur in the plurality of diaphragms 621, which may affect the discharge accuracy of the entire liquid discharge apparatus.

  The problem with respect to the displacement generated in the piezoelectric element and the diaphragm due to the unintended voltage applied to the piezoelectric element is a new problem that is not disclosed in Patent Document 1.

  In one aspect of the liquid ejection apparatus according to the present invention, a drive circuit that outputs a drive signal from a drive signal output terminal, a reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal, and the drive signal are supplied. A piezoelectric element having a first electrode and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode, and accompanying the displacement of the piezoelectric element A cavity filled with a liquid discharged from a nozzle, and a diaphragm provided between the cavity and the piezoelectric element, and the reference voltage circuit generates a voltage for generating the reference voltage signal And a voltage detector that detects a voltage value of the reference voltage signal, and when the voltage value of the reference voltage signal exceeds a first threshold, the voltage detector Stop operation And thereby electrically connects the reference voltage signal output terminal and the ground terminal.

  In one aspect of the liquid ejection apparatus, the reference voltage circuit electrically connects a first switch circuit that switches whether or not to supply a power supply voltage to the voltage generation unit, the reference voltage signal output terminal, and the ground terminal. A second switch circuit that switches whether or not to connect to the voltage, wherein the voltage detector outputs a stop signal when the voltage value of the reference voltage signal exceeds the first threshold, and the first The switch circuit stops the supply of the power supply voltage to the voltage generator based on the stop signal, and the second switch circuit connects the reference voltage signal output terminal and the ground terminal based on the stop signal. You may connect electrically.

  In one aspect of the liquid ejecting apparatus, the voltage generator includes a first comparator that compares a first reference voltage and a signal based on the reference voltage signal, and a power supply terminal based on a comparison result of the first comparator. And a first transistor for switching whether or not to electrically connect the reference voltage signal output terminal, and when the voltage value of the reference voltage signal exceeds the first threshold value, the first switch The circuit may stop supplying the power supply voltage to the first comparator based on the stop signal.

  In one aspect of the liquid ejection apparatus, the reference voltage circuit includes a clamp circuit, and the clamp circuit has a voltage value of the reference voltage signal that exceeds a second threshold value that is lower than the first threshold value. The reference voltage signal output terminal and the ground terminal may be electrically connected.

  In one aspect of the liquid ejection apparatus, the clamp circuit includes a second comparator that compares a second reference voltage and a signal based on the reference voltage signal, and the reference voltage based on a comparison result of the second comparator. A second transistor for switching whether or not to electrically connect a signal output terminal and the ground terminal, and when the voltage value of the reference voltage signal exceeds the second threshold, the second transistor May electrically connect the reference voltage signal output terminal and the ground terminal.

In one aspect of the liquid ejection apparatus according to the present invention, a drive circuit that outputs a drive signal from a drive signal output terminal, a reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal, and the drive signal are supplied. A piezoelectric element having a first electrode and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode, and accompanying the displacement of the piezoelectric element A cavity filled with a liquid discharged from a nozzle, a diaphragm provided between the cavity and the piezoelectric element, a first terminal to which the drive signal is supplied, and the first electrode; And a switch circuit for controlling supply of the drive signal to the first electrode, and the reference voltage circuit generates the reference voltage signal. And the reference voltage A voltage detector that detects a voltage value of the signal, and if the voltage value of the reference voltage signal exceeds a first threshold, the voltage detector stops the operation of the voltage generator, and The charge of the first node where the first electrode and the second terminal are electrically connected is discharged through the parasitic diode of the switch circuit.

  In one aspect of the liquid ejecting apparatus, when the voltage value of the reference voltage signal exceeds a first threshold value, a charge at a second node where the drive signal output terminal and the first terminal are electrically connected is discharged. You may let them.

  In one aspect of the liquid ejection apparatus according to the present invention, a drive circuit that outputs a drive signal from a drive signal output terminal, a reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal, and the drive signal are supplied. A piezoelectric element having a first electrode and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode, and accompanying the displacement of the piezoelectric element A cavity filled with a liquid discharged from a nozzle, and a diaphragm provided between the cavity and the piezoelectric element, wherein the reference voltage circuit includes a first discharge transistor, and the first discharge transistor. A second discharge transistor having a larger rated capacity than one discharge transistor, wherein one end of the first discharge transistor and one end of the second discharge transistor are connected to the reference voltage signal. Connected power terminal and electrically, the other end of the first discharge transistor, and the other end of the second discharge transistor is electrically connected to the ground terminal.

It is a perspective view which shows schematic structure of a liquid discharge apparatus. It is a block diagram which shows the electrical structure of a liquid discharge apparatus. It is a block diagram which shows the circuit structure of a drive signal generation circuit. It is a circuit diagram which shows the electric constitution of a feed switching circuit. It is a figure which shows an example of the drive signal COM. It is a block diagram which shows the electrical structure of a discharge module and drive IC. It is a circuit diagram which shows the electric constitution of a selection circuit. It is a figure which shows the decoding content in a decoder. It is a figure for demonstrating operation | movement of drive IC. It is a disassembled perspective view of a discharge module. It is sectional drawing which shows schematic structure of a discharge part. It is a figure which shows an example of arrangement | positioning of the several nozzle provided in the discharge module and the discharge module. It is a figure for demonstrating the relationship between the displacement of a piezoelectric element and a diaphragm, and discharge. It is a figure for demonstrating the stress which arises in the displacement of a piezoelectric element and a diaphragm when the voltage value of the electrode of a piezoelectric element rises, and a diaphragm. FIG. 6 is a plan view when the diaphragm is viewed from a direction Z. It is the figure which illustrated the case where the primary natural vibration arose in a diaphragm. It is the figure which illustrated the case where the tertiary natural vibration arose in a diaphragm. It is a circuit diagram which shows the electric constitution of a reference voltage circuit. It is a figure for demonstrating operation | movement when the reference voltage signal VBS of a predetermined voltage is produced | generated. It is a figure for demonstrating operation | movement in the case of controlling the said voltage value, when the voltage of the reference voltage signal VBS rises. It is a figure for demonstrating operation | movement in case the voltage of the reference voltage signal VBS is discharge | released when the voltage of the reference voltage signal VBS rises more than predetermined value. It is a figure for demonstrating the discharge means for discharging the electric charge of the electrode 611 of a piezoelectric element. It is sectional drawing which shows typically the transistor which comprises a transfer gate.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. The drawings used are for convenience of explanation. The embodiments described below do not unduly limit the contents of the present invention described in the claims. In addition, not all of the configurations described below are essential constituent requirements of the present invention.

  Hereinafter, the liquid ejection apparatus according to the present invention will be described by taking an inkjet printer as an example of a printing apparatus that ejects ink as a liquid.

  As the liquid ejection device, for example, a printing device such as an ink jet printer, a color material ejection device used for manufacturing a color filter such as a liquid crystal display, an electrode material ejection used for forming an electrode such as an organic EL display or a surface emitting display. Examples thereof include a device and a bio-organic discharge device used for biochip production.

1. Configuration of Liquid Ejecting Apparatus A printing apparatus as an example of a liquid ejecting apparatus according to the present embodiment ejects ink in accordance with image data supplied from an external host computer, thereby forming dots on a printing medium such as paper. It is an ink jet printer that forms and prints an image including characters, figures, and the like according to the image data.

  FIG. 1 is a perspective view illustrating a schematic configuration of the liquid ejection apparatus 1. FIG. 1 illustrates a direction X in which the medium P is transported, a direction Y in which the moving body 2 reciprocates across the direction X, and a direction Z in which ink is ejected. In the present embodiment, the direction X, the direction Y, and the direction Z are described as axes orthogonal to each other.

  As shown in FIG. 1, the liquid ejection apparatus 1 includes a moving body 2 and a moving mechanism 3 that reciprocates the moving body 2 along the direction Y.

  The moving mechanism 3 includes a carriage motor 31 that is a driving source of the moving body 2, a carriage guide shaft 32 that is fixed at both ends, and a timing belt 33 that extends substantially parallel to the carriage guide shaft 32 and is driven by the carriage motor 31. And having.

  The carriage 24 included in the moving body 2 is supported by the carriage guide shaft 32 so as to be reciprocally movable, and is fixed to a part of the timing belt 33. Therefore, by driving the timing belt 33 by the carriage motor 31, the movable body 2 is guided by the carriage guide shaft 32 and reciprocates along the direction Y.

  A head unit 20 is provided in a portion of the moving body 2 that faces the medium P. The head unit 20 has a large number of nozzles, and ink is ejected along the direction Z from each of the nozzles. Further, a control signal or the like is supplied to the head unit 20 via the flexible cable 190.

  The liquid ejection apparatus 1 includes a transport mechanism 4 that transports the medium P on the platen 40 along the direction X. The transport mechanism 4 includes a transport motor 41 that is a driving source, and a transport roller 42 that is rotated by the transport motor 41 and transports the medium P along the direction X.

  Then, at the timing when the medium P is transported by the transport mechanism 4, the head unit 20 ejects ink onto the medium P, whereby an image is formed on the surface of the medium P.

  FIG. 2 is a block diagram showing an electrical configuration of the liquid ejection apparatus 1.

  As shown in FIG. 2, the liquid ejection apparatus 1 includes a control unit 10 and a head unit 20. The control unit 10 and the head unit 20 are connected via a flexible cable 190.

  The control unit 10 includes a control circuit 100, a carriage motor driver 35, a transport motor driver 45, and a voltage generation circuit 90.

  The control circuit 100 supplies a plurality of control signals and the like for controlling various configurations based on image data supplied from the host computer.

  Specifically, the control circuit 100 supplies a control signal CTR1 to the carriage motor driver 35. The carriage motor driver 35 drives the carriage motor 31 according to the control signal CTR1. Thereby, the movement in the direction Y of the carriage 24 shown in FIG. 1 is controlled.

  Further, the control circuit 100 supplies a control signal CTR2 to the transport motor driver 45. The transport motor driver 45 drives the transport motor 41 in accordance with the control signal CTR2. Thereby, the movement of the medium P in the direction X by the transport mechanism 4 shown in FIG. 1 is controlled.

  Further, the control circuit 100 supplies the head unit 20 with a clock signal SCK, a print data signal SI, a latch signal LAT, a change signal CH, a drive data signal DRV, and a select signal EN.

  The voltage generation circuit 90 generates a voltage VHV of, for example, DC42V and supplies it to the head unit 20. The voltage VHV may also be supplied to various components included in the control unit 10.

  The head unit 20 includes a drive signal generation circuit 50, a power supply switching circuit 70, a drive IC 80, and a discharge module 21.

  The drive signal generation circuit 50 is supplied with a voltage VHV, a drive data signal DRV, and a select signal EN.

  The drive signal generation circuit 50 amplifies a signal based on the drive data signal DRV into a voltage based on the voltage VHV, thereby generating a drive signal COM and supplying the drive signal COM to the drive IC 80. In addition, the drive signal generation circuit 50 generates a reference voltage signal VBS of, for example, DC5V obtained by stepping down the voltage VHV, and supplies it to the ejection module 21. The drive signal generation circuit 50 generates a power supply control signal CTVHV based on the drive data signal DRV and supplies the power supply control signal CTVHV to the power supply switching circuit 70. Here, the select signal EN indicates whether the drive data signal DRV supplied to the drive signal generation circuit 50 is a data signal for generating the drive signal COM or a data signal for generating the power supply control signal CTVHV. It is a signal for instructing.

  Further, the drive signal generation circuit 50 supplies an error signal ERR to the control circuit 100 when the generated drive signal COM is not normal.

The power supply switching circuit 70 is supplied with a voltage VHV and a power supply control signal CTVHV. The power supply switching circuit 70 is supplied with a voltage VHV-T supplied to the drive IC 80 according to the power supply control signal CTVHV.
The G potential is switched between the potential based on the voltage VHV and the ground potential.

  The drive IC 80 is supplied with a clock signal SCK, a print data signal SI, a latch signal LAT, a change signal CH, a voltage VHV-TG, and a drive signal COM.

  The drive IC 80 switches whether the drive signal COM is selected or not selected in a predetermined period based on the clock signal SCK, the print data signal SI, the latch signal LAT, and the change signal CH. Then, the drive signal COM selected by the drive IC 80 is supplied to the ejection module 21 as the drive signal VOUT. The voltage VHV-TG is used, for example, to generate a high voltage logic signal for selecting the drive signal COM.

  The discharge module 21 includes a plurality of discharge units 600 including the piezoelectric element 60.

  The drive signal VOUT supplied to the ejection module 21 is supplied to one end of the piezoelectric element 60. The reference voltage signal VBS is supplied to the other end of the piezoelectric element 60. The piezoelectric element 60 is displaced according to the potential difference between the drive signal VOUT and the reference voltage signal VBS. Then, an amount of ink corresponding to the displacement is ejected from the ejection unit 600.

  The details of the drive signal generation circuit 50, the power supply switching circuit 70, the drive IC 80, and the ejection module 21 described above will be described later. In FIG. 2, the description has been made assuming that the liquid ejection apparatus 1 has one head unit 20, but a plurality of head units 20 may be provided. Further, in FIG. 2, the head unit 20 has been described as having one ejection module 21, but a plurality of ejection modules 21 may be provided.

2 Configuration and Operation of Drive Signal Generation Circuit Next, the drive signal generation circuit 50 will be described with reference to FIG. FIG. 3 is a block diagram showing a circuit configuration of the drive signal generation circuit 50. As shown in FIG. 3, the drive signal generation circuit 50 includes an integrated circuit 500, an output circuit 550, a first feedback circuit 570, a second feedback circuit 580, and a plurality of other circuit elements.

  Further, the drive signal generation circuit 50 is electrically connected to various external components such as terminals Drv-In, En-In, Err-Out, Vhv-In, Vbs-Out, Ctvh-Out, and Com-Out. , Gnd-In. Among these, the ground potential (for example, 0 V) of the liquid ejection apparatus 1 is supplied to the terminal Gnd-In.

  The integrated circuit 500 includes a GVDD generation circuit 410, a signal selection circuit 420, a power supply control signal generation circuit 430, a reference voltage circuit 450, a DAC (Digital to Analog Converter) circuit 310, a detection circuit 320, a determination circuit 350, a modulation circuit 510, and a gate. A drive circuit 520 and an LC discharge circuit 530 are included.

  Further, the integrated circuit 500 has terminals Drv, En, Err, Vhv, Vfb, Vbs, Ctvh, Bst, Hdr, Sw, Gvd, Ldr, Gnd for electrically connecting with various components of the drive signal generation circuit 50. Having a plurality of terminals.

  The voltage VHV is supplied to the GVDD generation circuit 410 via the terminal Vhv-In and the terminal Vhv. The GVDD generation circuit 410 transforms the voltage VHV to generate the voltage GVDD, and supplies the voltage GVDD to the reference voltage circuit 450 and the gate drive circuit 520.

The GVDD generation circuit 410 is configured by, for example, a linear regulator circuit or a switching regulator circuit. Note that the GVDD generation circuit 410 may be provided outside the integrated circuit 500.

  The signal selection circuit 420 is supplied with the drive data signal DRV via the terminal Drv-In and the terminal Drv terminal, and with the select signal EN via the terminal En-In and the terminal En terminal. The signal selection circuit 420 determines whether the drive data signal DRV is a signal to be supplied to the DAC circuit 310 or a signal to be supplied to each of the power supply control signal generation circuit 430 and the LC discharge circuit 530. And supply to each of the components.

  Specifically, the signal selection circuit 420 includes a plurality of registers (not shown). When the drive data signal DRV is a signal to be supplied to the DAC circuit 310, the signal selection circuit 420 holds the drive data signal DRV in a plurality of registers corresponding to the DAC circuit 310 according to the select signal EN. Then, the signal selection circuit 420 supplies the held signal to the DAC circuit 310 as a digital original drive signal dA.

  On the other hand, when the drive data signal DRV is a signal supplied to each of the power supply control signal generation circuit 430 and the LC discharge circuit 530, the signal selection circuit 420 includes the power supply control signal generation circuit in the drive data signal DRV according to the select signal EN. Data corresponding to each of 430 and LC discharge circuit 530 is held in a predetermined register. Then, the signal selection circuit 420 supplies the held signal as the discharge control signals DIS1 and DIS2 to the power supply control signal generation circuit 430 and the LC discharge circuit 530, respectively.

  The signal selection circuit 420 is supplied with a control signal STOP from the reference voltage circuit 450. When the control signal STOP is supplied, the signal selection circuit 420 supplies predetermined data corresponding to each of the power supply control signal generation circuit 430 and the LC discharge circuit 530 to a predetermined value regardless of the drive data signal DRV and the select signal EN. Hold in register. Then, the signal selection circuit 420 supplies the held signal as the discharge control signals DIS1 and DIS2 to the power supply control signal generation circuit 430 and the LC discharge circuit 530, respectively. In addition, when the control signal STOP is supplied to the signal selection circuit 420, the drive signal generation circuit 50 stops generating the drive signal COM. Details of the control signal STOP will be described later.

  The power supply control signal generation circuit 430 is supplied with the discharge control signal DIS1. The power supply control signal generation circuit 430 includes an open drain circuit (not shown). Then, when the supplied discharge control signal DIS1 is an active signal, the power supply control signal generation circuit 430 controls the open drain circuit to turn off and sets the terminal Ctvh to high impedance.

  On the other hand, when the discharge control signal DIS1 is a signal indicating inactivity, the power supply control signal generation circuit 430 controls the open drain circuit to be on and sets the terminal Ctvh to the ground potential. At this time, the L level power supply control signal CTVHV is supplied to the power supply switching circuit 70 shown in FIG. 2 via the terminal Ctvh and the terminal Ctvh-Out.

  In the description of FIG. 22 and the like to be described later, the open drain circuit included in the power supply control signal generation circuit 430 will be described as being configured by an NMOS transistor. In the following description, it is assumed that the discharge control signal DIS1 is supplied to the gate terminal of the NMOS transistor via the inverter circuit. Therefore, in the present embodiment, it is assumed that the signal indicating that the discharge control signal DIS1 is active is an H level signal, and the signal indicating that the discharge control signal DIS1 is inactive is an L level signal. Note that the power supply control signal generation circuit 430 is not limited to an open drain circuit, and may be configured by a push-pull circuit, for example.

  A voltage GVDD is supplied to the reference voltage circuit 450. The reference voltage circuit 450 steps down the supplied voltage GVDD and generates a reference voltage signal VBS.

  The reference voltage signal VBS generated by the reference voltage circuit 450 is supplied to the ejection module 21 shown in FIG. 2 via the terminal Vbs and the terminal Vbs-Out. The reference voltage signal VBS functions as a reference voltage that serves as a reference for displacing the piezoelectric element 60.

  The DAC circuit 310 converts the original drive signal dA into an analog original drive signal aA and supplies it to the modulation circuit 510. Further, the DAC circuit 310 supplies a digital signal based on the original drive signal dA to the detection circuit 320.

  The detection circuit 320 detects whether or not a signal based on the original drive signal dA supplied from the DAC circuit 310 is within a predetermined range.

  The determination circuit 350 determines whether or not the original drive signal dA is normal according to the detection result of the detection circuit 320. If it is determined that the original drive signal dA is not normal, the determination circuit 350 generates an error signal ERR and supplies the error signal ERR to the control circuit 100 illustrated in FIG. 2 via the terminal Err and the terminal Err-Out.

  The modulation circuit 510 includes an adder 512, an adder 513, a comparator 514, an inverter 515, an integral attenuator 516 and an attenuator 517.

  The integral attenuator 516 attenuates and integrates the voltage signal of the drive signal COM supplied via the terminal Vfb, and supplies the voltage signal to the input terminal (−) of the adder 512.

  The original drive signal aA is supplied to the input terminal (+) of the adder 512. The adder 512 subtracts and integrates the voltage signal supplied from the integration attenuator 516 to the input terminal (−) of the adder 512 from the original drive signal aA supplied to the input terminal (+). Then, the subtracted and integrated voltage signal is supplied to the input terminal (+) of the adder 513.

  Here, the maximum voltage of the original drive signal aA is a low voltage of about 2V, for example, whereas the maximum voltage of the drive signal COM may be a high voltage of about 40V, for example. For this reason, the integral attenuator 516 attenuates the voltage of the drive signal COM in order to match the amplitude range of both voltages when obtaining the deviation.

  The attenuator 517 attenuates the high frequency component of the voltage signal of the drive signal COM input via the terminal Ifb, and supplies the voltage to the input terminal (−) of the adder 513.

  The adder 513 outputs to the comparator 514 a voltage signal As obtained by subtracting the voltage supplied from the attenuator 517 to the input terminal (−) from the voltage supplied from the adder 512 to the input terminal (+).

  The voltage signal As output from the adder 513 is a voltage obtained by subtracting the voltage supplied to the terminal Vfb from the voltage of the original drive signal aA and further subtracting the voltage supplied to the terminal Ifb. That is, the voltage signal As is a voltage signal obtained by correcting a deviation obtained by subtracting the attenuation voltage of the output drive signal COM from the target voltage of the original drive signal aA with the high frequency component of the drive signal COM.

The comparator 514 generates a modulation signal Ms based on the voltage signal As supplied from the adder 513. Specifically, the comparator 514 generates an H-level modulation signal Ms when the voltage of the voltage signal As supplied from the adder 513 is rising and when the voltage becomes equal to or higher than a predetermined threshold Vth1. Further, the comparator 514 generates the L-level modulation signal Ms when the voltage of the voltage signal As is decreasing and when the voltage signal As is below a predetermined threshold value Vth2. Note that the threshold value Vth1 and the threshold value Vth2 are set such that threshold value Vth1> threshold value Vth2.

  The comparator 514 supplies the generated modulation signal Ms to the first gate driver 521 included in the gate drive circuit 520. The comparator 514 supplies the generated modulation signal Ms to the second gate driver 522 included in the gate drive circuit 520 via the inverter 515. Accordingly, the signal supplied from the comparator 514 to the first gate driver 521 and the signal supplied to the second gate driver 522 are in an exclusive relationship with each other.

  Here, the logic levels of the signals supplied to the first gate driver 521 and the second gate driver 522 are in an exclusive relationship. The logic of the signals supplied to the first gate driver 521 and the second gate driver 522 is the same. It includes the concept that the timing is controlled so that the level does not simultaneously become the H level.

  The gate drive circuit 520 includes a first gate driver 521 and a second gate driver 522.

  The first gate driver 521 shifts the level of the voltage of the modulation signal Ms output from the comparator 514 and outputs it as the first amplification control signal Hgd from the terminal Hdr.

  Specifically, of the power supply voltage of the first gate driver 521, a voltage is supplied to the high potential side via the terminal Bst and to the low potential side via the terminal Sw. The terminal Bst is connected in common with one end of a capacitor 541 provided outside the integrated circuit 500 and a cathode terminal of a backflow preventing diode 542. The other end of the capacitor 541 is connected to the terminal Sw. The anode terminal of the diode 542 is connected to the terminal Gvd to which the voltage GVDD is supplied. Therefore, the potential difference between the terminal Bst and the terminal Sw is approximately equal to the potential difference between both ends of the capacitor 541, that is, the voltage GVDD. The first gate driver 521 generates a first amplification control signal Hgd having a voltage larger than the terminal Sw by the voltage GVDD according to the input modulation signal Ms, and outputs the first amplification control signal Hgd from the terminal Hdr.

  The second gate driver 522 operates on the lower potential side than the first gate driver 521. The second gate driver 522 level-shifts the voltage of the signal obtained by inverting the modulation signal Ms output from the comparator 514 by the inverter 515, and outputs the result as the second amplification control signal Lgd from the terminal Ldr.

  Specifically, the voltage GVDD is supplied to the high potential side of the power supply voltage of the second gate driver 522, and the ground potential is supplied to the low potential side. The second gate driver 522 generates a second amplification control signal Lgd having a voltage larger than the terminal Gnd by the voltage GVDD in accordance with the inverted signal of the modulation signal Ms supplied, and outputs the second amplification control signal Lgd from the terminal Ldr.

  The LC discharge circuit 530 includes a resistor 531 and a transistor 532. In the following description, it is assumed that the transistor 532 is an NMOS transistor.

  One end of the resistor 531 is connected to the terminal Vfb. The other end of the resistor 531 is connected to the drain terminal of the transistor 532.

  A discharge control signal DIS2 is supplied to the gate terminal of the transistor 532. A ground potential is supplied to the source terminal of the transistor 532.

  When the H level discharge control signal DIS2 is supplied to the gate terminal of the transistor 532, the transistor 532 is controlled to be turned on. At this time, the ground potential is supplied to the terminal Com-Out from which the drive signal COM is output via the resistors 531 and 571 and the transistor 532. In other words, the transistor 532 is provided so that the electrical connection between the terminal Com-Out and the ground potential can be switched.

  The output circuit 550 includes transistors 551 and 552, resistors 553 and 554, and a low pass filter 560 (Low Pass Filter). In the following description, the transistors 551 and 552 are assumed to be NMOS transistors.

  A voltage VHV is supplied to the drain terminal of the transistor 551. The gate terminal of the transistor 551 is connected to one end of the resistor 553. The source terminal of the transistor 551 is connected to the terminal Sw. The other end of the resistor 553 is connected to the terminal Hdr. Therefore, the first amplification control signal Hgd is supplied to the gate terminal of the transistor 551.

  A drain terminal of the transistor 552 is connected to a source terminal of the transistor 551. The gate terminal of the transistor 552 is connected to one end of the resistor 554. A ground potential is supplied to the source terminal of the transistor 552. The other end of the resistor 554 is connected to the terminal Ldr. Therefore, the second amplification control signal Lgd is supplied to the gate terminal of the transistor 552.

  In the transistors 551 and 552 connected as described above, when the transistor 551 is controlled to be turned off and the transistor 552 is controlled to be turned on, a connection point to which the terminal Sw is connected is a ground potential, and a voltage is applied to the terminal Bst. GVDD is supplied. On the other hand, when the transistor 551 is controlled to be on and the transistor 552 is controlled to be off, the voltage VHV is supplied to the connection point to which the terminal Sw is connected. Therefore, the voltage VHV + voltage GVDD is supplied to the terminal Bst. In other words, the first gate driver 521 that drives the transistor 551 uses the capacitor 541 as a floating power supply, and the voltage of the terminal Sw changes to the ground potential or the voltage VHV according to the operation of the transistors 551 and 552. A first amplification control signal Hgd having an L level of voltage VHV and an H level of voltage VHV + voltage GVDD is supplied to the gate terminal. The transistor 551 performs a switching operation based on the first amplification control signal Hgd.

  The second gate driver 522 for driving the transistor 552 outputs the second amplification control signal Lgd whose L level is the ground potential and H level is the voltage GVDD regardless of the operation of the transistors 551 and 552. The transistor 552 performs a switching operation based on the second amplification control signal Lgd.

  As described above, an amplified modulated signal obtained by amplifying the modulated signal Ms based on the voltage VHV is generated at the connection point between the source terminal of the transistor 551 and the drain terminal of the transistor 552. That is, the transistors 551 and 552 function as an amplifier circuit that amplifies the voltage of the modulation signal Ms. As described above, the first amplification control signal Hgd and the second amplification control signal Lgd that drive the transistors 551 and 552 are in an exclusive relationship. That is, the transistor 551 and the transistor 552 are controlled so as not to be turned on simultaneously.

  Low pass filter 560 includes an inductor 561 and a capacitor 562.

  One end of the inductor 561 is connected in common with the source terminal of the transistor 551 and the drain terminal of the transistor 552. The other end of the inductor 561 is connected in common with a terminal Com-Out from which the drive signal COM is output and one end of the capacitor 562. A ground potential is supplied to the other end of the capacitor 562.

  As described above, the inductor 561 and the capacitor 562 smooth the amplified modulation signal supplied to the connection point between the transistor 551 and the transistor 552. As a result, the amplified modulation signal is demodulated to generate the drive signal COM.

  The first feedback circuit 570 includes a resistor 571 and a resistor 572. One end of the resistor 571 is connected to the terminal Com-Out. The other end of the resistor 571 is connected in common with the terminal Vfb and one end of the resistor 572. A voltage VHV is supplied to the other end of the resistor 572. As a result, the drive signal COM that has passed through the first feedback circuit 570 is pulled up and fed back to the terminal Vfb from the terminal Com-Out.

  Second feedback circuit 580 includes resistors 581, 582 and capacitors 583, 584, 585.

  One end of the capacitor 583 is connected to the terminal Com-Out. The other end of the capacitor 583 is connected in common with one end of the resistor 581 and one end of the resistor 582. A ground potential is supplied to the other end of the resistor 581. Thereby, the capacitor 583 and the resistor 581 function as a high pass filter. Note that the cutoff frequency of the high-pass filter including the capacitor 583 and the resistor 581 is set to, for example, about 9 MHz.

  The other end of the resistor 582 is connected in common with one end of the capacitor 584 and one end of the capacitor 585. A ground potential is supplied to the other end of the capacitor 584. Thereby, the resistor 582 and the capacitor 584 function as a low pass filter. Note that the cutoff frequency of the low-pass filter including the resistor 582 and the capacitor 584 is set to, for example, about 160 MHz.

  Thus, since the second feedback circuit 580 is composed of a high-pass filter and a low-pass filter, the second feedback circuit 580 functions as a band pass filter that passes a predetermined frequency range of the drive signal COM. To do.

  The other end of the capacitor 585 is connected to the terminal Ifb. As a result, the DC component of the high frequency component of the drive signal COM that has passed through the second feedback circuit 580 is cut back to the terminal Ifb.

By the way, the drive signal COM is a signal obtained by smoothing the amplified modulation signal by the low-pass filter 560. This drive signal COM is integrated / subtracted via the terminal Vfb and then fed back to the adder 512. Therefore, self-excited oscillation occurs at a frequency determined by the feedback delay and the transfer function of the feedback. However, since the delay amount of the feedback path via the terminal Vfb is large, there is a case where the frequency of the self-oscillation cannot be made high enough to ensure the accuracy of the drive signal COM only by the feedback via the terminal Vfb. . Therefore, by providing a path for feeding back the high-frequency component of the drive signal COM via the terminal Ifb in addition to the path via the terminal Vfb, the delay when viewed from the entire circuit can be reduced. As a result, the voltage signal As
Is higher than the case where there is no path through the terminal Ifb so that the accuracy of the drive signal COM can be sufficiently secured.

  Of the drive signal generation circuit 50 described above, the configuration including the modulation circuit 510, the gate drive circuit 520, the LC discharge circuit 530, the output circuit 550, the capacitor 541, and the diode 542 generates the drive signal COM. 51. The terminal Com-Out is a terminal that outputs the drive signal COM generated by the drive circuit 51, and is an example of a “drive signal output terminal”.

3 Configuration and Operation of Power Supply Switching Circuit Next, the configuration and operation of the power supply switching circuit 70 will be described with reference to FIG. FIG. 4 is a circuit diagram showing an electrical configuration of the power supply switching circuit 70.

  The power supply switching circuit 70 includes transistors 471, 472, 473 and resistors 474, 475. In the following description, it is assumed that the transistor 471 is a PMOS transistor and the transistors 472 and 473 are NMOS transistors.

  The source terminal of the transistor 471 is connected to one end of the resistor 474 and supplied with the voltage VHV. The gate terminal of the transistor 471 is connected in common with the other end of the resistor 474 and the drain terminal of the transistor 472. Further, the drain terminal of the transistor 471 is connected to one end of the resistor 475.

  A voltage Vdd1 is supplied to a gate terminal of the transistor 472. The source terminal of the transistor 472 is connected to the gate terminal of the transistor 473 and is supplied with a power supply control signal CTVHV. Here, the voltage Vdd1 is a DC voltage signal having an arbitrary voltage.

  A drain terminal of the transistor 473 is connected to the other end of the resistor 475. A ground potential is supplied to the source terminal of the transistor 473.

  The power supply switching circuit 70 configured as described above switches whether to supply the voltage VHV to the drive IC 80 as the voltage VHV-TG in accordance with the power supply control signal CTVHV supplied from the drive signal generation circuit 50.

  Specifically, when the discharge control signal DIS1 indicating inactivity is supplied to the power supply control signal generation circuit 430, the power supply control signal generation circuit 430 sets the terminal Ctvh-Out to the ground potential. Therefore, the power supply control signal CTVHV is an L level signal. Accordingly, the transistor 473 is controlled to be off and the transistor 472 is controlled to be on. Therefore, the ground potential is supplied to the gate terminal of the transistor 471 through the transistor 472. Accordingly, the transistor 471 is controlled to be on.

  As described above, when the power supply control signal CTVHV is an L level signal, the transistor 471 is controlled to be on and the transistor 473 is controlled to be off. Therefore, the power supply switching circuit 70 supplies the voltage VHV supplied via the transistor 471 to the drive IC 80 as the voltage VHV-TG.

On the other hand, when the discharge control signal DIS1 indicating active is supplied to the power supply control signal generation circuit 430, the power supply control signal generation circuit 430 sets the terminal Ctvh-Out to high impedance. At this time, the voltage at the terminal Ctvh-Out becomes the voltage Vdd1 supplied via the transistor 472. In other words, the power supply control signal CTVHV is an H level signal. Accordingly, the transistor 473 is controlled to be on. At this time, the voltage VHV is supplied to the drain terminal of the transistor 472 and the gate terminal of the transistor 471 through the resistor 474. Accordingly, the transistor 471 is controlled to be turned off.

  As described above, when the power supply control signal CTVHV is an H level signal, the transistor 471 is controlled to be off and the transistor 473 is controlled to be on. Accordingly, the power supply switching circuit 70 supplies the ground potential supplied via the resistor 475 and the transistor 472 to the drive IC 80 as the voltage VHV-TG.

4. Configuration and Operation of Drive IC Next, the configuration and operation of the drive IC 80 will be described.

  First, an example of the drive signal COM supplied to the drive IC 80 will be described with reference to FIG. Thereafter, the configuration and operation of the drive IC 80 will be described with reference to FIGS.

  FIG. 5 is a diagram illustrating an example of the drive signal COM. FIG. 5 shows a period T1 from when the latch signal LAT rises until the change signal CH rises, a period T2 after the period T1, until the next rise of the change signal CH, and after the period T2, the latch signal LAT A period T3 until rising is shown. Note that the period formed by the periods T1, T2, and T3 is a period Ta for forming a new dot on the medium P.

  As shown in FIG. 5, the drive signal generation circuit 50 generates the voltage waveform Adp in the period T1. When the voltage waveform Adp1 is supplied to the piezoelectric element 60, a predetermined amount, specifically, a medium amount of ink is ejected from the corresponding ejection unit 600.

  Further, the drive signal generation circuit 50 generates the voltage waveform Bdp in the period T2. When the voltage waveform Bdp is supplied to the piezoelectric element 60, a small amount of ink smaller than the predetermined amount is ejected from the corresponding ejection unit 600.

  Further, the drive signal generation circuit 50 generates the voltage waveform Cdp in the period T3. When the voltage waveform Cdp is supplied to the piezoelectric element 60, the piezoelectric element 60 is displaced to the extent that ink is not ejected from the corresponding ejection unit 600. Accordingly, no dots are formed on the medium P. This voltage waveform Cdp is a voltage waveform for preventing the viscosity of the ink from increasing by causing the ink in the vicinity of the nozzle opening of the ejection unit 600 to vibrate. In the following description, in order to prevent the viscosity of ink from increasing, displacing the piezoelectric element 60 to the extent that ink is not ejected from the ejection unit 600 is referred to as “microvibration”.

  Here, the voltage Vc at the start timing and the voltage at the end timing of the voltage waveform Adp, the voltage waveform Bdp, and the voltage waveform Cdp are all the same as the voltage Vc. That is, the voltage waveforms Adp, Bdp, and Cdp are voltage waveforms that start with the voltage Vc and end with the voltage Vc. Therefore, the drive signal generation circuit 50 outputs the drive signal COM having a voltage waveform in which the voltage waveforms Adp, Bdp, Cdp are continuous in the period Ta.

Then, the voltage waveform Adp is supplied to the piezoelectric element 60 in the period T1, and the voltage waveform Bdp is supplied in the period T2, so that a medium amount of ink and a small amount of ink are discharged from the ejection unit 600 in the period Ta. And are discharged. As a result, “large dots” are formed on the medium P. In addition, since the voltage waveform Adp is supplied to the piezoelectric element 60 in the period T1 and the voltage waveform Bdp is not supplied in the period T2, a medium amount of ink is ejected from the ejection unit 600 in the period Ta. As a result, “medium dots” are formed on the medium P. In addition, since the voltage waveform Adp is not supplied to the piezoelectric element 60 in the period T1, and the voltage waveform Bdp is supplied in the period T2, a small amount of ink is ejected from the ejection unit 600 in the period Ta. As a result, “small dots” are formed on the medium P. Further, since the voltage waveforms Adp and Bdp are not supplied to the piezoelectric element 60 in the periods T1 and T2, and the voltage waveform Cdp is supplied in the period T3, the ink is not ejected from the ejection unit 600 in the period Ta, and the micro vibration is generated. To do. In this case, no dots are formed on the medium P.

  FIG. 6 is a block diagram showing the electrical configuration of the discharge module 21 and the drive IC 80. As shown in FIG. 6, the drive IC 80 includes a selection control circuit 210 and a plurality of selection circuits 230.

  The selection control circuit 210 is supplied with a clock signal SCK, a print data signal SI, a latch signal LAT, a change signal CH, and a voltage VHV-TG. The selection control circuit 210 is provided with a set of a shift register 212 (S / R), a latch circuit 214, and a decoder 216 corresponding to each of the ejection units 600. That is, the head unit 20 is provided with a set of shift registers 212, latch circuits 214, and decoders 216 as many as the total number n of the ejection units 600.

  The shift register 212 temporarily holds 2-bit print data [SIH, SIL] included in the print data signal SI for each corresponding ejection unit 600.

  Specifically, the number of stages of shift registers 212 corresponding to the ejection unit 600 are cascade-connected to each other, and the serially supplied print data signal SI is sequentially transferred to the subsequent stage according to the clock signal SCK. In FIG. 6, in order to distinguish the shift register 212, the first stage, the second stage,..., And the nth stage are shown in order from the upstream side to which the print data signal SI is supplied.

  Each of the n latch circuits 214 latches the print data [SIH, SIL] held in the corresponding shift register 212 at the rising edge of the latch signal LAT.

  Each of the n decoders 216 decodes the 2-bit print data [SIH, SIL] latched by the corresponding latch circuit 214 to generate a selection signal S and supplies the selection signal S to the selection circuit 230.

  The selection circuit 230 is provided corresponding to each of the ejection units 600. That is, the number of selection circuits 230 included in one head unit 20 is the same as the total number n of ejection units 600 included in the head unit 20. The selection circuit 230 controls the supply of the drive signal COM to the piezoelectric element 60 based on the selection signal S supplied from the decoder 216.

  FIG. 7 is a circuit diagram showing an electrical configuration of the selection circuit 230 corresponding to one ejection unit 600.

  As illustrated in FIG. 7, the selection circuit 230 includes an inverter 232 (NOT circuit) and a transfer gate 234. The transfer gate 234 includes a transistor 235 that is an NMOS transistor and a transistor 236 that is a PMOS transistor.

  The selection signal S is supplied from the decoder 216 to the gate terminal of the transistor 235. The selection signal S is logically inverted by the inverter 232 and supplied to the gate terminal of the transistor 236.

The drain terminal of the transistor 235 and the source terminal of the transistor 236 are connected to the terminal TG-In. A drive signal COM is supplied to the terminal TG-In. Then, the transistor 235 and the transistor 236 are controlled to be turned on or off according to the selection signal S, so that the drive signal VOUT is output from the terminal TG-Out to which the source terminal of the transistor 235 and the drain terminal of the transistor 236 are connected in common. And supplied to the discharge module 21. The terminal TG-In is an example of a “first terminal”, and the terminal TG-Out is an example of a “second terminal”. The transfer gate 234 is an example of a “switch circuit”. In the following description, the case where the transistor 235 and the transistor 236 of the transfer gate 234 are controlled to be in a conductive state is referred to as controlling the transfer gate 234 to be on, and the transistor 235 and the transistor 236 are in a non-conductive state. The controlled case may be referred to as controlling the transfer gate 234 off.

  Next, the decoding contents of the decoder 216 will be described with reference to FIG. FIG. 8 is a diagram showing the decoding contents in the decoder 216.

  The decoder 216 receives 2-bit print data [SIH, SIL], a latch signal LAT, and a change signal CH. The decoder 216 outputs a logic level selection signal S based on the print data [SIH, SIL] in each of the periods T1, T2, and T3 defined by the latch signal LAT and the change signal CH.

  Specifically, when the print data [SIH, SIL] is [1, 1] defining “large dots”, the decoder 216 is at the H level in the period T1, the H level in the period T2, and the L level in the period T3. A selection signal S is output.

  In addition, when the print data [SIH, SIL] is [1, 0] that defines “medium dot”, the decoder 216 selects the H level in the period T1, the L level in the period T2, and the L level in the period T3. The signal S is output.

  In addition, when the print data [SIH, SIL] is [0, 1] that defines “small dots”, the decoder 216 selects L level in the period T1, H level in the period T2, and L level in the period T3. The signal S is output.

  In addition, when the print data [SIH, SIL] is [0, 0] that defines “fine vibration”, the decoder 216 selects the L level in the period T1, the L level in the period T2, and the H level in the period T3. The signal S is output.

  Here, the logic level of the selection signal S is level-shifted to a high amplitude logic based on the voltage VHV-TG by a level shifter (not shown).

  An operation in which the drive signal VOUT based on the drive signal COM is generated in the drive IC 80 described above and supplied to the ejection unit 600 included in the ejection module 21 will be described with reference to FIG.

  FIG. 9 is a diagram for explaining the operation of the drive IC 80.

  The print data signal SI is supplied serially in synchronization with the clock signal SCK, and sequentially transferred in the shift register 212 corresponding to the ejection unit 600. When the supply of the clock signal SCK is stopped, the print data [SIH, SIL] corresponding to the ejection unit 600 is held in each of the shift registers 212. The print data signal SI is supplied in the order corresponding to the last n stages,..., 2 stages, and 1 stage of the ejection unit 600 in the shift register 212.

  Here, when the latch signal LAT rises, each of the latch circuits 214 latches the print data [SIH, SIL] held in the corresponding shift register 212 at the same time. In FIG. 9, LT1, LT2,..., LTn indicate print data [SIH, SIL] latched by the latch circuit 214 corresponding to the first, second,.

  The decoder 216 outputs a logic level selection signal S according to the contents shown in FIG. 8 in each of the periods T1, T2, and T3 in accordance with the dot size defined by the latched print data [SIH, SIL]. To do.

  When the print data [SIH, SIL] is [1, 1], the selection circuit 230 selects the voltage waveform Adp in the period T1, selects the voltage waveform Bdp in the period T2, and selects the voltage waveform Bdp in the period T3. The voltage waveform Cdp is not selected. As a result, the drive signal VOUT corresponding to the large dot shown in FIG.

  When the print data [SIH, SIL] is [1, 0], the selection circuit 230 selects the voltage waveform Adp in the period T1 according to the selection signal S, does not select the voltage waveform Bdp in the period T2, and The voltage waveform Cdp is not selected at T3. As a result, the drive signal VOUT corresponding to the medium dot shown in FIG.

  When the print data [SIH, SIL] is [0, 1], the selection circuit 230 does not select the voltage waveform Adp in the period T1 and selects the voltage waveform Bdp in the period T2 according to the selection signal S. The voltage waveform Cdp is not selected at T3. As a result, the drive signal VOUT corresponding to the small dots shown in FIG.

  When the print data [SIH, SIL] is [0, 0], the selection circuit 230 does not select the voltage waveform Adp in the period T1 and selects the voltage waveform Bdp in the period T2, according to the selection signal S. The voltage waveform Cdp is not selected at T3. As a result, the drive signal VOUT corresponding to the slight vibration shown in FIG.

5. Configuration and Operation of Discharge Unit Next, the configuration and operation of the discharge module 21 and the discharge unit 600 will be described. FIG. 10 is an exploded perspective view of the discharge module 21. FIG. 11 is a cross-sectional view taken along the line III-III in FIG.

  As shown in FIGS. 10 and 11, the discharge module 21 includes a substantially rectangular channel substrate 670 elongated in the direction X. On one surface side in the direction Z of the flow path substrate 670, a pressure chamber substrate 630, a vibration plate 621, a plurality of piezoelectric elements 60, a housing portion 640, and a sealing body 610 are provided. A nozzle plate 632 and a vibration absorber 633 are provided on the other surface side in the direction Z of the flow path substrate 670. Each configuration of the discharge module 21 is a substantially rectangular member that is long in the direction X like the flow path substrate 670, and is bonded to each other using an adhesive or the like.

  As shown in FIG. 10, the nozzle plate 632 is a plate-like member in which a plurality of nozzles 651 arranged in the direction X are formed. Such a nozzle 651 is provided in the nozzle plate 632 and is an opening portion communicating with a cavity 631 described later.

The flow path substrate 670 is a plate-like member for forming an ink flow path. As shown in FIGS. 10 and 11, the channel substrate 670 includes an opening 671, a supply channel 672, and a communication channel 67.
3 is formed. The opening 671 is a long through hole extending along the direction X that penetrates in the direction Z and is formed in common in the plurality of nozzles 651. The supply flow path 672 and the communication flow path 673 are through holes formed corresponding to the plurality of nozzles 651. Further, as shown in FIG. 11, a relay channel 674 formed in common in the plurality of supply channels 672 is provided on one surface in the direction Z of the channel substrate 670. The relay channel 674 communicates the opening 671 and the plurality of supply channels 672.

  The housing portion 640 is a structure manufactured by, for example, injection molding of a resin material, and is fixed to the other surface in the direction Z of the flow path substrate 670. As shown in FIG. 11, a supply channel 641 and a supply port 661 are formed in the housing portion 640. The supply channel 641 is a recess corresponding to the opening 671 of the channel substrate 670, and the supply port 661 is a through hole communicating with the supply channel 641. A space in which the opening 671 of the flow path substrate 670 and the supply flow path 641 of the casing 640 communicate with each other functions as a reservoir that stores ink supplied from the supply port 661.

  The vibration absorber 633 is configured to absorb pressure fluctuations that occur inside the reservoir. Specifically, the vibration absorber 633 is configured so that the opening 671, the relay flow path 674, and the plurality of supply flow paths 672 formed in the flow path substrate 670 are closed to form the bottom surface of the reservoir. It is fixed to one surface side in the direction Z of 670. Such a vibration absorber 633 includes, for example, a compliance substrate that is a flexible sheet member capable of elastic deformation.

  As shown in FIGS. 10 and 11, the pressure chamber substrate 630 is a plate-like member in which a plurality of cavities 631 corresponding to the plurality of nozzles 651 are formed. The plurality of cavities 631 have a long shape along the direction Y, and are provided side by side along the direction X. One end portion in the direction Y of the cavity 631 communicates with the supply flow path 672, and the other end portion in the direction Y of the cavity 631 communicates with the communication flow path 673.

  As shown in FIGS. 10 and 11, the diaphragm 621 is fixed to the surface of the pressure chamber substrate 630 opposite to the surface to which the flow path substrate 670 is connected. The diaphragm 621 is an elastically deformable plate member. Specifically, as shown in FIG. 11, the flow path substrate 670 and the vibration plate 621 face each other with an interval inside each cavity 631. That is, the diaphragm 621 constitutes an upper surface that is a part of the wall surface of the cavity 631. That is, the cavity 631 is located between the flow path substrate 670 and the vibration plate 621 and functions as a pressure chamber that applies pressure to the ink filled in the cavity 631.

  As shown in FIGS. 10 and 11, a plurality of piezoelectric elements 60 are provided on the surface of the diaphragm 621 opposite to the cavity 631. In other words, the diaphragm 621 is provided between the cavity 631 and the piezoelectric element 60. The plurality of piezoelectric elements 60 are provided side by side in the direction X so as to correspond to the plurality of cavities 631. Then, the diaphragm 621 vibrates in conjunction with the deformation of the piezoelectric element 60, whereby the pressure inside the cavity 631 fluctuates and ink is ejected from the nozzles 651. Specifically, the piezoelectric element 60 is an actuator that is deformed by the supply of the drive signal VOUT, and the piezoelectric element 60 has a structure in which the piezoelectric body 601 is sandwiched between a pair of electrodes 611 and 612 as shown in FIG. . Then, the drive signal VOUT is supplied to the electrode 611, and the reference voltage signal VBS is supplied to the electrode 612. In this case, in the piezoelectric element 60, the central portion of the piezoelectric body 601 is deformed in the vertical direction with respect to both end portions together with the diaphragm 621 in accordance with the potential difference between the electrode 611 and the electrode 612. Then, ink is ejected from the nozzle 651 as the piezoelectric element 60 is deformed. That is, the vibration plate 621 functions as a diaphragm that is displaced by the piezoelectric element 60 and expands / reduces the internal volume of the cavity 631 filled with ink. Here, the electrode 611 included in the piezoelectric element 60 is an example of the first electrode, and the electrode 612 is an example of the second electrode.

  10 and 11 is a structure that protects the plurality of piezoelectric elements 60 and reinforces the mechanical strength of the pressure chamber substrate 630 and the vibration plate 621. For example, the sealing member 610 is attached to the vibration plate 621 with an adhesive. Fixed. A plurality of piezoelectric elements 60 are housed inside a recess formed in a surface of the sealing body 610 facing the diaphragm 621.

  In the discharge module 21 configured as described above, a configuration including the piezoelectric element 60, the cavity 631, the diaphragm 621, and the nozzle 651 is the discharge unit 600.

  FIG. 12 is a diagram illustrating an example of the arrangement of the discharge module 21 and the plurality of nozzles 651 provided in the discharge module 21 when the liquid discharge apparatus 1 is viewed in plan along the direction Z. In FIG. 12, the head unit 20 is described as including four ejection modules 21.

  As shown in FIG. 12, each ejection module 21 is formed with a nozzle row L composed of a plurality of nozzles 651 provided in a row in a predetermined direction. Each nozzle row L is formed by n nozzles 651 arranged in a row along the direction X.

  The nozzle row L shown in FIG. 12 is an example and may have a different configuration. For example, in each nozzle row L, n nozzles 651 may be arranged in a staggered manner so that the even-numbered nozzles 651 and odd-numbered nozzles 651 from the end have different positions in the direction Y. Further, each nozzle row L may be formed in a direction different from the direction X. In the first embodiment, the number of nozzle rows L provided in each ejection module 21 is exemplified as “1”, but each ejection module 21 is formed with nozzle rows L of “2” or more. May be.

  Here, in the present embodiment, the n nozzles 651 forming the nozzle row L are provided in the discharge module 21 at a high density of 300 or more per inch. Therefore, in the discharge module 21, n piezoelectric elements 60 are also provided at a high density corresponding to the n nozzles 651.

  In the present embodiment, the piezoelectric body 601 used for the piezoelectric element 60 is preferably a thin film having a thickness of 1 μm or less, for example. Thereby, the displacement amount of the piezoelectric element 60 with respect to the potential difference between the electrode 611 and the electrode 612 can be increased.

  Here, the operation of discharging ink discharged from the nozzles 651 will be described with reference to FIG. FIG. 13 is a diagram for explaining the relationship between displacement and ejection of the piezoelectric element 60 and the diaphragm 621 when the drive signal VOUT is supplied to the piezoelectric element 60. FIG. 13 (1) schematically shows the displacement of the piezoelectric element 60 and the diaphragm 621 when the voltage Vc is supplied as the drive signal VOUT. Further, (2) in FIG. 13 shows the piezoelectric element 60 and the diaphragm 621 when the voltage of the drive signal VOUT supplied to the piezoelectric element 60 is controlled so as to approach the reference voltage signal VBS from the voltage Vc. The displacement is shown schematically. In FIG. 13 (3), the piezoelectric element 60 and the diaphragm 621 in the case where the voltage of the drive signal VOUT supplied to the piezoelectric element 60 is controlled to be farther from the reference voltage signal VBS than the voltage Vc. The displacement is schematically shown.

  In the state of (1) in FIG. 13, the piezoelectric element 60 and the diaphragm 621 are bent in the direction Z according to the potential difference between the drive signal VOUT supplied to the electrode 611 and the reference voltage signal VBS supplied to the electrode 612. It is. At this time, the voltage Vc is supplied to the electrode 611 as the drive signal VOUT. The voltage Vc is a voltage at the start timing and end timing of the voltage waveforms Adp, Bdp, Cdp, as described above.

  Then, when the voltage of the drive signal VOUT is controlled so as to approach the voltage of the reference voltage signal VBS, as shown in (2) of FIG. 13, the displacement that occurs along the direction Z of the piezoelectric element 60 and the diaphragm 621. Is reduced. At this time, the internal volume of the cavity 631 increases, and ink is drawn into the cavity 631.

  Thereafter, the voltage of the drive signal VOUT is controlled so as to be separated from the voltage of the reference voltage signal VBS. At this time, as shown in (3) of FIG. 13, the displacement along the direction Z of the piezoelectric element 60 and the diaphragm 621 increases. At this time, the internal volume of the cavity 631 is reduced, and the ink filled in the cavity 631 is ejected from the nozzle 651.

  In the present embodiment, when the drive signal VOUT is supplied to the piezoelectric element 60, the states (1) to (3) in FIG. 13 are repeated. As a result, ink is ejected from the nozzles 651 and dots are formed on the medium P. Note that the displacement of the piezoelectric element 60 and the diaphragm 621 shown in (1) to (3) of FIG. 13 is caused by a potential difference between the drive signal VOUT supplied to the electrode 611 and the reference voltage signal VBS supplied to the electrode 612. As it increases, it increases along the direction Z. In other words, the ejection amount of ink ejected from the nozzles 651 is controlled according to the potential difference between the drive signal VOUT and the reference voltage signal VBS.

  Note that the displacement of the piezoelectric element 60 and the diaphragm 621 with respect to the drive signal VOUT shown in FIG. 13 is merely an example. For example, when the potential difference between the drive signal VOUT and the reference voltage signal VBS is large, ink is supplied to the cavity 631. Is drawn, and ink filled in the cavity 631 may be ejected from the nozzle 651 when the potential difference between the drive signal VOUT and the reference voltage signal VBS becomes small.

6 Influence of Voltage Variation of Reference Voltage Signal VBS As described above, the piezoelectric element 60 is displaced by the potential difference between the electrodes 611 and 612 and ejects ink. However, when an unintended voltage is supplied to either the electrode 611 or the electrode 612, an unintended displacement occurs in the piezoelectric element 60. Therefore, unintended stress may occur in the piezoelectric element 60 and the diaphragm 621.

  FIG. 14 is a diagram for explaining the displacement of the piezoelectric element 60 and the diaphragm 621 and the stress generated in the diaphragm 621 when the voltage value of the electrode of the piezoelectric element 60 increases. 14 is a cross-sectional view when two of the plurality of piezoelectric elements 60, the cavities 631, and the nozzles 651 included in the discharge module 21 are viewed from the direction Y. FIG. 14 (1) illustrates the displacement of the piezoelectric element 60 and the diaphragm 621 when a predetermined voltage is supplied to both the electrodes 611 and 612. FIG. 14B illustrates the displacement of the piezoelectric element 60 and the diaphragm 621 when an unintended voltage is supplied to either the electrode 611 or the electrode 612.

  As shown in FIG. 14 (1), when a predetermined voltage is supplied to both the electrode 611 and the electrode 612, a potential difference within an expected range is generated between the electrode 611 and the electrode 612. Therefore, the piezoelectric element 60 is displaced within the assumed range, and similarly, the diaphragm 621 is displaced within the assumed range. At this time, a stress F1 within an assumed range is generated at the contact α between the diaphragm 621 and the cavity 631.

On the other hand, as shown in FIG. 14 (2), when an unintended voltage is supplied to either the electrode 611 or the electrode 612, the electrode 611 and the electrode 612 are outside the expected range. Potential difference may occur. Therefore, the piezoelectric element 60 may be displaced outside the expected range, and similarly, the diaphragm 621 may be displaced outside the assumed range. At this time, a stress F2 larger than expected may be concentrated at the contact α between the diaphragm 621 and the cavity 631.

  Further, the stress generated at the contact point between the diaphragm 621 and the cavity 631 may vary depending on the position of the contact point between the diaphragm 621 and the cavity 631 in the direction Y. Specifically, the stress generated at the contact point between the vibration plate 621 and the cavity 631 is a contact point between the vibration plate 621 and the cavity 631, and is larger at a point where the displacement in the direction Z of the vibration plate 621 becomes maximum. Stress is generated.

  As a factor of the displacement that occurs in the diaphragm 621, for example, natural vibration that occurs in the diaphragm 621 can be cited. FIG. 15 is a plan view when the diaphragm 621 is viewed from the direction Z. FIG. As shown in FIG. 15, the cavity 631 in the present embodiment has a long shape along the direction Y, and the vibration plate 621 may generate a natural vibration along the direction Y. Such natural vibration occurs in a vibration region D between the first contact DL where the diaphragm 621 and the cavity 631 are in contact with the second contact DR.

  FIG. 16 is a diagram illustrating a case where primary natural vibration is generated in the diaphragm 621. As shown in FIG. 16, when primary natural vibration occurs in the vibration plate 621, the displacement ΔD of the vibration plate 621 caused by the natural vibration becomes maximum at the central portion of the vibration region D. Specifically, in the vibration region D, when the distance from the first contact DL to the second contact DR is d, the distance from the first contact DL is d / 2 and the distance from the second contact DR is The displacement ΔD of the diaphragm 621 is maximized at a point where d / 2.

  FIG. 17 is a diagram illustrating a case where tertiary natural vibration is generated in the diaphragm 621. As shown in FIG. 17, when tertiary natural vibration is generated in the diaphragm 621, the displacement ΔD of the diaphragm 621 caused by the natural vibration is the second distance from the first contact DL and d 2. It becomes the maximum at a point where the contact DR is d / 2, a point where the distance from the first contact DL is d / 6, and a distance where the distance from the second contact DR is d / 6.

  As described above, in the direction Y, a larger stress F2 may be applied to the contact α between the diaphragm 621 and the cavity 631 at the point where the displacement ΔD of the diaphragm 621 becomes maximum.

  When the stress F2 larger than expected is concentrated at the contact α between the diaphragm 621 and the cavity 631, there is a possibility that the diaphragm 621 may crack. Furthermore, when a drive signal COM is applied to the electrode 611 in a state where a larger displacement than expected is generated in the vibration plate 621, an unnecessary load may be applied to the vibration plate 621 with the displacement of the piezoelectric element 60. As a result, the diaphragm 621 may be cracked.

  If a crack occurs in the vibration plate 621, ink filled in the cavity 631 leaks from the crack. For this reason, there is a possibility that variations in the amount of ink ejected with respect to changes in the internal volume of the cavity 631 occur. As a result, the ink ejection accuracy deteriorates.

  In particular, the reference voltage signal VBS supplied to the electrode 612 is supplied in common to the plurality of piezoelectric elements 60 provided in the ejection module 21. Therefore, when the reference voltage signal VBS becomes an unintended voltage, the displacement of the plurality of piezoelectric elements 60 and the diaphragm 621 is affected. As a result, cracks may occur in the plurality of diaphragms 621, and the ejection accuracy of the entire liquid ejection apparatus 1 may be affected.

  Furthermore, when the voltage of the reference voltage signal VBS supplied to the electrode 612 increases and becomes higher than the voltage of the drive signal VOUT supplied to the electrode 611, the function of the piezoelectric element 60 may be impaired.

  Since it is difficult to form the piezoelectric body 601 of the piezoelectric element 60 as a single crystal body, the piezoelectric body 601 is formed as a polycrystalline body that is an aggregate of ferroelectric microcrystals. At the time of manufacture, since the direction of spontaneous polarization of each microcrystal is spontaneously dissociated, the piezoelectric characteristics of the piezoelectric body 601 do not appear. Therefore, before the piezoelectric element 60 is incorporated into the head unit 20, a polarization process (poling) is performed in which a predetermined DC electric field is applied to the piezoelectric body 601 to align the polarization direction. The piezoelectric characteristics of the piezoelectric body 601 are expressed by the polarization process.

  In the present embodiment, when the potential of the electrode 611 of the piezoelectric element 60 is higher than the potential of the electrode 612, an electric field having the same polarity as that during the polarization treatment of the piezoelectric body 601 is applied to the piezoelectric element 60. Further, when the potential of the electrode 611 of the piezoelectric element 60 is lower than the potential of the electrode 612, an electric field having a reverse polarity (hereinafter referred to as “reverse polarity electric field”) is applied to the piezoelectric element 60 when the piezoelectric body 601 is polarized. The

  When a reverse polarity electric field is applied to the piezoelectric element 60, the polarization direction aligned by the polarization process in the piezoelectric body 601 is disturbed. Such disturbance of the polarization direction deteriorates the piezoelectric characteristics, and may cause malfunction of the piezoelectric element 60.

  Since the piezoelectric body 601 is a polycrystalline body, partial stress concentration or the like occurs in the manufacturing process or the polarization process, and there are potential minute cracks. The application of the reverse polarity electric field to the piezoelectric element 60 not only disturbs the polarization direction of the piezoelectric body 601, but also grows micro cracks due to the fact that the way of changing the polarization direction differs for each microcrystal. The body 601 may be destroyed. In particular, in the thin film piezoelectric body 601 having a thickness of 1 μm or less as shown in the present embodiment, the grown cracks easily penetrate in the thickness direction. If the crack penetrates in the thickness direction, an electrical short circuit occurs between the electrode 611 and the electrode 612, and the function of the piezoelectric element 60 may be impaired.

7 Configuration and operation of reference voltage generation circuit When the voltage of the reference voltage signal VBS fluctuates as described above, unintended displacement may occur in the piezoelectric element 60, which may deteriorate the discharge accuracy. The function of the piezoelectric element 60 may be impaired.

  Therefore, in the present embodiment, in the reference voltage circuit 450 that generates the reference voltage signal VBS, the configuration for improving the accuracy of the reference voltage signal VBS and the liquid ejection device when an abnormality occurs in the voltage of the reference voltage signal VBS 1 is provided.

  FIG. 18 is a circuit diagram showing an electrical configuration of the reference voltage circuit 450.

  The reference voltage circuit 450 includes a voltage generation unit 451, a voltage detection unit 455, a clamp circuit 459, resistors 462, 463, 464, and a transistor 465. The reference voltage circuit 450 includes a terminal 466 to which a voltage GVDD as a power supply voltage is supplied, a terminal 467 for outputting a reference voltage signal VBS, and a terminal 468 connected to the ground potential. That is, the terminal 466 is an example of a “power supply terminal”, the terminal 467 is an example of a “reference voltage signal output terminal”, and the terminal 468 is an example of a “ground terminal”.

One end of the resistor 462 is connected to the terminal 467, and the other end of the resistor 462 is connected to one end of the resistor 463. The other end of the resistor 463 is connected to one end of the resistor 464. The other end of the resistor 464 is connected to the terminal 468. That is, the resistors 462, 463, and 464 are connected to the terminal 46.
7 and a terminal 468 are connected in series.

  The voltage generation unit 451 includes transistors 452 and 454 and a comparator 453. In the following description, the transistors 452 and 454 are described as PMOS transistors.

  The input terminal (+) of the comparator 453 is connected to the other end of the resistor 462 and one end of the resistor 463. Further, the first reference voltage Vref <b> 1 is supplied to the input terminal (−) of the comparator 453. The output terminal of the comparator 453 is connected to the gate terminal of the transistor 452.

  A source terminal of the transistor 452 is connected to the terminal 466. The drain terminal of the transistor 452 is connected to the terminal 467.

  A control signal STOP output from a voltage detection unit 455 described later is supplied to the gate terminal of the transistor 454. The source terminal of the transistor 454 is connected to the terminal 466. The drain terminal of the transistor 454 is connected to a power supply terminal (not shown) of the comparator 453.

  The clamp circuit 459 includes a comparator 461 and a transistor 460.

  The input terminal (+) of the comparator 461 is connected to the other end of the resistor 463 and one end of the resistor 464. The second reference voltage Vref2 is supplied to the input terminal (−) of the comparator 461. The output terminal of the comparator 461 is connected to the gate terminal of the transistor 460.

  A drain terminal which is an example of one end of the transistor 460 is connected to the terminal 467. A source terminal which is an example of the other end of the transistor 460 is connected to the terminal 468. This transistor 460 is an example of a “first discharge transistor”.

  The voltage detection unit 455 includes resistors 457 and 458 and a comparator 456.

  One end of the resistor 457 is connected to the terminal 467. The other end of the resistor 457 is connected to one end of the resistor 458. The other end of the resistor 458 is connected to the terminal 468. That is, the resistors 457 and 458 are connected in series between the terminal 467 and the terminal 468.

  The input terminal (+) of the comparator 456 is connected to the other end of the resistor 457 and one end of the resistor 458. The third reference voltage Vref3 is supplied to the input terminal (−) of the comparator 456. The output terminal of the comparator 456 is connected to the gate terminal of the transistor 465.

  Hereinafter, the transistor 465 is described as an NMOS transistor. A control signal STOP is supplied to the gate terminal of the transistor 465. In addition, a drain terminal which is an example of one end of the transistor 465 is connected to the terminal 467. A source terminal which is an example of the other end of the transistor 465 is connected to the terminal 468. This transistor 465 is an example of a “second discharge transistor”.

  The operation of the reference voltage circuit 450 configured as described above will be described with reference to FIGS.

  FIG. 19 is a diagram for explaining the operation in the case where the reference voltage signal VBS having a predetermined voltage is generated in the reference voltage circuit 450.

  As shown in FIG. 19, a voltage obtained by dividing the reference voltage signal VBS by a resistor 462 and a combined resistor of the resistor 463 and the resistor 464 is supplied to the input end (+) of the comparator 453, and the input end (−). Is supplied with the first reference voltage Vref1. Specifically, when the voltage of the reference voltage signal VBS is a predetermined value, the voltage supplied to the input terminal (+) of the comparator 453 and the first reference voltage supplied to the input terminal (−) The resistance values of the resistors 462, 463, and 464 and the voltage of the first reference voltage Vref1 are determined so as to be the same.

  When the voltage of the reference voltage signal VBS is smaller than a predetermined value, the voltage supplied to the input terminal (+) of the comparator 453 is smaller than the first reference voltage Vref1. At this time, the comparator 453 outputs an L level signal. Accordingly, the transistor 452 is controlled to be on. Accordingly, a current is supplied to the terminal 467 through a path indicated by a solid arrow in FIG. 19, electric charges are accumulated in the terminal 467, and the voltage of the reference voltage signal VBS increases.

  Further, when the voltage of the reference voltage signal VBS is larger than a predetermined value, the voltage supplied to the input terminal (+) of the comparator 453 is larger than the first reference voltage Vref1. At this time, the comparator 453 outputs an H level signal. Accordingly, the transistor 452 is controlled to be turned off. Accordingly, the charge accumulated in the terminal 467 is released through the path indicated by the dashed arrow in FIG. 19, and the voltage of the reference voltage signal VBS is lowered.

  As described above, the voltage generation unit 451 compares the first reference voltage Vref1 with the voltage based on the reference voltage signal VBS in the comparator 453, and the transistor 452 is turned on or off according to the comparison result. A reference voltage signal VBS having a constant voltage is generated. That is, the comparator 453 compares the first reference voltage Vref1 with a signal based on the reference voltage signal VBS, and is an example of a “first comparator”. The transistor 452 switches whether to electrically connect the terminal 466 and the terminal 467 based on the comparison result of the comparator 453, and is an example of a “first transistor”.

  However, the voltage of the reference voltage signal VBS generated by the voltage generator 451 rises above a predetermined value in accordance with changes in the surrounding environment such as the temperature of the liquid ejection device 1 and the load state to which the reference voltage signal VBS is supplied. There is a risk. In that case, the charge accumulated in the terminal 467 may not be sufficiently discharged to the terminal 468 through the resistors 462, 463, and 464.

  Therefore, the reference voltage circuit 450 in the present embodiment includes a clamp circuit 459 that discharges the charge accumulated in the terminal 467 when the voltage of the reference voltage signal VBS increases.

  FIG. 20 is a diagram for explaining an operation in the case where the voltage value of the reference voltage signal VBS is controlled in the reference voltage circuit 450 when the voltage value is controlled.

  As shown in FIG. 20, the voltage obtained by dividing the reference voltage signal VBS by the combined resistance of the resistor 462 and the resistor 463 and the resistor 464 is supplied to the input end (+) of the comparator 461, and the input end (−). Is supplied with the second reference voltage Vref2. Specifically, when the voltage of the reference voltage signal VBS becomes about 1 V higher than a predetermined value, the voltage supplied to the input terminal (+) of the comparator 461 and the input terminal (-) are supplied. The resistance values of the resistors 462, 463, and 464 and the voltage of the second reference voltage Vref2 are determined so that the second reference voltage becomes the same. Note that “when the voltage of the reference voltage signal VBS is about 1 V higher than a predetermined value” is an example, and when the reference voltage signal VBS of the voltage is supplied to the electrode 612, the piezoelectric element Any voltage that does not affect the displacement and characteristics of 60 may be used.

  When the voltage of the reference voltage signal VBS increases and the voltage supplied to the input terminal (+) of the comparator 461 becomes larger than the second reference voltage Vref2, the comparator 461 outputs an H level signal. Output. Therefore, the transistor 460 is controlled to be on. In this case, as indicated by the broken-line arrows in FIG. 20, the charge of the terminal 467 is discharged through the path through the transistor 460 in addition to the path through the resistors 462, 463, and 464.

  Therefore, even when there is a possibility that the voltage of the reference voltage signal VBS may fluctuate, such as a change in the surrounding environment such as the temperature of the liquid ejecting apparatus 1 or a change in the load state to which the reference voltage signal VBS is supplied, It is possible to reduce the possibility that the voltage of VBS fluctuates.

  That is, the comparator 461 compares the second reference voltage Vref2 with a signal based on the reference voltage signal VBS, and is an example of a “second comparator”. The transistor 465 switches whether or not the terminal 467 and the terminal 468 are electrically connected based on the comparison result of the comparator 461, and is also an example of a “second transistor”.

  Further, a part of the ink ejected in the liquid ejecting apparatus 1 floats inside the liquid ejecting apparatus 1. When the floating ink adheres to the reference voltage circuit 450 or the vicinity thereof, the terminal 467 and a different wiring pattern may be short-circuited through the ink, and the terminal 467 may become an unintended voltage. When such an unintended voltage is supplied to the terminal 467, not only the ink ejection characteristics but also the ejection module 21 may be abnormal.

  Therefore, the reference voltage circuit 450 in the present embodiment stops the operation of the voltage generation unit 451 and instructs the discharge of the charge from the terminal 467 when the voltage of the reference voltage signal VBS rises above a predetermined value. A portion 455.

  FIG. 21 is a diagram for explaining an operation in the reference voltage circuit 450 when the charge of the reference voltage signal VBS is discharged when the voltage of the reference voltage signal VBS rises above a predetermined value.

  As shown in FIG. 21, a voltage obtained by dividing the reference voltage signal VBS by a resistor 457 and a resistor 458 is supplied to the input terminal (+) of the comparator 456, and the third reference is supplied to the input terminal (−). The voltage Vref3 is supplied. Specifically, when the voltage of the reference voltage signal VBS is about 3V higher than a predetermined value, the voltage supplied to the input terminal (+) of the comparator 456 and the input terminal (−) are supplied. The resistance values of the resistors 457 and 458 and the voltage of the third reference voltage Vref3 are determined so that the third reference voltage Vref3 becomes the same. Note that “when the voltage of the reference voltage signal VBS is about 3 V higher than a predetermined value” is an example, and when the reference voltage signal VBS of the voltage is supplied to the electrode 612, the piezoelectric element 60 and the voltage that does not cause a failure in the discharge module 21 may be used.

  When the voltage of the reference voltage signal VBS increases and the voltage supplied to the input terminal (+) of the comparator 456 becomes larger than the third reference voltage Vref3, the comparator 456 STOP is output. The H-level control signal STOP output from the comparator 456 is an example of a “stop signal”.

  The control signal STOP output from the comparator 456 is supplied to the gate terminal of the transistor 454 and the gate terminal of the transistor 465.

  When an H-level control signal STOP is supplied to the gate terminal of the transistor 454, the transistor 454 is controlled to be turned off. Accordingly, the supply of the voltage GVDD to the comparator 453 is stopped. Thus, the voltage generation unit 451 stops operating and does not supply current from the terminal 466 to the terminal 467.

  Note that when the L-level control signal STOP is supplied to the gate terminal of the transistor 454, the transistor 454 is controlled to be on. Therefore, the voltage GVDD is supplied to the comparator 453. In other words, the transistor 454 switches whether to supply the voltage GVDD to the voltage generation unit 451 and the comparator 453, and is an example of a “first switch circuit”.

  In addition, when an H-level control signal STOP is supplied to the gate terminal of the transistor 465, the transistor 465 electrically connects the terminal 467 and the terminal 468. As a result, as indicated by the broken-line arrows in FIG. 21, the charge of the terminal 467 is released not only through the path via the resistors 462, 463 and 464 and the path via the transistor 460, but also via the path via the transistor 465. .

  Note that when the L-level control signal STOP is supplied to the gate terminal of the transistor 465, the terminal 467 and the terminal 468 are not electrically connected. In other words, the transistor 465 switches whether or not the terminal 467 and the terminal 468 are electrically connected, and is an example of a “second switch circuit”.

  As described above, the reference voltage circuit 450 according to the present embodiment includes a voltage generation unit 451 that generates the reference voltage signal VBS, a clamp circuit 459 that suppresses fluctuations in the reference voltage signal VBS, and an abnormality in the reference voltage signal VBS. When this occurs, a voltage detector 455 for protecting the piezoelectric element 60 and the ejection module 21 is provided. In other words, the voltage generator 451 that generates the reference voltage signal VBS is configured to generate the reference voltage signal VBS at the terminal 467, and the clamp circuit 459 stabilizes the reference voltage signal VBS generated by the voltage generator 451. The voltage detection unit 455 is configured to discharge the electric charge stored in the terminal 467 when an abnormality occurs in the voltage value of the reference voltage signal VBS. Therefore, the transistor 460 included in the clamp circuit 459 is a transistor that operates with low power consumption, and the voltage detection unit 455 is a transistor with a large rated capacity that can rapidly discharge a large amount of charge. In other words, the rated capacity of the transistor 465 is larger than that of the transistor 460. As a result, the accuracy of the reference voltage signal VBS can be improved, and even when an abnormal voltage is generated at the terminal 467, the possibility that an unintended voltage is supplied to the piezoelectric element 60 can be reduced. .

  Here, the rated capacity of the transistor 465 is larger than the rated capacity of the transistor 460. The voltage value that can be supplied between the drain and the source is larger than that of the transistor 460, and the current that can be supplied to the drain is larger than that of the transistor 460. This means that the transistor 465 is large, or the safe operation region is wider than the transistor 460. For example, the transistor 465 has a larger W / L ratio than the transistor 460.

Here, in the voltage detection unit 455, the voltage divided by the resistor 457 and the resistor 458 supplied to the input end (+) of the comparator 456 and the input end (−
The voltage of the reference voltage signal VBS when the third reference voltage Vref3 supplied to the second reference voltage Vref3 becomes equal is an example of the “first threshold value”. Specifically, a voltage in which the voltage of the reference voltage signal VBS is about 3 V higher than a predetermined value is an example of the “first threshold value”.

  In the clamp circuit 459, the voltage divided by the combined resistance of the resistor 462 and the resistor 463 and the resistor 464 supplied to the input end (+) of the comparator 461, and the input end (−) of the comparator 461. The voltage of the reference voltage signal VBS when the second reference voltage Vref2 supplied to is equal is an example of the “second threshold value”. Specifically, a voltage in which the voltage of the reference voltage signal VBS is about 1 V higher than a predetermined value is an example of the “second threshold value”.

8 Discharge of Piezoelectric Element When Reference Voltage Signal is Abnormal As described above, when the voltage of the reference voltage signal VBS rises and the voltage detection unit 455 outputs an H level control signal STOP, the reference voltage signal VBS is The charge of the terminal 467 to be output is released. That is, the electric charge of the electrode 612 of the piezoelectric element 60 is released.

  When the drive signal VOUT is supplied to the electrode 611 or when the voltage is held in the electrode 611, the potential difference between the electrode 611 and the electrode 612 is released when the charge of the electrode 612 of the piezoelectric element 60 is released. May increase and an unintended displacement may occur in the piezoelectric element 60. In order to reduce such an unintended displacement that occurs in the piezoelectric element 60, the liquid ejection apparatus 1 according to the present embodiment includes two discharge units that discharge the charge of the electrode 611 based on the control signal STOP.

  As shown in FIG. 3, the control signal STOP is also supplied to the signal selection circuit 420 of the drive signal generation circuit 50. When the H-level control signal STOP is supplied, the signal selection circuit 420 holds predetermined data in predetermined registers corresponding to the power supply control signal generation circuit 430 and the LC discharge circuit 530, and the discharge control signal DIS1. , DIS2 is output. Specifically, when the H level control signal STOP is supplied, the signal selection circuit 420 holds the H level data in a predetermined register corresponding to the power supply control signal generation circuit 430, and the H level discharge control signal. Output as DIS1. Similarly, when the H level control signal STOP is supplied, the signal selection circuit 420 holds the H level data in a predetermined register corresponding to the power supply control signal generation circuit 430, and serves as the H level discharge control signal DIS2. Output.

  FIG. 22 is a diagram for explaining a discharging unit for discharging the electric charge of the electrode 611 of the piezoelectric element 60. In FIG. 22, the parasitic diodes 241, 242, 243, and 244 formed on the transfer gate 234 are indicated by broken lines. In FIG. 22, the charge discharge path of the electrode 612 is shown as a third discharge path C.

  The first discharge means discharges electric charge through the first discharge path A shown in FIG. Specifically, in the first discharging means, the electric charge stored between the terminal TG-Out and the electrode 611 through the plurality of parasitic diodes formed in the transfer gate 234, and the terminal Com-Out and the terminal TG -Releases the charge stored between In.

  Here, details of the parasitic diodes 241, 242, 243, and 244 formed in the transfer gate 234 will be described with reference to FIG.

  FIG. 23 is a cross-sectional view schematically showing the transistors 235 and 236 constituting the transfer gate 234.

As shown in FIG. 23, the transistor 235 includes a polysilicon 252 and an N-type diffusion layer 25.
3,254 and a plurality of electrodes.

  N-type diffusion layers 253 and 254 are formed on P substrate 251 so as to be separated from each other. The polysilicon 252 is formed between the N-type diffusion layer 253 and the N-type diffusion layer 254 via an insulating layer (not shown).

  An electrode 255 is formed on the polysilicon 252. An electrode 256 is formed on the N-type diffusion layer 253. An electrode 257 is formed on the N-type diffusion layer 254.

  The electrode 255 functions as a gate terminal, one of the electrodes 256 and 257 functions as a drain terminal, and the other functions as a source terminal. In the present embodiment, the electrode 256 is described as a drain terminal, and the electrode 257 is described as a source terminal.

  In the transistor 235 configured as described above, a PN junction is formed on each of the contact surface between the P substrate 251 and the N type diffusion layer 253 and the contact surface between the P substrate 251 and the N type diffusion layer 254. Therefore, the transistor 235 is formed with a parasitic diode 243 having the P substrate 251 as an anode and the N-type diffusion layer 253 as a cathode, and a parasitic diode 244 having the P substrate 251 as an anode and the N-type diffusion layer 254 as a cathode. .

  An electrode 258 is formed on the P substrate 251. Since the transistor 235 is formed on the P substrate 251, the electrode 258 functions as a back gate terminal of the transistor 235. Note that a ground potential is supplied to the electrode 258.

  The transistor 236 includes an N-well 261, polysilicon 262, P-type diffusion layers 263 and 264, and a plurality of electrodes.

  The P-type diffusion layers 263 and 264 are formed on the N well 261 formed on the P substrate 251 so as to be separated from each other. The polysilicon 262 is formed between the P-type diffusion layer 263 and the P-type diffusion layer 264 with an insulating layer (not shown) interposed therebetween.

  An electrode 265 is formed on the polysilicon 262. An electrode 266 is formed on the P-type diffusion layer 263. An electrode 267 is formed on the P-type diffusion layer 264.

  The electrode 265 functions as a gate terminal, one of the electrodes 266 and 267 functions as a drain terminal, and the other functions as a source terminal. In this embodiment, the electrode 266 is described as a drain terminal, and the electrode 267 is described as a source terminal.

  In the transistor 236 configured as described above, a PN junction is formed on each of the contact surface between the N well 261 and the P type diffusion layer 263 and the contact surface between the N well 261 and the P type diffusion layer 264. Therefore, the transistor 236 is formed with a parasitic diode 242 having the P-type diffusion layer 263 as an anode and the N-well 261 as a cathode, and a parasitic diode 241 having the P-type diffusion layer 264 as an anode and the N-well 261 as a cathode. .

  An electrode 268 is formed in the N well 261. Since the transistor 236 is formed in the N well 261, the electrode 268 functions as a back gate terminal of the transistor 236. Note that the voltage VHV-TG is supplied to the electrode 268.

  Returning to FIG. 22, the first discharging means through the first discharging path A including the parasitic diodes 241, 242, 243, and 244 described above will be described.

  In the first discharging means, first, the H level discharge control signal DIS 1 is supplied to the power supply control signal generation circuit 430.

  The discharge control signal DIS1 supplied to the power supply control signal generation circuit 430 is supplied to the transistor 432 via the inverter 431. Thereby, the transistor 432 is controlled to be turned off.

  As described above, when the transistor 432 is controlled to be turned off, the transistor 473 of the power supply switching circuit 70 is controlled to be turned on. When the transistor 473 is controlled to be on, the voltage VHV-TG becomes a ground potential supplied through the resistor 475. As a result, the electrode 268 of the transistor 236 constituting the transfer gate 234 becomes the ground potential. Therefore, the potential of the node a to which the terminal COM-Out and the terminal TG-In are connected becomes the ground potential via the parasitic diode 241. Similarly, the potential of the node b where the terminal TG-Out and the electrode 611 are connected becomes the ground potential via the parasitic diode 242. This node b is an example of a “first node”, and the node a is an example of a “second node”.

  In other words, the electric charge stored in the node a is discharged through the parasitic diode 241, the resistor 475, and the transistor 473. Similarly, the electric charge stored in the node b passes through the parasitic diode 242, the resistor 475, and the transistor 473. Is released through.

  As described above, in the first discharging means, the power supply switching circuit 70 sets the potential of the voltage VHV-TG to the ground potential based on the discharge control signal DIS1. Thereby, the electric charge stored in the node a and the node b is discharged through the parasitic diodes 241 and 242.

  Further, the charges at the node a and the node b released by the first discharge means are the charges at the terminals TG-In and TG-Out of the transfer gate 234. Therefore, the discharge of electric charge by the first discharge means is possible regardless of whether the transfer gate 234 is controlled to be on or off.

  Note that the configuration of the power supply switching circuit 70 is not limited to the above-described configuration, and may be any configuration that can switch the potential of the electrode 268 of the transistor 236 to the ground potential.

  Next, the second discharging means will be described. In the second discharge means, the electric charge stored in the node a is discharged through the second discharge path B including the LC discharge circuit 530.

  When discharging electric charges by the second discharge means, first, the H level discharge control signal DIS2 is supplied to the transistor 532 of the LC discharge circuit 530. Thereby, the transistor 532 is controlled to be turned on. Therefore, the potential of the node a becomes a ground potential supplied through the resistors 571 and 531 and the transistor 532. In other words, the electric charge stored in the node a is discharged through the resistors 571 and 531 and the transistor 532.

  When the operation of the drive signal generation circuit 50 is stopped, the voltage VHV may be supplied to the node a via the resistors 572 and 571. In the second discharge means, the charge of the node a can be released, so that the charge caused by the voltage VHV can be reduced in the node a.

As described above, since the second discharging means can discharge the charge of the node a, the potential of the node a can be lowered. Therefore, the terminal TG of the transfer gate 234
Leakage current generated from -In to the terminal TG-Out is reduced. That is, an increase in the voltage at the node b due to the leakage current can be reduced. Therefore, the possibility that unintended charges are stored in the electrode 611 can be further reduced.

  Note that the LC discharge circuit 530 may have any structure that can discharge the charge of the node a. For example, the LC discharge circuit 530 is provided at a connection point where the source terminal of the transistor 551 and the drain terminal of the transistor 552 are connected in common. Also good.

  As described above, when the voltage of the reference voltage signal VBS rises, the voltage of the electrode 611 is discharged by the first discharge unit and the second discharge unit, so that both the electrode 611 and the electrode 612 of the piezoelectric element 60 are discharged. Electric charges can be discharged, and unintended displacement of the piezoelectric element 60 is reduced.

9 Operational Effects In the liquid ejection apparatus 1 according to the present embodiment described above, when the voltage of the reference voltage signal VBS supplied to the electrode 612 of the piezoelectric element 60 rises and exceeds a predetermined threshold, the reference voltage signal VBS The terminal that stops generation and outputs the reference voltage signal VBS is connected to the ground terminal. As a result, the occurrence of unintended displacement in the piezoelectric element 60 and the diaphragm 621 due to the increase in the voltage of the reference voltage signal VBS is reduced.

  Further, in the liquid ejection apparatus 1 according to the present embodiment, the voltage detection included in the reference voltage circuit 450 that generates the reference voltage signal VBS is performed to detect whether or not the voltage of the reference voltage signal VBS has increased and exceeded a predetermined threshold value. Part 455 is implemented. Therefore, when the voltage of the reference voltage signal VBS rises, it is possible to reduce a delay that occurs until the generation of the reference voltage signal VBS is stopped. Therefore, it is possible to further reduce the occurrence of unintended displacement in the piezoelectric element 60 and the diaphragm 621 due to the increase in the voltage of the reference voltage signal VBS.

  In the liquid ejection apparatus 1 according to the present embodiment, when the voltage of the reference voltage signal VBS increases and exceeds a predetermined threshold, the voltage detection unit 455 outputs an H level control signal STOP. Then, based on the H level control signal STOP, the generation of the reference voltage signal VBS in the voltage generation unit 451 is stopped, and the electric charge of the electrode 611 is released. Therefore, both the voltages of the electrodes 611 and 612 gradually decrease toward the ground potential. Therefore, the potential difference generated between the electrodes 611 and 612 is reduced, and unintended displacement of the piezoelectric element 60 is reduced.

  Further, in the liquid ejection device 1 according to the present embodiment, the reference voltage circuit 450 includes a clamp circuit 459 that reduces the voltage fluctuation of the reference voltage signal VBS. Accordingly, the clamp circuit 459 can reduce the voltage fluctuation of the reference voltage signal VBS, and the supply of voltage without intention to the electrode 612 of the piezoelectric element 60 is reduced. Therefore, it is possible to further reduce the occurrence of unintended displacement in the piezoelectric element 60 and the diaphragm 621 due to the fluctuation of the voltage of the reference voltage signal VBS.

  As described above, in the liquid ejection device 1 according to the present embodiment, it is possible to reduce the possibility of unintentional displacement occurring in the piezoelectric element 60 and the diaphragm 621, so that stress concentrates on the diaphragm 621. It is possible to reduce the risk of cracking.

10 Modification In the above embodiment, when the voltage detection unit 455 outputs the control signal STOP at the H level, the operation of the voltage generation unit 451 is stopped, and the transistor 465 electrically connects the terminal 467 and the terminal 468. However, at least one of the control of electrically connecting the terminal 467 and the terminal 468 by the transistor 465 and the control of discharging the charge of the electrode 611 is described. It only has to be implemented. Even in this case, the same effect can be obtained.

  In the above-described embodiment, a serial scan type (serial printing type) ink jet printer in which the head unit 20 moves and prints on the medium P is taken as an example of the liquid ejecting apparatus. The present invention is also applicable to a line head type ink jet printer that prints on a print medium without moving.

  The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same objects and effects). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that exhibits the same operational effects as the configuration described in the embodiment or a configuration that can achieve the same object. In addition, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

DESCRIPTION OF SYMBOLS 1 ... Liquid discharge apparatus, 2 ... Moving body, 3 ... Movement mechanism, 4 ... Conveyance mechanism, 10 ... Control unit, 20 ... Head unit, 21 ... Discharge module, 24 ... Carriage, 31 ... Carriage motor, 32 ... Carriage guide shaft , 33 ... Timing belt, 35 ... Carriage motor driver, 40 ... Platen, 41 ... Conveyance motor, 42 ... Conveyance roller, 45 ... Conveyance motor driver, 50 ... Drive signal generation circuit, 51 ... Drive circuit, 55 ... Transistor, 60 ... Piezoelectric element, 70 ... feed switching circuit, 80 ... driving IC, 90 ... voltage generation circuit, 100 ... control circuit, 190 ... flexible cable, 210 ... selection control circuit, 212 ... shift register, 214 ... latch circuit, 216 ... decoder, 230 ... selection circuit, 232 ... inverter, 234 ... transfer -Gate, 235, 236 ... Transistor, 241, 242, 243, 244 ... Parasitic diode, 251 ... P substrate, 252 ... Polysilicon, 253, 254 ... N-type diffusion layer, 255, 256, 257, 258 ... Electrode, 261 ... N-well, 262 ... polysilicon, 263,264 ... P-type diffusion layer, 265,266,267,268 ... electrode, 310 ... DAC circuit, 320 ... detection circuit, 350 ... determination circuit, 410 ... GVDD generation circuit, 420 ... Signal selection circuit, 430 ... feed control signal generation circuit, 431 ... inverter, 432 ... transistor, 450 ... reference voltage circuit, 451 ... voltage generation unit, 452 ... transistor, 453 ... comparator, 454 ... transistor, 455 ... voltage detection unit 456: Comparator 457, 458: Resistance 45 ... Clamp circuit, 460 ... Transistor, 461 ... Comparator, 462, 463, 464 ... Resistance, 465 ... Transistor, 466, 467, 468 ... Terminal, 471, 472, 473 ... Transistor, 474, 475 ... Resistance, 500 ... Integrated Circuit 510, Modulation circuit 512, 513 Adder 514 Comparator 515 Inverter 516 Integral attenuator 517 Attenuator 520 Gate drive circuit 521 First gate driver 522 First 2 gate drivers, 530 ... LC discharge circuit, 531 ... resistor, 532 ... transistor, 541 ... capacitor, 542 ... diode, 550 ... output circuit, 551,552 ... transistor, 553,554 ... resistor, 560 ... low pass filter, 561 ... Inductor, 5 62 ... Condenser, 570 ... First feedback circuit, 571,572 ... Resistance, 580 ... Second feedback circuit, 581,582 ... Resistance, 583,584,585 ... Condenser, 600 ... Discharge part, 601 ... Piezoelectric body, 610 ... Sealed body, 611, 612 ... electrode, 621 ... diaphragm, 630 ... pressure chamber substrate, 631 ... cavity, 632 ... nozzle plate, 633 ... vibration absorber, 640 ... casing, 641 ... supply flow path, 651 ... Nozzle, 661 ... supply port, 670 ... flow path substrate, 671 ... opening, 672 ... supply flow path, 673 ... communication flow path, 674 ... relay flow path, Bst, COM-Out, Com-Out, Ctvh, Ctvh- Out, Drv, Drv-In, E
n, En-In, Err, Err-Out, Gnd, Gnd-In, Gvd, Hdr, Ifb, Ldr, Sw, TG-In, TG-Out, Vbs, Vbs-Out, Vfb, Vhv, Vhv-In ... Terminal, P ... Medium

Claims (8)

A drive circuit for outputting a drive signal from a drive signal output terminal;
A reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal;
A piezoelectric element having a first electrode to which the drive signal is supplied and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode;
A cavity filled with a liquid discharged from a nozzle in accordance with the displacement of the piezoelectric element;
A diaphragm provided between the cavity and the piezoelectric element;
With
The reference voltage circuit includes a voltage generation unit that generates the reference voltage signal, and a voltage detection unit that detects a voltage value of the reference voltage signal,
When the voltage value of the reference voltage signal exceeds a first threshold, the voltage detection unit stops the operation of the voltage generation unit and electrically connects the reference voltage signal output terminal and the ground terminal. ,
A liquid discharge apparatus characterized by that. The reference voltage circuit switches a first switch circuit for switching whether or not to supply a power supply voltage to the voltage generator, and a switch for electrically connecting the reference voltage signal output terminal and the ground terminal. A two-switch circuit,
The voltage detector outputs a stop signal when the voltage value of the reference voltage signal exceeds the first threshold,
The first switch circuit stops the supply of the power supply voltage to the voltage generation unit based on the stop signal,
The second switch circuit electrically connects the reference voltage signal output terminal and the ground terminal based on the stop signal.
The liquid ejection apparatus according to claim 1, wherein The voltage generator includes a first comparator that compares a first reference voltage with a signal based on the reference voltage signal, and a power supply terminal and the reference voltage signal output terminal based on a comparison result of the first comparator. A first transistor that switches whether or not to electrically connect,
When the voltage value of the reference voltage signal exceeds the first threshold, the first switch circuit stops the supply of the power supply voltage to the first comparator based on the stop signal;
The liquid discharge apparatus according to claim 2, wherein The reference voltage circuit includes a clamp circuit;
The clamp circuit electrically connects the reference voltage signal output terminal and the ground terminal when the voltage value of the reference voltage signal exceeds a second threshold lower than the first threshold.
The liquid discharge apparatus according to claim 1, wherein the liquid discharge apparatus is a liquid discharge apparatus. The clamp circuit includes: a second comparator that compares a second reference voltage with a signal based on the reference voltage signal; and the reference voltage signal output terminal and the ground terminal based on a comparison result of the second comparator. A second transistor for switching whether or not to electrically connect,
When the voltage value of the reference voltage signal exceeds the second threshold, the second transistor electrically connects the reference voltage signal output terminal and the ground terminal.
The liquid ejecting apparatus according to claim 4, wherein the liquid ejecting apparatus is a liquid ejecting apparatus. A drive circuit for outputting a drive signal from a drive signal output terminal;
A reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal;
A piezoelectric element having a first electrode to which the drive signal is supplied and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode;
A cavity filled with a liquid discharged from a nozzle in accordance with the displacement of the piezoelectric element;
A diaphragm provided between the cavity and the piezoelectric element;
A switch circuit having a first terminal to which the drive signal is supplied and a second terminal electrically connected to the first electrode, and controlling supply of the drive signal to the first electrode;
With
The reference voltage circuit includes a voltage generation unit that generates the reference voltage signal, and a voltage detection unit that detects a voltage value of the reference voltage signal,
When the voltage value of the reference voltage signal exceeds a first threshold value, the voltage detection unit stops the operation of the voltage generation unit, and the first electrode and the second terminal are electrically connected. Discharging the charge of the first node via the parasitic diode of the switch circuit,
A liquid discharge apparatus characterized by that. When the voltage value of the reference voltage signal exceeds a first threshold value, the charge of the second node to which the drive signal output terminal and the first terminal are electrically connected is discharged;
The liquid ejecting apparatus according to claim 6. A drive circuit for outputting a drive signal from a drive signal output terminal;
A reference voltage circuit that outputs a reference voltage signal from a reference voltage signal output terminal;
A piezoelectric element having a first electrode to which the drive signal is supplied and a second electrode to which the reference voltage signal is supplied, and being displaced by a potential difference generated between the first electrode and the second electrode;
A cavity filled with a liquid discharged from a nozzle in accordance with the displacement of the piezoelectric element;
A diaphragm provided between the cavity and the piezoelectric element;
With
The reference voltage circuit includes a first discharge transistor and a second discharge transistor having a larger rated capacity than the first discharge transistor,
One end of the first discharge transistor and one end of the second discharge transistor are electrically connected to the reference voltage signal output terminal;
The other end of the first discharge transistor and the other end of the second discharge transistor are electrically connected to a ground terminal;
A liquid discharge apparatus characterized by that.

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