JP2019161096A - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Abstract

To provide a semiconductor device including a MIM capacitor with extended life, and a method for manufacturing a semiconductor device.SOLUTION: A semiconductor device according to an embodiment includes a MIM capacitor which includes: a first electrode provided on a semiconductor substrate; a first insulating film provided on the first electrode and containing silicon nitride crystals; a second insulating film provided on the first insulating film and containing an oxide; and a second electrode provided on the second insulating film.SELECTED DRAWING: Figure 1

Description

  Embodiments described herein relate generally to a semiconductor device and a method for manufacturing the semiconductor device.

  Attempts have been made to improve the output of a microwave monolithic IC (Monolithic Microwave Integrated Circuit, MMIC). In such an MMIC, it is necessary to increase the breakdown voltage of all elements including capacitors.

In the MMIC, an MIM capacitor using silicon nitride (Si ₃ N ₄ ) may be used as an insulating film. It is known that when such an MIM capacitor is used at a high voltage, the lifetime is shortened.

Japanese Patent No. 5334199

  Embodiments provide a semiconductor device having a long lifetime MIM capacitor and a method of manufacturing the semiconductor device.

  The semiconductor device according to the embodiment is provided on a first electrode provided on a semiconductor substrate, a first insulating film provided on the first electrode and including a crystal of silicon nitride, and provided on the first insulating film. And an MIM capacitor including a second insulating film containing an oxide and a second electrode provided on the second insulating film.

1 is a cross-sectional view illustrating a semiconductor device according to an embodiment. 2 is a flowchart illustrating a manufacturing process of the semiconductor device of FIG. 1. It is sectional drawing which illustrates a modification. It is sectional drawing which illustrates the semiconductor device of a comparative example.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratios may be represented differently depending on the drawings.
In the present specification and drawings, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

FIG. 1 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
As shown in FIG. 1, the semiconductor device 10 of this embodiment includes an MIM capacitor 20. “MIM” is an abbreviation for Metal Insulator Metal and represents a structure in which an insulating film is provided between metal electrodes. That is, the MIM capacitor is a capacitance element having a structure in which an insulating film is provided between metal electrodes. In this example, the semiconductor device 10 is an MMIC (Monolithic Microwave Integrated Circuit). The MIM capacitor 20 is provided on the semiconductor substrate 11. In this example, the MIM capacitor 20 is electrically connected to other circuit elements (not shown) provided on the semiconductor substrate 11 by the air bridge wiring 13 and the wiring 14.

  The semiconductor substrate 11 is made of, for example, a semiconductor material such as Si, GaN, or GaAs. In order to operate the semiconductor device 10 over a wide voltage range, the semiconductor substrate 11 preferably contains GaN.

  The MIM capacitor 20 includes a lower electrode 21, a first insulating film 22, a second insulating film 23, and an upper electrode 24. The lower electrode (first electrode) 21 is provided on the semiconductor substrate 11. The first insulating film 22 is provided on the lower electrode 21. The second insulating film 23 is provided on the first insulating film 22. The upper electrode (second electrode) 24 is provided on the second insulating film 23. The lower electrode 21, the first insulating film 22, the second insulating film 23, and the upper electrode 24 are stacked in this order from the semiconductor substrate 11 side.

  The lower electrode 21 is formed by laminating metal films. The lower electrode 21 is configured by, for example, stacking Au, Pt, and Ti in this order. Lower electrode 21 has a thickness of about 600 nm to 1 μm, for example.

The first insulating film 22 is provided so as to cover the lower electrode 21. The first insulating film 22 is a Si ₃ N ₄ (hereinafter, simply referred to as SiN) film. The first insulating film 22 is also provided on the semiconductor substrate 11.

  A voltage corresponding to the operating voltage of the semiconductor device 10 can be applied to the first insulating film 22. The thickness of the first insulating film 22 is determined in consideration of the applied voltage. The thickness of the first insulating film 22 is, for example, about 100 nm to 300 nm.

  The first insulating film 22 is heat-treated to generate a minute single crystal, that is, be microcrystallized. The first insulating film 22 made of SiN can be extended in life when a high voltage is applied by microcrystallization. Here, the lifetime of the first insulating film 22 is a time represented by a time-dependent dielectric breakdown TDDB (Time Dependent Dielectric Breakdown).

  Since the first insulating film 22 includes microcrystals, the refractive index is smaller than that before the heat treatment. The refractive index after the heat treatment is larger than 1.6 and smaller than 1.85. Note that the SiN film before the heat treatment is in an amorphous state, and the refractive index thereof is about 2, for example. The refractive index is measured using, for example, a spectroscopic ellipsometry method.

  Since the first insulating film 22 is microcrystallized by heat treatment, the crystal grain boundary serves as a path for the leakage current, so that the leakage current increases.

  Note that the first insulating film 22 may be microcrystallized regardless of heat treatment and have a refractive index larger than 1.6 and smaller than 1.85.

The second insulating film 23 is provided so as to cover the first insulating film 22. The second insulating film 23 is a film such as SiO ₂ or Al ₂ O ₃ . The second insulating film 23 is provided to prevent leakage current of the first insulating film 22 made of heat-treated SiN. Therefore, the second insulating film 23 is preferably provided so as to cover the entire first insulating film 22.

An oxide film such as SiO ₂ has a dielectric constant lower than that of the SiN film. Therefore, the thickness of the second insulating film 23 is preferably set as thin as possible according to the operating voltage from the viewpoint of securing the capacitance value of the MIM capacitor 20.

  The upper electrode 24 is provided on the second insulating film 23. The upper electrode 24 is provided at a position corresponding to the position of the lower electrode 21 in plan view. The area of the upper electrode 24 is set smaller than the area of the lower electrode 21. The upper electrode 24 is a metal laminated film. For example, Ti, Pt, and Au films are laminated in this order. The thickness of the upper electrode 24 is, for example, about 600 nm to 1 μm.

  A wiring 14 is connected to the lower electrode 21. The first insulating film 22 is provided with an opening 15 in a part on the lower electrode 21, and the wiring 14 is connected to the lower electrode 21 exposed through the opening 15. It is provided above. The wiring 14 is, for example, Au.

  The air bridge wiring 13 is connected to the upper electrode 24. The air bridge wiring 13 is, for example, Au.

A method for manufacturing the semiconductor device of this embodiment will be described.
FIG. 2 is a flowchart illustrating a manufacturing process of the semiconductor device of FIG.
As shown in FIG. 2, in step S <b> 1, a metal film for the lower electrode 21 is formed on the semiconductor substrate 11. The lower electrode 21 having a desired shape is formed through an etching process using a photoresist.

  In step S2, a SiN film to be the first insulating film 22 is formed with a desired film thickness on the semiconductor substrate 11 including the lower electrode 21 by using, for example, a plasma enhanced chemical vapor deposition (PECVD) method. To do. In this case, the plasma CVD formation temperature is about 300 ° C.

  In step S3, heat treatment is performed on the SiN film formed by PECVD. The heat treatment is performed for several minutes at a temperature equal to or higher than the PECVD formation temperature. The heat treatment temperature is, for example, about 400 ° C to 900 ° C.

In step S4, a SiO ₂ film to be the second insulating film 23 is formed with a desired film thickness on the heat-treated SiN film using PECVD.

  In step S5, an opening 15 is formed in a part of the first insulating film 22 and the second insulating film 23, and a part of the lower electrode 21 is exposed.

In step S <b> 6, the upper electrode 24 is formed on the second insulating film 23. Further, the wiring 14 is formed so as to be connected to the lower electrode 21 exposed from the opening 15. The upper electrode 24 and the wiring 14 may be formed at the same time or may be formed in separate steps.
Thereafter, the air bridge wiring 13 is formed on the upper electrode 24.

  The above manufacturing process is an example, and some processes may be replaced or replaced with other processes. For example, in step S4 described above, a thermal oxidation method can be used instead of the PECVD method. When the thermal oxidation method is used, the heat treatment step for the immediately preceding SiN film can be omitted.

(Modification)
FIG. 3 is a cross-sectional view illustrating a semiconductor device of this variation.
As illustrated in FIG. 3, the MIM capacitor 120 of the semiconductor device 110 according to the present modification further includes a third insulating film 25. The third insulating film 25 is provided on the second insulating film 23. An upper electrode 24 is provided on the third insulating film 25. That is, the third electrode 25 is provided between the upper electrode 24 and the second insulating film 23. The third insulating film 25 is, for example, a SiN film that is not heat-treated. The third insulating film 25 is not limited to SiN, and may be an oxide film such as SiO ₂ or another insulating film.

The effects of the semiconductor devices 10 and 110 of this embodiment will be described in comparison with the semiconductor device of the comparative example.
FIG. 4 is a cross-sectional view illustrating a semiconductor device of a comparative example.
As shown in FIG. 4, the semiconductor device 210 of the comparative example has an MIM capacitor 220. The MIM capacitor 220 includes a lower electrode 21, an insulating film 222 made of SiN that is not heat-treated, and an upper electrode 24. The insulating film 222 is provided between the lower electrode 21 and the upper electrode 24 without using another insulating film.

  The SiN film can be shared not only with the insulating film of the MIM capacitor but also with a passivation film for protecting the electrode of the transistor and the semiconductor surface. Therefore, the insulating film forming process and the passivation film forming process of the MIM capacitor can be shared, and the number of processes can be reduced. Therefore, the SiN film is generally used.

  The SiN film is formed using a PECVD method. It is known that a SiN film formed by PECVD has a short lifetime TDDB. Like the semiconductor device 210 of the comparative example, the MMIC can be made to have a high breakdown voltage by using a wide band gap semiconductor material such as GaN for the semiconductor substrate 11, but in the MIM capacitor 220 using the SiN film that is not heat-treated, the MIM It is difficult to use the capacitor 220 for a matching circuit or the like.

  On the other hand, in the semiconductor devices 10 and 110 according to the present embodiment and the modifications thereof, as described in detail in the section of the manufacturing process, the temperature is higher than the PECVD formation temperature (about 300 ° C.), for example, 400 ° C. to 900 ° C. for several minutes. Heat treatment. By this heat treatment, the SiN film is microcrystallized and densified, so that the breakdown life TDDB of the MIM capacitor 120 can be extended.

  Incidentally, in the MIM capacitors 20 and 120 using the heat-treated SiN film, the breakdown life TDDB becomes long, while the current flowing through the boundary of the SiN crystal in the film increases. As a result, the leakage current of the MIM capacitors 20 and 120 increases.

  In the semiconductor devices 10 and 110 of the present embodiment and its modifications, the second insulating film 23 is provided between the upper electrode 24 and the heat-treated first insulating film 22 containing SiN. The second insulating film 23 is an oxide film, for example, and can reduce the leakage current. That is, the second insulating film 23 can prevent the leakage current of the first insulating film 22.

The heat treatment process of SiN that is the first insulating film 22 is a standard process and is easy to apply. Further, the time required for heating is as short as several minutes, and the influence on the throughput is very small. The third insulating film 23 can be formed using a standard oxide film forming process such as SiO ₂ or Al ₂ O ₃ . Therefore, the semiconductor devices 10 and 110 can be manufactured with a few additional steps.

  The semiconductor device 10 according to the embodiment operates by being supplied with a power supply voltage. By setting the semiconductor substrate 11 to GaN, the power supply voltage can be set to 20 V to 50 V, for example.

  In the semiconductor device 10 of the embodiment that is an MMIC, the MIM capacitor 20 may be used as a matching circuit between the input and output of a transistor that operates at 20 V to 50 V and another circuit or an external circuit. Therefore, a voltage of 20V to 50V can be applied to the MIM capacitor 20.

  The semiconductor device 10 of this embodiment includes an MIM capacitor 20, and the MIM capacitor 20 includes a first insulating film 22 that is a SiN film that has been heat-treated as described above. Since the second insulating film 23 is provided on the first insulating film 22 to prevent the leakage current, even if it is used in a matching circuit connected to the input / output of a transistor or the like that operates at a high voltage, it is sufficient. It has characteristics and can ensure the lifetime TDDB.

  According to the embodiments described above, it is possible to realize a semiconductor device and a method for manufacturing the semiconductor device in which the lifetime of the MIM capacitor is extended.

  As mentioned above, although some embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and the equivalents thereof. Further, the above-described embodiments can be implemented in combination with each other.

  10, 110 semiconductor device, 11 semiconductor substrate, 12 air bridge wiring, 14 wiring, 15 opening, 20, 120 MIM capacitor, 21 lower electrode, 22 first insulating film, 23 second insulating film, 24 upper electrode, 25 first 3 Insulating film

Claims (6)

A first electrode provided on a semiconductor substrate;
A first insulating film provided on the first electrode and including a silicon nitride crystal;
A second insulating film provided on the first insulating film and containing an oxide;
A second electrode provided on the second insulating film;
A semiconductor device comprising an MIM capacitor.   The semiconductor device according to claim 1, wherein the first insulating film has a refractive index larger than 1.6 and smaller than 1.85. The MIM capacitor is
The semiconductor device according to claim 1, further comprising a third insulating film provided on the first electrode.   The semiconductor device according to claim 1, wherein the semiconductor substrate contains gallium nitride. A matching circuit provided between a transistor provided on the semiconductor substrate and an external circuit;
The semiconductor device according to claim 4, wherein the matching circuit includes the MIM capacitor. Forming a first electrode on a semiconductor substrate;
Forming a first insulating film containing silicon nitride on the first electrode;
Heat-treating silicon nitride in the first insulating film;
Forming a second insulating film containing an oxide on the first insulating film;
A method of manufacturing a semiconductor device including an MIM capacitor, wherein a second electrode is formed on the second insulating film.

Images