JP2019036615A - Display device and manufacturing method of display device - Google Patents

Abstract

Kind Code: A1 In a thin film transistor, it is necessary to reduce the resistance of a source region and a drain region formed of an oxide semiconductor. A display device includes a thin film transistor on a substrate. The thin film transistor includes a gate electrode, an oxide semiconductor film having a channel region facing the gate electrode and having a source region on one side of the channel region and a drain region on the other side of the channel region, and the oxide semiconductor film. an inorganic insulating film provided in contact with and having a first connection hole; and a source electrode and a drain electrode respectively connected to the source region and the drain region through the first connection hole. The inorganic insulating film is composed of an insulating film containing a metal and an ion species used in ion implantation, and the oxide semiconductor film has low-resistance regions containing the metal as a dopant in the source region and the drain region. . [Selection drawing] Fig. 2

Description

  The present disclosure relates to a display device and can be applied to a display device including a thin film transistor using an oxide semiconductor, for example.

  In an active drive type liquid crystal display device or an organic EL (Electroluminescence) display device, a thin film transistor (TFT) is used as a switching element. Some thin film transistors use an oxide semiconductor (for example, Japanese Unexamined Patent Publication No. 2012-15436 (Patent Document 1) or US Patent Application Publication No. 2012/0001167 (Patent Document 2) corresponding thereto).

JP 2012-15436 A US Patent Application Publication No. 2012/0001167

In a thin film transistor such as Patent Document 1 or Patent Document 2, it is necessary to reduce the resistance of a source region and a drain region formed of an oxide semiconductor.
Other problems and novel features will become apparent from the description of the present disclosure and the accompanying drawings.

The outline of a representative one of the present disclosure will be briefly described as follows.
That is, the display device includes a thin film transistor on a substrate. The thin film transistor includes a gate electrode, an oxide semiconductor film having a channel region facing the gate electrode, a source region on one side of the channel region, and a drain region on the other side, and the oxide semiconductor film And an inorganic insulating film having a first connection hole, and a source electrode and a drain electrode respectively connected to the source region and the drain region through the first connection hole. The inorganic insulating film is composed of an insulating film containing a metal and an ion species used in ion implantation, and the oxide semiconductor film has a low resistance region containing the metal as a dopant in the source region and the drain region. .

FIG. 6 is a plan view illustrating the structure of the thin film transistor according to the first embodiment. A1-A2 sectional view of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. FIG. 7 is a plan view illustrating a structure of a thin film transistor according to the second embodiment. B1-B2 sectional view of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. Sectional drawing showing the manufacturing method of the thin-film transistor of FIG. FIG. 6 is a plan view of a liquid crystal display device to which the thin film transistor according to the first embodiment or the second embodiment is applied. AA sectional view of FIG. Sectional drawing of the display area of the liquid crystal display device of FIG. The top view of the organic electroluminescence display with which the thin-film transistor which concerns on Example 1 or Example 2 is applied BB sectional view of FIG. Sectional drawing of the display area of the organic electroluminescence display of FIG.

  In the thin film transistor according to the embodiment, a film containing metal is formed over an oxide semiconductor film, and ion species are ion-implanted into the film containing metal in a region where resistance is desired to be reduced. By knock-on, the metal contained in the film can enter the oxide semiconductor film to reduce resistance. The film contains ionic species. The film may be a metal film or an insulating film containing a metal. In the case of a metal film, it is necessary to remove the metal film after ion implantation or to make the metal film an insulating film. However, an insulating film is preferable because it can function as a barrier film of an oxide semiconductor film as it is. As the insulating film, for example, a metal oxide film (for example, aluminum oxide (AlO), hafnium oxide (HfO), titanium oxide (TiO), etc.), a metal nitride film (for example, aluminum nitride (AlN), hafnium nitride (HfN), Titanium nitride (TiN) and the like, metal oxynitride films (for example, aluminum nitride oxide (AlON), nitrided hafnium oxide (HfON), titanium nitride oxide (TiON), and the like). The ion species may be other than hydrogen, and for example, those used in normal ion implantation such as argon (Ar), boron (B), and phosphorus (P) are preferable. Note that hydrogen is removed so that hydrogen reduction is not performed on the oxide semiconductor film.

  The ion implantation method is more effective than the method of forming a low-resistance region by reducing the oxygen concentration of an oxide semiconductor film by using hydrogen reduction or the like and the method of forming a low-resistance region by thermally diffusing metal. However, it is easy to suppress a short channel length (ΔL is small).

  A metal such as aluminum (Al) tends to lower the resistance of the source / drain region. Since ion species of metal such as aluminum (Al) are special in ion implantation, a general argon (Ar) gas or the like is used as an ion species rather than directly implanting a metal such as aluminum (Al) into an oxide semiconductor film. It is preferable to use metal such as aluminum (Al) to eject and inject it into the oxide semiconductor film.

  Hereinafter, examples will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, for the sake of clarity, the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each part as compared to the actual embodiment, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

  The structure of the thin film transistor according to the first embodiment will be described with reference to FIGS. FIG. 1 is a plan view showing the thin film transistor according to the first embodiment. 2 is a cross-sectional view corresponding to the one-dot chain line A1-A2 in FIG. FIG. 1 shows only some layers of the cross-sectional structure of FIG.

  The thin film transistor 10 is used as a switching element or a driving element for a liquid crystal display device or an organic EL display device. For example, the light shielding layer 12, the undercoat film 13, the oxide semiconductor film 20, and the gate insulating film 30 are provided on the substrate 100. The gate electrode 40, the inorganic insulating film 70, the interlayer insulating film 50, the source electrode 60 </ b> S, and the drain electrode 60 </ b> D are stacked in this order.

  The substrate 100 is made of, for example, a glass substrate or a plastic film.

  The oxide semiconductor film 20 is provided in an island shape including the gate electrode 40 and the vicinity thereof on the undercoat film 13 and has a function as an active layer of the thin film transistor 10. The oxide semiconductor film 20 has a thickness of about 50 nm, for example, and has a channel region 20 </ b> A facing the gate electrode 40. On the channel region 20A, the gate insulating film 30 and the gate electrode 40 are provided in the same shape in this order. The source region 20S is provided on one side of the channel region 20A, and the drain region 20D is provided on the other side. It has been.

  Here, the oxide semiconductor is a compound including an element such as indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen. Specifically, the amorphous oxide semiconductor includes indium gallium zinc oxide (In—Ga—Zn—O: IGZO), and the crystalline oxide semiconductor includes zinc oxide (ZnO) and oxide. Indium zinc (In-Zn-O), indium gallium oxide (In-Ga-O: IGO), indium tin oxide (ITO), indium oxide (InO), and the like can be given.

  Each of the source region 20S and the drain region 20D has a low resistance region 21. The low resistance region 21 is reduced in resistance by containing aluminum (Al) as a dopant. The aluminum concentration contained in the low resistance region 21 is preferably higher than that of the channel region 20A. Aluminum (Al) is included from the upper surface to the lower surface of the source region 20S and the drain region 20D, and the entire source region 20S and the drain region 20D are the low-resistance region 21.

  The gate insulating film 30 has a thickness of about 300 nm, for example, and is a single layer film or a stacked layer such as a silicon oxide (SiO) film, a silicon nitride (SiN) film, a silicon nitride oxide (SiON) film, or an aluminum oxide (AlO) film. It is comprised by the film | membrane. In particular, a silicon oxide (SiO) film or an aluminum oxide (AlO) film is preferable because the oxide semiconductor film 20 is difficult to reduce.

  The gate electrode 40 is provided in a selective region on the substrate 100, and has a thickness of, for example, 10 nm to 500 nm, specifically about 200 nm, and is made of molybdenum (Mo). Since it is desirable that the gate electrode 40 has a low resistance, a low resistance metal such as aluminum (Al) or copper (Cu) is preferable as a constituent material thereof. A laminated film in which a low resistance layer made of aluminum (Al) or copper (Cu) and a barrier layer made of titanium (Ti) or molybdenum (Mo) are combined is also preferable. This is because the resistance of the gate electrode 40 can be reduced.

  The inorganic insulating film 70 is provided in contact with the oxide semiconductor film 20, the gate insulating film 30, and the gate electrode 40. Thus, the thin film transistor 10 can suppress defects due to the interlayer insulating film 50, improve the electrical characteristics of the thin film transistor 10 having a self-aligned structure, and improve the reliability.

  The inorganic insulating film 70 is an aluminum oxide (AlO) film containing Ar which is an ion source species used for ion implantation. The thickness of the inorganic insulating film 70 is, for example, 10 nm to 100 nm, and preferably 25 nm to 50 nm.

  The interlayer insulating film 50 is an inorganic insulating film such as a single layer film of silicon oxide (SiO) or a laminated film of silicon oxide (SiO) and silicon nitride (SiN), for example. The interlayer insulating film 50 may be, for example, an organic insulating film having a thickness of about 2 μm to 3 μm and formed of an organic resin film such as an imide resin such as polyimide.

  The source electrode 60S and the drain electrode 60D are connected to the low resistance region 21 of the source region 20S and the drain region 20D through the connection hole 50A provided in the interlayer insulating film 50 and the connection hole 70A provided in the inorganic insulating film 70. ing. The source electrode 60S and the drain electrode 60D have, for example, a thickness of about 200 nm and are made of molybdenum (Mo). Similarly to the gate electrode 40, the source electrode 60S and the drain electrode 60D are preferably made of a low resistance metal wiring such as aluminum (Al) or copper (Cu). Furthermore, a laminated film in which a low resistance layer made of aluminum (Al) or copper (Cu) and a barrier layer made of titanium (Ti) or molybdenum (Mo) are combined is also preferable. By using such a laminated film, driving with less wiring delay is possible.

  Further, it is desirable that the source electrode 60S and the drain electrode 60D are provided so as to avoid a region immediately above the gate electrode 40. This is because it is possible to reduce the parasitic capacitance formed in the intersection region between the gate electrode 40, the source electrode 60S, and the drain electrode 60D.

Next, a method for manufacturing the thin film transistor 10 will be described with reference to FIGS. 3 to 8 are cross-sectional views illustrating a method of manufacturing the thin film transistor of FIG.
First, a metal film is formed on the entire surface of the substrate 100 by, eg, sputtering. Next, the light shielding layer 12 is formed by shaping the metal film into a desired shape by, for example, photolithography and etching. Next, as shown in FIG. 3, silicon oxide (SiO), silicon nitride (SiN) and silicon oxide (SiO) are laminated on the entire surface of the substrate 11 and the light shielding layer 12, and aluminum oxide (AlOx) and silicon oxide (SiO) are laminated. An undercoat film 13 is formed by lamination or the like.

  Next, the oxide semiconductor film 20 made of the above-described material is formed on the entire surface of the undercoat film 13 by a sputtering method, for example, with a thickness of about 50 nm.

  Next, as illustrated in FIG. 4, the oxide semiconductor film 20 is formed into an island shape by, for example, photolithography and etching.

  Subsequently, a gate such as a silicon oxide (SiO) film or an aluminum oxide (AlO) film is formed on the entire surface of the undercoat film 13 and the oxide semiconductor film 20 by, for example, a plasma CVD (Chemical Vapor Deposition) method. An insulating material film is formed with a thickness of about 300 nm. The silicon oxide (SiO) film can be formed by a reactive sputtering method in addition to the plasma CVD method. The aluminum oxide (AlO) film can be formed by a reactive sputtering method or an atomic layer deposition method.

  After that, a gate electrode material film made of a single layer film or a laminated film of molybdenum (Mo), titanium (Ti), aluminum (Al) or the like is formed on the entire surface of the gate insulating material film by sputtering, for example, to a thickness of about 200 nm. Form with.

  After forming the gate electrode material film, as shown in FIG. 5, the gate electrode material film is formed into a desired shape by photolithography and etching, for example, and the gate electrode 40 is formed on the oxide semiconductor film 20.

  Subsequently, as shown in FIG. 5 as well, the gate insulating film 30 is formed by etching the gate insulating material film using the gate electrode 40 as a mask. Thus, the gate insulating film 30 and the gate electrode 40 are formed in this order on the oxide semiconductor film 20 in this order.

  After forming the gate insulating film 30 and the gate electrode 40, as shown in FIG. 6, aluminum oxide (on the surface of the undercoat film 13, the oxide semiconductor film 20, the gate insulating film 30 and the gate electrode 40 is formed by sputtering, for example. The (AlO) film 70B is formed with a thickness of, for example, 10 nm to 100 nm, specifically 25 nm to 50 nm.

  After the aluminum oxide (AlO) film 70 is formed, argon (Ar) is ion-implanted to knock on the aluminum (Al) from the aluminum oxide (AlO) film 70B as shown in FIG. Thus, aluminum (Al) enters the source region 20S and the drain region 20D from the upper surface side of the source region 20S and the drain region 20D that are in contact with the aluminum oxide (AlO) film 70B. Since the gate insulating film 30 and the gate electrode 40 are provided between the aluminum oxide (AlO) film 70B and the channel region 20A, aluminum (Al) hardly penetrates into the channel region 20A from directly above the channel region 20A. Thereby, the low resistance region 21 having a higher aluminum (Al) concentration than the channel region 20A is formed in the source region 20S and the drain region 20D. Note that, unlike thermal diffusion, aluminum (Al) is included not only near the upper surface of the source region 20S and the drain region 20D but also on the lower surface. However, the concentration in the vicinity of the lower surface is smaller than the concentration in the vicinity of the upper surface, as in the normal ion implantation profile. Further, by injecting argon (Ar) into the aluminum oxide (AlO) film 70B, the inorganic insulating film 70 containing Ar in the aluminum oxide (AlO) is formed.

  Note that the inorganic insulating film 70 is formed over the gate insulating film 30 or the gate electrode 40 in addition to the source region 20S and the drain region 20D of the oxide semiconductor film 20.

  Here, in applications such as liquid crystal display devices and organic EL display devices, when it is necessary to transmit light in the direction of the substrate 100 of the thin film transistor 10, when the inorganic insulating film 70 is left, In some cases, the transmittance is low, the luminance is lowered, and the display quality as a display device is lowered. In such a case, a region other than the inorganic insulating film 70 in contact with the oxide semiconductor film 20 can be removed by performing photolithography and an etching process. Through such process steps, the transmittance of the display device can be improved. Therefore, the present invention is applied to an application in which light is transmitted through the substrate 100 of the thin film transistor 10 in an application of a liquid crystal display device or an organic EL display device. It is also possible to use the technique of the embodiment.

  After forming the low-resistance region 21, as shown in FIG. 8, a single layer film of silicon oxide (SiO) or silicon oxide (SiO) and silicon nitride (SiN) is formed on the inorganic insulating film 70 by, for example, plasma CVD. ) Is formed with a thickness of about 300 nm. The silicon oxide (SiO) film and the silicon nitride (SiN) film can be formed by a reactive sputtering method in addition to the plasma CVD method. Subsequently, the connection hole 50A is formed by, for example, photolithography and etching. Note that the interlayer insulating film 50 may be formed of an organic resin film. In this case, for example, an organic resin made of the above-described material is applied with the above-described thickness using a spin coater or the like, and a desired pattern is formed by performing exposure and development. Subsequently, for example, by annealing at a temperature of about 200 ° C. to 300 ° C., an organic resin film having the connection holes 50A is formed.

  Subsequently, a connection hole 70A is formed in the inorganic insulating film 70 by, for example, photolithography and etching. Thereafter, a molybdenum (Mo) film, for example, is formed with a thickness of 200 nm on the interlayer insulating film 50 by, eg, sputtering, and is formed into a predetermined shape by photolithography and etching. Thereby, as shown in FIG. 8, the source electrode 60S and the drain electrode 60D are connected to the low resistance region 21 of the source region 20S and the drain region 20D through the connection holes. Thus, the thin film transistor 10 shown in FIG. 1 is completed.

  In the thin film transistor 10, when a voltage (gate voltage) higher than a predetermined threshold voltage is applied to the gate electrode 40 through a wiring layer (not shown), a current (drain current) is generated in the channel region 20 </ b> A of the oxide semiconductor film 20. .

  Further, since the low resistance region 21 containing more aluminum as a donor than the channel region 20A is provided in the source region 20S and the drain region 20D of the oxide semiconductor film 20, the element characteristics are stabilized.

  The thin film transistor according to the second embodiment is an example in which a gate insulating film is used instead of the inorganic insulating film 70 of the first embodiment. The structure of the thin film transistor according to Example 2 will be described with reference to FIGS. FIG. 9 is a plan view of the thin film transistor according to the second embodiment. 10 is a cross-sectional view corresponding to the one-dot chain line B1-B2 in FIG. Note that FIG. 9 shows only some layers of the cross-sectional structure of FIG.

  In the thin film transistor 10A, for example, the light shielding layer 12 and the undercoat film 13, the oxide semiconductor film 20, the gate insulating film 80, the gate electrode 40, the interlayer insulating film 50, the source electrode 60S, and the drain electrode 60D are stacked in this order on the substrate 100. It has a top gate type configuration. The gate insulating film 80 covers not only the channel region 21A of the oxide semiconductor film 20 but also the source region 21S, the drain region 21D, and the undercoat film 13. In other words, the gate insulating film 80 that is an inorganic insulating film extends from the source region 21S (drain region 21D) of the oxide semiconductor film 20 between the channel region 21A and the gate electrode 40. The oxide semiconductor film 20 includes a source region 20S and a drain region 20D each having a low resistance region 21 similar to that in the first embodiment.

  The gate insulating film 80 has a thickness of about 300 nm, for example, and is formed of a single layer film of aluminum oxide (AlO) or a laminated film of aluminum oxide (AlO) and silicon oxide (SiO) film. The gate insulating film 80 is provided in contact with the oxide semiconductor film 20 (channel region 20A, source region 20S and drain region 20D) and the undercoat film 13. Thus, the thin film transistor 10A can suppress defects due to the interlayer insulating film 50 and improve the reliability of the thin film transistor 10A having a self-aligned structure.

  Since the gate insulating film 80 is an inorganic insulating film and has a good barrier property against the outside air, the influence of oxygen and moisture that change the electrical characteristics of the oxide semiconductor film 20 is reduced, and the electrical characteristics of the thin film transistor 10A are reduced. It can be stabilized.

  Next, a manufacturing method of the thin film transistor 10A will be described with reference to FIGS. 11 to 14 are cross-sectional views illustrating a method for manufacturing the thin film transistor of FIG. Of the steps of the method for manufacturing the thin film transistor according to the second embodiment, the steps up to the formation of the oxide semiconductor film are the same as the steps of FIGS.

  After the oxide semiconductor film 20 is formed, as shown in FIG. 11, a single layer film of aluminum oxide (AlO) or silicon oxide (by a sputtering method or the like is formed on the entire surface of the undercoat film 13 and the oxide semiconductor film 20. A gate insulating material film 80B, which is a stacked film of an SiO) film and an aluminum oxide (AlO) film, is formed with a thickness of about 300 nm. The silicon oxide (SiO) film can be formed by a reactive sputtering method in addition to the plasma CVD method. The aluminum oxide (AlO) film can be formed by a reactive sputtering method or an atomic layer deposition method.

  Thereafter, a gate electrode material film made of a single layer film or a laminated film of molybdenum (Mo), titanium (Ti), aluminum (Al) or the like is formed on the entire surface of the gate insulating material film by sputtering, for example, with a thickness of about 200 nm. Form.

  After forming the gate electrode material film, as shown in FIG. 12, the gate electrode material film is formed into a desired shape by photolithography and etching, for example, and the gate electrode 40 is formed on the oxide semiconductor film 20.

  After the gate electrode 40 is formed, argon (Ar) is ion-implanted into a portion of the gate insulating material film 80B where the gate electrode 40 is not present, so that aluminum (Al) is formed from the gate insulating material film 80B as shown in FIG. Is turned on, Al enters the source region 20S and the drain region 20D from the upper surface side in contact with the gate insulating material film 80B of the source region 20S and the drain region 20D. In the channel region 20A, since the gate electrode 40 is formed on the gate insulating material film 80B, aluminum (Al) is hardly implanted from the gate insulating material film 80B below the gate electrode 40. As a result, the low resistance region 21 having a higher (Al) concentration than the channel region 20A is formed in the source region 20S and the drain region 20D. Argon (Ar) is injected into a portion of the gate insulating material film 80B that does not contact the gate electrode 40, whereby the gate insulating film 80 containing argon (Ar) is formed.

  After forming the low resistance region 21, as shown in FIG. 14, the interlayer insulating film 50 is formed on the gate electrode 40 and the gate insulating film 80 in the same manner as in the first embodiment, and the connection hole 50A is formed.

  Subsequently, a connection hole 80A is formed in the gate insulating film 80 by, for example, photolithography and etching. Thereafter, a molybdenum (Mo) film, for example, is formed with a thickness of 200 nm on the interlayer insulating film 50 by, eg, sputtering, and is formed into a predetermined shape by photolithography and etching. Thereby, as shown in FIG. 14, the source electrode 60S and the drain electrode 60D are connected to the low resistance region 21 of the source region 20S and the drain region 20D through the connection hole 50A and the connection hole 80A. Thus, the thin film transistor 10A shown in FIG. 10 is completed.

  Further, since the low resistance region 21 containing more aluminum as a donor than the channel region 20A is provided in the source region 20S and the drain region 20D of the oxide semiconductor film 20, the element characteristics are stabilized.

<Application example 1>
A display device including the thin film transistors 10 and 10A as a switching element will be described.

  FIG. 15 is a plan view of a liquid crystal display device to which the thin film transistor according to the first embodiment or the second embodiment is applied. 16 is a cross-sectional view taken along the line AA in FIG. FIG. 17 is a cross-sectional view of the display area of the liquid crystal display device. In the liquid crystal display device 1, the substrate 100 and the counter substrate 200 are formed to face each other, and a liquid crystal layer 300 (see FIG. 17) is sandwiched between the substrate 100 and the counter substrate 200. A lower polarizing plate 130 is attached under the substrate 100, and an upper polarizing plate 230 is attached above the counter substrate 200.

  The substrate 100 is formed to be larger than the counter substrate 200, and a portion where the substrate 100 is a single portion is a terminal portion 150, and a flexible wiring substrate 160 for supplying signals and power from the outside to the liquid crystal display device 1. Is connected. Since the liquid crystal display panel does not emit light by itself, the liquid crystal display device 1 has a backlight 400 disposed on the back surface.

  The liquid crystal display device 1 can be divided into a display area 240 and a peripheral area 250 as shown in FIG. In the display region 240, a large number of pixels are formed in a matrix, and each pixel includes a thin film transistor that is a switching element. In the peripheral region 250, a driving circuit for driving scanning lines, video signal lines and the like is formed.

  In FIG. 17, a TFT array layer 120 is formed on a substrate 100. The TFT array layer 120 has the layer structure of the thin film transistors 10 and 10A shown in FIGS. In FIG. 16, an organic passivation film 117 is formed thereon.

  FIG. 17 shows a case of an IPS liquid crystal display device, in which a common electrode 121 is formed in a planar shape on an organic passivation film 117. A capacitor insulating film 122 is formed so as to cover the common electrode 121, and a pixel electrode 123 is formed thereon. The pixel electrode 123 has a comb shape or a stripe shape. An alignment film 124 for covering the pixel electrode 123 and for initial alignment of the liquid crystal molecules 301 is formed.

  When a video signal is applied between the pixel electrode 123 and the common electrode 121, electric lines of force are generated as indicated by arrows, and the liquid crystal molecules 301 are rotated to control the transmittance of the liquid crystal layer 300, thereby generating an image. Form.

  In FIG. 17, the counter substrate 200 is disposed with the liquid crystal layer 300 interposed therebetween. On the counter substrate 200, a color filter 201 and a black matrix 202 are formed. An overcoat film 203 is formed to cover the color filter 201 and the black matrix 202, and an alignment film 204 for initial alignment of the liquid crystal molecules 301 is formed thereon.

  In the liquid crystal display device 1, when a video signal is written to the pixel electrode 123, a voltage is held for one frame by a storage capacitor formed by the pixel electrode 123, the common electrode 121, and the capacitor insulating film 122. At this time, if the leakage current of the thin film transistor is large, the voltage of the pixel electrode 123 changes, flickering occurs, and a good image cannot be formed. By using the thin film transistors 10 and 10A each including an oxide semiconductor film, a liquid crystal display device having a small leak current and a favorable image can be realized.

<Application example 2>
The thin film transistors described in Embodiments 1 and 2 can be applied to an organic EL display device. FIG. 18 is a plan view of the organic EL display device 2. 19 is a cross-sectional view taken along line BB in FIG. FIG. 20 is a cross-sectional view of the display area of the organic EL display device.

  In FIG. 18, a display area 240 and a peripheral area 250 are formed. In the display area 240, an organic EL driving thin film transistor and a switching thin film transistor are formed. As the switching thin film transistor, the thin film transistors 10 and 10A including an oxide semiconductor film with a small leakage current are preferable. Note that since the organic EL display device is not provided with a backlight, the light shielding layer 12 of the thin film transistors 10 and 10A may not be provided.

  In FIG. 18, an antireflection polarizing plate 220 is attached so as to cover the display area 240. Since a reflective electrode is formed on the organic EL display device 2, a polarizing plate 220 is used to suppress external light reflection. Terminal portions 150 are formed in portions other than the display region 240, and a flexible wiring substrate 160 for supplying power and signals to the organic EL display device 2 is connected to the terminal portions 150.

  In FIG. 19, a display element layer 210 including an organic EL layer is formed on a substrate 100. The display element layer 210 is formed corresponding to the display area 240 of FIG. Since the organic EL material is decomposed by moisture, the protective film 214 is formed of silicon nitride (SiN) or the like so as to cover the display element layer 210 in order to prevent moisture from entering from the outside. A polarizing plate 220 is attached on the protective film 214. Further, terminal portions 150 are formed in portions other than the display element layer 210, and the flexible wiring board 160 is connected to the terminal portions 150.

  In FIG. 20, the TFT array layer 120 is formed on the substrate 100. The thin film transistors 10 and 10A shown in FIGS. In FIG. 20, an organic passivation film 117 is formed on the TFT array layer 120.

  In FIG. 20, a lower electrode 211 as a cathode is formed on the organic passivation film 117. The lower electrode is formed of a laminated film of an aluminum (Al) alloy or the like as a reflective electrode and ITO or the like as a cathode. An organic EL layer 212 is formed on the lower electrode 211. The organic EL layer 212 is formed of, for example, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, or the like. On the organic EL layer 212, an upper electrode 213 as an anode is formed. The upper electrode 213 is formed of a transparent conductive film made of indium zinc oxide, ITO, or the like, or may be formed of a metal thin film such as silver. A protective film 214 is formed of silicon nitride (SiN) or the like so as to cover the upper electrode 213, and a polarizing plate 220 for preventing reflection is bonded to the protective film 214 with an adhesive material 221.

DESCRIPTION OF SYMBOLS 1 ... Liquid crystal display device, 2 ... Organic EL display device, 10 ... Thin film transistor, 20 ... Oxide semiconductor thin film, 20A ... Channel region, 20S ... Source region, 20D ... Drain region, 21 ... Low-resistance region, 30 ... Gate insulating film 40 ... Gate electrode, 50 ... Interlayer insulating film, 60S ... Source electrode, 60D ... Drain electrode, 70 ... Inorganic insulating film, 100 ... Substrate, 200 ... Counter substrate

Claims (20)

The display device includes a thin film transistor on a substrate,
The thin film transistor
A gate electrode;
An oxide semiconductor film having a channel region facing the gate electrode and having a source region on one side of the channel region and a drain region on the other side;
An inorganic insulating film provided in contact with the oxide semiconductor film and having a first connection hole;
A source electrode and a drain electrode respectively connected to the source region and the drain region via the first connection hole;
With
The inorganic insulating film is composed of an insulating film containing metal and ion species used in ion implantation,
The oxide semiconductor film has a low resistance region containing the metal as a dopant in the source region and the drain region. The display device according to claim 1.
The inorganic insulating film is a single layer film of aluminum oxide or a laminated film of aluminum oxide and silicon oxide film,
The ion species is argon;
The metal is aluminum. The display device according to claim 1.
The metal is included from the top to the bottom of the oxide semiconductor film. The display device according to claim 1.
The thin film transistor further includes a gate insulating film between the channel region of the oxide semiconductor film and the gate electrode,
The inorganic insulating film is provided in contact with a surface different from a surface in which the gate electrode is in contact with the gate insulating film. The display device according to claim 4.
The oxide semiconductor film is provided above the light shielding layer,
The gate insulating film and the gate electrode are provided in the same shape in this order on the channel region of the oxide semiconductor film,
An interlayer insulating film is provided on the surface of the inorganic insulating film. The display device according to claim 1.
The inorganic insulating film is provided to extend between the channel region of the oxide semiconductor and the gate electrode, and a portion of the gate electrode provided in contact with a surface different from a surface in contact with the interlayer insulating film is a gate It is an insulating film. The display device according to claim 6.
The oxide semiconductor film is provided on the light shielding layer,
The interlayer insulating film is provided on the surfaces of the inorganic insulating film and the gate electrode. The display device according to any one of claims 1 to 7,
The thin film transistor is formed in the display region. The display device according to any one of claims 1 to 7,
The display device is a liquid crystal display device. The display device according to any one of claims 1 to 7,
The display device is an organic EL display device. The manufacturing method of the display device is as follows:
(A) forming an oxide semiconductor film over the substrate;
(B) forming a film containing a metal on the surface of the oxide semiconductor film;
(C) performing ion implantation on the metal-containing film and allowing the metal to penetrate into the source region and the drain region of the oxide semiconductor film from the metal-containing film;
Is provided. In the manufacturing method of the display device of Claim 11,
The film containing metal is an inorganic insulating film. The method for manufacturing a display device according to claim 12, further comprising:
(D) A step of forming a gate insulating film and a gate electrode on the oxide semiconductor film is provided before the step (b). The method for manufacturing a display device according to claim 13, further comprising:
(E) before the step (a), forming a light shielding layer on the substrate;
(F) before the step (a), forming an undercoat layer on the surface of the light shielding layer and the substrate;
(G) forming an interlayer insulating film on the surface of the inorganic insulating film;
(H) forming a connection hole in the interlayer insulating film and the inorganic insulating film;
(I) forming a metal film in the connection hole and on the interlayer insulating film;
Is provided. The method for manufacturing a display device according to claim 12, further comprising:
(D) A step of forming a gate electrode on the inorganic insulating film is provided before the step (c). The method of manufacturing a display device according to claim 15, further comprising:
(E) before the step (a), forming a light shielding layer on the substrate;
(F) before the step (a), forming an undercoat layer on the surface of the light shielding layer and the substrate;
(G) forming an interlayer insulating film on the surfaces of the inorganic insulating film and the gate electrode;
(H) forming a connection hole in the interlayer insulating film and the inorganic insulating film;
(I) forming a metal film in the connection hole and on the interlayer insulating film;
Is provided. In the manufacturing method of the display device according to claim 12,
The inorganic insulating film is aluminum oxide, and the metal is aluminum. In the manufacturing method of the display device according to claim 17,
The ion species for the ion implantation is argon. In the manufacturing method of the display device according to claim 15,
The inorganic insulating film is formed of a single phase film of an aluminum oxide film or a laminated film of an aluminum oxide film and a silicon oxide film, and the metal is aluminum. In the manufacturing method of the display device according to claim 19,
The ion species for the ion implantation is argon.

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