JP2019008044A - Electro-optical device, electronic equipment - Google Patents

Abstract

An electro-optical device capable of effectively using light incident on an aperture region of a pixel. A liquid crystal panel 110 of a liquid crystal device as an electro-optical device includes a scanning line 3 as a first light shielding layer and a data line 6 as a second light shielding layer, and between the scanning line 3 and the data line 6. A first insulating layer that covers the transistor (TFT) 30 provided for each pixel and the data line 6, protrudes from the non-opening region of the pixel to the opening region, and forms a side wall 12 a inside the edge of the opening region. And a second insulating layer 13 provided in the opening region and filling the recess 12b including the side wall 12a of the first insulating layer, wherein the refractive index of the first insulating layer is n1, and the side wall of the first insulating layer Assuming that the refractive index of the portion of the second insulating layer 13 in contact with 12a is n2, the relationship of n1 <n2 is satisfied, and the refractive index of the second insulating layer 13 increases as it moves away from the substrate 10s in the thickness direction in the recess 12b. To be smaller than Including a phased part. [Selection] Figure 6

Description

  The present invention relates to an electro-optical device and an electronic apparatus.

  As an electro-optical device, an active drive type liquid crystal device including a transistor as a switching element for each pixel can be given. Since the liquid crystal device is a light receiving type, it is required to effectively use light incident on the pixels in order to obtain a high contrast in order to realize an easy-to-view display. In particular, a liquid crystal device used as a light modulation unit of a projection display device such as a projector is small in size, and thus has a small pixel size. Therefore, higher light utilization efficiency is required than a direct-view type liquid crystal device.

  For example, in Patent Document 1, the refractive index of the third interlayer insulating film in the non-opening region where the thin film transistor is provided is n3, and the refractive index of the fourth interlayer insulating film covering the third interlayer insulating film and filling the opening region is disclosed. An electro-optical device that satisfies the relationship of n3 <n4 is disclosed, where n4 is n4. The interface formed by the third interlayer insulating film and the fourth interlayer insulating film having different refractive indexes forms a side wall surrounding the opening region, and light incident on the side wall is reflected and guided to the opening region side. That is, not only light that goes straight along the optical axis of the opening area, but also light that is incident obliquely with respect to the optical axis is reflected by the side wall without being diffused and can be used effectively.

Japanese Patent Laying-Open No. 2006-80956

  However, the electro-optical device disclosed in Patent Document 1 has the third light shielding layer on the third interlayer insulating film in the non-opening region. Since the light incident on the end portion of the third light shielding layer is diffracted and enters the third interlayer insulating film, it is difficult to guide the light to the opening region. That is, there is a problem that there is still room for improvement in the utilization efficiency of light incident on the aperture region.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  [Application Example] The electro-optical device according to this application example is provided in a non-opening region surrounding the opening region of the pixel on the base material, and is arranged at intervals in the thickness direction of the base material. And the second light-shielding layer, the transistor provided for each pixel between the first light-shielding layer and the second light-shielding layer, and the second light-shielding layer, and from the non-opening region to the opening region. A first insulating layer that protrudes and forms a side wall inside an edge of the opening region, and a second insulating layer that is provided in the opening region and fills a recess including the side wall of the first insulating layer When the refractive index of the first insulating layer is n1, and the refractive index of the portion of the second insulating layer in contact with the side wall of the first insulating layer is n2, the relationship of n1 <n2 is satisfied. The second insulating layer is the base material in the thickness direction in the recess. Refractive index increasing distance comprises changed portion to be smaller from n2.

  According to this application example, since the refractive index of the second insulating layer in the portion in contact with the side wall of the first insulating layer having the refractive index n1 is n2 larger than n1, the light incident on the side wall is reflected. Guided into the open area. Since the second insulating layer has a portion in which the refractive index is changed so as to decrease from n2 as the distance from the substrate in the thickness direction in the concave portion in the opening region through which light is transmitted, for example, in the second insulating layer Even when another insulating layer having a refractive index smaller than n2 is stacked, reflection at the interface between the portion of the second insulating layer where the refractive index is reduced and the other insulating layer is suppressed. That is, it is possible to provide an electro-optical device capable of suppressing the reflection of light incident on the opening region at the interface and effectively using the incident light and performing bright display. Further, since the first insulating layer covers the second light shielding layer, the light incident on the end portion of the second light shielding layer is also reflected by the side wall. That is, since it is difficult for light to be diffracted at the end portion of the second light shielding layer, it is possible to suppress the occurrence of light leakage current due to the diffracted light entering the transistor.

In the electro-optical device according to the application example, it is assumed that the second insulating layer includes a layer in which the refractive index is changed stepwise so that the refractive index decreases from n2 in the concave portion as the distance from the base material increases. Also good.
According to this configuration, it is technically difficult to continuously change the refractive index in the thickness direction of the base material, but the second insulating layer can be easily realized by changing the refractive index stepwise. it can.

In the electro-optical device according to the application example described above, it is preferable that a refractive index difference between layers adjacent to the base material in the thickness direction in the second insulating layer is 0.05 or more and 0.15 or less.
According to this configuration, it is possible to more efficiently use light incident on the opening region while further suppressing reflection of light at the interface between layers adjacent to each other in the thickness direction of the substrate.

In the electro-optical device according to the application example, it is preferable that a difference between the refractive index n1 and the refractive index n2 is 0.1 or more.
According to this configuration, the light refraction in the translucent members having different refractive indexes follows Snell's law, and the difference between the refractive index n1 of the first insulating layer and the refractive index n2 of the second insulating layer is 0.1 or more. Therefore, the critical angle at which light incident on the interface between the first insulating layer and the second insulating layer is totally reflected can be made relatively small. That is, light incident on the interface can be more efficiently reflected at the interface between the first insulating layer and the second insulating layer. Note that, according to Snell's law, n1 <n2, and the critical angle θc is represented by θc = arcsin (n1 / n2).

[Application Example] An electronic apparatus according to this application example includes the electro-optical device according to the application example described above.
According to this application example, the light that passes through the aperture region of the pixel can be effectively used for display, and thus an electronic device having excellent display quality can be provided.

1 is a schematic plan view illustrating a configuration of a liquid crystal device as an electro-optical device according to a first embodiment. FIG. 2 is a schematic cross-sectional view showing the structure of the liquid crystal device along the line H-H ′ in FIG. 1. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device. FIG. 3 is a schematic cross-sectional view illustrating a pixel structure of a liquid crystal device. FIG. 3 is a schematic plan view illustrating a relationship between a main configuration of a pixel and an opening region and a non-opening region. FIG. 6 is a schematic cross-sectional view showing the structure of an element substrate along the line A-A ′ in FIG. 5. The flowchart which shows the manufacturing method of an element substrate. The schematic sectional drawing which shows the manufacturing method of an element substrate. The schematic sectional drawing which shows the manufacturing method of an element substrate. The schematic sectional drawing which shows the manufacturing method of an element substrate. The schematic sectional drawing which shows the manufacturing method of an element substrate. The schematic sectional drawing which shows the manufacturing method of an element substrate. The graph which shows the relationship between the structure of a 2nd insulating layer, and the transmittance | permeability of light. Schematic which shows the structure of the projection type display apparatus as an electronic device.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. Note that the drawings to be used are appropriately enlarged or reduced so that the part to be described can be recognized.

  In the present embodiment, an active drive type liquid crystal device including a thin film transistor (TFT) as a switching element for each pixel will be described as an example of an electro-optical device. This liquid crystal device can be suitably used, for example, as light modulation means (liquid crystal light valve) of a projection display device (liquid crystal projector) described later.

(First embodiment)
<Electro-optical device>
First, a liquid crystal device as an electro-optical device according to the present embodiment will be described with reference to FIGS. FIG. 1 is a schematic plan view showing the configuration of a liquid crystal device as an electro-optical device, and FIG. 2 is a schematic cross-sectional view showing the structure of the liquid crystal device along the line HH ′ in FIG. FIG. 3 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device.

  As shown in FIGS. 1 and 2, a liquid crystal device 100 as an electro-optical device according to the present embodiment includes an element substrate 10 and a counter substrate 20 that are disposed to face each other, and a liquid crystal layer 50 that is sandwiched between the pair of substrates. The liquid crystal panel 110 is provided. As the base material 10s of the element substrate 10 and the base material 20s of the counter substrate 20, for example, transparent quartz substrates or glass substrates are used, respectively.

The element substrate 10 is larger than the counter substrate 20, and the both substrates are bonded to each other with a seal portion 40 disposed along the outer edge of the counter substrate 20. Liquid crystal is injected into the inside of the seal portion 40 arranged in a frame shape to form a liquid crystal layer 50. In addition, the method of injecting the liquid crystal at the above-described interval is, for example, an ODF (One Drop) in which the liquid crystal is dropped inside the seal portion 40 arranged in a frame shape and the element substrate 10 and the counter substrate 20 are bonded under reduced pressure. Fill) method.
For the seal portion 40, for example, an adhesive such as a thermosetting or ultraviolet curable epoxy resin can be used. In the present embodiment, an ultraviolet curable epoxy resin is employed. Spacers (not shown) are mixed in the seal portion 40 to keep the distance between the pair of substrates constant.

  Inside the seal portion 40, a display area E1 including a plurality of pixels P arranged in a matrix is provided. A light-shielding parting part 21 is provided between the seal part 40 and the display area E1 so as to surround the display area E1. The parting portion 21 is made of, for example, a light shielding metal or metal oxide. The display area E1 may include a plurality of dummy pixels surrounding the effective pixel P in addition to the effective pixel P contributing to display.

  The element substrate 10 is provided with a terminal portion in which a plurality of external connection terminals 104 are arranged. A data line driving circuit 101 is provided between the first side portion along the terminal portion and the seal portion 40. In addition, an inspection circuit 103 is provided between the seal portion 40 along the second side facing the first side and the display area E1. Further, a scanning line driving circuit 102 is provided between the display portion E1 and the seal portion 40 along the third and fourth sides that are orthogonal to the first side and face each other. A plurality of wirings (not shown) connecting the two scanning line driving circuits 102 are provided between the seal part 40 on the second side and the inspection circuit 103.

Wirings (not shown) connected to the data line driving circuit 101 and the scanning line driving circuit 102 are connected to a plurality of external connection terminals 104 arranged along the first side. Note that the arrangement of the inspection circuit 103 is not limited to this, and the inspection circuit 103 may be provided at a position along the inner side of the seal portion 40 between the data line driving circuit 101 and the display area E1.
In the following description, the direction along the first side is defined as the X direction, and the direction along the third side is defined as the Y direction. Further, viewing along the direction from the counter substrate 20 side toward the element substrate 10 side is referred to as “plan view” or “planar”.

  As shown in FIG. 2, on the surface of the element substrate 10 on the liquid crystal layer 50 side, a transparent pixel electrode 16 provided for each pixel P and a thin film transistor (hereinafter referred to as TFT) 30 as a switching element. In addition, a signal wiring and an alignment film 18 covering these are formed. The element substrate 10 includes a base material 10s, a pixel electrode 16, a TFT 30, a signal wiring, and an alignment film 18 formed on the base material 10s. A detailed configuration of the element substrate 10 will be described later.

  The counter substrate 20 disposed to face the element substrate 10 includes a base material 20s, a parting portion 21 formed on the base material 20s, a planarization layer 22 formed so as to cover the base material 20s, and a planarization layer 22. The counter electrode 23 is provided over substantially the entire surface of the base material 20s and functions as a common electrode, and the alignment film 24 covers the counter electrode 23.

  As shown in FIG. 1, the parting part 21 surrounds the display area E1 and is provided at a position overlapping the scanning line driving circuit 102 and the inspection circuit 103 in plan view. This serves to shield the light incident on these circuits from the counter substrate 20 side and prevent these circuits from malfunctioning due to the light. Further, unnecessary stray light is shielded from entering the display area E1, and high contrast is ensured in the display of the display area E1. In this embodiment, since the seal portion 40 is formed using an ultraviolet curable epoxy resin, the parting portion 21 is disposed so as not to overlap the seal portion 40 in plan view. Therefore, in consideration of the positional accuracy in bonding the element substrate 10 and the counter substrate 20 and the ultraviolet curability of the seal portion 40, there is a slight gap (see FIG. 1).

  The planarization layer 22 is made of an inorganic material such as silicon oxide, for example, and is provided so as to cover the parting portion 21 with light transmittance. As a method for forming such a planarizing layer 22, for example, a method of forming a film using a plasma CVD method or the like can be given.

  The counter electrode 23 is made of a transparent conductive film such as ITO (Indium Tin Oxide), for example, covers the planarization layer 22 and is electrically connected to the vertical conduction portions 106 provided at the four corners of the counter substrate 20 as shown in FIG. It is connected to the. The vertical conduction part 106 is electrically connected to the wiring on the element substrate 10 side.

  The alignment film 18 covering the pixel electrode 16 and the alignment film 24 covering the counter electrode 23 are selected based on the optical design of the liquid crystal device 100. The alignment films 18 and 24 are organic materials in which a substantially horizontal alignment process is performed on liquid crystal molecules having positive dielectric anisotropy, for example, by forming an organic material such as polyimide and rubbing the surface thereof. Examples thereof include an alignment film and an inorganic alignment film formed by depositing an inorganic material such as SiOx (silicon oxide) using a vapor phase growth method so that the liquid crystal molecules have a negative dielectric anisotropy and are substantially perpendicularly aligned. .

Such a liquid crystal device 100 is a transmissive type, and is normally white mode in which the transmittance of the pixel P is maximized when no voltage is applied, or normally black in which the transmittance of the pixel P is minimized when no voltage is applied. Modal optical design is adopted. Polarizing elements are arranged and used according to the optical design respectively on the light incident side and the light exit side of the liquid crystal panel 110 including the element substrate 10 and the counter substrate 20.
In the present embodiment, an example in which a normally black mode optical design is applied using the inorganic alignment film described above as the alignment films 18 and 24 and a liquid crystal having negative dielectric anisotropy will be described.

  Next, an electrical configuration of the liquid crystal device 100 (liquid crystal panel 110) will be described with reference to FIG. The liquid crystal device 100 includes a plurality of scanning lines 3 and a plurality of data lines 6 as signal wirings that are insulated and orthogonal to each other at least in the display region E1, and capacitance lines 7 arranged in parallel along the data lines 6. . The direction in which the scanning line 3 extends is the X direction, and the direction in which the data line 6 extends is the Y direction.

  A pixel electrode 16, a TFT 30, and a storage capacitor 31 are provided in a region divided by the scanning line 3, the data line 6, the capacitor line 7, and these signal lines, and these constitute a pixel circuit of the pixel P. doing.

  The scanning line 3 is electrically connected to the gate of the TFT 30, and the data line 6 is electrically connected to the source of the TFT 30. The pixel electrode 16 is electrically connected to the drain of the TFT 30.

  The data line 6 is connected to the data line driving circuit 101 (see FIG. 1), and supplies image signals D1, D2,..., Dn supplied from the data line driving circuit 101 to the pixels P. The scanning line 3 is connected to a scanning line driving circuit 102 (see FIG. 1), and supplies scanning signals SC1, SC2,..., SCm supplied from the scanning line driving circuit 102 to the pixels P.

  The image signals D1 to Dn supplied from the data line driving circuit 101 to the data lines 6 may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6 for each group. Good. The scanning line driving circuit 102 supplies the scanning signals SC <b> 1 to SCm to the scanning line 3 in a pulse-sequential manner at a predetermined timing.

  In the liquid crystal device 100, the TFT 30 which is a switching element is turned on for a certain period by the input of the scanning signals SC1 to SCm, so that the image signals D1 to Dn supplied from the data line 6 are supplied to the pixel electrode 16 at a predetermined timing. It is the structure written in. The predetermined level of image signals D1 to Dn written to the liquid crystal layer 50 through the pixel electrode 16 are held for a certain period between the pixel electrode 16 and the counter electrode 23 arranged to face each other through the liquid crystal layer 50. The The frequency of the image signals D1 to Dn is 60 Hz, for example.

  In order to prevent the held image signals D1 to Dn from leaking, a storage capacitor 31 is connected in parallel with the liquid crystal capacitor formed between the pixel electrode 16 and the counter electrode 23. The storage capacitor 31 is provided between the drain of the TFT 30 and the capacitor line 7.

  The data line 6 is connected to the inspection circuit 103 shown in FIG. 1, and the operation defect of the liquid crystal device 100 can be confirmed by detecting the image signal in the manufacturing process of the liquid crystal device 100. Although not shown in the equivalent circuit of FIG.

  Peripheral circuits that drive and control the pixel circuits in this embodiment include a data line driving circuit 101, a scanning line driving circuit 102, and an inspection circuit 103. The peripheral circuit includes a sampling circuit that samples the image signal and supplies it to the data line 6, and a precharge circuit that supplies a precharge signal of a predetermined voltage level to the data line 6 prior to the image signal. Also good.

<Pixel structure>
Next, the structure of the pixel P in the liquid crystal device 100 (liquid crystal panel 110) of this embodiment will be described. FIG. 4 is a schematic cross-sectional view illustrating a pixel structure of the liquid crystal device.

  As shown in FIG. 4, the scanning line 3 is first formed on the base material 10 s of the element substrate 10. The scanning line 3 includes, for example, a simple metal, an alloy, a metal silicide, a poly, including at least one of metals such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), and Mo (molybdenum). Silicide, nitride, or a laminate of these can be used and has light shielding properties. The scanning line 3 is an example of a first light shielding layer in the present invention.

A base insulating film 11a made of, for example, silicon oxide is formed so as to cover the scanning lines 3, and a semiconductor layer 30a is formed in an island shape on the base insulating film 11a. The semiconductor layer 30a is made of, for example, a polycrystalline silicon film and is doped with impurity ions to have an LDD (Lightly Doped Drain) structure having a first source / drain region, a junction region, a channel region, a junction region, and a second source / drain region. Is formed.
Since the semiconductor layer 30a is provided above the light-shielding scanning line 3, light incident on the semiconductor layer 30a from the substrate 10s side is shielded. Thereby, the optical malfunction of the TFT 30 due to the incident light is prevented.

  A gate insulating film 11b is formed so as to cover the semiconductor layer 30a. Further, a gate electrode 30g is formed at a position facing the channel region with the gate insulating film 11b interposed therebetween.

  A first interlayer insulating film 11c is formed so as to cover the gate electrode 30g and the gate insulating film 11b, and penetrates the gate insulating film 11b and the first interlayer insulating film 11c at positions overlapping with respective end portions of the semiconductor layer 30a. Two contact holes CNT1 and CNT2 are formed.

  Then, a light-shielding conductive film such as Al (aluminum), an alloy thereof, or a metal compound is formed to fill the two contact holes CNT1 and CNT2 and to cover the first interlayer insulating film 11c, and is patterned. As a result, the data line 6 connected to the first source / drain region via the contact hole CNT1 is formed. At the same time, the first relay electrode 6b connected to the second source / drain region through the contact hole CNT2 is formed. The data line 6 and the first relay electrode 6b are an example of a second light shielding layer in the present invention.

  Next, the second interlayer insulating film 12 is formed so as to cover the data line 6, the first relay electrode 6b, and the first interlayer insulating film 11c. The second interlayer insulating film 12 is made of, for example, silicon oxide. Then, a flattening process is performed to flatten the unevenness of the surface caused by covering the region where the TFT 30 is provided. Examples of the planarization method include chemical mechanical polishing (CMP) and spin coating.

  A contact hole CNT3 penetrating through the second interlayer insulating film 12 is formed at a position overlapping the first relay electrode 6b. A light-shielding conductive film such as Al (aluminum), an alloy thereof, or a metal compound is formed so as to cover the contact hole CNT3 and the second interlayer insulating film 12, and is patterned to form the first A first capacitor electrode 31a and a second relay electrode 31d are formed.

  The insulating film 14a is patterned and formed so as to cover the outer edge of the portion of the first capacitor electrode 31a that faces the second capacitor electrode 31b with the dielectric layer 31c formed later. In addition, the insulating film 14a is patterned and formed so as to cover the outer edge of the second relay electrode 31d except for the portion overlapping the contact hole CNT4. The insulating film 14a is provided to prevent the first capacitor electrode 31a from being etched during patterning of the second capacitor electrode 31b to be formed later.

Next, a dielectric layer 31c is formed to cover the insulating film 14a and the first capacitor electrode 31a. As the dielectric layer 31c, a silicon nitride film, a single layer film such as hafnium oxide (HfO ₂ ), alumina (Al ₂ O ₃ ), tantalum oxide (Ta ₂ O ₅ ), or at least one of these single layer films is used. A multilayer film in which two types of single-layer films are stacked may be used. The portion of the dielectric layer 31c that overlaps the second relay electrode 31d in plan view is etched away. A conductive film such as, for example, TiN (titanium nitride) is formed so as to cover the dielectric layer 31c. By patterning the conductive film, the second capacitive electrode is disposed opposite to the first capacitive electrode 31a and connected to the second relay electrode 31d. 31b is formed. The storage capacitor 31 is configured by the dielectric layer 31c, and the first capacitor electrode 31a and the second capacitor electrode 31b that are arranged to face each other with the dielectric layer 31c interposed therebetween. Since the first capacitor electrode 31a and the second capacitor electrode 31b are formed using a light-shielding conductive film, the storage capacitor 31 has a light-shielding property, the scanning line 3 is the first light-shielding layer, and the data line 6 Is the second light shielding layer, the storage capacitor 31 corresponds to the third light shielding layer.

  Next, a third interlayer insulating film 14b that covers the second capacitor electrode 31b and the dielectric layer 31c is formed. The third interlayer insulating film 14b is also made of, for example, silicon oxide and is subjected to a planarization process such as a CMP process. The insulating film 14a and the dielectric layer 31c are thinner than the third interlayer insulating film 14b. Further, the insulating film 14a and the dielectric layer 31c are not necessarily formed over the entire surface of the base material 10s, and may be patterned so as to be related to the configuration of the storage capacitor 31. Therefore, in the present embodiment, the interlayer insulating film covering the storage capacitor 31 is hereinafter treated as the third interlayer insulating film 14.

  A contact hole CNT4 that penetrates through the third interlayer insulating film 14 is formed so as to reach a portion of the second capacitor electrode 31b that is in contact with the second relay electrode 31d.

  A light-shielding conductive film such as Al (aluminum), an alloy thereof, or a metal compound is formed so as to cover the contact hole CNT4 and the third interlayer insulating film 14, and by patterning this, a wiring 8a is formed. And the third relay electrode 8b electrically connected to the second relay electrode 31d through the contact hole CNT4. The wiring 8a is formed so as to overlap the semiconductor layer 30a, the data line 6, and the storage capacitor 31 of the TFT 30 in a plan view, and functions as a shield layer when a fixed potential is applied. Since the wiring 8a and the third relay electrode 8b are also formed using a light-shielding conductive film, if the storage capacitor 31 is a third light-shielding layer, the wiring 8a and the third relay electrode 8b are formed as a fourth light-shielding layer. It is equivalent.

  A fourth interlayer insulating film 15 is formed so as to cover the wiring 8a and the third relay electrode 8b. The fourth interlayer insulating film 15 can also be formed using, for example, silicon oxide. A contact hole CNT5 that penetrates through the fourth interlayer insulating film 15 and reaches the third relay electrode 8b is formed.

  A transparent conductive film (electrode film) such as ITO is formed so as to cover the contact hole CNT5 and cover the fourth interlayer insulating film 15. The transparent conductive film (electrode film) is patterned to form a pixel electrode 16 that is electrically connected to the third relay electrode 8b through the contact hole CNT5.

  The third relay electrode 8b is electrically connected to the second source / drain region of the TFT 30 through the contact hole CNT4, the second capacitor electrode 31b, the second relay electrode 31d, the contact hole CNT3, and the first relay electrode 6b. The pixel electrode 16 is electrically connected through the contact hole CNT5.

  The first capacitor electrode 31a is formed so as to straddle a plurality of pixels P, and functions as the capacitor line 7 in the equivalent circuit (see FIG. 3). A fixed potential is applied to the first capacitor electrode 31a. Thus, the potential applied to the pixel electrode 16 through the second source / drain region of the TFT 30 can be held between the first capacitor electrode 31a and the second capacitor electrode 31b.

  An alignment film 18 is formed so as to cover the pixel electrode 16, and an alignment film 24 is formed so as to cover the counter electrode 23 of the counter substrate 20 disposed to face the element substrate 10 with the liquid crystal layer 50 interposed therebetween. As described above, the alignment films 18 and 24 are inorganic alignment films, and are formed of aggregates of columnar bodies 18a and 24a in which an inorganic material such as silicon oxide is vapor-deposited, for example, obliquely from a predetermined direction. The liquid crystal molecules LC having negative dielectric anisotropy with respect to the alignment films 18 and 24 have a pretilt of 3 to 5 degrees in the tilt direction of the columnar bodies 18a and 24a with respect to the normal direction of the alignment film surface. A substantially vertical alignment (VA) is performed with an angle θp. By applying an alternating voltage (drive signal) between the pixel electrode 16 and the counter electrode 23 to drive the liquid crystal layer 50, the liquid crystal molecules LC are inclined in the direction of the electric field generated between the pixel electrode 16 and the counter electrode 23. Behaves (vibrates).

  Next, a planar arrangement of main components in the pixel P will be described with reference to FIG. FIG. 5 is a schematic plan view showing the relationship between the main configuration of the pixel and the opening area and the non-opening area.

  As shown in FIG. 5, the pixel P in the liquid crystal device 100 has, for example, a substantially square (substantially square) opening region in a plan view. The opening area is surrounded by a light-shielding non-opening area extending in the X direction and the Y direction and provided in a lattice shape.

  The scanning line 3 shown in FIGS. 3 and 4 is provided in the non-opening region extending in the X direction. The scanning line 3 uses a light-shielding conductive member, and the scanning line 3 constitutes a part of the non-opening region.

  Similarly, the data line 6 and the capacitance line 7 (first capacitance electrode 31a) shown in FIGS. 3 and 4 are provided in the non-opening region extending in the Y direction. The data line 6 and the capacitor line 7 (first capacitor electrode 31a) also use a light-shielding conductive film, and these constitute a part of the non-opening region.

  The TFT 30 shown in FIGS. 3 and 4 is provided at the intersection of the non-opening regions. In the present embodiment, the semiconductor layer 30a of the TFT 30 is arranged extending in the Y direction at the intersection of the non-opening regions. A contact hole CNT1 for connecting the semiconductor layer 30a and the data line 6 and a contact hole CNT2 for connecting the semiconductor layer 30a and the first relay electrode 6b are also provided in the non-opening region. Thus, by providing the TFTs 30 at the intersections of the non-opening regions having light shielding properties, the opening ratio in the opening regions is ensured. Although the detailed structure of the element substrate 10 will be described later, the width of the non-opening region at the intersection is wider than the other portions because of the provision of the TFT 30 at the intersection. Note that the semiconductor layer 30a is not limited to be disposed extending in the Y direction at the intersection of the non-opening regions, and may be disposed extending in the X direction. Therefore, the shape of the intersecting portion of the non-opening region is not limited as long as it corresponds to the arrangement of the TFTs 30 and does not have to protrude evenly in the X direction and the Y direction.

  A pixel electrode 16 is provided for each pixel P. The pixel electrode 16 is substantially square in plan view, and is provided in the opening region so that the outer edge of the pixel electrode 16 overlaps the non-opening region. Although not shown in FIG. 5, the storage capacitor 31 and the wiring 8a shown in FIG. 4 are also arranged in the non-opening region.

  The liquid crystal device 100 of the present embodiment is a transmissive type, and on the premise that light enters from the counter substrate 20 side, the light incident on the TFT 30 is shielded on the element substrate 10 and is incident on the opening region. A configuration is adopted in which light is prevented from diffusing in the element substrate 10 and the light use efficiency is improved. A portion indicated by a broken line in the opening region in FIG. 5 indicates the end portion 12a of the second interlayer insulating film 12 described above, and forms a side wall inside the edge portion of the opening region in the present invention. It shows the planar shape of the first insulating layer. Hereinafter, the structure of the element substrate 10 will be described in detail.

  FIG. 6 is a schematic sectional view showing the structure of the element substrate along the line A-A ′ of FIG. 5. 5 is a line segment that crosses the second source / drain region (corresponding to the drain of the TFT 30) of two adjacent semiconductor layers 30a across the opening region. In FIG. 6, the alignment films 18 and 24 in contact with the liquid crystal layer 50 and the planarization layer 22 of the counter substrate 20 are not shown.

  As shown in FIG. 6, the element substrate 10 having the pixel electrode 16 and the counter substrate 20 having the counter electrode 23 are disposed to face each other with the liquid crystal layer 50 interposed therebetween. As described above, the pixel electrode 16 is arranged in the opening region so that the outer edge overlaps the non-opening region. On the base material 10s of the element substrate 10, the scanning line 3 as the first light shielding layer, the base insulating film 11a, the semiconductor layer 30a of the TFT 30, the gate insulating film 11b, and the first interlayer insulating film 11c are sequentially formed from the base material 10s side. The data line 6 as the second light shielding layer, the second interlayer insulating film 12, the storage capacitor 31, the third interlayer insulating film 14, the wiring 8a functioning as a shield layer, the fourth interlayer insulating film 15, and the pixel electrode 16 are stacked. Has been. Although not located along the A-A ′ line, a gate electrode 30 g (shown by a broken line in FIG. 6) is disposed so as to face the channel region of the semiconductor layer 30 a through the gate insulating film 11 b. The TFT 30 includes a gate electrode 30g.

  In the non-opening region, the scanning line 3, the data line 6, the storage capacitor 31, and the wiring 8a that function as a light shielding layer are arranged. The TFT 30 is disposed between the scanning line 3 and the data line 6 on the substrate 10s. The third interlayer insulating film 14 covering the storage capacitor 31 and the fourth interlayer insulating film 15 covering the wiring 8a are formed over the non-opening region and the opening region.

  On the other hand, each of the base insulating film 11a covering the scanning line 3, the gate insulating film 11b covering the semiconductor layer 30a, the first interlayer insulating film 11c covering the TFT 30, and the second interlayer insulating film 12 covering the data line 6 is not opened. In addition to being formed in the region, the end portion thereof is formed so as to protrude into the opening region. The positions of the end portions of the base insulating film 11a, the gate insulating film 11b, and the first interlayer insulating film 11c are aligned with respect to the end portion 12a of the second interlayer insulating film 12 shown in FIG.

  The insulating film in which the positions of these end portions including the second interlayer insulating film 12 covering the data line 6 as the second light shielding layer are aligned is an example of the first insulating layer in the present invention. In other words, the first insulating layer is not limited to a single layer, and may be a multilayer.

In the present embodiment, these insulating films (first insulating layers) are all formed using silicon oxide (SiO _x ), and depend on a forming method such as a vapor deposition method, a sputtering method, or a CVD method. However, the refractive index n1 is approximately 1.45 to 1.46.

  The insulating film (first insulating layer) and the base material 10s constitute a recess 12b in the opening region. A second insulating layer 13 is provided so as to fill the recess 12b. The inner wall of the recess 12b and the side wall constituted by the end portions of these insulating films (first insulating layers) in contact with the second insulating layer 13 are given the reference numerals of the end portions 12a of the second interlayer insulating film 12. Henceforth, it will call the side wall 12a. The angle formed between the side wall 12a and the base material 10s is approximately 90 ± 10 degrees.

  The second insulating layer 13 filling the recess 12b includes a first layer 13a in contact with the side wall 12a of the first insulating layer and the base material 10s, and a second layer 13b and a third layer stacked in order with respect to the first layer 13a. 13c is included.

The second insulating layer 13 in the present embodiment is formed using, for example, silicon oxynitride (SiO _x N _y ). Although depending on the method of forming the second insulating layer 13, when the refractive index of the first layer 13a in contact with the side wall 12a is n2, for example, n2 is 1.65 to 1.85. Assuming that the refractive index of the second layer 13b in contact with the first layer 13a is n3, for example, n3 is 1.55 to 1.70. If the refractive index of the third layer 13c in contact with the second layer 13b is n4, for example, n4 is 1.50 to 1.55. The refractive index n4 of the third layer 13c is a value close to the refractive index n1 of the first insulating layer forming the side wall 12a. That is, the second insulating layer 13 has a portion in which the refractive index is changed from n2 as the distance from the base material 10s increases in the thickness direction. In this embodiment, the portion where the refractive index has changed so as to decrease from n2 is a stack of three layers whose refractive index changes stepwise, that is, the first layer 13a, the second layer 13b, and the third layer 13c. It has become a part. Note that the number of stacked layers is not limited to three, and the second insulating layer 13 may be formed of at least two layers having different refractive indexes. Alternatively, the second insulating layer 13 may have a configuration in which the refractive index continuously decreases from n2 as the distance from the base material 10s increases in the thickness direction.

  The liquid crystal device 100 according to the present embodiment is used as light modulation means of a projection display device described later. In this embodiment, light emitted from the light source of the projection display device is incident from the counter substrate 20 side. Then, the light passes through the opening region where the pixel electrode 16 of the element substrate 10 is disposed and is emitted from the element substrate 10 side.

As shown in FIG. 6, the light L ₀ incident from the normal direction of the pixel electrode 16 along the optical axis is the fourth interlayer insulating film 15, the third interlayer insulating film 14, and the second insulating layer 13 in the opening region. Then, it is injected through the substrate 10s. When the light L ₁ transmitted through the pixel electrode 16 from an oblique direction with respect to the optical axis and entering the opening region of the element substrate 10 reaches the side wall 12a of the first insulating layer, the light L ₁ is reflected by the side wall 12a and the opening region side. Led to. This is because when the refractive index satisfies the condition of n1 <n2, the light L ₁ is incident on the first insulating layer having the refractive index n1 smaller than the refractive index n2 from the second insulating layer 13 having the refractive index n2. This is due to reflection on the side wall 12a according to the law. If the incident angle of the light L ₁ with the normal of the side wall 12a is larger than the critical angle θc, the light L ₁ is totally reflected by the side wall 12a. Note that, according to Snell's law, n1 <n2, and the critical angle θc is represented by θc = arcsin (n1 / n2).

The third interlayer insulating film 14 and the fourth interlayer insulating film 15 are formed using silicon oxide (SiOx) in the same manner as the second interlayer insulating film 12 covering the data lines 6. Therefore, the refractive indexes of the third interlayer insulating film 14 and the fourth interlayer insulating film 15 are n1. In the opening region, the third interlayer insulating film 14 is in contact with the first layer 13a (refractive index n2), second layer 13b (refractive index n3), and third layer 13c (refractive index n4) of the second insulating layer 13. . As shown in FIG. 6, for example, the light L ₂ that has passed through the third interlayer insulating film 14 and entered the first layer 13 a and the second layer 13 b of the second insulating layer 13 has a third difference due to the difference in refractive index. A part of the light L ₂ is reflected at the interface between the interlayer insulating film 14 and the second insulating layer 13 as indicated by a broken line, and the rest is transmitted. Further, for example, the light L ₂ that has passed through the third interlayer insulating film 14 and entered the third layer 13 c of the second insulating layer 13 has a small difference in refractive index. Reflection at the interface with the layer 13c is suppressed and the third layer 13c is transmitted. In other words, since the refractive index of the second insulating layer 13 changes so as to be smaller than n2 at the interface with the third interlayer insulating film 14, the refractive index of the second insulating layer 13 in contact with the interface is n2. Compared with some cases, reflection at the interface is suppressed. That is, the light incident on the opening area of the element substrate 10 is not easily diffused when passing through the opening area, and is efficiently emitted from the base material 10s. From the viewpoint of suppressing reflection at the interface, it is more preferable that the refractive index of the third interlayer insulating film 14 and the refractive index of the third layer 13c in the second insulating layer 13 are the same.

In addition, for example, the light line L ₁ that is transmitted through the pixel electrode 16 from an oblique direction with respect to the optical axis and is incident on the opening region of the element substrate 10 is the data line 6 as the second light shielding layer disposed immediately above the TFT 30. Even if it is incident toward the end of the data line, it is reflected by the side wall 12a, so that the diffraction of light hardly occurs at the end of the data line 6. Therefore, the light diffracted at the end of the data line 6 is prevented from being incident on the semiconductor layer 30a of the TFT 30 to generate a light leakage current.

  Further, although not shown in FIG. 6, even if light emitted from the element substrate 10 side becomes stray light and enters the base material 10 s again, it is shielded by the scanning line 3. Further, even if stray light is incident on the opening region, it is reflected by the sidewall 12a, so that stray light is prevented from being incident on the semiconductor layer 30a of the TFT 30 and causing light leakage current.

  From the viewpoint of suppressing light diffracted at the end of the data line 6, the end of the second interlayer insulating film 12 covering the data line 6, that is, the position of the side wall 12 a of the first insulating layer is at least 0 from the non-opening region. It is preferable that the distance is 1 μm or more. Further, from the viewpoint of efficiently reflecting light incident on the sidewall 12a of the first insulating layer and increasing light transmitted through the opening region using Snell's law, the position of the sidewall 12a of the first insulating layer is The distance from the non-opening region is preferably from 0.1 μm to 1.0 μm, and more preferably from 0.2 μm to 0.5 μm. In addition, the thickness of the first layer 13a having a refractive index n2 in a portion in contact with the side wall 12a is preferably 1 μm or more.

<Method for manufacturing liquid crystal device>
The characteristic part of the invention in the liquid crystal device according to the present embodiment relates to the structure of the element substrate 10 as described above. Therefore, a method for manufacturing the element substrate 10 as a method for manufacturing the liquid crystal device will be described with reference to FIGS. FIG. 7 is a flowchart showing a method for manufacturing an element substrate, and FIGS. 8 to 12 are schematic cross-sectional views showing a method for manufacturing the element substrate. Specifically, FIGS. 8 to 12 are diagrams corresponding to the schematic cross-sectional views showing the structure of the element substrate shown in FIG.

  As shown in FIG. 7, the manufacturing method of the element substrate 10 of the present embodiment includes a scanning line forming step (step S1), a base insulating film forming step (step S2), a transistor forming step (step S3), and a first interlayer insulation. A film forming process (step S4), a data line forming process (step S5), a second interlayer insulating film forming process (step S6), a recess forming process (step S7), and a second insulating layer forming process (step S8). Yes. Also, the second insulating layer flattening step (Step S9), the storage capacitor forming step (Step S10), the third interlayer insulating film forming step (Step S11), the shield layer forming step (Step S12), and the fourth interlayer insulating film forming A process (step S13), a pixel electrode formation process (step S14), and an alignment film formation process (step S15) are provided. Since steps S1 to S5 and steps S10 to S15 can use known methods as described above, steps S6 to S9 will be described here.

As shown in FIG. 8, each of the base insulating film 11a covering the scanning line 3, the gate insulating film 11b covering the semiconductor layer 30a, and the first interlayer insulating film 11c covering the TFT 30 extends over the non-opening region and the opening region. It is formed. In particular, since the first interlayer insulating film 11c covers the TFT 30 and has irregularities on the surface thereof, it is preferable to perform a planarization process such as a CMP process after film formation. In step S5, after forming the data line 6 and the first relay electrode 6b in the non-opening region on the first interlayer insulating film 11c, in step S6, the non-opening is performed so as to cover the data line 6 and the first relay electrode 6b. A second interlayer insulating film 12 is formed over the region and the opening region. The film thickness of these insulating films is appropriately set depending on the film thickness of the object to be coated. In particular, since the gate insulating film 11b affects the electrical characteristics of the TFT 30, the film thickness is controlled to be about 50 nm to 100 nm. Compared to such a gate insulating film 11b, the film thicknesses of the base insulating film 11a, the first interlayer insulating film 11c, and the second interlayer insulating film 12 are controlled to about several hundred nm to 1 μm. As a method for forming these insulating films, for example, a plasma CVD method using TEOS (tetraethoxysilane) as a source gas can be given. According to the plasma CVD method, the base material 10s is exposed to and reacted with plasma source gas heated to, for example, 300 ° C. to 350 ° C., thereby oxidizing the refractive index of 1.45 to 1.46 as an insulating film. A silicon film (SiO ₂ film) can be formed. Then, the process proceeds to step S7.

  In the recess forming step of step S7, as shown in FIG. 9, a resist pattern 60 is formed on the second interlayer insulating film 12 using a photolithography method so as to overlap with the non-opening region and protrude into the opening region. Then, the portions of the second interlayer insulating film 12, the first interlayer insulating film 11c, the gate insulating film 11b, and the base insulating film 11a that are not protected by the resist pattern 60 are etched by, for example, dry etching, which is anisotropic etching. To remove. Thereby, the recessed part 12b is formed in the opening area | region of the base material 10s corresponding to every pixel P. FIG. Then, the process proceeds to step S8.

In the second insulating layer forming step of step S8, as shown in FIG. 10, the first layer 13a, the second layer 13b, and the second layer 13b having different refractive indexes over the opening region and the non-opening region so as to fill the recess 12b. The second insulating layer 13 is formed by sequentially forming and stacking the third layer 13c. As a method for forming the second insulating layer 13, there is a plasma CVD method using monosilane (SiH ₄ ) gas, ammonia (NH ₃ ) gas, and oxygen (O ₂ ) gas as source gases. it can. By changing the flow rate of ammonia (NH ₃ ) gas in the flow rate of the source gas, the refractive index of the silicon oxynitride (SiO _x N _y ) film obtained after film formation can be changed. When the flow rate of ammonia (NH ₃ ) gas is increased, the refractive index of the obtained silicon oxynitride film approaches the refractive index (approximately 1.9) of the silicon nitride film, and the refractive index becomes about 1.85. If the flow rate of ammonia (NH ₃ ) gas is “0; zero”, the refractive index will be the value of the refractive index of SiOx. Therefore, first, the flow rate of ammonia (NH ₃ ) gas occupying the flow rate of the raw material gas is increased, and first the first layer 13a having a refractive index of n2 is formed. Thereafter, the flow rate of ammonia gas is reduced to form the second layer 13b having a refractive index smaller than that of the first layer 13a. Further, the flow rate of ammonia gas is reduced, and the third layer 13c is formed so that the refractive index is smaller than that of the second layer 13b. The film thickness of each layer is controlled by the film formation time. The total film thickness of the second insulating layer 13 is approximately 1 μm to 3 μm although it depends on the film thickness of the first insulating layer to be coated. Note that the second insulating layer 13 whose refractive index continuously changes from n2 can be formed by changing the flow rate of ammonia (NH ₃ ) gas with time. However, since it becomes difficult to control the film formation conditions or to make an elastic response such as stopping the film formation halfway, the second insulating layer 13 is formed of a plurality of layers having different refractive indexes as in this embodiment. From the viewpoint of productivity, it is preferable to form the film from the viewpoint of productivity. And it progresses to the planarization process of step S9.

  In the planarization step of step S9, the formed second insulating layer 13 is planarized. Specifically, as shown in FIG. 11, the second insulating layer 13 is flattened until the second interlayer insulating film 12 is exposed by, for example, a combination of CMP processing and etching. Thus, the second insulating layer 13 having the surface 13p where the second interlayer insulating film 12 is exposed in the non-opening region and the layer having a different refractive index is exposed in the opening region is formed. Then, the process proceeds to step S10.

  A known method can be used for each of steps S10 to S15. Specifically, as shown in FIG. 12, the storage capacitor 31 is formed in the non-open region in step S10, the third interlayer insulating film 14 covering the storage capacitor 31 is formed in step S11, and the third interlayer is formed in step S12. A wiring 8a functioning as a shield layer is formed in the non-opening region on the insulating film. In step S13, the fourth interlayer insulating film 15 covering the wiring 8a is formed, and in step S14, the pixel electrode 16 is formed on the fourth interlayer insulating film 15 for each pixel. In step S15, an alignment film 18 that covers the pixel electrode 16 is formed. Although the orientation film 18 is not shown in FIG. 12, in this embodiment, the orientation film 18 that is an aggregate of the columnar bodies 18a is formed by obliquely depositing silicon oxide (see FIG. 4). .

  Next, the relationship between the effect of improving the utilization efficiency of light incident on the aperture region and the configuration of the second insulating layer 13 will be described with reference to FIG. FIG. 13 is a graph showing the relationship between the configuration of the second insulating layer and the light transmittance.

  The graph showing the relationship between the configuration of the second insulating layer 13 and the light transmittance shown in FIG. 13 uses a quartz substrate having a refractive index of 1.46 as the base material 10s and is laminated on the second insulating layer 13. The transmittance is obtained by optical simulation when a silicon oxide film having a refractive index of 1.46 is used as the third interlayer insulating film 14 and the configuration of the second insulating layer 13 is varied. The total thickness of the second insulating layer 13 is 3000 nm in all cases, and the transmittance is an average value in the visible light wavelength range (400 nm to 800 nm).

  Specifically, first, the transmittance was calculated with the second insulating layer 13 as a single layer (one layer). The refractive index n is three types of 1.65, 1.70 and 1.75. The refractive index difference with the third interlayer insulating film 14 laminated on the second insulating layer 13 is 0.19 when the refractive index n of the second insulating layer 13 is 1.65, and the refractive index of the second insulating layer 13 When the index n is 1.70, it is 0.24, and when the refractive index n of the second insulating layer 13 is 1.75, it is 0.29. According to this, as the refractive index of the second insulating layer 13 is smaller, the transmittance is improved. When n = 1.65, the transmittance is approximately 99.3%, and when n = 1.70, the transmittance is approximately 98.8. %, N = 1.75, the transmittance is approximately 98.4%.

  In contrast, the second insulating layer 13 has a two-layer structure with different refractive indexes. Specifically, the refractive index of the first layer 13a is set to three types as in the case of one layer, and the film thickness is set to 2900 nm. When the thickness of the second layer 13b is 100 nm and the refractive index of the first layer 13a is 1.65, the refractive index of the second layer 13b is 1.55. At this time, the difference in refractive index between the second layer 13b and the third interlayer insulating film 14 is 0.09. In addition, when the refractive index of the first layer 13a is 1.70, the refractive index of the second layer 13b is 1.58. At this time, the difference in refractive index between the second layer 13b and the third interlayer insulating film 14 is 0.12. Further, when the refractive index of the first layer 13a is 1.75, the refractive index of the second layer 13b is set to 1.61. At this time, the refractive index difference between the second layer 13b and the third interlayer insulating film 14 is 0.15. According to this, as the refractive index of the second layer 13b is smaller, the transmittance is improved. When the refractive index of the first layer 13a is n = 1.65, the transmittance is approximately 99.6%, and the refractive index of the first layer 13a. When the rate is n = 1.70, the transmittance is about 99.3%, and when the refractive index of the first layer 13a is n = 1.75, the transmittance is about 99.0%. Therefore, it can be seen that the transmittance is improved as compared with the case where the second insulating layer 13 is a single layer (one layer).

  Next, the second insulating layer 13 has a three-layer structure with different refractive indexes. Specifically, the refractive index of the first layer 13a is set to three types as in the case of one layer, and the film thickness is set to 2800 nm. The film thickness of the second layer 13b is 100 nm, and the film thickness of the third layer 13c is also 100 nm. When the refractive index of the first layer 13a is 1.65, the refractive index of the second layer 13b is 1.58, and the refractive index of the third layer 13c is 1.52. At this time, the refractive index difference between the third layer 13c and the third interlayer insulating film 14 is 0.06. In addition, when the refractive index of the first layer 13a is 1.70, the refractive index of the second layer 13b is 1.62, and the refractive index of the third layer 13c is 1.54. At this time, the refractive index difference between the third layer 13c and the third interlayer insulating film 14 is 0.08. When the refractive index of the first layer 13a is 1.75, the refractive index of the second layer 13b is 1.65, and the refractive index of the third layer 13c is 1.55. At this time, the refractive index difference between the third layer 13c and the third interlayer insulating film 14 is 0.09. According to this, as the refractive index of the third layer 13c is smaller, the transmittance is improved. When the refractive index of the first layer 13a is n = 1.65, the transmittance is approximately 99.6%, and the refractive index of the first layer 13a. When the rate is n = 1.70, the transmittance is about 99.4%, and when the refractive index of the first layer 13a is n = 1.75, the transmittance is about 99.1%. Therefore, it can be seen that the transmittance is slightly improved as compared with the case where the second insulating layer 13 is made of two layers having different refractive indexes.

  Thereafter, similarly, the total film thickness is fixed at 3000 nm, the number of layers having different refractive indexes constituting the second insulating layer 13 is increased, and the refractive index difference between adjacent layers in the thickness direction becomes 0.05 or less. Thus, the transmittance | permeability was calculated | required by simulating about the example which made the number of layers 4 layers or more. When the number of layers is four or more, although slightly improved on the higher refractive index side than the three layers, the transmittance is approximately 99.6% when the refractive index of the first layer 13a is n = 1.65, and the first layer 13a. When the refractive index of n = 1.70, the transmittance is approximately 99.4%, and when the refractive index of the first layer 13a is n = 1.75, the transmittance is approximately 99.2%. In other words, the transmittance was flat for four or more layers.

  According to the result of the transmittance shown in FIG. 13, as the configuration of the second insulating layer 13, the transmittance is improved as the number of layers having different refractive indexes is increased. Moreover, the transmittance | permeability becomes flat by making the number of layers into four or more layers. The difference in refractive index between adjacent layers in the thickness direction when the transmittance is flat is 0.05 or less.

  In the second insulating layer 13, the smaller the refractive index of the first layer 13a, the better the transmittance. However, the refractive index difference with the third interlayer insulating film 14 stacked on the second insulating layer 13 is less than 0.2. It is preferable to do. On the other hand, from the viewpoint of reflecting a part of the light incident on the opening region by the side wall 12a of the first insulating layer, the refractive index satisfies the condition of n1 <n2 according to Snell's law as described above. Preferably, the critical angle θc is reduced by increasing the difference between the refractive index n1 of the first insulating layer 13 and the refractive index n2 of the first layer 13a in the second insulating layer 13. That is, the difference between the refractive index n1 of the first insulating layer and the refractive index of the first layer 13a is preferably 0.1 or more. More specifically, the refractive index of the first insulating layer and the refractive index of the third interlayer insulating film 14 are set to 1.46, and the refractive index n2 of the first layer 13a is set to 1.75 or more. It is preferable that the number of layers constituting the layer is two or more. When the number of layers of the second insulating layer 13 is two or more, it is desirable that the difference in refractive index between adjacent layers in the thickness direction is as small as possible. However, considering productivity, it is substantially 0.05 or more and 0.15 or less. It is preferable that

According to the manufacturing method of the liquid crystal device 100 and the element substrate 10 of the above embodiment, the following effects are obtained.
(1) In the element substrate 10, the TFT 30 is disposed between the scanning line 3 as the first light shielding layer and the data line 6 as the second light shielding layer in the non-opening region of the pixel P. Then, a plurality of insulating films (first insulating layers) having a refractive index n1 including the second interlayer insulating film 12 covering the data lines 6 are etched to form the recesses 12b in the opening regions on the base material 10s. The first insulating layer 13a, the second layer 13b, and the third layer 13c having different refractive indexes are stacked in the concave portion 12b so that the refractive index decreases from n2 as the distance from the base material 10s increases in the thickness direction. 13 is filled and flattened. The second insulating layer 13 includes at least a first layer 13a having a refractive index n2 in contact with the side wall 12a of the first insulating layer, and the refractive index is changed so as to decrease from n2 as the distance from the base material 10s increases in the thickness direction. including. Therefore, according to Snell's law, light incident on the side wall 12a from the opening region is reflected by the side wall 12a and guided to the opening region side. In addition, a third interlayer insulating film 14 having the same refractive index as that of the second interlayer insulating film 12 is stacked on the second insulating layer 13. Since the difference in refractive index between the portion where the refractive index of the second insulating layer 13 is reduced and the third interlayer insulating film 14 is reduced, light is reflected at the interface between the second insulating layer 13 and the third interlayer insulating film 14. Is suppressed. That is, the light incident on the opening region is suppressed from being transmitted and diffused through the element substrate 10, so that the light incident on the opening region and emitted from the element substrate 10 increases. That is, it is possible to provide or manufacture the liquid crystal device 100 in which the utilization efficiency of light incident on the aperture region is improved and a bright display is possible.

  (2) Since the second interlayer insulating film 12 constituting the first insulating layer covers the data line 6 as the second light-shielding layer disposed immediately above the TFT 30, the light traveling toward the end of the data line 6 Is also reflected by the side wall 12a of the first insulating layer. Therefore, the light that is diffracted at the end of the data line 6 and is incident on the TFT 30 is suppressed, so that the occurrence of light leakage current caused by the light incident on the TFT 30 is suppressed.

  (3) In the second insulating layer 13, the portion where the refractive index has changed so as to decrease from n 2 as the distance from the base material 10 s in the thickness direction is composed of at least two layers having different refractive indexes and is adjacent in the thickness direction. The refractive index difference of the layer to be performed is 0.05 or more and 0.15 or less. Accordingly, when light passes through the second insulating layer 13, it becomes difficult to reflect at the interface between adjacent layers, so that the transmittance of light passing through the opening region is improved.

  (4) The refractive index n1 of the first insulating layer constituting the recess 12b in the opening region, and the refractive index n2 of the portion of the second insulating layer 13 (first layer 13a) in contact with the side wall 12a of the first insulating layer The difference is 0.1 or more. Therefore, according to Snell's law, the critical angle θc at the side wall 12a is relatively small, so that light incident on the side wall 12a is easily totally reflected. That is, the utilization efficiency of light incident on the aperture region is further improved.

(Second Embodiment)
<Electronic equipment>
Next, a projection display device will be described as an example of the electronic apparatus of the present embodiment. FIG. 14 is a schematic diagram illustrating a configuration of a projection display device as an electronic apparatus.

  As shown in FIG. 14, a projection display apparatus 1000 as an electronic apparatus according to the present embodiment includes a polarization illumination apparatus 1100 arranged along the system optical axis L, and two dichroic mirrors 1104 and 1105 as light separation elements. Three reflection mirrors 1106, 1107, 1108, five relay lenses 1201, 1202, 1203, 1204, 1205, three transmissive liquid crystal light valves 1210, 1220, 1230 as light modulation means, and a light combining element As a cross dichroic prism 1206 and a projection lens 1207.

  The polarized light illumination device 1100 is generally configured by a lamp unit 1101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 1102, and a polarization conversion element 1103.

  The dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 1100. Another dichroic mirror 1105 reflects the green light (G) transmitted through the dichroic mirror 1104 and transmits the blue light (B).

The red light (R) reflected by the dichroic mirror 1104 is reflected by the reflection mirror 1106 and then enters the liquid crystal light valve 1210 via the relay lens 1205.
Green light (G) reflected by the dichroic mirror 1105 enters the liquid crystal light valve 1220 via the relay lens 1204.
The blue light (B) transmitted through the dichroic mirror 1105 enters the liquid crystal light valve 1230 via a light guide system including three relay lenses 1201, 1202, 1203 and two reflection mirrors 1107, 1108.

  The liquid crystal light valves 1210, 1220, and 1230 are disposed to face the incident surfaces of the cross dichroic prism 1206 for each color light. The color light incident on the liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 1206. In this prism, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected on the screen 1300 by the projection lens 1207 which is a projection optical system, and the image is enlarged and displayed.

  The liquid crystal light valve 1210 is the one to which the liquid crystal device 100 of the first embodiment described above is applied. A pair of polarizing elements arranged in crossed Nicols are arranged with a gap between the color light incident side and the emission side of the liquid crystal panel 110. The same applies to the other liquid crystal light valves 1220 and 1230.

  According to such a projection type display device 1000, since the liquid crystal device 100 is used as the liquid crystal light valves 1210, 1220, 1230, a bright display is possible and a high contrast can be realized. A projection display device 1000 having quality can be provided.

  The present invention is not limited to the above-described embodiments, and various modifications can be made as appropriate without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. Electronic equipment to which the electro-optical device is applied is also included in the technical scope of the present invention. Various modifications other than the above embodiment are conceivable. Hereinafter, a modification will be described.

  (Modification 1) The structure of the element substrate 10 is not limited to the first embodiment, and the first light-shielding layer disposed in the non-opening region is not limited to the scanning line 3, and for example, A simple light shielding layer may be used. Further, the second light-shielding layer disposed above the TFT 30 is not limited to the data line 6 positioned immediately above, and is on the light incident side to the TFT 30 from the viewpoint of shielding light incident on the TFT 30. A wiring layer as far as possible from the TFT 30 is preferably the second light shielding layer.

  (Modification 2) The electronic apparatus to which the liquid crystal device 100 of the first embodiment can be applied is not limited to the projection display device 1000 of the second embodiment. For example, by providing a liquid crystal device with a color filter having a colored layer on a pixel, a projection-type HUD (head-up display), a direct-view HMD (head-mounted display), an electronic book, a personal computer, a digital still camera It can be suitably used as a display unit of information terminal devices such as liquid crystal televisions, viewfinder type or monitor direct view type video recorders, car navigation systems, electronic notebooks, and POSs.

  DESCRIPTION OF SYMBOLS 3 ... Scanning line as 1st light shielding layer, 6 ... Data line as 2nd light shielding layer, 10s ... Base material, 30 ... Thin-film transistor (TFT), 12 ... 2nd interlayer insulation film which comprises 1st insulating layer, DESCRIPTION OF SYMBOLS 12a ... Side wall of 1st insulating layer, 12b ... Recessed part, 13 ... 2nd insulating layer, 100 ... Liquid crystal device as an electro-optical device, 1000 ... Projection type display apparatus as electronic equipment.

Claims (5)

On the substrate, a first light shielding layer and a second light shielding layer provided in a non-opening region surrounding the opening region of the pixel and arranged at an interval in the thickness direction of the substrate,
A transistor provided for each pixel between the first light-shielding layer and the second light-shielding layer;
A first insulating layer that covers the second light-shielding layer, protrudes from the non-opening region to the opening region, and has a side wall inside the edge of the opening region;
A second insulating layer provided in the opening region and filling a recess including a side wall of the first insulating layer,
When the refractive index of the first insulating layer is n1, and the refractive index of the portion of the second insulating layer in contact with the side wall of the first insulating layer is n2, the relationship of n1 <n2 is satisfied, and the second insulating layer Is an electro-optical device including a portion in which the refractive index is changed so as to decrease from n2 as the distance from the base material increases in the thickness direction in the concave portion.   2. The electro-optical device according to claim 1, wherein the second insulating layer includes a layer in which the refractive index is changed stepwise so as to decrease from n <b> 2 as the distance from the base material increases in the thickness direction in the concave portion.   The electro-optical device according to claim 2, wherein a difference in refractive index between layers adjacent to the base material in the thickness direction in the second insulating layer is 0.05 or more and 0.15 or less.   The electro-optical device according to any one of claims 1 to 3, wherein a difference between the refractive index n1 and the refractive index n2 is 0.1 or more.   An electronic apparatus comprising the electro-optical device according to claim 1.

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