JP2019088104A - Driving device of power semiconductor element - Google Patents

Abstract

To suppress fluctuation when a threshold voltage has a fluctuation in a power semiconductor element.SOLUTION: Power semiconductor elements SW1 and SW2 made of silicon carbide (SiC) have gates each connected with a driving device 1U for an upper arm and a driving device 1D for a lower arm. The driving device 1U for the upper arm has: a threshold value detecting part 2U for detecting a threshold voltage of the power semiconductor element SW1; and a threshold value fluctuation suppression part 3U for applying a gate signal for suppressing the fluctuation of the threshold voltage in accordance with the detected fluctuation of the threshold voltage to the power semiconductor element SW1. The driving device 1D for the lower arm has: a threshold value detecting part 2D for detecting a threshold voltage of the power semiconductor element SW2; and a threshold value fluctuation suppression part 3D for applying a gate signal for suppressing the fluctuation of the threshold voltage in accordance with the detected fluctuation of the threshold voltage to the power semiconductor element SW2.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a drive device for a power semiconductor device, and more particularly to a drive device for a power semiconductor device that suppresses variation in threshold voltage of the power semiconductor device while driving a power semiconductor device using a wide band gap semiconductor.

  A wide band gap semiconductor device represented by a silicon carbide (SiC) semiconductor device as a next-generation power semiconductor device is capable of higher withstand voltage, lower loss, high-speed switching, high temperature operation, etc. than silicon (Si) semiconductor devices. Attention has been paid. However, it is known that the quality of the gate oxide film of the SiC semiconductor device is lower than that of the Si semiconductor device. This is a variable factor of the threshold voltage in a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor). In the power semiconductor switching element, if the threshold voltage Vth at the boundary between the on state and the off state fluctuates abnormally, there is a risk that a circuit failure may occur due to a false on or the like. In order to prevent such an abnormal fluctuation of the threshold voltage Vth, a method of manufacturing a SiC semiconductor device for improving the quality of the gate oxide film has been proposed (Patent Documents 1 and 2).

  There is also known a technique in which an abnormal fluctuation of the threshold voltage Vth is suppressed by devising a circuit (Patent Document 3). In Patent Document 3, the threshold voltage Vth fluctuates in the positive direction when the gate voltage applied to the gate electrode of the power semiconductor device is positive, whereas the power semiconductor device has a negative gate in the non-conduction period. By applying a voltage, the fluctuation of the threshold voltage Vth is suppressed. When a negative gate voltage is applied during the non-conduction period of the power semiconductor device, if there is a case where a reflux current flows in the power semiconductor device, the reflux current flows in the built-in diode. Since the built-in diode does not have good conduction performance, the application of a negative voltage to the gate electrode of the power semiconductor element performed to suppress the fluctuation of the threshold voltage Vth is performed while the return current does not flow through the built-in diode. There is. Thereby, the fluctuation of the threshold voltage of the transistor is suppressed while suppressing the deterioration of the conduction performance of the free wheeling diode.

JP, 2016-213414, A International Publication No. 2011/072427 JP, 2013-207821, A

  However, in the method of suppressing the fluctuation of the threshold voltage according to Patent Document 3, in order to detect that the return current does not flow in the built-in diode, current detection means for detecting the current flowing from the power conversion circuit toward the load is provided. ing. Further, since the fluctuation of the threshold voltage occurs when the power semiconductor device is driven for a certain time, the fluctuation of the threshold voltage is not always suppressed while the power semiconductor device is being driven.

  The present invention has been made in view of such a point, and when a variation in threshold voltage occurs in a power semiconductor device, the variation in threshold voltage is suppressed according to the variation. It aims at providing a drive.

  In the present invention, in order to solve the above-mentioned subject, a drive device of a power semiconductor element is provided. The power semiconductor device driving apparatus includes a threshold detection unit that detects a threshold voltage of the power semiconductor device, and a gate signal that suppresses the fluctuation of the threshold voltage according to the fluctuation of the threshold voltage detected by the threshold detection unit. And a threshold variation suppression unit applied to the

  According to such a drive device for a power semiconductor device, even if the threshold voltage fluctuates when driven for a fixed time, the power semiconductor device is driven so that the threshold voltage fluctuates in the direction opposite to the fluctuation direction. The fluctuation of the threshold voltage prevents the power semiconductor device from malfunctioning.

  The drive device for the power semiconductor device of the above configuration operates to suppress the variation of the threshold voltage according to the variation of the threshold voltage of the power semiconductor device, so that the power semiconductor device does not malfunction as it is erroneously turned on It has the advantage of

It is a figure which shows the output part of the switching regulator to which the drive device of the power semiconductor element which concerns on 1st Embodiment is applied. It is a figure showing the drive device of the power semiconductor element concerning a 2nd embodiment. It is a figure which shows the relationship between the voltage between drain source | sauce in the power state of a power semiconductor element, and a threshold voltage. It is a figure which shows the fluctuation | variation of the threshold voltage when a reverse conduction test is done when a SiC element is driven for a definite period of time. It is a flowchart which shows the flow of operation | movement of the drive device of the power semiconductor element which concerns on 2nd Embodiment. It is a figure showing the example of a waveform of the gate voltage of a power semiconductor element, and (A) shows the case where synchronous rectification is not performed, and (B) shows the case where synchronous rectification is performed. It is a figure which shows the example of a waveform of the gate voltage of the power semiconductor element at the time of threshold voltage change suppression control. It is a figure showing the drive device of the power semiconductor element concerning a 3rd embodiment. It is a figure which shows the gate resistance circuit at the time of the OFF of a power semiconductor element. It is a figure which shows the waveform of the gate voltage at the time of OFF at the time of driving a power semiconductor element for a definite period of time. It is a figure which shows the tendency of the change of the threshold value fluctuation when driving a power semiconductor element for a definite period of time. It is a flowchart which shows the flow of operation | movement of the drive device of the power semiconductor element which concerns on 3rd Embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings by taking as an example a case where the present invention is applied to a synchronous rectification switching regulator using two power semiconductor devices of wide band gap semiconductors. In the drawings, parts denoted by the same reference numerals indicate the same components. In addition, each embodiment can be implemented by partially combining a plurality of embodiments as long as no contradiction occurs.

First Embodiment
FIG. 1 is a view showing an output portion of a switching regulator to which a drive device for a power semiconductor device according to a first embodiment is applied.

  In the output part of the switching regulator, the power semiconductor element SW1 for the upper arm and the power semiconductor element SW2 for the lower arm are connected in series between the power supply and the ground. Here, the power semiconductor elements SW1 and SW2 are silicon carbide MOSFETs (SiC-MOSFETs), and each has a built-in diode. The connection point between the source of the power semiconductor element SW1 and the drain of the power semiconductor element SW2 is connected to one terminal of the inductor L, and the other terminal of the inductor L is connected to one terminal of the capacitor C. The other terminal of the capacitor C is connected to the source of the power semiconductor element SW2.

  The gate of the power semiconductor element SW1 is connected to the upper arm driving device 1U. The upper arm drive device 1U has a threshold detection unit 2U that detects the threshold voltage Vth of the power semiconductor element SW1, and a threshold fluctuation suppression unit 3U that suppresses the fluctuation of the threshold voltage Vth of the power semiconductor element SW1. The gate of the power semiconductor element SW2 is connected to the lower arm drive device 1D. The lower arm drive device 1D includes a threshold detection unit 2D that detects the threshold voltage Vth of the power semiconductor device SW2, and a threshold fluctuation suppression unit 3D that suppresses the fluctuation of the threshold voltage Vth of the power semiconductor device SW2.

  In the switching regulator configured as described above, the power semiconductor elements SW1 and SW2 alternately perform the switching operation, whereby the input voltage Vin is converted to the voltage Vout and supplied to a load not shown. That is, when the power semiconductor element SW1 is driven to turn on, a current flows to the load through the inductor L. Next, when the power semiconductor element SW1 is turned off, the current flowing to the inductor L tries to maintain the flow. At this time, when the power semiconductor device SW2 is turned on in synchronization with the off operation of the power semiconductor device SW1, a reverse conduction current path is formed by the power semiconductor device SW2, and a reverse current flows from the source to the drain of the power semiconductor device SW2. Flows. As a result, current flows in the same direction continuously in the load.

  At this time, in the upper arm drive unit 1U, the threshold detection unit 2U monitors the threshold voltage Vth of the power semiconductor element SW1. Here, when the threshold detection unit 2U detects an abnormal fluctuation of the threshold voltage Vth, the threshold fluctuation suppression unit 3U drives the gate of the power semiconductor element SW1 so as to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW1. Similarly, in the lower arm drive device 1D, the threshold detection unit 2D monitors the threshold voltage Vth of the power semiconductor element SW2. Here, when the threshold detection unit 2D detects an abnormal fluctuation of the threshold voltage Vth, the threshold fluctuation suppression unit 3D drives the gate of the power semiconductor element SW2 so as to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW2.

  As described above, when the abnormal fluctuation of the threshold voltage Vth is not detected, the upper arm driving device 1U and the lower arm driving device 1D drive the power semiconductor elements SW1 and SW2 by the usual control. Upper arm drive device 1U and lower arm drive device 1D move the drive method of power semiconductor elements SW1 and SW2 in the direction in which the fluctuation of threshold voltage Vth is suppressed only when an abnormal fluctuation of threshold voltage Vth is detected. Have switched.

  In this embodiment, the power semiconductor elements SW1 and SW2 are formed of SiC-MOSFETs. However, the power semiconductor elements SW1 and SW2 may be formed of a combination of IGBTs of SiC elements and FWD (Free Wheeling Diode).

Second Embodiment
FIG. 2 is a diagram showing a driving device of a power semiconductor device according to a second embodiment, FIG. 3 is a diagram showing a relationship between drain-source voltage and threshold voltage when the power semiconductor device is on, FIG. It is a figure which shows the fluctuation | variation of the threshold voltage when a reverse conduction test is done when a SiC element is driven for a definite period of time. FIG. 5 is a flow chart showing the flow of the operation of the drive device for a power semiconductor device according to the second embodiment. Note that the upper arm drive unit 1U and the lower arm drive unit 1D described in the first embodiment have the same configuration, so in this second embodiment, only one of the configurations is used. And the other configuration is omitted. Therefore, in the following, the reference numerals indicating the elements are simplified, particularly when the elements of the upper and lower arms are described without distinction. That is, the power semiconductor elements SW1 and SW2 are used as the power semiconductor elements SW, and the upper arm drive unit 1U and the lower arm drive unit 1D are used as the drive unit 1. Further, the threshold detection unit 2U and the threshold detection unit 2D are the threshold detection unit 2, and the threshold variation suppression unit 3U and the threshold variation suppression unit 3D are the threshold variation suppression unit 3.

  The drive device 1 of the power semiconductor element SW includes a voltage detection unit 11, a conversion unit 12, a comparison unit 13, a gate driver 14, and switching elements Tr1, Tr2, and Tr3. Here, the voltage detection unit 11 and the conversion unit 12 constitute the threshold detection unit 2, and the comparison unit 13, the gate driver 14 and the switching elements Tr 1, Tr 2 and Tr 3 constitute the threshold fluctuation suppression unit 3.

  The input of the voltage detection unit 11 of the threshold detection unit 2 is connected to the drain and the source of the power semiconductor element SW, and the output is connected to the input of the conversion unit 12. The output of the conversion unit 12 is connected to the input of the comparison unit 13 of the threshold variation suppression unit 3, and the output of the comparison unit 13 is connected to the input of the gate driver 14. The output of the gate driver 14 is connected to the gates of the switching elements Tr1, Tr2 and Tr3. The drain of the switching element Tr1 is connected to the power supply of the voltage VH, the drain of the switching element Tr2 is connected to the power of the voltage VL, and the drain of the switching element Tr3 is connected to the power of the voltage VM. Voltages VH, VL and VM have a relationship of VH> VM> VL. The sources of the switching elements Tr1, Tr2 and Tr3 are connected to the gate of the power semiconductor element SW.

  The voltage detection unit 11 connected to the drain and the source of the power semiconductor element SW detects the voltage Von between the drain and the source (main electrode) when the power semiconductor element SW is on. Since it is difficult to directly detect the threshold voltage Vth of the power semiconductor element SW in operation, the detection of the voltage Von is intended to indirectly detect the threshold voltage Vth from the voltage Von. That is, as shown in FIG. 3, the fluctuation of the voltage Von between the drain and the source when the power semiconductor element SW is on is correlated with the fluctuation of the threshold voltage Vth. That is, the voltage Von and the threshold voltage Vth have a proportional relationship in which the threshold voltage Vth also rises when the voltage Von rises, and the threshold voltage Vth also falls when the voltage Von falls. The threshold detection unit 2 detects the voltage Von using this relationship to obtain the threshold voltage Vth having a correlation with the voltage Von, and estimates the fluctuation of the threshold voltage Vth.

  The detection of the voltage Von may be performed by stopping the operation of the switching regulator and then turning on the power semiconductor element SW, but preferably, it is preferable to perform real-time detection. The timing of detection may be performed for each switching or may be performed at fixed time intervals. However, if the detection interval is too long, the voltage Von may greatly fluctuate during that time, so it is desirable to perform the detection at regular intervals not exceeding 100 hours.

  Thereafter, in the conversion unit 12, the fluctuation of the threshold voltage Vth is estimated from the fluctuation of the detected voltage Von. The estimated threshold voltage Vth is sent to the comparison unit 13 of the threshold variation suppression unit 3.

  In the threshold variation suppression unit 3, the comparison unit 13 grasps the electrical characteristic of the power semiconductor element SW corresponding to the variation of the estimated threshold voltage Vth, and the gate driver 14 determines the variation according to the variation of the estimated threshold voltage Vth. The power semiconductor element SW is driven to suppress the fluctuation. Further, the comparison unit 13 needs to set an allowable value of the threshold voltage Vth.

  The electrical characteristics of the power semiconductor element SW and the allowable value of the threshold voltage Vth may vary depending on the semiconductor material, the gate structure, the element structure, the element manufacturing process, etc. desirable.

  Here, FIG. 4 shows the fluctuation of the threshold voltage Vth when the reverse conduction test is performed on a certain SiC element. In FIG. 4, the threshold voltage Vth is defined as a gate-source voltage Vgs when the drain current Ids = 18 mA and the drain-source voltage Vds = 20 V in this SiC element, and in this SiC element It is 2V. The current used as the reference of the threshold voltage Vth is arbitrary, but it is desirable to be about 1/1000 of the rated current. According to FIG. 4, when the voltage Vgs between the gate and the source is set to a negative value and a reverse conducting current is supplied to the built-in diode, the threshold voltage Vth fluctuates in the direction of decreasing. Further, when the reverse conduction current flows when the gate-source voltage Vgs is +2.5 V to +5 V, the threshold voltage Vth is increased. This voltage region is called an inversion region. Furthermore, when the gate-source voltage Vgs is Vgs> +7.5 V, the channel is completely in the strong inversion region, and at this time, the fluctuation of the threshold voltage Vth is substantially eliminated. This strong inversion region is usually called reverse conduction, and is the region most used when reverse conduction in synchronous rectification. Then, the allowable value of the threshold voltage Vth is determined with respect to the initial value in such a range that there is no occurrence of erroneous on or an increase in loss on the circuit, and is set to, for example, about initial value ± 0.1V.

  The comparison unit 13 determines the method of coping with the fluctuation of the threshold voltage Vth based on the electrical characteristics of the SiC element as described above. That is, the comparison unit 13 determines whether the variation of the threshold voltage Vth is within the range of the tolerance, whether the variation of the threshold voltage Vth is higher than the tolerance, and the variation of the threshold voltage Vth is greater than the tolerance Compare and judge whether it is low. Here, when the threshold voltage Vth fluctuates from the electrical characteristics of FIG. 4, the gate-source voltage Vgs may be set to an operating condition that fluctuates in the direction in which the threshold voltage Vth rises. I understand. Conversely, when the threshold voltage Vth fluctuates in the rising direction, it is understood that the gate-source voltage Vgs may be set to an operating condition that fluctuates in the direction in which the threshold voltage Vth decreases. That is, if the threshold voltage Vth fluctuates in a direction lower than the allowable value, the inversion region is reversely conductive, and if the threshold voltage Vth fluctuates in a direction higher than the allowable value, the built-in diode is reversely conductive.

  The gate driver 14 varies the gate voltage Vg of the power semiconductor element SW based on the determination result of the comparison unit 13. That is, if the threshold voltage Vth fluctuates in the direction lower than the allowable value, the gate driver 14 turns on the switching element Tr3 to set the gate voltage Vg of the power semiconductor element SW to, for example, 5 V of the voltage VM. As a result, in the power semiconductor device SW, the inversion region becomes reverse conduction, and the power semiconductor device SW operates under the condition that the threshold voltage Vth rises. Conversely, if the threshold voltage Vth fluctuates in a direction higher than the allowable value, the gate driver 14 turns on the switching element Tr2 to set the gate voltage Vg of the power semiconductor element SW to, for example, -10 V of the voltage VL. As a result, the power semiconductor element SW has an operating condition in which the built-in diode is reversely conductive and the threshold voltage Vth is lowered. Further, if threshold voltage Vth is within the allowable range and hardly fluctuates, gate driver 14 turns on switching element Tr1 to set gate voltage Vg of power semiconductor element SW to, for example, 15 V of voltage VH. . As a result, the power semiconductor element SW is normally reverse conductive, and the operating condition is such that the threshold voltage Vth does not change.

  Here, the gate driver 14 has been described focusing on suppressing the fluctuation of the threshold voltage Vth, but it is also used in normal control for turning on / off the power semiconductor element SW. That is, when the power semiconductor element SW is turned on, the gate driver 14 turns on the switching element Tr1, and when the power semiconductor element SW is turned off, the switching element Tr2 is turned on. doing.

  Next, the overall operation of the drive device for the power semiconductor element SW described above will be described. In the drive device of the power semiconductor device SW, as shown in FIG. 5, first, the voltage detection unit 11 detects the voltage Von between the drain and the source when the power semiconductor device SW is in the on state (step S1). Next, using the relationship between the voltage Von and the threshold voltage Vth, the conversion unit 12 obtains the threshold voltage Vth corresponding to the detected voltage Von, and estimates the fluctuation of the threshold voltage Vth (step S2). The comparison unit 13 compares the estimated threshold voltage Vth with a preset allowable value (step S3), and determines whether the estimated threshold voltage Vth is lower than the allowable value (step S4). If it is determined in step S4 that the threshold voltage Vth is lower than the allowable value, the gate driver 14 turns on the switching element Tr3 to place the power semiconductor element SW in the reverse region reverse conduction state (step S5).

  If it is determined in step S4 that the threshold voltage Vth is not lower than the allowable value, the comparison unit 13 determines whether the threshold voltage Vth is within the allowable value (step S6). In step S6, when it is determined that the threshold voltage Vth is within the allowable value, the gate driver 14 turns on the switching element Tr1 to place the power semiconductor element SW in a normal reverse conduction state (step S7). If it is determined in step S6 that the threshold voltage Vth is higher than the allowable value, the gate driver 14 turns on the switching element Tr2 to set the power semiconductor element SW in the reverse conduction state of the built-in diode (step S8).

  When the driving of the power semiconductor element SW by the gate driver 14 and the switching elements Tr1, Tr2 and Tr3 is finished, the driving device of the power semiconductor element SW continues the operation for a predetermined time (step S9). That is, the drive device of the power semiconductor element SW holds the determination result by the comparison unit 13 and continues the fluctuation suppression control for a certain period of time using the determination result. After the elapse of a predetermined time, the drive device of the power semiconductor element SW returns to step S1 and resumes the detection of the voltage Von between the drain and the source.

  Next, the mutual operation of the two power semiconductor elements SW1 and SW2 when the drive device for the power semiconductor element SW is applied to the output portion of the switching regulator shown in FIG. 1 will be described.

  FIG. 6 is a view showing a waveform example of the gate voltage of the power semiconductor device, where (A) shows a case where synchronous rectification is not performed and (B) shows a case where synchronous rectification is performed. FIG. 7 is a diagram showing an example of the waveform of the gate voltage of the power semiconductor element at the time of threshold voltage fluctuation suppression control.

  The power semiconductor elements SW1 and SW2 are driven by a gate signal of PWM (Pulse Width Modulation) control. Here, when synchronous rectification is not performed, as shown in FIG. 6A, a period during which a gate signal of PWM control is applied to one of the power semiconductor elements SW1 and SW2 is applied to the other gate. A gate voltage Vg of a constant voltage VL is applied. At this time, for example, during a period in which a gate signal of PWM control is applied to the gate of power semiconductor element SW1 of the upper arm, the return current flowing after gate voltage Vg transitions from voltage VH to voltage VL is a power semiconductor Only the built-in diode antiparallel connected to the element SW2 flows.

  On the other hand, when synchronous rectification is performed, as shown in FIG. 6B, while the gate signal of PWM control is applied to one of the power semiconductor elements SW1 and SW2, synchronous rectification is performed to the other gate. The gate signal of PWM control for is applied. Here, while the gate signal of PWM control for synchronous rectification is applied, the other of the power semiconductor elements SW1 and SW2 is normally in the reverse conductive state.

  Next, the case where the threshold voltage fluctuation suppression control shown in FIG. 7 is performed on the power semiconductor element SW1 or SW2 will be described. In the example illustrated in FIG. 7, threshold voltage fluctuation suppression control is performed only on the power semiconductor element SW2, and threshold voltage fluctuation suppression control is not performed on the power semiconductor element SW1.

  In the power semiconductor device SW2, when the threshold voltage Vth is higher than the allowable value, the gate driver 14 keeps the switching device Tr2 ON while keeping the gate voltage at the voltage VL while the power semiconductor device SW1 performs PWM control. And synchronous rectification is not done. In the power semiconductor element SW2, the gate voltage Vg which changes in the direction in which the threshold voltage Vth decreases is applied to the gate. Further, while the power semiconductor device SW2 is under PWM control, a gate signal of PWM control for synchronous rectification is applied to the gate of the power semiconductor device SW1.

  When the threshold voltage Vth of the power semiconductor device SW2 is within the allowable value, the gate driver 14 uses the switching devices Tr1 and Tr2 to synchronously rectify the power semiconductor device SW2 while the power semiconductor device SW1 is under PWM control. PWM control is performed. That is, the gate driver 14 turns on the switching element Tr1 at the timing of turning on the power semiconductor element SW2, and turns on the switching element Tr2 at timing of turning off the power semiconductor element SW2. Thus, the gate voltage of the power semiconductor device SW2 is the voltage VH when it is on, and the gate voltage is the voltage VL when the power semiconductor device SW2 is off. That is, to the gate of the power semiconductor element SW2 at this time, voltages VH and VL of normal values not requiring the threshold voltage fluctuation suppression control are applied. Further, while the power semiconductor device SW2 is under PWM control, a gate signal of PWM control for synchronous rectification is applied to the gate of the power semiconductor device SW1.

  When the threshold voltage Vth of the power semiconductor device SW2 is lower than the allowable value, the gate driver 14 uses the switching devices Tr2 and Tr3 to synchronously rectify the power semiconductor device SW2 while the power semiconductor device SW1 performs PWM control. PWM control is performed. That is, the gate driver 14 turns on the switching element Tr3 at the timing to turn on the power semiconductor element SW2, and turns on the switching element Tr2 at timing to turn the power semiconductor element SW2. As a result, the gate voltage of the power semiconductor element SW2 becomes the voltage VM when it is on, and the gate voltage becomes the voltage VL when it is off. As a result, in the power semiconductor element SW2, the gate voltage Vg that changes in the direction in which the threshold voltage Vth rises is applied to the gate. Further, while the power semiconductor device SW2 is under PWM control, a gate signal of PWM control for synchronous rectification is applied to the gate of the power semiconductor device SW1.

  Although the case where threshold voltage fluctuation | variation suppression control was applied to power semiconductor device SW2 of a lower arm was shown in the example of the above FIG. 7, it is applicable to power semiconductor device SW1 of an upper arm similarly. In this case, the threshold voltage fluctuation suppression control of the power semiconductor element SW1 of the upper arm is performed in a time zone different from the threshold voltage fluctuation suppression control of the power semiconductor element SW2 of the lower arm.

Third Embodiment
FIG. 8 is a view showing a drive device of a power semiconductor element according to the third embodiment, and FIG. 9 is a view showing a gate resistance circuit of the power semiconductor element when it is off. FIG. 10 shows the waveform of the gate voltage when the power semiconductor device is driven for a certain period of time, and FIG. 11 shows the tendency of change in threshold voltage when the power semiconductor device is driven for a certain period of time It is. FIG. 12 is a flowchart showing the flow of the operation of the power semiconductor element drive device according to the third embodiment. In FIG. 8, the same or equivalent constituent elements as the constituent elements shown in FIG. 2 are designated by the same reference numerals and their detailed description will be omitted.

  In the power semiconductor device drive device according to the third embodiment, the drive device of the power semiconductor device according to the second embodiment changes the gate voltage to suppress threshold voltage fluctuation, while the drive device of the power semiconductor device according to the second embodiment changes the gate voltage. The gate resistance is changed to suppress the threshold voltage fluctuation.

  The drive device 1 of the power semiconductor element SW includes a voltage detection unit 11, a conversion unit 12, a comparison unit 13, switching elements Tr11 and Tr12, a gate resistance Rg, an on-time gate resistance Rg (on) and an off-time gate resistance Rg (off) Is equipped. Here, the voltage detection unit 11 and the conversion unit 12 constitute the threshold detection unit 2, and the comparison unit 13 and the off-time gate resistance Rg (off) constitute the threshold fluctuation suppression unit 3.

  In the drive device 1, the gates of the switching elements Tr11 and Tr12 are connected to the input terminal 21 to which the gate signal is input via the gate resistance Rg. The drain of the switching element Tr11 is connected to the positive electrode gate voltage Vg (+), and the source of the switching element Tr11 is connected to one terminal of the on-time gate resistor Rg (on). The other terminal of the on-time gate resistor Rg (on) is connected to the gate of the power semiconductor element SW and one terminal of the off-time gate resistor Rg (off). The other terminal of the off-time gate resistance Rg (off) is connected to the source of the switching element Tr12, and the drain of the switching element Tr12 is connected to the negative gate voltage Vg (-). Here, the off-time gate resistance Rg (off) is a variable resistance whose control terminal is connected to the output of the comparison unit 13 and whose resistance value is changed by a control signal output from the comparison unit 13.

  The off-time gate resistance Rg (off) includes switching elements Tr13 and Tr14 and resistances Rg1 and Rg2 as illustrated in FIG. One terminal of each of the resistors Rg1 and Rg2 is connected to the other terminal of the on-time gate resistor Rg (on). The other terminal of the resistor Rg1 is connected to the source of the switching element Tr13, and the other terminal of the resistor Rg2 is connected to the source of the switching element Tr14. The drains of the switching elements Tr13 and Tr14 are connected to the source of the switching element Tr12, and the gates of the switching elements Tr13 and Tr14 are connected to the output of the comparing unit 13. In this off-time gate resistance Rg (off), the values of the resistances Rg1 and Rg2 are in the relationship of Rg1> Rg2.

  In the drive device for the power semiconductor element SW configured as described above, the voltage detection unit 11 detects the voltage Von between the drain and the source when the power semiconductor device SW is in the on state, and the conversion unit 12 detects the voltage Von detected. The fluctuation of the threshold voltage Vth is estimated from the fluctuation. The comparison unit 13 compares the variation of the estimated threshold voltage Vth with the tolerance of the threshold voltage Vth, and determines whether the variation of the threshold voltage Vth is lower than the tolerance of the threshold voltage Vth or the variation of the threshold voltage Vth is the threshold voltage Vth. Determine if it is within the tolerance of Note that the allowable value of the threshold voltage Vth is determined in such a range that there is no problem such as occurrence of erroneous on with respect to the initial value.

  Here, when the variation of the threshold voltage Vth is within the allowable value of the threshold voltage Vth, the comparison unit 13 outputs a control signal for turning on the switching element Tr13, and sets the off-time gate resistance Rg (off) to the resistance Rg1. Do. When the variation of the threshold voltage Vth is lower than the allowable value of the threshold voltage Vth, the comparison unit 13 outputs a control signal to turn on the switching element Tr14, and the off-state gate resistance Rg (off) has a smaller value than the resistance Rg1. Set to resistance Rg2.

  The threshold variation suppression control is based on the following electrical characteristics of the power semiconductor element SW. That is, when the power semiconductor element SW is driven for a certain period of time, as shown in FIG. 10, the magnitude of the undershoot voltage UV changes depending on the value of the off-time gate resistance Rg (off) as shown in FIG. Do. Note that the off-time gate resistance Rg (off) shows the case of decreasing in the order of A to D. Here, the undershoot voltage UV is defined by the size of the arrow in the figure (in the figure, it shows the bounce voltage when the off-time gate resistance Rg (off) is D). On the other hand, as shown in FIG. 11, when the undershoot voltage UV when the power semiconductor element SW is turned off is increased, the rise width of the threshold voltage Vth tends to be increased. From this, if the variation of the threshold voltage Vth is within the range of the allowable value, the gate voltage Vg at the time of off can be increased by setting the value of the gate resistance Rg (off) at the off time large (to a normal value). It can be seen that the generation of excessive undershoot voltage UV is suppressed. In addition, when the threshold voltage Vth is lower than the allowable value, the threshold voltage Vth may be controlled to increase. For this purpose, by setting the value of the off-time gate resistance Rg (off) smaller than a normal value, the off-time gate voltage Vg changes in the direction in which the undershoot voltage UV increases. As a result, since the rise width of the threshold voltage Vth becomes large, it is possible to suppress the threshold voltage Vth from largely deviating from the allowable value, and it is possible to suppress the fluctuation of the threshold voltage Vth of the power semiconductor element SW.

  In the threshold variation suppression control, detection of the threshold voltage Vth can be performed in real time while the power semiconductor element SW is operating, but the device may be stopped periodically to be individually detected. When the threshold voltage Vth at this time is within the allowable range, it is desirable to determine the normal value of the off-time gate resistance Rg (off), that is, the value of the resistance Rg1 in consideration of switching loss etc. . Further, the detection of the threshold voltage Vth and the switching of the off-time gate resistance Rg (off) should be performed at regular intervals.

  Next, the overall operation of the drive device for the power semiconductor element SW described above will be described. In the drive device of the power semiconductor device SW, as shown in FIG. 12, first, the voltage detection unit 11 detects the voltage Von between the drain and the source when the power semiconductor device SW is in the on state (step S11). Next, the conversion unit 12 obtains the threshold voltage Vth corresponding to the detected voltage Von using the relationship between the voltage Von and the threshold voltage Vth, and estimates the fluctuation of the threshold voltage Vth (step S12).

  The comparison unit 13 compares the estimated threshold voltage Vth with a preset allowable value (step S13), and determines whether the estimated threshold voltage Vth is within the allowable value (step S14). In step S14, when it is determined that the threshold voltage Vth is within the allowable value, the comparison unit 13 outputs a control signal to turn on the switching element Tr13, and sets the off-state gate resistance Rg (off) to the resistance Rg1 of the normal value. Switch (step S15). In step S14, when it is determined that the threshold voltage Vth is lower than the allowable value, the comparison unit 13 outputs a control signal to turn on the switching element Tr14, and the off-time gate resistance Rg (off) is smaller than the normal value. It switches to Rg2 (step S16).

  When the switching of the off-time gate resistance Rg (off) is completed, the drive device of the power semiconductor element SW continues the operation for a fixed time (step S17). After the elapse of a predetermined time, the drive device of the power semiconductor element SW returns to step S11, and restarts the detection of the voltage Von between the drain and the source.

  In the third embodiment, the off-time gate resistance Rg (off) is switched in two stages based on the detected threshold voltage Vth, but may be switched in three or more stages as needed. .

DESCRIPTION OF SYMBOLS 1 drive device 1D lower arm drive device 1U upper arm drive device 2 threshold detection unit 2D threshold detection unit 2U threshold detection unit 3 threshold value fluctuation suppression unit 3D threshold value fluctuation suppression unit 3U threshold value fluctuation suppression unit 11 voltage detection unit 12 conversion unit 13 Comparison unit 14 Gate driver 21 Input terminal C Capacitor L Inductor Rg (off) Gate resistance Rg (on) Gate resistance Rg on R Gate resistance Rg1, Rg2 Resistance SW, SW1, SW2 Power semiconductor elements Tr1, Tr2, Tr3, Tr11 , Tr12, Tr13, Tr14 switching elements

Claims (7)

A threshold detection unit that detects a threshold voltage of the power semiconductor device;
A threshold variation suppression unit that applies, to the power semiconductor element, a gate signal that suppresses the variation of the threshold voltage according to the variation of the threshold voltage detected by the threshold detection unit;
And a drive device for a power semiconductor device.   The threshold detection unit is a voltage detection unit that detects a voltage between main electrodes of the power semiconductor device when the power semiconductor device is in an on state, and a voltage between the main electrodes and a correlation of the threshold voltage. The drive device of the power semiconductor element according to claim 1, further comprising: a conversion unit that estimates the threshold voltage from the voltage between the main electrodes detected by the voltage detection unit.   The threshold fluctuation suppressing unit compares a fluctuation of the threshold voltage estimated by the conversion unit with an allowable value of the fluctuation of the threshold voltage, and the comparing unit changes the threshold voltage by the fluctuation of the allowable value. The first switching element applies a positive first voltage to the gate of the power semiconductor element when it is determined to be within the range, and the comparison section determines that the fluctuation of the threshold voltage is higher than the allowable value. A second switching element that applies a negative second voltage to the gate of the power semiconductor element when it is determined, and when the comparison section determines that the variation in the threshold voltage is lower than the allowable value The drive device for a power semiconductor device according to claim 2, further comprising: a third switching device for applying a positive third voltage lower than the first voltage to the gate of the power semiconductor device.   The drive device for a power semiconductor device according to claim 3, wherein the first switching device, the second switching device, and the third switching device are turned on at a timing at which synchronous rectification is performed on the power semiconductor device. . Furthermore, the first switching element is connected between a first switching element turned on in response to a gate signal for turning on the power semiconductor element, the first switching element and a gate of the power semiconductor element, and the first switching element An on-time gate resistance that applies a positive gate voltage to the gate of the power semiconductor device when the power semiconductor device is turned on, and a second switching device that is turned on in response to a gate signal that turns off the power semiconductor device;
The threshold variation suppression unit compares the variation of the threshold voltage estimated by the conversion unit with the tolerance value of the variation of the threshold voltage, and when the variation of the threshold voltage is within the range of the tolerance value, Between the gate of the power semiconductor device and the second switching device, the comparator configured to output a second control signal when the control signal is output and the second threshold signal is lower than the allowable value range. And the resistance value is switched in response to the first control signal or the second control signal, and a negative gate voltage is applied to the gate of the power semiconductor element when the second switching element is turned on. With applied off-time gate resistance,
The drive device of the power semiconductor element according to claim 2.   The off-state gate resistance is connected to a third switching element turned on in response to the first control signal, and a first resistance having a first resistance value connected when the third switching element is turned on. A fourth switching element turned on in response to the second control signal, and a second resistance value which is connected when the fourth switching element is turned on and which is smaller than the first resistance value The drive device of the power semiconductor element according to claim 5, further comprising: a second resistor.   The driving device for a power semiconductor device according to claim 1, wherein the power semiconductor device is a semiconductor device using a wide band gap semiconductor.

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