JP2018107399A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to reduce a voltage when a rated current flows through a semiconductor device while improving forward surge current capacity of the semiconductor device.SOLUTION: A semiconductor device 1 includes: an N type semiconductor substrate 2; an N- type drift layer 3 formed on a first principal surface 21 of the semiconductor substrate; a P+ type second conductivity type semiconductor region 4 exposed on a surface of the drift layer; a first electrode 5 where Schottky connection is formed with the drift layer and ohmic connection is formed with a second conductivity type semiconductor region; and a second electrode 6 arranged so as to overlap with the first electrode. A surface of the second electrode has an overlapping region 63 where a junction region 62 with a conductive connection member 100 overlaps with the connection member and a non-overlapping region 64 which is located to surround the overlapping region and which does not overlap with the connection member; and out of a surface of the drift layer, density of the second conductivity type semiconductor region 33 which is located so as to surround the first region and include a region overlapping with the non-overlapping region is higher than density of the second conductivity type semiconductor region in a first region 32 which overlaps with the overlapping region.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device.

  In a conventional Schottky diode (semiconductor device), a JBS (Schottky connection and ohmic connection) is mixed between a semiconductor substrate such as a silicon carbide substrate and a Schottky electrode (metal) disposed on the semiconductor substrate. Junction Barrier Schottky) and MPS (Merged PN Schottky) diodes are available. In this type of Schottky diode, when a forward rated current flows, the current flows only in the Schottky connection portion, and no current flows in the ohmic connection portion. On the other hand, when a forward surge current flows, current flows not only in the Schottky connection portion but also in the ohmic connection portion. As a result, the rapid temperature rise of the Schottky diode is suppressed.

  Patent Document 1 discloses a Schottky diode in which an ohmic connection region (first semiconductor region) is positioned on the inner side of a junction between an anode electrode on a Schottky electrode and a wire bond as viewed from above. ing. In this Schottky diode, when a forward surge current flows, heat generated in the ohmic connection portion is released to the junction portion, thereby improving the forward surge resistance.

JP 2012-156154 A

  However, even in the case of the Schottky diode (semiconductor device) described in Patent Document 1, when the forward surge current further increases, the portion that does not overlap with the wire bond (the periphery of the wire bond) In the part that spreads out), a rapid temperature rise occurs. As a result, a defect may occur in a portion of the bonded portion that does not overlap with the wire bond or a portion of the anode electrode to which the bonded portion is bonded, and heat concentration may occur. That is, even the Schottky diode of Patent Document 1 has a problem that the forward surge withstand is insufficient.

  In order to prevent the above-mentioned rapid temperature rise even when the forward surge current increases, for example, an ohmic connection region may be formed over the entire region of the junction portion. However, in this case, since the Schottky connection area is reduced, there is a problem that the forward voltage when the forward rated current flows is increased.

  The present invention has been made in view of the above circumstances, and provides a semiconductor device that can further improve the forward surge withstand capability and can keep the forward voltage low when the forward rated current flows. For the purpose.

  One embodiment of the present invention includes a first conductivity type semiconductor substrate, a first conductivity type drift layer formed on a first main surface of the semiconductor substrate and having an impurity concentration lower than that of the semiconductor substrate, and the drift layer. A second conductivity type semiconductor region opposite to the first conductivity type formed and exposed on the surface of the drift layer; provided on the surface of the drift layer; and Schottky connected to the drift layer. And a first electrode that is in ohmic contact with the second conductivity type semiconductor region, and a second electrode that is disposed to overlap the first electrode and that joins a conductive connection member. In a plan view as viewed from the thickness direction of the substrate, a bonding region to be bonded to the connection member on the surface of the second electrode surrounds the overlapping region overlapping the connection member in the thickness direction. Located in the connection part A non-overlapping region that does not overlap with the first layer of the drift layer relative to the density of the second conductive semiconductor region in the first region of the surface of the drift layer that overlaps the overlapping region. It is a semiconductor device in which the density of the second conductivity type semiconductor region in the second region including the region overlapping with the non-overlapping region is located so as to surround the region.

According to the present invention, the first region of the drift layer having the low density of the second conductivity type semiconductor region overlaps the connecting member, so that a forward surge current flows in the semiconductor device and a large amount of heat is generated in the first region. Even so, this heat can be efficiently released to the connecting member. On the other hand, in the second region of the drift layer that does not overlap with the connection member, since the density of the second conductivity type semiconductor region is high, the generated heat can be reduced even if a forward surge current flows through the semiconductor device. As a result, it is possible to effectively suppress the occurrence of heat concentration in the non-overlapping region of the second electrode that overlaps the second region and in the portion corresponding to the non-overlapping region among the joint portions between the second electrode and the connection member. Therefore, the forward surge withstand capability can be further improved.
In addition, according to the present invention, since the density of the second conductivity type semiconductor region in the first region is low, the forward voltage when the forward rated current flows can be kept low.

It is sectional drawing which shows typically the structure of the semiconductor device which concerns on 1st embodiment of this invention. It is a top view which shows the surface of a drift layer in the semiconductor device which concerns on 1st embodiment of this invention. 3 is a graph showing an example of forward characteristics of the semiconductor device of FIGS. It is a top view which shows the surface of a drift layer in the semiconductor device which concerns on 2nd embodiment of this invention. It is a top view which shows the surface of a drift layer in the semiconductor device which concerns on 3rd embodiment of this invention. It is a top view which shows the surface of a drift layer in the semiconductor device which concerns on 4th embodiment of this invention. It is a top view which shows the surface of a drift layer in the semiconductor device which concerns on 5th embodiment of this invention. It is sectional drawing which shows typically the structure of the semiconductor device which concerns on 5th embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor device which concerns on other embodiment of this invention.

[First embodiment]
The first embodiment of the present invention will be described below with reference to FIGS.
As shown in FIGS. 1 and 2, the semiconductor device 1 according to the present embodiment is a Schottky diode having a JBS structure. Semiconductor device 1 is formed on N-type (first conductivity type) silicon carbide substrate (semiconductor substrate) 2, drift layer 3 formed on first main surface 21 of silicon carbide substrate 2, and drift layer 3. A second conductivity type semiconductor region 4 exposed on the surface 31 of the drift layer 3; a first electrode 5 provided on the surface 31 of the drift layer 3; a second electrode 6 disposed on the first electrode 5; A silicon carbide semiconductor device comprising:

  The semiconductor device 1 of the present embodiment also includes a guard ring 7 that is formed in the drift layer 3 and surrounds the formation region of the second conductivity type semiconductor region 4 in the surface 31 of the drift layer 3. Moreover, the semiconductor device 1 of the present embodiment also includes the third electrode 8 provided on the second main surface 22 of the silicon carbide substrate 2.

Drift layer 3 is an N-type (first conductivity type) layer having a lower impurity concentration than silicon carbide substrate 2.
The second conductivity type semiconductor region 4 is a P + type (second conductivity type opposite to the first conductivity type) region. Second conductivity type semiconductor region 4 is formed in drift layer 3 as long as it does not reach the interface between silicon carbide substrate 2 and drift layer 3.

The guard ring 7 is a P− type (second conductivity type) region formed in the drift layer 3 and having a lower impurity concentration than the second conductivity type semiconductor region 4. The guard ring 7 is formed in the drift layer 3 in a range that does not reach the interface between the silicon carbide substrate 2 and the drift layer 3, similarly to the second conductivity type semiconductor region 4.
The shape of silicon carbide substrate 2 viewed from the thickness direction may be rectangular as shown in FIG. 2, but may be arbitrary. Further, the shape of guard ring 7 viewed from the thickness direction of silicon carbide substrate 2 may be a rectangular ring that follows the shape of silicon carbide substrate 2 as shown in FIG. 2, but is not limited thereto.

  The first electrode 5 is made of a metal such as Ti, Ni, or Mo. The first electrode 5 is Schottky connected to the drift layer 3 and is ohmically connected to the second conductivity type semiconductor region 4. In the present embodiment, the peripheral edge portion of the first electrode 5 is also connected to the inner edge portion of the guard ring 7.

The second electrode 6 is made of a metal such as Al. A bonding wire (connection member) 100 made of a metal such as Al is bonded to the surface 61 of the second electrode 6. In the present embodiment, the bonding wire 100 is bonded to the second electrode 6 by ball bonding.
In the following description, a portion of the bonding wire 100 (bonding portion) bonded to the surface 61 of the second electrode 6 may be referred to as a bonding portion 101 between the second electrode 6 and the bonding wire 100.

  In a plan view as viewed from the thickness direction of the silicon carbide substrate 2, a region 62 (region where the above-described bonding portion 101 contacts) of the surface 61 of the second electrode 6 (hereinafter referred to as a bonding region 62). .) Includes an overlapping region 63 that overlaps the bonding wire 100 and a non-overlapping region 64 that is positioned so as to surround the overlapping region 63 and does not overlap the bonding wire 100.

  The bonding region 62 of the bonding wire 100 on the surface 61 of the second electrode 6 only needs to be smaller than the region of the surface 31 of the drift layer 3 surrounded by at least the guard ring 7. The junction region 62 may be located at the center of the surface 31 of the drift layer 3 as shown in FIG. 2, but is not limited thereto.

In FIG. 2, the overlapping region 63 is located in the center of the joining region 62 and the non-overlapping region 64 is formed in an annular shape surrounding the overlapping region 63, but is not limited thereto. For example, the overlapping region 63 may be arranged such that a part of the periphery thereof overlaps the periphery of the non-overlapping region 64. In other words, the non-overlapping region 64 may be formed in an arc shape (for example, a C shape) that surrounds a part of the circumferential direction of the periphery of the overlapping region 63, for example.
The junction region 62, the overlapping region 63, and the non-overlapping region 64 viewed from the thickness direction of the silicon carbide substrate 2 may be formed in a rectangular shape following the shape of the silicon carbide substrate 2 as shown in FIG. There is no limit.

The second conductivity type semiconductor region 4 described above is formed in the drift layer 3 in association with the overlapping region 63 and the non-overlapping region 64 described above. Hereinafter, this point will be described.
On the surface 31 of the drift layer 3, there are a first region 32 that overlaps the aforementioned overlapping region 63 and a second region 33 that is positioned so as to surround the first region 32. The second region 33 includes a region that overlaps the non-overlapping region 64 described above. In the present embodiment, since the non-overlapping region 64 is formed in an annular shape surrounding the overlapping region 63, the second region 33 is also formed in an annular shape corresponding to the non-overlapping region 64. The boundary between the first region 32 and the second region 33 overlaps the boundary between the overlapping region 63 and the non-overlapping region 64.

  The density of the second conductivity type semiconductor region 4 in the second region 33 is higher than the density of the second conductivity type semiconductor region 4 in the first region 32. In other words, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area of the second region 33 is greater than the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area of the first region 32. Is also big.

Furthermore, in the semiconductor device 1 of the present embodiment, the third region 34 is formed on the outer periphery of the second region 33 in the surface 31 of the drift layer 3. The density of the second conductivity type semiconductor region 4 in the third region 34 is lower than the density of the second conductivity type semiconductor region 4 in the second region 33. The density of the second conductivity type semiconductor region 4 in the third region 34 may be different from the density of the second conductivity type semiconductor region 4 in the first region 32, for example, but is the same in this embodiment.
In the present embodiment, the outer edge of the third region 34 is in contact with the inner edge of the guard ring 7.

The boundary between the second region 33 and the third region 34 on the surface 31 of the drift layer 3 may overlap, for example, the periphery of the junction region 62, but is located outside the junction region 62 in the present embodiment.
The boundary between the second region 33 and the third region 34 may be arbitrarily located between the peripheral edge of the joining region 62 and the inner edge of the guard ring 7. In the present embodiment, the boundary between the second region 33 and the third region 34 is located closer to the periphery of the joint region 62 than the inner edge of the guard ring 7.

In the present embodiment, the second conductivity type semiconductor region 4 is formed in a dot shape when viewed from the thickness direction of the silicon carbide substrate 2. A plurality of dot-like second conductivity type semiconductor regions 4 are arranged at intervals. The dot shape may be, for example, a square shape, a rectangular shape, or an elliptical shape, but is a circular shape in the present embodiment. In the present embodiment, the size of the dot-like second conductivity type semiconductor region 4 is equal to each other.
The number of dot-like second conductivity type semiconductor regions 4 per unit area in the second region 33 is equal to the number of dot-like second conductivity type semiconductor regions 4 per unit area in the first region 32 and the third region 34. More than the number. Thereby, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area in the second region 33 is the second conductivity type semiconductor region 4 occupying the entire area in the first region 32 and the third region 34. It is larger than the area ratio.
The number of dot-shaped second conductive semiconductor regions 4 per unit area in the third region 34 may be different from the number of second conductive semiconductor regions 4 per unit area in the first region 32, for example. It is the same in the embodiment.

When a forward surge current flows through the semiconductor device 1 of the present embodiment configured as described above, it occurs in the first region 32 where the density of the second conductivity type semiconductor region 4 is low in the surface 31 of the drift layer 3. The heat is great.
On the other hand, the density of the second conductivity type semiconductor region 4 in the second region 33 of the drift layer 3 is high. For this reason, the heat generated in the second region 33 when a forward surge current flows through the semiconductor device 1 is smaller than that in the first region 32.

  The difference in the magnitude of heat generated in the first region 32 and the second region 33 is that, as illustrated in FIG. 3, the Schottky connection (SJ) portion between the first electrode 5 and the drift layer 3, This is due to the difference in electrical resistance characteristics between the ohmic connection (OC) portion between the one electrode 5 and the second conductivity type semiconductor region 4.

That is, in the Schottky connection (SJ) portion, the current (forward current) flowing through the portion increases as the voltage applied to the portion (forward voltage) is increased from zero, but when the voltage exceeds a predetermined value, The rate of increase of current with respect to voltage decreases. That is, when a large current such as a surge current flows in the Schottky connection (SJ) portion, the electric resistance becomes very large due to the self-heating effect, and the heat generation in the portion becomes large.
On the other hand, in the ohmic connection (OC) portion, current does not flow even when the voltage applied to the portion is increased from zero to a predetermined value. However, when the voltage exceeds a predetermined value, the rate of increase in current with respect to the voltage increases rapidly. That is, in the ohmic connection (OC) portion, when a large current such as a surge current flows, the electric resistance becomes very small, and heat generation in the portion becomes small.

The large heat generated in the first region 32 of the drift layer 3 can be efficiently released to the bonding wire 100 because the first region 32 overlaps the bonding wire 100. Thereby, the rapid temperature rise in the overlapping region 63 of the second electrode 6 corresponding to the first region 32 can be sufficiently suppressed.
On the other hand, since the second region 33 of the drift layer 3 does not overlap the bonding wire 100, the heat dissipation efficiency to the bonding wire 100 is lower than that of the first region 32. However, since the heat generated in the second region 33 is small as described above, a rapid temperature increase in the non-overlapping region 64 of the second electrode 6 corresponding to the second region 33 can be suppressed. As a result, heat concentration occurs in the non-overlapping region 64 of the bonding region 62 in the second electrode 6 and the portion overlapping the non-overlapping region 64 in the bonding portion 101 between the second electrode 6 and the bonding wire 100. Can be suppressed.
From the above, according to the semiconductor device 1 of the present embodiment, it is possible to further improve the forward surge resistance.

  Further, according to the semiconductor device 1 of the present embodiment, the density of the second conductivity type semiconductor region 4 in the first region 32 is set low. As a result, the forward voltage when the forward rated current flows through the semiconductor device 1 can be kept low.

  Further, according to the semiconductor device 1 of the present embodiment, the third region 34 in which the density of the second conductivity type semiconductor region 4 is lower than that of the second region 33 on the outer periphery of the second region 33 in the surface 31 of the drift layer 3. Is formed. For this reason, the connection area of the drift layer 3 and the 1st electrode 5 which are Schottky connections can be ensured easily. Thereby, the forward voltage at the time of flowing the rated current in the forward direction can be further reduced.

  Further, according to the semiconductor device 1 of the present embodiment, the boundary between the second region 33 and the third region 34 is located outside the junction region 62. For this reason, when forward surge current flows, even if the heat generation in the third region 34 is large, the heat can be prevented from reaching the bonding region 62. Thereby, the rapid temperature rise in the periphery of the junction area | region 62 among the surfaces 61 of the 2nd electrode 6 can be suppressed. That is, it is possible to further improve the forward surge resistance.

In addition, according to the semiconductor device 1 of the present embodiment, the second conductivity type semiconductor regions 4 viewed from the thickness direction of the silicon carbide substrate 2 are formed in a dot shape, and a plurality of them are arranged at intervals. .
In this case, on the surface 31 of the drift layer 3, the area of the Schottky connection between the drift layer 3 and the first electrode 5 and the area of the ohmic connection between the second conductivity type semiconductor region 4 and the first electrode 5 are Even if the ratio is the same, the area of the PN junction between the drift layer 3 and the second conductivity type semiconductor region 4 can be set larger than when the second conductivity type semiconductor region 4 is formed in a linear shape. For this reason, when a forward surge current flows through the semiconductor device 1, it becomes easier for the current to flow between the PN-junction second conductivity type semiconductor region 4 and the drift layer 3. That is, the voltage applied to the semiconductor device 1 can be kept low, and the heat generation at the interface between the drift layer 3 and the first electrode 5 can be kept small. Therefore, the forward surge withstand capability of the semiconductor device 1 can be further improved.

  In addition, according to the semiconductor device 1 of the present embodiment, the number of dot-like second conductivity type semiconductor regions 4 in the second region 33 is greater than the number of dot-like second conductivity type semiconductor regions 4 in the first region 32. There are also many settings. Thereby, the density of the second conductivity type semiconductor region 4 in the second region 33 can be easily set higher than the density of the second conductivity type semiconductor region 4 in the first region 32.

  In the first embodiment described above, for example, the number of dot-like second conductivity type semiconductor regions 4 per unit area in the first, second, and third regions 32, 33, and 34 is set to be equal to each other. The size of the dot-shaped second conductive semiconductor region 4 in the region 33 may be larger than the size of the dot-shaped second conductive semiconductor region 4 in the first region 32 and the third region 34. Even with such a configuration, the same effects as described above can be obtained.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIG. Among the semiconductor devices of this embodiment, the same components as those of the semiconductor device 1 of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  A semiconductor device 1A of this embodiment shown in FIG. 4 includes a silicon carbide substrate 2, a drift layer 3, a second conductivity type semiconductor region 4, a first electrode 5, a second electrode 6, and a guard ring 7 similar to those of the first embodiment. The third electrode 8 is provided (see FIG. 1). Further, in the semiconductor device 1A of the present embodiment, the density of the second conductivity type semiconductor region 4 in the second region 33 in the surface 31 of the drift layer 3 is the same as that of the first embodiment. It is higher than the density of the second conductivity type semiconductor region 4 in the region 34.

However, in the semiconductor device 1 </ b> A of the present embodiment, when viewed from the thickness direction of the silicon carbide substrate 2, the second conductivity type semiconductor region 4 is formed in a lattice shape including a plurality of lines. In the present embodiment, a plurality of lines of the second conductivity type semiconductor region 4 that are parallel to each other in each of the first, second, and third regions 32, 33, and 34 are arranged at equal intervals.
The spacing between the lines of the second conductivity type semiconductor region 4 in the second region 33 is smaller than the spacing between the lines of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34. Thereby, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area in the second region 33 is the second conductivity type semiconductor region 4 occupying the entire area in the first region 32 and the third region 34. It is larger than the area ratio.
The spacing between the lines of the second conductivity type semiconductor region 4 in the third region 34 may be different from the spacing between the lines of the second conductivity type semiconductor region 4 in the first region 32, for example, but is the same in this embodiment. is there.

  In the present embodiment, the thickness of the line of the second conductivity type semiconductor region 4 is the same among the first, second, and third regions 32, 33, 34, but may be different from each other, for example. That is, in the semiconductor device 1 </ b> A of the present embodiment, for example, the line of the second conductivity type semiconductor region 4 in the second region 33 is thicker than the line of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34. Thus, the interval between the lines of the second conductivity type semiconductor region 4 in the second region 33 is made smaller than the interval between the lines of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34. Also good.

Further, the line of the second conductivity type semiconductor region 4 may extend along the side of the silicon carbide substrate 2 that is rectangular as shown in FIG. It may extend in the direction. The direction in which the line of the second conductivity type semiconductor region 4 extends may be the same between the first, second, and third regions 32, 33, and 34 as shown in FIG. Good.
Further, the shape of the grid formed of the plurality of lines of the second conductivity type semiconductor region 4 may be rectangular as shown in FIG. 4, but may be, for example, a diamond shape.

According to the semiconductor device 1A of the present embodiment, the same effects as those of the first embodiment are obtained.
Further, according to the semiconductor device 1 </ b> A of the present embodiment, the second conductivity type semiconductor region 4 as viewed from the thickness direction of the silicon carbide substrate 2 is formed in a lattice shape composed of a plurality of lines.
In this case, on the surface 31 of the drift layer 3, the area of the Schottky connection between the drift layer 3 and the first electrode 5 and the area of the ohmic connection between the second conductivity type semiconductor region 4 and the first electrode 5 are Even if the ratio is the same, the PN junction between the drift layer 3 and the second conductivity type semiconductor region 4 is compared with the case where the second conductivity type semiconductor region 4 is formed in a stripe shape composed of a plurality of parallel lines. Can be set larger. For this reason, when a forward surge current flows through the semiconductor device 1 </ b> A, it becomes easier for the current to flow between the PN-junction second conductivity type semiconductor region 4 and the drift layer 3. That is, the voltage applied to the semiconductor device 1 </ b> A can be suppressed low, and the heat generation at the interface between the drift layer 3 and the first electrode 5 can be suppressed small. Therefore, the forward surge withstand capability of the semiconductor device 1A can be further improved.

  Further, according to the semiconductor device 1 </ b> A of the present embodiment, the interval between the lines of the second conductivity type semiconductor region 4 in the second region 33 is set to be smaller than the interval between the lines of the second conductivity type semiconductor region 4 in the first region 32. Is set too small. Thereby, the density of the second conductivity type semiconductor region 4 in the second region 33 can be easily set higher than the density of the second conductivity type semiconductor region 4 in the first region 32.

[Third embodiment]
Next, a third embodiment of the present invention will be described with reference to FIG. Among the semiconductor devices of this embodiment, the same components as those of the semiconductor device 1 of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  A semiconductor device 1B of this embodiment shown in FIG. 5 includes a silicon carbide substrate 2, a drift layer 3, a second conductivity type semiconductor region 4, a first electrode 5, a second electrode 6, and a guard ring 7 similar to those in the first embodiment. The third electrode 8 is provided (see FIG. 1). In the semiconductor device 1B of the present embodiment, the density of the second conductivity type semiconductor region 4 in the second region 33 of the surface 31 of the drift layer 3 is equal to the first region 32 or the third region, as in the first embodiment. It is higher than the density of the second conductivity type semiconductor region 4 in 34.

However, in the semiconductor device 1B of the present embodiment, when viewed from the thickness direction of the silicon carbide substrate 2, the second conductivity type semiconductor region 4 is formed in a stripe shape composed of a plurality of parallel lines. In the present embodiment, the thicknesses of all the lines of the second conductivity type semiconductor region 4 are equal to each other. In the present embodiment, a plurality of lines of the second conductivity type semiconductor region 4 that are parallel to each other in each of the first, second, and third regions 32, 33, and 34 are arranged at equal intervals.
The spacing between the lines of the second conductivity type semiconductor region 4 in the second region 33 is smaller than the spacing between the lines of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34. Thereby, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area in the second region 33 is the second conductivity type semiconductor region 4 occupying the entire area in the first region 32 and the third region 34. It is larger than the area ratio.
The spacing between the lines of the second conductivity type semiconductor region 4 in the third region 34 may be different from the spacing between the lines of the second conductivity type semiconductor region 4 in the first region 32, for example, but is the same in this embodiment. is there.

  The line of the second conductivity type semiconductor region 4 may extend along the side of the silicon carbide substrate 2 that is rectangular as shown in FIG. 5, for example, in a direction inclined with respect to the side of the silicon carbide substrate 2. It may extend. The direction in which the line of the second conductivity type semiconductor region 4 extends may be the same between the first, second, and third regions 32, 33, and 34 as shown in FIG. Also good.

  According to the semiconductor device 1B of the present embodiment, the same effects as those of the second embodiment can be obtained.

[Fourth embodiment]
Next, a fourth embodiment of the present invention will be described with reference to FIG. Among the semiconductor devices of this embodiment, the same components as those of the semiconductor device 1 of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  A semiconductor device 1C of this embodiment shown in FIG. 6 includes a silicon carbide substrate 2, a drift layer 3, a second conductivity type semiconductor region 4, a first electrode 5, a second electrode 6, and a guard ring 7 similar to those of the first embodiment. The third electrode 8 is provided (see FIG. 1). Further, in the semiconductor device 1C of the present embodiment, the density of the second conductivity type semiconductor region 4 in the second region 33 of the surface 31 of the drift layer 3 is equal to the first region 32 or the third region, as in the first embodiment. It is higher than the density of the second conductivity type semiconductor region 4 in 34.

In the semiconductor device 1C of the present embodiment, as in the third embodiment, the second conductivity type semiconductor region 4 is formed in a stripe shape composed of a plurality of parallel lines as viewed from the thickness direction of the silicon carbide substrate 2. ing. However, in the present embodiment, a plurality of lines of the second conductivity type semiconductor region 4 that are parallel to each other in each of the first, second, and third regions 32, 33, and 34 are arranged at equal intervals.
In the semiconductor device 1 </ b> C of the present embodiment, the line of the second conductivity type semiconductor region 4 in the second region 33 is thicker than the line of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34. Thereby, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area in the second region 33 is the second conductivity type semiconductor region 4 occupying the entire area in the first region 32 and the third region 34. It is larger than the area ratio.
The interval between the lines of the second conductivity type semiconductor region 4 in the second region 33 is smaller than the interval between the lines of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34 as shown in FIG. However, for example, the distance between the lines of the second conductivity type semiconductor region 4 in the first region 32 and the third region 34 may be equivalent.

According to the semiconductor device 1C of the present embodiment, the same effects as those of the first embodiment can be obtained.
Further, according to the semiconductor device 1 </ b> C of the present embodiment, the line of the second conductivity type semiconductor region 4 in the second region 33 is set to be thicker than the line of the second conductivity type semiconductor region 4 in the first region 32. . Thereby, the density of the second conductivity type semiconductor region 4 in the second region 33 can be easily set higher than the density of the second conductivity type semiconductor region 4 in the first region 32.

[Fifth embodiment]
Next, a fifth embodiment of the present invention will be described with reference to FIGS. Among the semiconductor devices of this embodiment, the same components as those of the semiconductor device 1 of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  The semiconductor device 1D of this embodiment shown in FIGS. 7 and 8 includes the same silicon carbide substrate 2, drift layer 3, second conductivity type semiconductor region 4, first electrode 5, second electrode 6, and guard as in the first embodiment. A ring 7 and a third electrode 8 are provided. Further, in the semiconductor device 1D of the present embodiment, the density of the second conductivity type semiconductor region 4 in the second region 33 of the surface 31 of the drift layer 3 is equal to the first region 32 or the third region, as in the first embodiment. It is higher than the density of the second conductivity type semiconductor region 4 in 34.

However, in the semiconductor device 1D of the present embodiment, the second conductivity type semiconductor region 4 in the second region 33 is formed in an arc shape extending so as to surround the first region 32 when viewed from the thickness direction of the silicon carbide substrate 2. ing.
More specifically, in the semiconductor device 1D of the present embodiment, the non-overlapping region 64 of the junction region 62 is formed in an annular shape surrounding the overlapping region 63, and the second region overlaps with the non-overlapping region 64 accordingly. 33 is also formed in an annular shape corresponding to the non-overlapping region 64. For this reason, in this embodiment, the second conductivity type semiconductor region 4 in the second region 33 is formed in an annular shape surrounding the first region 32. Moreover, in this embodiment, the cyclic | annular 2nd conductivity type semiconductor region 4 is formed in the whole 2nd area | region 33, ie, only the cyclic | annular 2nd conductivity type semiconductor region 4 is formed.

  On the other hand, the second conductivity type semiconductor region 4 in the first region 32 and the third region 34 may be formed in the same stripe shape as in the second and third embodiments as illustrated in FIG. It may be formed in a dot shape or a lattice shape. Thereby, the ratio of the area of the second conductivity type semiconductor region 4 occupying the entire area in the second region 33 is the second conductivity type semiconductor region 4 occupying the entire area in the first region 32 and the third region 34. It is larger than the area ratio.

According to the semiconductor device 1D of the present embodiment, the same effects as those of the first embodiment can be obtained.
Further, according to the semiconductor device 1 </ b> D of the present embodiment, the second conductivity type semiconductor region 4 in the second region 33 is formed in an arc shape extending so as to surround the first region 32. Thereby, the density of the second conductivity type semiconductor region 4 in the second region 33 can be easily set higher than the density of the second conductivity type semiconductor region 4 in the first region 32.

  In the fourth embodiment described above, a plurality of annular second conductive semiconductor regions 4 may be arranged concentrically in the second region 33, for example.

  In the fourth embodiment described above, the second conductive semiconductor region 4 in the second region 33 is, for example, an arc-shaped second conductive semiconductor region 4 extending in the circumferential direction of the second region 33 around the second region 33. A plurality may be arranged in the direction.

  Although the details of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  In the present invention, the conductive connecting member bonded to the surface 61 of the second electrode 6 is not limited to the bonding wire 100, but is a plate-like connector 100E such as a copper plate as illustrated in FIG. Also good. In this case, the connector 100E is joined to the surface 61 of the second electrode 6 by the solder 101E. That is, the solder 101E becomes a joint portion between the second electrode 6 and the connector 100E. In addition, in the surface 61 of the second electrode 6, the joining region 62 (the region where the solder 101 </ b> E contacts) that joins the connector 100 </ b> E is overlapped with the overlapping region 63 and the overlapping region 63 overlapping the connector 100 </ b> E, as in the above embodiment. And a non-overlapping area 64 that does not overlap with the connector 100E.

For this reason, even if a conductive connection member is the connector 100E, the 2nd conductivity type semiconductor region 4 exposed to the surface 31 of the drift layer 3 can be formed similarly to the said embodiment.
For example, on the surface 31 of the drift layer 3, the second conductivity in the second region 33 including the region overlapping the non-overlapping region 64 with respect to the density of the second conductivity type semiconductor region 4 in the first region 32 overlapping the overlapping region 63. The density of the type semiconductor region 4 can be set high.

Further, as illustrated in FIG. 9, when the solder 101 </ b> E spreads over only a part of the surface 61 of the second electrode 6, the second region 33 in the surface 31 of the drift layer 3 is the same as in the above embodiment. A third region 34 in which the density of the second conductivity type semiconductor region 4 is lower than that of the second region 33 may be formed on the outer periphery of the second region 33.
Therefore, even if the conductive connecting member joined to the surface 61 of the second electrode 6 is the connector 100E, it is possible to achieve the same effect as in the above embodiment.

  In the above embodiment, the first conductivity type is N type and the second conductivity type is P type. However, the present invention is not limited to this, and the first conductivity type is P type and the second conductivity type is the second conductivity type. The type may be an N type.

  In the above embodiment, the present invention has been described by taking a JBS structure diode as an example of a semiconductor device, but the present invention can also be applied to, for example, an MPS structure diode.

  In the above embodiment, the present invention has been described by taking the silicon carbide semiconductor device including the silicon carbide substrate, the silicon carbide drift layer, and the second conductivity type semiconductor region of silicon carbide as an example. It is also applicable to a semiconductor device including a substrate, a silicon drift layer, and a silicon second conductivity type semiconductor region.

1, 1A, 1B, 1C, 1D Semiconductor device 2 Silicon carbide substrate (semiconductor substrate)
21 first main surface 22 second main surface 3 drift layer 31 surface 32 first region 33 second region 34 third region 4 second conductivity type semiconductor region 5 first electrode 6 second electrode 61 surface 62 bonding region 63 overlapping region 64 Non-overlapping region 7 Guard ring 8 Third electrode 100 Bonding wire (connection member)
101 Joining part 100E Connector (connecting member)
101E Solder (joint part)

Claims (8)

A first conductivity type semiconductor substrate;
A drift layer of a first conductivity type formed on the first main surface of the semiconductor substrate and having a lower impurity concentration than the semiconductor substrate;
A second conductivity type semiconductor region of a second conductivity type opposite to the first conductivity type formed in the drift layer and exposed on the surface of the drift layer;
A first electrode provided on a surface of the drift layer, Schottky connected to the drift layer, and ohmic connected to the second conductivity type semiconductor region;
A second electrode for overlapping the first electrode and joining a conductive connecting member;
In a plan view as viewed from the thickness direction of the semiconductor substrate, a bonding region to be bonded to the connection member in the surface of the second electrode is overlapped with the connection member in the thickness direction, and the overlap region A non-overlapping region that is positioned to surround and does not overlap the connection member;
The non-overlapping region is positioned so as to surround the first region of the surface of the drift layer with respect to the density of the second conductivity type semiconductor region in the first region overlapping the overlapping region of the surface of the drift layer. A semiconductor device having a high density of the second conductivity type semiconductor region in a second region including a region overlapping with the semiconductor device.   The semiconductor device according to claim 1, wherein a third region having a density of the second conductivity type semiconductor region lower than that of the second region is formed on an outer periphery of the second region in the surface of the drift layer.   3. The semiconductor device according to claim 2, wherein a boundary between the second region and the third region is located outside the junction region when viewed from the thickness direction. The second conductivity type semiconductor region is formed in a dot shape when viewed from the thickness direction, and a plurality of the second conductivity type semiconductor regions are arranged at intervals.
The number of the second conductive semiconductor regions per unit area in the second region is larger than the number of the second conductive semiconductor regions per unit area in the first region. The semiconductor device according to claim 1. The second conductivity type semiconductor region is formed in a lattice shape composed of a plurality of lines when viewed from the thickness direction,
The distance between the lines of the second conductivity type semiconductor region in the second region is smaller than the distance between the lines of the second conductivity type semiconductor region in the first region. The semiconductor device according to item. The second conductivity type semiconductor region is formed in a plurality of lines parallel to each other when viewed from the thickness direction,
The distance between the lines of the second conductivity type semiconductor region in the second region is smaller than the distance between the lines of the second conductivity type semiconductor region in the first region. The semiconductor device according to item. The second conductivity type semiconductor region is formed in a plurality of lines parallel to each other when viewed from the thickness direction,
4. The line of the second conductive semiconductor region in the second region is thicker than the thickness of the line of the second conductive semiconductor region in the first region. 5. Semiconductor device.   4. The semiconductor device according to claim 2, wherein the second conductivity type semiconductor region in the second region is formed in an arc shape extending so as to surround the first region when viewed from the thickness direction. 5.

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