JP2018196000A - Reception device and frequency deviation elimination method - Google Patents

Abstract

A receiving apparatus and a frequency deviation removing method for quickly and accurately removing a frequency deviation are provided. To provide a receiving apparatus and a frequency deviation elimination method capable of preventing a decrease in throughput. In a receiving apparatus, a pilot signal demodulating unit that demodulates a pilot signal from a received signal, a frequency deviation of the pilot signal is estimated based on the demodulated pilot signal, and an oscillator of the oscillator is estimated based on the estimated frequency deviation. A frequency control unit that controls an oscillation frequency; a control signal demodulation unit that demodulates a control signal from the received signal; a first symbol of the demodulated pilot signal; and a second symbol of the demodulated control signal Calculating a phase difference between symbols of a symbol, linearly interpolating the calculated phase difference, and calculating a phase difference between samples of the received signal; and a phase difference between samples of the received signal; Multiplies each sample of the received signal and outputs the multiplied received signal to the pilot signal demodulator and the control signal demodulator And a calculation part. [Selection] Figure 1

Description

  The present invention relates to a receiving apparatus and a frequency deviation removal method.

  In LTE (Long Term Evolution) which is one of the wireless communication systems, an Orthogonal Frequency Division Multiplex (OFDM) system is employed. The OFDM scheme is a communication scheme based on, for example, multicarrier transmission, and can modulate / demodulate a plurality of subcarriers (or carrier waves) at once.

  However, in the OFDM scheme, if there is a frequency deviation in the subcarriers between the transmission device and the reception device, the orthogonality between the subcarriers may be lost and interference may occur between the subcarriers.

  Therefore, the receiving apparatus performs automatic frequency control (AFC) to automatically correct (or remove) the subcarrier frequency deviation.

  Examples of such AFC control technology include the following. That is, the phase angle information is multiplied by N, the difference between the phase angle information delayed by one symbol and the current phase angle information is obtained, and 1 / N of the difference value is averaged to estimate the phase rotation amount. There is a frequency offset correction method for correcting the phase rotation of the baseband signal phase angle signal.

  According to this technique, when there is a frequency offset between the received modulated wave subjected to digital angle modulation and the reference transmission source of the demodulator, the offset can be corrected by a simple method.

  Further, the adaptive bright line emphasis type demodulation circuit performs demodulation until the phase synchronization between the N-phase PSK (N-Phase Shift Keying) and the regenerated carrier wave is established, and after the phase synchronization is established, the PLL (Phase Locked Loop) There is also a PSK demodulator that switches the demodulator circuit so that the demodulator circuit performs demodulation.

  According to this technique, it is possible to provide a PSK signal demodulator capable of performing a fast demodulation operation with a small circuit scale and performing a stable demodulation operation after the synchronization acquisition.

  Further, the quadrature basis components I and Q (In-phase, Quadrature) are stored for a predetermined time, the clock rate phase error of the baseband sample is estimated to correct the clock phase of the sample, and then the carrier phase of the corrected sample There is also a method of correcting the phase error of the carrier phase by estimating the error.

  According to this technique, the frame overhead allocated to the clock and carrier continuous sequence (preamble or middle amble) can be minimized, and the signal processing load can be minimized while maintaining signal integrity and reliability. It is said.

  Further, an OFDM receiver that detects a pilot carrier arrangement pattern of a received signal from a Fourier transform output of the received signal and outputs information indicating the number of signals (or the number of segments) of a plurality of signals from the connection state of the pilot carrier arrangement pattern. is there.

  According to this technology, an OFDM receiver capable of generating information on the total number of TS (Transport Stream) data of a received signal, enabling optimal processing according to the received signal in a back-end processing unit at a later stage, and reducing power consumption Can be provided.

JP-A-5-48665 JP-A-9-275425 Japanese Patent Laid-Open No. 2-101845 JP 2010-148018 A

  In wireless communication systems such as LTE, high-level modulation systems such as 64QAM (Quadrature Amplitude Modulation) and 256QAM are also being used. Such a modulation method is selected when the state of the communication path is very good. On the other hand, in the receiving apparatus, for example, AFC control may be performed using an analog element. Even when a high-level modulation method is selected, the frequency deviation in the subcarrier in the receiver may be caused by the influence of such an analog element rather than the state of the communication channel. is there. In this case, in the receiving apparatus, a conversion process from a digital signal to an analog signal is performed, and the frequency deviation cannot be quickly and accurately removed from the received signal.

  On the other hand, the receiving apparatus may perform AFC control on a received signal whose frequency deviation is corrected by a feedback loop. In this case, in the receiving device, if the accuracy of the frequency deviation correction is insufficient with respect to the received signal, AFC control is performed on the received signal with insufficient accuracy. Therefore, also in this case, the frequency deviation cannot be quickly and accurately removed from the received signal.

  In mobile communication, a receiving apparatus may perform AFC control and CQI (Channel Quality Indicator) estimation using pilot symbols. In the receiving apparatus, when the frequency deviation cannot be quickly and accurately removed from the pilot symbol, the accuracy of the estimated CQI is also lowered. In this case, if the transmission apparatus performs scheduling based on the low-precision CQI fed back from the reception apparatus, sufficient radio resources cannot be allocated to the reception apparatus. Therefore, if the frequency deviation cannot be removed quickly and accurately in the receiving apparatus, the throughput may be reduced with respect to data transmission between the transmitting apparatus and the receiving apparatus.

  The technique for estimating the amount of phase rotation by multiplying the phase angle information by N and obtaining the difference between the phase angle information delayed by one symbol and the current phase angle information is, for example, the symbol interval of the phase angle information. To estimate the amount of phase rotation. Therefore, in such a technique, the phase rotation amount cannot be estimated with an accuracy equal to or greater than the symbol interval, and the frequency deviation may not be quickly and accurately removed from the baseband signal phase angle signal. As for other techniques, there is no discussion about removing the frequency deviation with higher accuracy with respect to the input signal to be controlled. Accordingly, in any of the above-described techniques, the throughput may be reduced.

  In view of this, an aspect of the present invention is to provide a receiving apparatus and a frequency deviation removing method that can remove a frequency deviation quickly and accurately.

  Another aspect of the present invention is to provide a receiving apparatus and a frequency deviation removing method that prevent a decrease in throughput.

  In one aspect, in a receiving apparatus, a pilot signal demodulating unit that demodulates a pilot signal from a received signal, and estimating a frequency deviation of the pilot signal based on the demodulated pilot signal, and an oscillator based on the estimated frequency deviation A frequency control unit that controls the oscillation frequency of the control signal, a control signal demodulation unit that demodulates the control signal from the received signal, a first symbol of the demodulated pilot signal, and a second symbol of the demodulated control signal A phase deviation between symbols of the received signal, and a frequency difference removing unit that calculates a phase difference between the symbols of the received signal, linearly interpolates the calculated phase difference, and calculates a phase difference between the samples of the received signal; And each sample of the received signal are multiplied and the multiplied received signal is output to the pilot signal demodulator and the control signal demodulator That and a multiplication unit.

  In one aspect, the frequency deviation can be quickly and accurately removed. Further, in one aspect, a decrease in throughput can be prevented.

FIG. 1 is a diagram illustrating a configuration example of a receiving apparatus. FIG. 2 is a diagram illustrating a configuration example of the frequency deviation removal processing unit. 3A and 3B are diagrams illustrating examples of constellations. 4A to 4D are diagrams illustrating examples of constellations. FIGS. 5A to 5C are diagrams illustrating examples of constellations. FIG. 6 is a flowchart showing an operation example. FIG. 7A illustrates a base station device, and FIG. 7B illustrates a hardware configuration example of a terminal device. FIG. 8 is a diagram illustrating a configuration example of a receiving apparatus.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. Problems and examples in the present specification are merely examples, and do not limit the scope of rights of the present application. Each embodiment can be combined as appropriate within a range that does not contradict processing contents.

[First Embodiment]
<Configuration example of receiving device>
FIG. 1 is a diagram illustrating a configuration example of a reception device 100 according to the first embodiment. The receiving device 10 may be a wireless communication device such as a base station device or a terminal device, for example.

  The receiving apparatus 100 includes an antenna 101, a reception RF (Radio Frequency) unit 102, a multiplication unit 103, a control CH (Channel) demodulation unit (or control signal demodulation unit) 104, and a pilot demodulation unit (or pilot signal demodulation unit) 105. . The receiving apparatus 100 includes a channel estimation unit 106, a CQI (Channel Quality Indicator) estimation unit 107, an AFC (Automatic Frequency Control) unit (or automatic frequency control unit or frequency control unit) 108, and a TCXO (Temperature). Compensated Crystal Oscillator 109 is provided. Furthermore, the receiving apparatus 100 includes a data CH demodulation unit (or data demodulation unit) 110, a threshold value determination unit 111, and a frequency deviation removal processing unit (or frequency deviation removal unit) 112. Furthermore, the receiving device 100 includes a decoding processing unit 120, an application processing unit 121, a transmission processing unit 122, a transmission RF unit 123, and an antenna 124.

  The antenna 101 receives a radio signal transmitted from the transmission device, and outputs the received radio signal to the reception RF unit 102.

  For example, the reception RF unit 102 converts a radio signal in a radio band into a baseband signal in a baseband band. Then, the reception RF unit 102 performs quadrature detection on the converted baseband signal in accordance with the oscillation frequency from the TCXO 109, converts it to a digital signal, and then performs frequency conversion from the time domain signal by FFT (Fast Fourier Transform) processing. Convert to domain signal. For this reason, the reception RF unit 102 may include a frequency conversion circuit, a quadrature detection circuit, an analog / digital (A / D) conversion circuit, an FFT processing circuit, and the like. The reception RF unit 102 outputs the frequency domain signal to the multiplication unit 103 as a reception signal.

  Multiplier 103 multiplies the received signal by the frequency deviation removal signal output from frequency deviation removal processing section 112. For example, the multiplying unit 103 multiplies each sample of the received signal by the phase difference between the samples of the received signal included in the frequency deviation removal signal, and corrects (or removes) the phase difference between the samples in the received signal. Thereby, for example, the residual frequency deviation in the received signal can be removed. Details will be described in an operation example. Multiplication section 103 outputs the received signal after multiplication (or correction) to control CH demodulation section 104, pilot demodulation section 105, and data CH demodulation section 110.

  Control CH demodulation section 104 demodulates the control signal from the received signal using the channel estimation value received from channel estimation section 106. For example, the control CH demodulation unit 104 compensates the phase rotation amount indicated by the channel estimation value (for example, returns the phase rotation generated by transmission to the original state) for each symbol of the received signal, and performs control. Demodulate the signal. Control CH demodulation section 104 outputs the demodulated control signal to frequency deviation removal processing section 112 and decoding processing section 120.

  Pilot demodulation section 105 demodulates the pilot signal from the received signal. For example, pilot demodulator 105 demodulates the pilot signal based on the frequency of the received signal because the pilot signal is transmitted using a predetermined frequency resource. Pilot demodulation section 105 outputs the demodulated pilot signal to frequency deviation removal processing section 112, channel estimation section 106, and CQI estimation section 107.

  The channel estimation unit 106 obtains a channel estimation value based on the pilot signal. For example, the channel estimation unit 106 obtains a channel estimation value as the influence received by the wireless communication path by dividing the received signal by the pilot signal. Channel estimation section 106 outputs the obtained channel estimation value to control CH demodulation section 104 and data CH demodulation section 110.

  CQI estimation section 107 estimates CQI based on the pilot signal. For example, the CQI estimation unit 107 measures the channel quality between the transmission apparatus and the reception apparatus by measuring SNR (Signal to Noise Ratio), SINR (Signal to Interference plus Noise Ratio), and the like for the pilot signal. To do. In this case, the CQI estimation unit 107 reports CQI corresponding to the measured SNR and the like. CQI estimation section 107 outputs the estimated CQI to transmission processing section 122.

  The AFC unit 108 estimates the frequency deviation of the pilot signal based on the pilot signal, and controls the oscillation frequency of the TCXO 109 based on the estimated frequency deviation. The configuration of the AFC unit 108 may be the same as that of the frequency deviation removal processing unit 112, for example. The AFC unit 108 outputs the calculated frequency deviation information to the TCXO 109 and the threshold determination unit 111 as a frequency control signal. The AFC unit 108 controls the oscillation frequency of the TCXO 109 by outputting a frequency control signal to the TCXO 109.

  The TCXO 109 generates a transmission frequency based on the frequency control signal, and outputs the generated transmission frequency to the reception RF unit 102 and the transmission RF unit 123. For example, the TCXO 109 corrects the transmission frequency based on the frequency deviation information, and outputs the corrected oscillation frequency to the reception RF unit 102 and the transmission RF unit 123. In the first embodiment, the TCXO 109 is described as an example of an oscillator. However, a VCXO (Voltage Controlled Crystal Oscillator), a MEMS (Micro Electro Mechanism Systems) oscillator, etc. It may be an oscillator.

  Data CH demodulation section 110 demodulates data from the received signal using the channel estimation value received from channel estimation section 106. For example, the data CH demodulation unit 110 compensates for the phase rotation amount indicated by the channel estimation value for each symbol of the received signal (for example, restores the phase rotation generated by transmission to the original state), and stores the data. Demodulate. Data CH demodulation section 110 outputs the demodulated data to decoding processing section 120.

  The threshold determination unit 111 controls the operation of the frequency deviation removal processing unit 112 based on the frequency control signal received from the AFC unit 108. For example, the threshold determination unit 111 performs the following process. That is, the threshold value determination unit 111 sets the frequency deviation removal processing unit 112 when the phase difference information is 360 / n / 2 (n is, for example, “4” for QPSK or “2” for BPSK). An instruction signal for operating is output. On the other hand, the threshold determination unit 111 outputs an instruction signal for preventing the frequency deviation removal processing unit 112 from operating when the phase difference information exceeds 360 / n / 2. Details will be described in an operation example.

  The frequency deviation removal processing unit 112 calculates a phase difference between symbols of symbols including each symbol of the pilot signal and each symbol of the control signal, and linearly interpolates the calculated phase difference to obtain a difference between the received signal samples. Calculate the phase difference. Details of the frequency deviation removal processing unit 112 will be described later. The frequency deviation removal processing unit 112 generates a frequency deviation removal signal including the calculated phase difference, and outputs the generated frequency deviation removal signal to the multiplication unit 103.

  Decoding processing section 120 performs error correction decoding processing (hereinafter sometimes referred to as decoding processing) on the demodulated control signal and data, and transmits the control signal and data transmitted from the transmission apparatus. Play. For example, the decoding processing unit 120 performs IFFT processing on the demodulated control signal and data, converts the frequency domain control signal and data into the time domain control signal and data, and then decodes the data. Process. The decryption processing unit 120 outputs the reproduced control signal and data to the application processing unit 121.

  For example, the application processing unit 121 performs processing related to the application on the data. For example, the application processing unit 121 performs processing for extracting an audio signal, a video signal, and the like from the data and outputting audio from a microphone or displaying video on a display unit. In addition, the application processing unit 121 performs processing related to an application to generate data, for example. The application processing unit 121 outputs the generated data to the transmission processing unit 122.

  The transmission processing unit 122 performs error correction coding processing, modulation processing, and the like on the CQI and data, and converts them into a baseband signal (or transmission signal) in the baseband band. The transmission processing unit 122 outputs the converted baseband signal to the transmission RF unit 123.

  For example, the transmission RF unit 123 performs D / A (Digital to Analogue) conversion processing on the baseband signal and converts the baseband signal into a wireless signal in a wireless band. At this time, the transmission RF unit 123 may perform conversion into a radio signal having a frequency in the radio band based on the transmission frequency received from the TCXO 109. Therefore, the transmission RF unit 123 may include a circuit such as a D / A (Digital to Analogue) conversion circuit or a frequency conversion circuit. The transmission RF unit 123 outputs a radio signal to the antenna 124.

  The antenna 124 transmits a radio signal to the transmission device.

<Configuration example of frequency deviation removal processing unit>
FIG. 2 is a diagram illustrating a configuration example of the frequency deviation removal processing unit 112. The frequency deviation removal processing unit 112 includes a square or fourth power processing unit 1121, a moving average processing unit 1122, an arg processing unit 1123, a 1/2 or 1/4 processing unit 1124, a cumulative addition unit 1125, a linear interpolation unit 1126, and a polar processing unit 1127. , And a processing delay interpolation unit 1128.

  The square or fourth power processing unit 1121 applies a square value or a fourth power to a symbol including a pilot signal symbol output from the pilot demodulation unit 105 and a control signal symbol output from the control CH demodulation unit 104. Calculate the value.

  In the first embodiment, paying attention to the fact that the control signal demodulation method is the same as the pilot signal demodulation method, in addition to the pilot signal symbols, the control signal symbols are used to The phase difference between them is calculated. In general, the greater the number of symbols in the pilot signal, the more accurate the phase difference estimation, and it is possible to improve the accuracy of AFC control. However, if the number of symbols is increased by extending the average interval, it takes time, and the response speed of AFC control becomes slow, so that rapid AFC control cannot be performed. Therefore, in the first embodiment, by using not only the pilot signal symbols but also the control signal symbols in the average interval, the number of symbols is increased without increasing the time, and phase difference estimation is performed. The accuracy is improved.

  For example, when the control channel demodulation unit 104 demodulates the control signal using QPSK (Quadrature Phase Shift Keying), the square or fourth power processing unit 1121 calculates the fourth power value and demodulates using BPSK (Binary Phase Shift Keying). In this case, the square value is calculated.

として表すことができる。ＱＰＳＫの理想点を、４５度、１３５度、２２５度、及び３１５度とすると、ｉｎ１は、π／４、３π／４、５π／４、７π／４のいずれかとなる。ＢＰＳＫの場合は、その理想点を、０度、１８０度とすると、ｉｎ１は、０とπのいずれかとなる。 Here, each symbol of the pilot signal output from the pilot demodulation unit 105 is, for example,

Can be expressed as If the ideal point of QPSK is 45 degrees, 135 degrees, 225 degrees, and 315 degrees, in1 is one of π / 4, 3π / 4, 5π / 4, or 7π / 4. In the case of BPSK, if the ideal point is 0 degree or 180 degrees, in1 is either 0 or π.

として表すことができる。同様に、ＱＰＳＫの理想点を、４５度、１３５度、２２５度、及び３１５度とすると、ｉｎ２は、π／４、３π／４、５π／４、７π／４のいずれかとなる。ＢＰＳＫの場合は、その理想点を、０度、１８０度とすると、ｉｎ２は、０とπのいずれかとなる。 Further, each symbol of the control signal output from the control CH demodulation unit 104 is, for example,

Can be expressed as Similarly, when the ideal points of QPSK are 45 degrees, 135 degrees, 225 degrees, and 315 degrees, in2 is any one of π / 4, 3π / 4, 5π / 4, and 7π / 4. In the case of BPSK, if the ideal point is 0 degree and 180 degrees, in2 is either 0 or π.

と表すことができる。そして、２乗ｏｒ４乗処理部１１２１は、ＱＰＳＫの場合は、式（３）の４乗値、

を算出する。ＢＰＳＫｎ場合、２乗値の計算は、式（３）を２乗すればよい。 The square or fourth power processing unit 1121 calculates the square value or the fourth power value by using both symbols of the control signal and the pilot signal.

It can be expressed as. In the case of QPSK, the square or fourth power processing unit 1121 is the fourth power value of the equation (3),

Is calculated. In the case of BPSKn, the square value may be calculated by squaring equation (3).

となり、各理想点が（−１，０）に集約されることがかわる。 FIG. 3A is a diagram showing a constellation in the case of an ideal reception signal point in QPSK. In FIG. 3A, the horizontal axis represents the I axis and the vertical axis represents the Q axis. As shown in FIG. 3A, when an ideal point exists at 45 degrees, 135 degrees, 225 degrees, and 315 degrees with respect to the positive direction of the I-axis, the received signal symbol is raised to the fourth power (or multiplied by four). Then, as shown in FIG. 3 (B), the points are collected at a point (-1, 0) of 180 degrees. When calculated by equation (4),

Thus, each ideal point is aggregated to (-1, 0).

  Here, for example, as shown in FIG. 4A, consider an example in which a symbol is measured counterclockwise starting from an ideal point of 45 degrees. In this case, when each symbol is raised to the fourth power, as shown in FIG. 4B, the point of each symbol is mapped at a quadruple angle starting from (-1, 0).

  In FIG. 4 (A), the first quadrant is described as an example. However, in any quadrant, the starting point becomes (−1, 0) by raising the symbol to the fourth power. Rotating at an angle is the same as in FIG.

  FIG. 4C shows an example in which four symbols are measured. The first symbol in the first quadrant is located at the ideal point (45 degree point), but exists in the second to fourth quadrants. The second to fourth points to be performed are shifted in angle with respect to the ideal point. Due to the deviation of the angle, each symbol after the fourth power becomes a point shown in FIG.

  However, since the symbol points in the actual constellation may have different amplitudes, the radius may be different at each point as shown in FIG. Further, the points of each symbol after the fourth power may have different radii as shown in FIG. However, in the first embodiment, the receiving device acquires the phase difference and removes the frequency deviation of the pilot signal, and it is only necessary to pay attention to the declination on the constellation, and the difference in the radius. It is not necessary to pay attention to. Therefore, the receiving apparatus calculates a polar coordinate point having a radius of 1 in a polar processing unit 1127 subsequent to the square or fourth power processing unit 1121.

  Returning to FIG. 2, the square or fourth power processing unit 1121 outputs the square value or the fourth power value of the symbol to the moving average processing unit 1122.

  The moving average processing unit 1122 calculates a moving average of a plurality of front and rear symbols for each squared or fourth power symbol. For example, in the case of QPSK, the moving average processing unit 1122 calculates the following as a moving average of a total of 10 symbols of the self symbol index i = 0 and the past 5 symbols and the future 4 symbols.

  When the control signal is demodulated by BPSK, “j · 4 · in” in equation (6) may be set to “j · 2 · in”. “10”, which is the number of symbols when calculating the moving average, is an example, and other numbers of symbols may be used.

  The moving average processing unit 1122 outputs the calculated moving average to the arg processing unit 1123.

を算出する。 The arg processing unit 1123 converts a moving average represented by polar coordinate points into an angle. For example, the arg processing unit 1123 converts the real part of Equation (6) to x. real, the imaginary part is x. If imag,

Is calculated.

  The arg processing unit 1123 outputs the calculated angle to the 1/2 or 1/4 processing unit 1124.

  The 1/2 or 1/4 processing unit 1124 calculates the angle output from the arg processing unit 1123 as 1/2 for BPSK and 1/4 for QPSK. Since the symbol is squared or raised to the fourth power in the squared or fourth power processing unit 1121, the angle of the squared or fourth power is restored to the original by setting it to 1/2 or 1/4, and the angle of the current symbol point is changed. Desired. In the example of FIG. 5B, the angle of each symbol point is ¼.

  Returning to FIG. 2, the 1/2 or 1/4 processing unit 1124 outputs the angle reduced to 1/2 or 1/4 to the cumulative addition unit 1125.

  The cumulative addition unit 1125 detects the angular difference between the current symbol and the previous symbol, and cumulatively adds the angular difference. For example, the cumulative addition unit 1125 calculates the following.

  As is clear from Equation (8), the cumulative addition unit 1125 calculates, for example, an angular difference between symbols (or a phase difference between symbols), and adds the calculated angular difference to the cumulative addition result so far. The cumulative addition result is obtained. The cumulative addition unit 1125 outputs the calculated cumulative addition result to the linear interpolation unit 1126.

  The linear interpolation unit 1126 uses the cumulative addition result of the next symbol and the cumulative addition result of the current symbol to calculate the angular difference (or phase difference) between symbols and the angular difference (or phase difference) between samples. ). In mobile communication, for example, control CH demodulation section 104 and pilot demodulation section 105 reproduce control signals and pilot signal symbols from oversampled received signals. For example, the control CH demodulator 104 and the pilot demodulator 105 regenerate one symbol using 128 samples of the received signal, or, for example, 128 symbols of the control signal or pilot signal A received signal is included. The linear interpolation unit 1126 converts, for example, a phase difference between symbols into a phase difference between samples in the received signal. For example, the linear interpolation unit 1126 calculates the following linear interpolation value.

In Formula (9), n can take an integer value from 0 to 127.

  Note that although an example in which 128 samples are included in one symbol has been described in Equation (9), for example, the number of samples other than 128 samples such as 64 samples and 256 samples may be used. Is changed to such a sample number.

と変形することも可能である。線形補間部１１２６は、例えば、シンボル間における累積加算結果の差分を算出して、この差分をサンプル数で除算した結果を、サンプル毎に順次加算して、線形補間値を算出している。ただし、式（１０）において、ｎは０〜ｓまでの整数値を取り得る。 In Expression (9), (the next cumulative addition result−the current cumulative addition result) represents, for example, a difference in cumulative addition results between symbols or a phase difference between symbols. Therefore, the linear interpolation unit 1126 calculates a linear interpolation value based on, for example, the phase difference between symbols calculated by the cumulative addition unit 1125 and the number of received signal samples included between symbols. Alternatively, the linear interpolation unit 1126 calculates a linear interpolation value by sequentially adding, for each sample, a result obtained by dividing the calculated phase difference between symbols by the number of samples. When the number of received signal samples included between symbols is s, Equation (9) is

It is also possible to deform. For example, the linear interpolation unit 1126 calculates a linear interpolation value by calculating a difference of cumulative addition results between symbols and sequentially adding the result obtained by dividing the difference by the number of samples for each sample. However, in Formula (10), n can take an integer value from 0 to s.

  The linear interpolation unit 1126 outputs the calculated linear interpolation value to the polar processing unit 1127.

を計算する。ｐｏｌａｒ処理部１１２７は、算出した極座標点を処理遅延補間部１１２８へ出力する。 The polar processing unit 1127 converts a linear interpolation value represented as angle information (or phase difference information) into a polar coordinate point having a radius of 1. For example, when the polar processing unit 1127 sets the linear interpolation value to θ,

Calculate The polar processing unit 1127 outputs the calculated polar coordinate point to the processing delay interpolation unit 1128.

  For example, the processing delay interpolation unit 1128 assumes that the polar coordinate point received from the polar processing unit 1127 is a phase difference with respect to each sample of the received signal when input to the multiplication unit 103, and a frequency deviation removal signal including the phase difference. And output to the multiplication unit 103.

Then, the multiplier 103 calculates a complex multiplication of the sample n of the received signal and the complex conjugate (x ^* ) of the phase difference information x, and removes (or corrects) the frequency deviation with respect to the received signal.

<Operation example>
FIG. 6 is a flowchart illustrating an operation example in the frequency deviation removal processing unit 112.

  When the frequency deviation removal processing unit 112 starts processing (S10), the frequency deviation removal processing unit 112 converts the pilot signal output from the pilot demodulation unit 105 into symbols including the symbols of the pilot signal and the control signal output from the control CH demodulation unit 104. On the other hand, a square or fourth power (or double or quadruple) value is calculated. For example, the square or quadratic processing unit 1121 reads Expression (4) held in the internal memory for each symbol shown in Expression (3), and calculates Expression (4).

  Next, the frequency deviation removal processing unit 112 calculates a moving average of each symbol squared or squared (S20). For example, the moving average processing unit 1122 performs the following processing. That is, the moving average processing unit 1122 calculates Equation (6) using 10 symbols before and after the current symbol for each symbol output from the square or fourth power processing unit 1121. In this case, the moving average processing unit 1122 holds Equation (6) in the internal memory, and holds the 10 symbols before and after being output from the square or fourth power processing unit 1121 in the internal memory. Then, the moving average processing unit 1122 calculates the moving average by reading Expression (6) and the preceding and following 10 symbols from the internal memory and substituting them into Expression (6).

  Next, the frequency deviation removal processing unit 112 performs arg processing on the moving average (S40). For example, the arg processing unit 1123 performs the following processing. In other words, the arg processing unit 1123 holds the equation (7) in the internal memory, and substitutes the moving average output from the moving average processing unit 1122 into the equation (7), thereby moving the moving average indicated as the polar coordinate point. Is converted to an angle.

  Next, the frequency deviation removal process part 112 makes the angle after conversion 1/2 or 1/4 (S50). For example, the 1/2 or 1/4 processing unit 1124 sets the angle output from the arg processing unit 1123 to 1/2 when the control signal demodulation method is BPSK, and 1/4 when the control signal demodulation method is QPSK. To. Therefore, the 1/2 or 1/4 processing unit 1124 may receive, for example, information indicating what demodulation method the control signal was demodulated from the control CH demodulation unit 104.

  Next, the frequency deviation removal processing unit 112 cumulatively adds the angles that are ½ or ¼ to calculate a cumulative addition value (S60). For example, the cumulative addition unit 1125 performs the following processing. That is, the cumulative addition unit 1125 holds Expression (8) in the internal memory. Further, the cumulative addition unit 1125 holds the angle with respect to the current symbol and the angle with respect to the previous symbol output from the 1/2 or 1/4 processing unit 1124 in the internal memory. Then, the cumulative addition unit 1125 reads equation (8) and the angle of each symbol from the internal memory, substitutes each angle of the current symbol and the previous symbol into equation (8), and performs cumulative addition. Calculate the value. The cumulative addition unit 1125 calculates, for example, a phase difference between symbols input to the frequency deviation removal processing unit 112 by calculating a cumulative addition value.

  Next, the frequency deviation removal process part 112 performs a linear interpolation process with respect to a cumulative addition result (S70). For example, the linear interpolation unit 1126 performs the following processing. That is, the linear interpolation unit 1126 holds the accumulation result for the current symbol output from the accumulation addition unit 1125 and the accumulation result for the next symbol in the internal memory. In addition, the linear interpolation unit 1126 holds Equation (9) in the internal memory. Then, the linear interpolation unit 1126 reads each accumulated result and Equation (9) from the internal memory, and substitutes each accumulated result into Equation (9) or Equation (10) to calculate a linear interpolation value. . For example, the linear interpolation unit 1126 converts a phase difference between symbols into a phase difference between samples of the received signal by calculating a linear interpolation value.

  Next, the frequency deviation removal processing unit 112 performs polar processing on the linear interpolation result (S80). For example, the polar processing unit 1127 reads the equation (11) held in the internal memory, and substitutes the linear interpolation value output from the linear interpolation unit 1126 into θ in the equation (11). Accordingly, the polar processing unit 1127 converts the angle or the phase difference into polar coordinate points having a radius of 1.

  Next, the frequency deviation removal processing unit 112 performs processing delay interpolation processing (S90). For example, the processing delay interpolation unit 1128 outputs the polar coordinate point received from the polar processing unit 1127 to the multiplication unit 103. In this case, the polar coordinate point output from the processing delay interpolation unit 1128 is output to the multiplication unit 103 as a phase difference at the timing of the reception signal input to the multiplication unit 103.

  Then, the multiplier 103 multiplies (or complex multiplies) each sample of the received signal by the phase difference expressed as a polar coordinate point output from the processing delay interpolator 1128 (S100). Thereby, for example, the receiving apparatus 100 can obtain a received signal from which a minute residual frequency deviation is removed.

  Then, the frequency deviation removal processing unit 112 ends the series of processes (S110).

  The threshold determination unit 111 controls the operation of the frequency deviation removal processing unit 112 based on the frequency control signal output from the AFC unit 108.

  In the case of QPSK, when the phase difference between symbols indicated by the frequency control signal exceeds 360/4 (n = 4) / 2 degrees = 45 degrees, the AFC control malfunctions without being correctly demodulated. For example, in FIG. 3A, when the reception signal point corresponding to the transmission signal point originally in the first quadrant has a phase difference exceeding 45 degrees, the reception signal corresponding to the transmission signal point in the second quadrant Is misrecognized. In this case, the receiving device cannot accurately demodulate the received signal.

  Therefore, when the phase difference indicated by the frequency control signal exceeds the threshold value, threshold determination section 111 outputs an instruction signal for instructing not to operate frequency deviation removal processing section 112 to frequency deviation removal processing section 112. . In this case, for example, the frequency deviation removal processing unit 112 outputs to the multiplication unit 103 a mask obtained by masking the polar coordinate point output from the processing delay interpolation unit 1128 with (1, 0) (“0” in phase difference). . As an example of the threshold value, an angle smaller than 45 degrees in the case of QPSK and an angle smaller than 90 degrees in the case of BPSK may be used in order to remove a minute residual frequency deviation.

  On the other hand, when the phase difference indicated by the frequency control signal is equal to or smaller than the threshold value, threshold determination section 111 outputs an instruction signal for instructing to operate frequency deviation removal processing section 112 to frequency deviation removal processing section 112. . In this case, for example, the frequency deviation removal processing unit 112 outputs the output from the processing delay interpolation unit 1128 to the multiplication unit 103 as it is.

  As described above, in the first embodiment, the frequency deviation removal processing unit 112 calculates the phase difference between symbols using not only the pilot signal symbols but also the control signal symbols, and then linear interpolation. Thus, the phase difference between the samples of the received signal is calculated.

  Therefore, when two symbols are used, the number of symbols increases as compared with the case where no control signal symbol is used, and therefore the accuracy of the estimated phase difference between symbols and between samples is improved. Moreover, in the first embodiment, since the phase difference between samples is estimated without extending the average interval, it is possible to prevent a delay in response speed of phase difference estimation.

  In the first embodiment, receiving apparatus 100 corrects (or removes) the phase difference between samples of the received signal, and demodulates the pilot signal with respect to the corrected received signal. . For this reason, the phase difference between the symbols of the demodulated pilot signal is smaller or eliminated compared to the case where the phase difference between samples is not corrected (or removed). Therefore, since the AFC unit 108 acquires frequency deviation information based on a pilot signal in which the phase difference between samples is corrected (or removed), the frequency deviation is smaller than that in the case of using an uncorrected pilot signal. The accuracy of information is also high. Therefore, the AFC unit 108 can perform AFC control that removes the frequency deviation quickly and accurately.

  Furthermore, the CQI estimation unit 107 can also estimate CQI based on a pilot signal in which the phase difference between samples is corrected (or removed), compared with the case where an uncorrected pilot signal is used. A high CQI can be estimated. Therefore, the transmitting apparatus can allocate sufficient radio resources to the receiving apparatus 100 based on such CQI. Therefore, the receiving device 100 can transmit and receive data using the allocated radio resource, and can improve the throughput.

  FIG. 7A is a diagram illustrating a hardware configuration example of the receiving device 100 when the receiving device 100 is the base station device 130. FIG. 7B is a diagram illustrating a hardware configuration example of the receiving device 100 when the receiving device 100 is the terminal device 140.

  The base station apparatus 130 includes an antenna 101 (124), an RF (Radio Frequency) circuit 131, a network IF (Interface) 132, a CPU (Central Processing Unit) 133, a DSP (Digital Signal Processor) 134, and a memory 135.

  The CPU 133 executes the function of the application processing unit 121 by reading and executing the program stored in the memory 135. The CPU 133 corresponds to the application processing unit 121, for example.

  Further, the DSP 134 includes, for example, a multiplication unit 103, a control CH demodulation unit 104, a pilot demodulation unit 105, a channel estimation unit 106, a CQI estimation unit 107, an AFC unit 108, a TCXO 109, a data CH demodulation unit 110, and a frequency deviation removal processing unit 112. Corresponding to The DSP 134 corresponds to the decoding processing unit 120 and the transmission processing unit 122, for example.

  Further, the RF circuit 131 corresponds to the reception RF unit 102 and the transmission RF unit 123, for example.

  1 is a base station apparatus 130, for example, further includes a scheduler. The scheduler inputs the output of the CQI estimation unit 107 and the output of the decoding processing unit 120, and based on the CQI from the CQI estimation unit 107 and the CQI transmitted from the terminal device 140 received from the decoding processing unit 120. Scheduling may be performed. The scheduler outputs the scheduling result to the transmission processing unit 122 and transmits it to the terminal device 140.

  The terminal device 140 includes an antenna 101 (124), an RF circuit 141, a CPU 143, a DSP 144, and a memory 145.

  The CPU 143 reads out and executes the program stored in the memory 145, thereby executing a function in the application processing unit 121. The CPU 143 corresponds to the application processing unit 121, for example.

  Further, the DSP 144 includes, for example, a multiplier 103, a control CH demodulator 104, a pilot demodulator 105, a channel estimator 106, a CQI estimator 107, an AFC unit 108, a TCXO 109, a data CH demodulator 110, and a frequency deviation removal processor 112. Corresponding to The DSP 144 corresponds to the decoding processing unit 120 and the transmission processing unit 122, for example.

  7A and 7B, instead of the CPUs 133 and 143, a processor or controller such as an MPU (Micro Processing Unit), a DSP, or an FPGA (Field Programmable Gate Array) may be used. Further, instead of the DSPs 134 and 144, a processor or controller such as a CPU, MPU, or FPGA may be used.

[Second Embodiment]
Next, a second embodiment will be described. FIG. 8 is a diagram illustrating a configuration example of the reception device 100 according to the second embodiment.

  The receiving apparatus 100 includes a pilot signal demodulator 105, an oscillator 109, a frequency controller 108, a control signal demodulator 104, a frequency deviation remover 112, and a multiplier 103.

  For example, the pilot signal demodulator 105 corresponds to the pilot demodulator 105 of the first embodiment, the oscillator 109 corresponds to the TCXO 109 in the first embodiment, and the frequency controller 108 corresponds to the first This corresponds to the AFC unit 108 in the embodiment. The control signal demodulator 104 corresponds to, for example, the control CH demodulator 104 in the first embodiment.

  Pilot signal demodulating section 105 demodulates the pilot signal from the received signal. The frequency control unit 108 estimates the frequency deviation of the pilot signal based on the demodulated pilot signal, and controls the oscillation frequency of the oscillator 109 based on the estimated frequency deviation.

  The control signal demodulator 104 demodulates the control signal from the received signal.

  The frequency deviation removing unit 112 calculates a phase difference between symbols of symbols including the first symbol of the demodulated pilot signal and the second symbol of the demodulated control signal. Then, the frequency deviation removing unit 112 linearly interpolates the calculated phase difference to calculate the phase difference between samples of the received signal.

  Multiplier 103 multiplies the phase difference between the samples of the received signal by each sample of the received signal, and outputs the multiplied received signal to pilot signal demodulator 105 and control signal demodulator 104.

  As described above, in the second embodiment, the frequency deviation removing unit 112 calculates the phase difference between symbols by using not only the pilot signal symbols but also the control signal symbols, and linear interpolation is performed. The phase difference between samples of the received signal is calculated. Therefore, when two symbols are used in the frequency deviation removal unit 112, the number of symbols increases as compared with the case where no symbol of the control signal is used, so that the accuracy of the phase difference between the estimated symbols and between the samples is increased. Will improve.

  In the second embodiment, the receiving apparatus 100 corrects (or removes) the phase difference between the samples of the received signal, and the pilot signal demodulating unit 105 corrects the received signal after correction. The pilot signal is demodulated. For this reason, the phase difference between the symbols of the demodulated pilot signal is smaller or eliminated compared to the case where the phase difference between samples is not corrected (or removed). Therefore, since the frequency control unit 108 acquires frequency deviation information based on the pilot signal in which the phase difference between samples is corrected (or removed), the frequency control unit 108 has a frequency compared to the case of using an uncorrected pilot signal. The accuracy of the deviation information is also high. Therefore, the frequency control unit 108 can perform AFC control on the oscillator 109 with the frequency deviation removed quickly and accurately.

  Furthermore, in the second embodiment, the phase difference between samples is corrected (or removed), and the CQI can be estimated based on the pilot signal demodulated by the pilot signal demodulation section 105. Therefore, compared with a case where a pilot signal that is not corrected is used, receiving apparatus 100 can estimate CQI with higher accuracy. Therefore, the transmitting apparatus can allocate sufficient radio resources to the receiving apparatus 100 based on such CQI, and can improve the throughput.

  The above is summarized as an appendix.

(Appendix 1)
A pilot signal demodulator that demodulates the pilot signal from the received signal;
A frequency controller that estimates a frequency deviation of the pilot signal based on the demodulated pilot signal, and controls an oscillation frequency of an oscillator based on the estimated frequency deviation;
A control signal demodulator that demodulates the control signal from the received signal;
A phase difference between symbols of a symbol including the demodulated first symbol of the pilot signal and a demodulated second symbol of the control signal is calculated, and the received signal is linearly interpolated with the calculated phase difference. A frequency deviation removing unit for calculating a phase difference between the samples,
A multiplier that multiplies the phase difference between the samples of the received signal by each sample of the received signal and outputs the multiplied received signal to the pilot signal demodulator and the control signal demodulator. A receiving device.

(Appendix 2)
The frequency deviation removing unit calculates a linear interpolation value obtained by linearly interpolating the phase difference based on the calculated phase difference between symbols and the number of samples of the received signal included between the symbols. The receiving apparatus according to appendix 1, characterized by comprising:

(Appendix 3)
The linear interpolation unit calculates the linear interpolation value by sequentially adding, for each sample, a result obtained by dividing the calculated phase difference between symbols by the number of samples of the received signal included between the symbols. The receiving apparatus according to appendix 2, characterized in that:

（ただし、ｎ＝０〜ｓまでの整数値、ｓはシンボル間の受信信号のサンプル数） (Appendix 4)
The frequency deviation removal unit includes a cumulative addition unit that cumulatively adds the phase difference,
The linear interpolation unit calculates a difference of cumulative addition results between symbols with respect to the cumulative addition result output from the cumulative addition unit, and reads the difference and the cumulative addition result from the internal memory according to the following: The receiving apparatus according to appendix 3, wherein the linear interpolation value is calculated by substituting into the equation (12).

(Where n = 0 to s, where s is the number of received signal samples between symbols)

(Appendix 5)
The frequency deviation removing unit is
When the control signal demodulation unit demodulates the control signal by Binary Phase Shift Keying (BPSK) with respect to the symbols including the first symbol and the second symbol, a square value, QPSK (Quadrature Phase) When the control signal is demodulated by Shift Keying), a square or fourth power processing unit that calculates a fourth power value,
A moving average processing unit for calculating a moving average of a plurality of symbols with respect to the symbol after the square or the fourth power;
An arg processing unit that converts the moving average represented by polar coordinate points into an angle;
When the control signal is demodulated by BPSK in the control signal demodulator, the angle is halved, and when the control signal is demodulated by QPSK, the angle is ¼ or 1/4. A processing unit;
A cumulative addition unit that cumulatively adds the angles calculated by the 1/2 or 1/4 processing unit;
The difference of the cumulative addition result between symbols with respect to the cumulative addition result output from the cumulative addition unit is divided by the number of samples of the received signal included between the symbols as the calculated phase difference between symbols. The results are sequentially added for each sample to calculate a linear interpolation value, and a linear interpolation unit;
A polar processing unit for converting the linear interpolation value represented by an angle into a polar coordinate point having a radius of 1,
The reception delay according to claim 1, further comprising: a processing delay interpolation unit that outputs the polar coordinate point of radius 1 output from the polar processing unit to the multiplication unit as a phase difference between samples of the reception signal. apparatus.

(Appendix 6)
A frequency deviation removal method in a receiver having a pilot signal demodulation unit, a frequency control unit, a control signal demodulation unit, a frequency deviation removal unit, and a multiplication unit,
The pilot signal demodulator demodulates the pilot signal from the received signal,
The frequency controller estimates the frequency deviation of the pilot signal based on the demodulated pilot signal, and controls the oscillation frequency of the oscillator based on the estimated frequency deviation,
The control signal demodulator demodulates the control signal from the received signal,
The frequency deviation removing unit calculates a phase difference between symbols of a symbol including the demodulated first symbol of the pilot signal and the demodulated second symbol of the control signal, and linearly calculates the calculated phase difference. Interpolate to calculate the phase difference between samples of the received signal,
The multiplication unit multiplies the phase difference between samples of the reception signal by each sample of the reception signal, and outputs the reception signal after multiplication to the pilot signal demodulation unit and the control signal demodulation unit. A characteristic frequency deviation removal method.

DESCRIPTION OF SYMBOLS 100: Reception apparatus 102: Reception RF part 103: Multiplication part 104: Control CH demodulation part 105: Pilot demodulation part 106: Channel estimation part 107: CQI estimation part 108: AFC part 109: TCXO 110: Data CH demodulation part 111: Threshold Determination unit 112: Frequency deviation removal processing unit 130: Base station device 140: Terminal device 1121: Square or fourth power processing unit 1122: Moving average processing unit 1123: Arg processing unit 1124: 1/2 or 1/4 processing unit 1125: Cumulative addition Unit 1126: linear interpolation unit 1127: polar processing unit 1128: processing delay interpolation unit

Claims (4)

A pilot signal demodulator that demodulates the pilot signal from the received signal;
A frequency controller that estimates a frequency deviation of the pilot signal based on the demodulated pilot signal, and controls an oscillation frequency of an oscillator based on the estimated frequency deviation;
A control signal demodulator that demodulates the control signal from the received signal;
A phase difference between symbols of the demodulated first symbol of the pilot signal and a second symbol of the demodulated control signal is calculated, and the received signal is linearly interpolated to calculate the phase difference. A frequency deviation removing unit for calculating a phase difference between the samples,
A multiplier that multiplies the phase difference between the samples of the received signal by each sample of the received signal and outputs the multiplied received signal to the pilot signal demodulator and the control signal demodulator. A receiving device.   The frequency deviation removing unit calculates a linear interpolation value obtained by linearly interpolating the phase difference based on the calculated phase difference between symbols and the number of samples of the received signal included between the symbols. The receiving apparatus according to claim 1, further comprising:   The linear interpolation unit calculates the linear interpolation value by sequentially adding, for each sample, a result obtained by dividing the calculated phase difference between symbols by the number of samples of the received signal included between the symbols. The receiving apparatus according to claim 2. A frequency deviation removal method in a receiver having a pilot signal demodulation unit, a frequency control unit, a control signal demodulation unit, a frequency deviation removal unit, and a multiplication unit,
The pilot signal demodulator demodulates the pilot signal from the received signal,
The frequency controller estimates the frequency deviation of the pilot signal based on the demodulated pilot signal, and controls the oscillation frequency of the oscillator based on the estimated frequency deviation,
The control signal demodulator demodulates the control signal from the received signal,
The frequency deviation removing unit calculates a phase difference between symbols of a symbol including the demodulated first symbol of the pilot signal and the demodulated second symbol of the control signal, and linearly calculates the calculated phase difference. Interpolate to calculate the phase difference between samples of the received signal,
The multiplication unit multiplies the phase difference between samples of the reception signal by each sample of the reception signal, and outputs the reception signal after multiplication to the pilot signal demodulation unit and the control signal demodulation unit. A characteristic frequency deviation removal method.

Images