JP2018169996A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device having a highly reliable inter-substrate connection part. A display device DSP includes a first substrate having a first insulating substrate 10, a first conductive layer L1, a second insulating substrate 20 including a first through hole VA, a second conductive layer, and a second conductive layer. , And a connecting material C that electrically connects the first conductive layer and the second conductive layer through the first through hole VA. On the first plane Pa, the angle θ1 is 45 ° or more. [Selection] Figure 8

Description

  Embodiments described herein relate generally to a display device.

  In recent years, various techniques for narrowing the frame of a display device have been studied. In one example, a wiring portion having an in-hole connecting portion inside a hole penetrating the inner surface and the outer surface of the resin-made first substrate and a wiring portion provided on the inner surface of the resin-made second substrate are connected between the substrates. A technique of being electrically connected by a unit is disclosed.

JP 2002-40465 A

  The present embodiment provides a display device having a highly reliable inter-substrate connection.

A display device according to an embodiment includes:
A first substrate having a first insulating substrate and a first conductive layer; a first main surface facing the first conductive layer and positioned away from the first conductive layer; and the first main surface; Is provided on the second main surface, and includes a second insulating substrate including a second main surface on the opposite side, and a first through hole penetrating between the first main surface and the second main surface. A second substrate having a second conductive layer, and a connecting material for electrically connecting the first conductive layer and the second conductive layer through the first through hole, the first through hole A first straight line extending along the normal and a first main surface side first of the first through hole on a virtual first plane passing through the first parallel to the normal of the first main surface. The angle formed by the second straight line connecting the opening end and the second opening end on the second main surface side of the first through hole is 45 ° or more.

FIG. 1 is a plan view illustrating a configuration example of the display device according to the first embodiment. FIG. 2 is a plan view schematically showing a basic configuration and an equivalent circuit of the display panel shown in FIG. FIG. 3 is a cross-sectional view showing a display area of the display panel shown in FIG. FIG. 4 is a plan view showing a configuration example of the sensor according to the first embodiment. FIG. 5 is a cross-sectional view of the display device taken along line VV in FIG. FIG. 6 is a plan view showing the second conductive layer and the second main surface shown in FIG. FIG. 7 is a plan view showing the connection hole and the second main surface shown in FIG. FIG. 8 is a cross-sectional view showing the display panel taken along line VIII-VIII in FIG. FIG. 9 is a cross-sectional view showing a part of the display panel taken with an electron microscope, such as a second insulating substrate in which a first through hole is formed. FIG. 10 is a cross-sectional view showing the display panel shown in FIG. 8 for explaining the shape of the connection hole. FIG. 11 is a plan view showing a connection hole and a second main surface according to Modification 1 of the first embodiment. FIG. 12 is a cross-sectional view showing the display panel taken along line XII-XII in FIG. FIG. 13 is a cross-sectional view showing the display panel taken along line XIII-XIII in FIG. FIG. 14 is a plan view showing a connection hole and a second main surface according to Modification 2 of the first embodiment. FIG. 15 is a cross-sectional view showing the display panel taken along line XV-XV in FIG. FIG. 16 is a cross-sectional view showing a part of a display panel according to Modification 3 of the first embodiment. FIG. 17 is a cross-sectional view showing a part of a display panel according to Modification 4 of the first embodiment. FIG. 18 is a cross-sectional view showing a part of the display panel according to the second embodiment. FIG. 19 is a plan view showing a connection hole and a second main surface according to the third embodiment. FIG. 20 is a cross-sectional view showing the display panel taken along line XX-XX in FIG. FIG. 21 is a cross-sectional view showing the display panel taken along line XXI-XXI in FIG. FIG. 22 is a plan view showing a second main surface in the manufacturing process of the display device according to the third embodiment, wherein the second insulating substrate is irradiated with laser light to partially alter the second insulating substrate. It is a figure for demonstrating the state which exists. 23 is a cross-sectional view showing the display panel taken along line XXIII-XXIII in FIG. FIG. 24 is a plan view showing a connection hole and a second main surface according to Modification 1 of the third embodiment. 25 is a cross-sectional view showing the display panel taken along line XXIV-XXIV in FIG. FIG. 26 is a plan view showing a connection hole and a second main surface according to the fourth embodiment. 27 is a cross-sectional view of the display panel taken along line XXVII-XXVII in FIG. FIG. 28 is a cross-sectional view showing the display panel in the manufacturing process of the display device according to the fourth embodiment, and is a diagram for explaining a state in which a plurality of holes having different sizes are formed in the second insulating substrate. It is. FIG. 29 is a cross-sectional view showing the display panel in the manufacturing process, continued from FIG. 28, and is a view for explaining a state in which the display panel is irradiated with laser light. FIG. 30 is a cross-sectional view showing a part of a display panel according to Modification 1 of the fourth embodiment. FIG. 31 is a cross-sectional view illustrating a display panel in a manufacturing process of a display device according to Modification 1 of the fourth embodiment, and is a diagram for explaining a state in which a connection hole is formed in the display panel. is there. FIG. 32 is a plan view showing another configuration example of the display device. FIG. 33 is a cross-sectional view showing a part of the display panel. FIG. 34 is a plan view showing the first conductive layer and the organic insulating film shown in FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, for the sake of clarity, the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each part as compared to the actual embodiment, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

  In each embodiment, the display device can be used in various devices such as a smartphone, a tablet terminal, a mobile phone terminal, a notebook personal computer, and a game machine. The main configuration disclosed in each embodiment includes a self-luminous display device such as a liquid crystal display device and an organic electroluminescence display device, an electronic paper display device having an electrophoretic element, and a micro electro mechanical systems (MEMS). The present invention can be applied to a display device applied or a display device applying electrochromism.

  In each of the embodiments described below, the first insulating substrate and the second insulating substrate are arranged with a space therebetween, the second insulating substrate has a through hole, and the first conductive layer positioned on the first insulating substrate and the second insulating substrate The present invention can be applied to various display devices having an inter-substrate conduction structure in which a second conductive layer located on two insulating substrates is electrically connected through the through hole.

(First embodiment)
First, the first embodiment will be described. FIG. 1 is a plan view illustrating an example of the display device DSP according to the first embodiment. The first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but may intersect at an angle other than 90 °. The first direction X and the second direction Y correspond to the direction parallel to the main surface of the substrate constituting the display device DSP, and the third direction Z corresponds to the thickness direction of the display device DSP. Here, a liquid crystal display device equipped with a sensor SS will be described as an example of the display device DSP.

As shown in FIG. 1, the display device DSP includes a display panel PNL, an IC chip 1, a wiring board 3, a backlight unit BL described later, and the like. The display panel PNL is a liquid crystal display panel, and includes a first substrate SUB1, a second substrate SUB2, a sealing material SE, and a liquid crystal layer LC. The second substrate SUB2 faces the first substrate SUB1 in the third direction Z. The seal material SE corresponds to a portion indicated by a diagonal line rising to the right in FIG. 1, and bonds the first substrate SUB1 and the second substrate SUB2. The liquid crystal layer LC is located in the space between the first substrate SUB1 and the second substrate SUB2 inside the sealing material SE.
In the following description, the direction from the first substrate SUB1 toward the second substrate SUB2 is referred to as “upward”, and the direction from the second substrate SUB2 toward the first substrate SUB1 is referred to as “downward”. Further, viewing from the second substrate SUB2 toward the first substrate SUB1 is referred to as a plan view.

  The display panel PNL includes a display area DA for displaying an image and a non-display area NDA provided along the outer edge of the display area DA. The display area DA is located inside the seal material SE. The non-display area NDA is a frame-shaped area surrounding the display area DA and is adjacent to the display area DA. The sealing material SE is located in the non-display area NDA.

  The IC chip 1 is mounted on the wiring board 3. The IC chip 1 may be mounted on the first substrate SUB1 that extends outward from the second substrate SUB2 and is not limited to the example shown in FIG. May be implemented. The IC chip 1 includes, for example, a display driver DD that outputs a signal necessary for displaying an image. The display driver DD may include, for example, at least a part of a signal line driving circuit SD, a scanning line driving circuit GD, and a common electrode driving circuit CD, which will be described later. In the example shown in FIG. 1, the IC chip 1 includes a detection circuit RC that functions as a touch panel controller or the like. The detection circuit RC may be built in another IC chip different from the IC chip 1.

  The sensor SS performs sensing for detecting contact or approach of an object to be detected with the display device DSP. The sensor SS is a capacitance-type mutual capacitance method, and can detect contact or approach of an object to be detected based on a change in capacitance between a pair of electrodes opposed via a dielectric. The sensor SS includes a plurality of sensor drive electrodes Tx and a plurality of detection electrodes Rx (Rx1, Rx2, Rx3, Rx4...). The sensor drive electrode Tx will be described later.

  The detection electrode Rx includes a main body RS that crosses the display area and a connection portion CN that connects a plurality of main bodies. Each detection electrode Rx includes a terminal portion RT (RT1, RT2, RT3, RT4...) Connected to the connection portion CN.

The main body RS has a strip shape formed by an aggregate of fine metal wires formed in a mesh shape. Further, between adjacent main body parts RS, there is a dummy region in which fine metal wires are arranged in substantially the same arrangement as the main body part RS. The fine metal wire in the dummy region is not connected to any wiring and is in an electrically floating state.
Further, at least a part of the terminal portion RT is positioned so as to overlap the sealing material SE in plan view. The terminal portion RT is located on the one end side or the other end side of the non-display area NDA.

  The first substrate SUB1 includes pads P (P1, P2, P3, P4...) And wirings W (W1, W2, W3, W4...). The pad P and the wiring W are located on one end side or the other end side of the non-display area NDA and overlap the seal material SE in plan view. The pad P overlaps the terminal portion RT in plan view. The wiring W is connected to the pad P and is electrically connected to the detection circuit RC of the IC chip 1 through the wiring board 3.

  The connection holes V (V1, V2, V3, V4...) Are formed at positions where the terminal portions RT and the pads P face each other. The connection hole will be described later.

FIG. 2 is a plan view schematically showing a basic configuration and an equivalent circuit of the display panel PNL shown in FIG.
As shown in FIG. 2, the display panel PNL includes a plurality of pixels PX in the display area DA. Here, the pixel indicates a minimum unit that can be individually controlled according to a pixel signal, and includes, for example, a switching element SW arranged at a position where a scanning line and a signal line, which will be described later, intersect. The plurality of pixels PX are arranged in a matrix in the first direction X and the second direction Y. The display panel PNL includes a plurality of scanning lines G (G1 to Gn), a plurality of signal lines S (S1 to Sm), a common electrode CE, and the like in the display area DA.

  The scanning line G, the signal line S, and the common electrode CE are each drawn out to the non-display area NDA. In the non-display area NDA, the scanning line G is connected to the scanning line driving circuit GD, the signal line S is connected to the signal line driving circuit SD, and the common electrode CE is connected to the common electrode driving circuit CD.

  FIG. 3 is a cross-sectional view of the display device DSP cut in the first direction X in the display area DA. In the example shown in FIG. 3, the display panel PNL has a configuration corresponding to a display mode that mainly uses a horizontal electric field along the XY plane. The display panel PNL has a configuration corresponding to a vertical electric field from the first substrate to the second substrate, an oblique electric field between the vertical electric field and the horizontal electric field, or a display mode using a combination thereof. It may be.

  As shown in FIG. 3, the first substrate SUB1 includes a first insulating substrate 10, and a first insulating film 11, a signal line S, a second insulating film 12, a common electrode CE, and an upper surface (third main surface) thereof. The metal layer M, the third insulating film 13, the pixel electrode PE, the first alignment film AL1, and the like are laminated in this order. In FIG. 3, the switching elements, the scanning lines, various insulating films interposed between these elements are omitted.

  The second substrate SUB2 includes a second insulating substrate 20, and a light shielding layer BM, a color filter CF, an overcoat layer OC, a second alignment film AL2, and the like are laminated in this order on the lower surface (first main surface). ing.

Next, a configuration example of the sensor SS mounted on the display device DSP of the present embodiment will be described.
As shown in FIG. 4, the sensor SS includes a sensor drive electrode Tx and a detection electrode Rx. In the example shown in FIG. 4, the sensor drive electrode Tx corresponds to the portion indicated by the diagonally downward slanting line and is provided on the first substrate SUB1. Further, the detection electrode Rx corresponds to a portion indicated by a diagonal line rising to the right, and is provided on the second substrate SUB2. The sensor drive electrode Tx and the detection electrode Rx intersect each other in the XY plane.

  In the example shown in FIG. 4, the sensor drive electrodes Tx each have a strip shape extending in the second direction Y, and are arranged at intervals in the first direction X.

  Each of the sensor drive electrodes Tx is electrically connected to the common electrode drive circuit CD via the wiring WR. In the present embodiment, the plurality of sensor drive electrodes Tx are formed by the common electrode CE. That is, in this embodiment, the common electrode is patterned in a strip shape as shown in FIG. The sensor drive electrode Tx has a function of generating an electric field with the pixel electrode PE and a function of detecting the position of the detection object by generating a capacitance with the detection electrode Rx. Yes.

  The common electrode drive circuit CD supplies a common signal to the sensor drive electrode Tx including the common electrode CE during a display period in which an image is displayed in the display area DA. Further, the common electrode drive circuit CD supplies a sensor drive signal to the sensor drive electrode Tx during a sensing period (touch period) in which sensing is performed. As the sensor drive signal is supplied to the sensor drive electrode Tx, the detection electrode Rx outputs a sensor signal necessary for sensing, that is, a signal based on a change in capacitance between the sensor drive electrode Tx and the detection electrode Rx. To do. The sensor signal output from the detection electrode Rx is input to the detection circuit RC shown in FIG.

  The sensor SS is not limited to the mutual capacitance sensor described above, and may be a self-capacitance sensor that detects an object to be detected based on a change in capacitance of the detection electrode Rx itself.

Next, the connection holes V (V1, V2, V3, V4...) Will be described. FIG. 5 is a schematic cross-sectional view of the display device DSP along the line VV in FIG.
As shown in FIG. 5, the display device DSP includes a first substrate SUB1, a second substrate SUB2, an organic insulating film OI, a connecting material C, a first polarizing plate PL1, a second polarizing plate PL2, and a cover. And a material CG. The first polarizing plate PL1 is attached to the first substrate SUB1 with the adhesive layer AD1. The second polarizing plate PL2 is attached to the second substrate SUB2 with the adhesive layer AD2.

  The first substrate SUB1 includes the above-described first insulating substrate 10 and the first conductive layer L1. The first conductive layer L1 includes the aforementioned pads P (P1, P2, P3, P4...) And wirings W (W1, W2, W3, W4...), And is on the third main surface 10A side facing the second substrate SUB2. Is located. Between the first insulating substrate 10 and the pad P and between the first insulating substrate 10 and the second insulating film 12, the first insulating film 11 shown in FIG. 3, other insulating films, and other conductive layers are provided. May be arranged.

  The second substrate SUB2 includes the second insulating substrate 20 and the second conductive layer L2. The first main surface 20A of the second insulating substrate 20 faces the first conductive layer L1 and is located away from the first conductive layer L1 in the third direction Z. The second conductive layer L2 includes the detection electrode Rx, that is, the terminal portion RT (RT1, RT2, RT3, RT4...), The connection portion CN, and the main body portion RS. The second conductive layer L2 is located on the second main surface 20B side and is covered with the protective film PF. In other words, the first insulating substrate 10, the first conductive layer L1, the second insulating substrate 20, the second conductive layer L2, and the protective film PF are arranged in the third direction Z in this order.

  An organic insulating film OI is located between the first conductive layer L1 and the second insulating substrate 20. Instead of the organic insulating film OI, an inorganic insulating film or another conductive layer may be located, or an air layer may be located. Various insulating films and various conductive layers may be disposed between the second insulating substrate 20 and the second conductive layer L2 or on the second conductive layer L2.

  For example, the organic insulating film OI includes a sealing material SE for bonding the first substrate SUB1 and the second substrate SUB2, the second insulating film 12 of the first substrate SUB1, the light shielding layer BM and the overcoat layer OC of the second substrate SUB2. Including. The sealing material SE is located between the second insulating film 12 and the overcoat layer OC. The liquid crystal layer LC is provided in the gap between the first substrate SUB1 and the second substrate SUB2, and is surrounded by the sealing material SE.

  Note that the metal layer M, the third insulating film 13, and the first alignment film AL1 shown in FIG. 3 may be interposed between the second insulating film 12 and the sealing material SE. The second alignment film AL2 shown in FIG. 3 may be interposed between the overcoat layer OC and the sealing material SE.

  The first and second insulating substrates 10 and 20 are made of non-alkali glass or transparent resin, for example. The protective film PF is formed of, for example, an organic insulating material such as an acrylic resin. The first and second conductive layers L1 and L2 are, for example, metal materials such as molybdenum, tungsten, titanium, aluminum, silver, copper, and chromium, alloys containing these metal materials, indium tin oxide (ITO), It is made of a transparent conductive material such as indium zinc oxide (IZO) or indium gallium oxide (IGO). The first and second conductive layers L1 and L2 may have a single layer structure or a multilayer structure.

  In the second substrate SUB2, a first through hole VA penetrating the second insulating substrate 20 in the non-display area NDA is formed. The first through hole VA penetrates between the first main surface 20A and the second main surface 20B. In the example shown in FIG. 5, the second conductive layer L2 does not exist at a position overlapping the first through hole VA.

  The display device DSP has a second through hole VB penetrating each organic insulating film OI in addition to the first through hole VA. The first through hole VA and the second through hole VB are in communication with each other and form the connection hole V described above. Unlike the present embodiment, the connection hole V may further include a through-hole penetrating the first conductive layer L <b> 1 and a recess formed in the first insulating substrate 10.

  The second through hole VB includes a through hole that penetrates the second insulating film 12, a through hole that penetrates the sealing material SE, a through hole that penetrates the light shielding layer BM and the overcoat layer OC, and the like. The first conductive layer L1 has an upper surface LT1 that is not covered with the organic insulating film OI in the second through hole VB.

  The second through hole VB is located immediately below the first through hole VA. Such a connection hole V can be formed by laser beam irradiation from above the second substrate SUB2 and etching. The various organic insulating films OI provided with the second through holes VB may be formed of a material that is more easily etched than the second insulating substrate 20 provided with the first through holes VA.

A connecting material C is disposed in the connecting hole V. The connection material C and the layers in which the connection holes V are formed, that is, the first substrate SUB1, the second substrate SUB2, and the organic insulating film OI form the inter-substrate conduction structure according to the present embodiment. The connecting material C preferably contains a metal material such as silver, for example, and contains a mixture of fine particles having a particle size of the order of several nanometers to several tens of nanometers in a solvent.
In addition, as for the connection material C adhering to the surface of the connection hole V, it may be considered that the solvent has evaporated and substantially only the metal material has adhered.

  The connection material C electrically connects the first conductive layer L1 and the second conductive layer L2 provided on different substrates through the connection holes V, respectively. The connection material C is located inside and outside the connection hole V. The connecting material C covers the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA, the inner peripheral surface of the organic insulating film OI in the second through hole VB, and the like. Further, the connecting material C is located above the second main surface 20B.

  In the example shown in FIG. 5, paying attention to the relationship between the connecting material C and the first conductive layer L1, the connecting material C is in contact with the upper surface LT1 of the pad P in the second through hole VB. When attention is paid to the relationship between the connecting material C and the second conductive layer L2, the connecting material C includes an inner peripheral surface R11, an upper surface R12, an outer peripheral surface R13, and a third convex portion R3 of the first convex portion R1, which will be described later. Are in contact with the inner circumferential surface R31.

In the example shown in FIG. 5, the connection material C is in contact with the inner peripheral surfaces of the first through hole VA and the second through hole VB, respectively, but the connection material C is not filled in the vicinity of the center thereof. . More specifically, the connecting material only covers these inner peripheral surfaces in the form of a film, and the layer thickness is thin.
In order to fill the hollow part of the through hole, the through hole is filled with the filler FI. The filler FI is formed of the same material as that of the protective film PF, for example. The connecting material C may fill up the through hole.

  The connecting material C is continuously formed between the first conductive layer L1 and the second conductive layer L2. As a result, the second conductive layer L2 is electrically connected to the above-described wiring substrate 3 via the connecting material C and the first conductive layer L1. Therefore, a control circuit for writing a signal to the second conductive layer L2 and reading a signal output from the second conductive layer L2 can be connected to the second conductive layer L2 via the wiring board 3. Therefore, it is not necessary to separately provide a wiring substrate for the second substrate SUB2 in order to connect the second conductive layer L2 and the control circuit.

The cover material CG is a flat type, is formed over the display area DA and the non-display area NDA, and covers the entire surface of the display panel PNL. A light shielding layer SH is formed on the surface of the cover material CG facing the display panel PNL. The light shielding layer SH is provided in the non-display area NDA. The light shielding layer SH covers the connection hole V, the connection material C, and the like.
The cover material CG is bonded to the second polarizing plate PL2 by the adhesive layer AL. For example, the adhesive layer AL is formed of an optical transparent resin (OCR: Optically Clear Resin). The adhesive layer AL has a substantially uniform thickness over the entire area.

Next, the second conductive layer L2 (terminal portion RT) of this embodiment will be described. FIG. 6 is a plan view of the terminal portion RT (RT1, RT2, RT3, RT4...) According to the present embodiment as viewed from the cover material CG side.
As shown in FIG. 6, the terminal portion RT includes a first ridge portion R1, a second ridge portion R2, a third ridge portion R3, and a fourth ridge portion that are concentric with the center of the connection hole. R4 and 5th protruding item | line part R5 are provided. These ridges R1 to R5 function as a flow stop for the connection material C and the filler FI injected into the connection hole V.

  As shown in FIG. 7, the connection hole V has a second opening end OP2 and a third opening end OP3. The second opening end OP2 is located on the second main surface 20B side of the connection hole V (first through hole VA). The third opening end OP3 is located on the first insulating substrate 10 side of the connection hole V. When attention is paid to the first through hole VA in the connection hole V, the first through hole VA has the second opening end OP2 and the first opening end OP1. The first opening end OP1 is located on the first main surface 20A side of the first through hole VA. In the example shown in FIG. 7, the first opening end OP1, the second opening end OP2, and the third opening end OP3 are each a perfect circle in a plan view and are concentric circles having the same center CEN.

  FIG. 8 is a cross-sectional view showing the display panel taken along line VIII-VIII in FIG. FIG. 8 is a cross section on a virtual first plane Pa passing through the connection hole V (first through hole VA). In the present embodiment, the first plane Pa passes through the center CEN of the connection hole V and is parallel to the side edge ES facing the connection hole V in the outer edge EO of the display area DA. In other words, the first plane Pa is parallel to the YZ plane defined by the second direction Y and the third direction Z (direction parallel to the normal line of the first main surface 20A).

  As shown in FIG. 8, on the virtual first plane Pa that passes through the first through hole VA and is parallel to the normal line of the first main surface 20A, the angle θ1 formed by the first straight line Ls1 and the second straight line Ls2 is 45 ° or more. Note that 45 ° ≦ θ1 <90 °. Here, the first straight line Ls1 extends along the normal line. The second straight line Ls2 connects the first opening end OP1 and the second opening end OP2 of the first through hole VA. In the present embodiment, on the first plane Pa, an angle formed by each of all tangents of the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA and the first straight line Ls1 is 45 ° or more. It is.

  In addition, on the first plane Pa, the angle θ2 formed by the second main surface 20B and the second straight line Ls2 on the inner side of the second insulating substrate 20 is 135 ° or more. Note that 135 ° ≦ θ2 <180 °. Here, the angles θ1 and θ2 in the region on the left side of the center CEN have been described as a representative. In the present embodiment, the angles θ1 and θ2 are the same in the region on the left side from the center CEN and the region on the right side from the center CEN.

  Next, attention is paid to the width of the first through hole VA and the thickness of the second insulating substrate 20. On the first plane Pa, the width of the first opening end OP1 of the first through hole VA is the first width WI1, the width of the second opening end OP2 of the first through hole VA is the second width WI2, and the second insulating substrate 20 is. The thickness in the third direction Z is defined as a first thickness T1. In the present embodiment, (WI2−WI1) / 2 ≧ T1. In the present embodiment, the inclination of the inner peripheral surface 20I is symmetrical with respect to the center CEN.

Here, the inventors of the present application created the display panel PNL according to the present embodiment and investigated the angle θ1. FIG. 9 is a view obtained by photographing a part of the display panel PNL with an electron microscope, and is a cross-sectional view showing the second insulating substrate 20 and the like in which the first through holes VA are formed.
As a result of investigating the angle θ1 based on FIG. 9, a result satisfying 45 ° ≦ θ1 was obtained.

Next, attention is focused on the entire connection hole V including the first through hole VA and the second through hole VB. FIG. 10 is a cross-sectional view showing the display panel PNL shown in FIG. 8, and is a view for explaining the shape of the connection hole V. As shown in FIG.
As shown in FIG. 10, on the first plane Pa, the angle θ3 formed by the first straight line Ls1 and the third straight line Ls3 is 45 ° or more. Note that 45 ° ≦ θ3 <90 °. Here, the third straight line Ls3 connects the third opening end OP3 and the second opening end OP2 of the connection hole V on the first insulating substrate 10 side. In the present embodiment, on the first plane Pa, each of all tangents of the inner peripheral surface 20I of the second insulating substrate 20 and the inner peripheral surface OII of the organic insulating film OI in the connection hole V, and the first straight line Ls1 The angle formed by, is 45 ° or more.

  In addition, on the first plane Pa, the angle θ4 formed by the second main surface 20B and the third straight line Ls3 on the inner side of the second insulating substrate 20 is 135 ° or more. Note that 135 ° ≦ θ4 <180 °. Here, the angles θ3 and θ4 in the region on the left side of the center CEN have been described as a representative. In the present embodiment, the angles θ3 and θ4 are the same in the region on the left side from the center CEN and the region on the right side from the center CEN.

  Next, attention is focused on the width of the connection hole V and the total thickness of the second insulating substrate 20 and the organic insulating film OI. On the first plane Pa, the width of the connection hole V on the first insulating substrate 10 side is the third width WI3, and the total thickness of the second insulating substrate 20 and the organic insulating film OI in the third direction Z is the second thickness T2. And Here, the second thickness T2 is the height of the connection hole V in the third direction Z, and is the distance in the third direction Z from the upper surface LT1 of the pad P to the second main surface 20B. The width of the second opening end OP2 of the connection hole V is the second width WI2. In the present embodiment, (WI2−WI3) / 2 ≧ T2. In the present embodiment, the inclination of the inner peripheral surfaces 20I and OII is symmetrical with respect to the center CEN.

According to the display device DSP according to the first embodiment configured as described above, in the connection hole, 45 ° ≦ θ1, and the inner peripheral surface 20I of the second insulating substrate 20 has a gentle slope. Can do. In the case of 45 ° ≦ θ1, a better throwing power of the connecting material C to the inner peripheral surface 20I can be obtained as compared with the case of 45 °> θ1. Thereby, the 1st conductive layer L1 and the 2nd conductive layer L2 can be favorably connected with the connection material C.
From the above, a display device DSP having a highly reliable inter-substrate connection can be obtained.

(Modification 1 of the first embodiment)
Next, Modification 1 of the first embodiment will be described.
As shown in FIG. 11, the first modification is different from the first embodiment with respect to the shape of the second opening end OP2. In plan view, the second opening end OP2 is elliptical and has a long axis AX. The long axis AX is parallel to the side edge ES of the display area DA. Compared to the case where the long axis AX is parallel to the first direction X, the non-display area NDA of the display panel PNL, in particular, the width of the end where the connection hole V is provided can be reduced. As a result, the frame can be narrowed.
The long axis AX may not be parallel to the second direction Y, and may be parallel to the first direction X, for example.

As shown in FIG. 12, on the virtual first plane Pa that passes through the first through hole VA and is parallel to the normal line of the first main surface 20A, the angle θ1 is 45 ° or more. In the first modification, on the first plane Pa, the angle formed by each of all tangents of the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA and the first straight line Ls1 is 45 °. That's it. Further, the angle θ2 is 135 ° or more on the first plane Pa. In the present embodiment, the angles θ1 and θ2 are the same in the region on the left side from the center CEN and the region on the right side from the center CEN.
On the first plane Pa, the width of the first opening end OP1 of the first through hole VA is defined as a first width WI1a, and the width of the second opening end OP2 of the first through hole VA is defined as a second width WI2a. In the first modification, (WI2a−WI1a) / 2 ≧ T1.

As shown in FIG. 13, on the other hand, on the virtual second plane Pb that passes through the first through hole VA and is orthogonal to the first plane Pa and parallel to the normal line of the first main surface 20A, the angle θ1 is less than 45 °. It is. In the first modification, on the second plane Pb, the angle formed by each of all tangents of the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA and the first straight line Ls1 is 45 °. Is less than. Further, the angle θ2 is less than 135 ° on the second plane Pb.
On the second plane Pb, the width of the first opening end OP1 of the first through hole VA is defined as a first width WI1b, and the width of the second opening end OP2 of the first through hole VA is defined as a second width WI2b. In the first modification, (WI2b−WI1b) / 2 <T1.
Also in the first modification, there is a first plane Pa that satisfies 45 ° ≦ θ1. For this reason, also in this modification 1, the effect similar to the said 1st Embodiment can be acquired.

(Modification 2 of the first embodiment)
Next, Modification 2 of the first embodiment will be described.
As shown in FIG. 14, the second modification is different from the first embodiment with respect to the shape of the second opening end OP2. The second opening end OP2 has a long axis AX parallel to the side edge ES. On the first plane Pa, the distance from the first opening end OP1 to the second opening end OP2 in the second direction Y is not the same.

As shown in FIG. 15, among the angles θ1, the left angle is θ1L and the right angle is θ1R. On the first plane Pa, the angle θ1L is 45 ° or more, and the angle θ1R is less than 45 °. Of the angles θ2, the left angle is θ2L and the right angle is θ2R. On the first plane Pa, the angle θ2L is 135 ° or more, and the angle θ2R is less than 135 °.
Also in the second modification, there is a first plane Pa that satisfies 45 ° ≦ θ1L. For this reason, also in this modification 2, the same effect as the first embodiment can be obtained.

(Modification 3 of the first embodiment)
Next, Modification 3 of the first embodiment will be described.
As shown in FIG. 16, the third modification is different from the first embodiment with respect to the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA. On the first plane Pa, the inner peripheral surface 20I protrudes from the second straight line Ls2 toward the second main surface 20B. In the third modification, the entire inner peripheral surface 20I protrudes from the second straight line Ls2 toward the second main surface 20B.

  The inner peripheral surface 20I has a continuous first inner peripheral surface 20I1 and second inner peripheral surface 20I2. The first inner peripheral surface 20I1 is provided on the first main surface 20A side. The second inner peripheral surface 20I2 is provided closer to the second main surface 20B than the first inner peripheral surface 20I1, and has a gentler slope than the first inner peripheral surface 20I1. In the third modification, 45 ° ≦ θ1 and 135 ° ≦ θ2.

Also in the third modification, there exists a first plane Pa that satisfies 45 ° ≦ θ1. For this reason, also in this modification 3, the effect similar to the said 1st Embodiment can be acquired.
The inner peripheral surface 20I protrudes from the second straight line Ls2 toward the second main surface 20B. Compared with the case where the inner peripheral surface 20I is recessed toward the first main surface 20A from the second straight line Ls2, the adhesion of the connecting material C to the inner peripheral surface 20I can be improved.
Of the first inner peripheral surface 20I1 and the second inner peripheral surface 20I2, the second inner peripheral surface 20I2 that has a gentler inclination is located on the second main surface 20B side. Compared with the case where the inclination of the first inner peripheral surface 20I1 is gentler than the inclination of the second inner peripheral surface 20I2, the adhesion of the connecting material C to the inner peripheral surface 20I can be improved. In particular, the connecting material C tends to accumulate on the first substrate SUB1 side by gravity immediately after injection. By forming the second substrate SUB2 side on a gentle slope as in this embodiment, it is possible to improve the adhesion of the connecting material C particularly on the second substrate SUB2 side.

(Modification 4 of the first embodiment)
Next, a fourth modification of the first embodiment will be described.
As shown in FIG. 17, the fourth modification is different from the first embodiment with respect to the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA. On the first plane Pa, the inner peripheral surface 20I is a curved surface convex toward the second main surface 20B, and protrudes toward the second main surface 20B from the second straight line Ls2. In the fourth modification as well, 45 ° ≦ θ1 and 135 ° ≦ θ2.

  Also in the fourth modification, the same effect as in the first embodiment can be obtained. The inclination of the inner peripheral surface 20I is gentler on the second main surface 20B side than on the first main surface 20A side. For this reason, also in this modification 4, the adhesiveness of the connection material C in the 2nd board | substrate side SUB can be improved especially.

(Second Embodiment)
Next, a second embodiment will be described. The display device DSP of the second embodiment is different from the first embodiment in that the second conductive layer L2 and the connecting material C are integrally formed.

  As shown in FIG. 18, the second conductive layer L2 and the connecting material C are integrally formed of the same material to form a conductive layer CL. The conductive layer CL is made of metal. The conductive layer CL is formed above the second major surface 20B and is in contact with the first conductive layer L1 through the connection hole V. In the present embodiment, the conductive layer CL is in contact with the second main surface 20B, the inner peripheral surface 20I, the inner peripheral surface OII, and the upper surface LT1. The conductive layer CL functions as the main body portion RS in the display area DA, functions as the terminal portion RT in the non-display area NDA, and functions as the connection material C inside the connection hole V.

  When the conductive layer CL is formed, a metal film is formed on the second main surface 20B and in the connection hole V, and then a resist film is formed on the metal film. Next, a resist mask is formed using the resist film. Thereafter, the metal film is patterned using a resist mask, and then the resist mask is removed.

Also in the display device DSP according to the second embodiment configured as described above, 45 ° ≦ θ1. Also in the second embodiment, the same effect as that of the first embodiment can be obtained.
Further, since the display device DSP has the angle θ1 as described above, the conductive layer CL can be formed using a process similar to the process for forming the scanning lines G and the signal lines S. Compared with the first embodiment, concerns regarding the contact resistance value between the second conductive layer L2 and the connecting material C can be eliminated.

The conductive layer CL may have an antireflection layer on the side farthest from the second main surface 20B, and the antireflection layer may form the outermost surface of the conductive layer CL. External light reflection in the conductive layer CL can be reduced.
In addition, in this embodiment, since the 2nd conductive layer L2 and the connection material C can be formed simultaneously, reduction of a manufacturing process can be aimed at. Thereby, shortening of manufacturing time and reduction of manufacturing cost can be aimed at.

(Third embodiment)
Next, a third embodiment will be described. The display device DSP of the third embodiment is different from the first embodiment in that the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA has a step.

  As shown in FIG. 19, the connection hole V (first through hole VA) has a long axis AX in plan view. In this example, the long axis AX is along the side edge ES of the display area DA. The connection hole V has a first hole Vt1, a first hole Vp1, a second hole Vp2, and a third hole Vp3. The first hole Vt1, the first hole Vp1, the second hole Vp2, and the third hole Vp3 are arranged along the long axis AX and connected to each other.

  In a direction (first direction X) orthogonal to the long axis AX in plan view, the first hole Vt1 has the largest width Wt1, and the third hole Vp3 has a width Wp3 smaller than the first hole Vt1. The second hole Vp2 has a smaller width Wp2 than the third hole Vp3, and the first hole Vp1 has the smallest width Wp1. In the present embodiment, in the first direction X, the width Wt1 is the maximum width of the first hole Vt1, the width Wp3 is the maximum width of the third hole Vp3, and the width Wp2 is the maximum width of the second hole Vp2. The width Wp1 is the maximum width of the first hole Vp1. For example, the width Wt1 is larger than the width Wp1.

As shown in FIG. 20, the connection hole V further includes a third through hole VC that penetrates the first conductive layer L <b> 1 and a recess CC formed in the first insulating substrate 10. The first through hole VA is formed by a first hole Vt1, a first hole Vp1, a second hole Vp2, and a third hole Vp3. The second through hole VB is formed by the first hole Vt1 and the third hole Vp3. The third through hole VC and the recess CC are each formed by a first hole Vt1.
On a virtual first plane Pa that passes through the first through hole VA and is parallel to the normal line of the first main surface 20A, the angle θ1 is 45 ° or more. Further, the angle θ2 is 135 ° or more on the first plane Pa.

  On the first plane Pa, the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA has a step. On the first plane Pa of the present embodiment, the second insulating substrate 20 and the inner peripheral surfaces 20I and OII of the organic insulating film OI in the connection hole V have steps. The level difference is where the first hole Vt1 and the third hole Vp3 are connected, where the third hole Vp3 and the second hole Vp2 are connected, and where the second hole Vp2 and the first hole Vp1 are connected. It is formed in the place. The inner peripheral surfaces 20I and OII have a step, but 45 ° ≦ θ1. For this reason, good throwing power of the connecting material C with respect to the inner peripheral surfaces 20I and OII can be obtained.

As shown in FIG. 21, on the other hand, on the virtual second plane Pb that passes through the first through hole VA and is orthogonal to the first plane Pa and parallel to the normal line of the first main surface 20A, the angle θ1 is less than 45 °. And the angle θ2 is less than 135 °.
On the second plane Pb, the second insulating substrate 20 and the inner peripheral surfaces 20I and OII of the organic insulating film OI have no step.

Next, a method for manufacturing the display device DSP of this embodiment will be described. Here, a method of forming the connection hole V will be described.
As shown in FIG. 22, before etching the second insulating substrate 20, the second insulating substrate 20 has a second main surface 20Ba instead of the second main surface 20B. When forming the connection hole V, first, a plurality of irradiation regions of the second insulating substrate 20 are irradiated with laser light from above the second main surface 20Ba. The plurality of irradiation regions include an irradiation region RVt1 corresponding to the region AVt1 for forming the first hole Vt1, an irradiation region RVp3 corresponding to the region AVp3 for forming the third hole Vp3, and the second hole. An irradiation region RVp2 corresponding to the region AVp2 for forming the part Vp2 and an irradiation region RVp1 corresponding to the region AVp1 for forming the first hole Vp1 are provided. For example, each irradiation region is located at the center of the corresponding hole or the region for forming the hole. The laser beam is a pulsed laser beam, and the pulse width is about several femtoseconds to several hundred femtoseconds.

  As shown in FIG. 23, in the third direction Z, the second insulating substrate 20 before etching has a thickness T1a that is thicker than the first thickness T1. In the third direction Z, the irradiation region RVp1 is set to the narrowest range, the irradiation region RVp2 is set to a range wider than the irradiation region RVp1, the irradiation region RVp3 is set to a range wider than the irradiation region RVp2, and the irradiation region RVt1 is the highest. Set to a wide range. The irradiation region corresponds to a region where the second insulating substrate 20 is altered.

  As described above, after the second insulating substrate 20 is irradiated with the laser beam, the second insulating substrate 20 is etched. Thereby, the 2nd insulated substrate 20 which has 1st thickness T1 is obtained. The etching rate of the altered region of the second insulating substrate 20 is higher than the etching rate of the unaltered region. Therefore, the etching of the regions AVt1, AVp3, AVp2, and AVp1 in the second insulating substrate 20 is promoted. Then, the etching of the region AVt1 is most promoted. Thereby, the connection hole V is formed.

Also in the display device DSP according to the third embodiment configured as described above, 45 ° ≦ θ1 and 135 ° ≦ θ2. Also in the third embodiment, the same effect as in the first embodiment can be obtained.
When forming the first through hole VA (connection hole V), the first through hole VA is not formed only by laser light irradiation, but is formed by laser light irradiation and etching. For this reason, it is possible to suppress the occurrence of cracks in the second insulating substrate 20 from the first through hole VA.
The etching is performed with both substrates SUB1 and SUB2 being large. The large format means a state before being divided into a plurality of display panel pieces. In the present embodiment, the connection hole is formed along with the etching process for reducing the large thickness. For this reason, simplification of a manufacturing process and the improvement of the reliability accompanying it are achieved.

(Modification 1 of 3rd Embodiment)
Next, Modification 1 of the third embodiment will be described.
As shown in FIG. 24, the first modification differs from the third embodiment with respect to the shape of the second opening end OP2. The connection hole V has a single first hole Vt1, a single third hole Vp3, a single second hole Vp2, and a single first hole Vp1.

As shown in FIG. 25, on the first plane Pa, the angle θ1L is 45 ° or more, and the angle θ1R is less than 45 °. On the first plane Pa, the inner peripheral surfaces 20I and OII have a step on the left side in the drawing, and do not have a step on the right side in the drawing.
Also in the first modification, there is a first plane Pa that satisfies 45 ° ≦ θ1L. For this reason, also in this modification 1, the effect similar to the said 3rd Embodiment can be acquired.

(Fourth embodiment)
Next, a fourth embodiment will be described. In the display device DSP of the fourth embodiment, the second conductive layer L2 is connected to the first conductive layer L1 without the connection material C, and the combination of laser light irradiation and etching is used. The connection hole V is different from the third embodiment in that the connection hole V is formed.

  As shown in FIG. 26, the connection hole V (first through hole VA) has a long axis AX in plan view. The connection hole V has a first hole Vt1, a first hole Vp1, and a second hole Vp2. The first hole Vt1, the first hole Vp1, and the second hole Vp2 are arranged along the long axis AX and connected to each other.

  As shown in FIG. 27, the connection hole V has a first through hole VA and a second through hole VB. The first through hole VA is formed by a first hole Vt1, a first hole Vp1, and a second hole Vp2. The second through hole VB is formed independently of the first hole Vt1, and is connected to the first hole Vt1. On the first plane Pa, the inner peripheral surface 20I of the second insulating substrate 20 in the first through hole VA has a step. The step is formed at a location where the first hole Vt1 and the second hole Vp2 are connected and a location where the second hole Vp2 and the first hole Vp1 are connected. Since the inner peripheral surface 20I has a step, good throwing power of the connecting material C with respect to the inner peripheral surface 20I can be obtained.

  The second conductive layer L2 covers the connection hole V (the first through hole VA and the second through hole VB). In the present embodiment, the second conductive layer L2 completely covers the connection hole V and is in contact with the upper surface LT1 of the pad P. The display panel PNL of this embodiment is formed without the filler FI. The protective film PF is filled in the hollow portion of the connection hole V and covers the second conductive layer L2 also in and around the connection hole V.

  The connection material C (for example, silver) described above does not exist inside the connection hole V and around the connection hole V. Therefore, it is not necessary to consider light reflection at the connection material C in and around the connection hole V. In the present embodiment, light reflection at the second conductive layer L2 may be considered in and around the connection hole V.

For example, when the second conductive layer L2 has a multilayer structure including a metal layer formed of metal and a transparent conductive layer formed of a transparent conductive material, and the transparent conductive layer is in contact with the protective film PF The interference effect of reflected light can be obtained by the action of the transparent conductive layer.
The interference phenomenon of reflected light occurs when the first reflected light reflected by the surface of the transparent conductive layer and the second reflected light reflected by the interface between the transparent conductive layer and the metal layer cause interference with each other. To do. For this reason, if the phase difference between the first reflected light and the second reflected light is 0.5 wavelength, the two cancel each other, and the effect of reducing the reflected light intensity is obtained. As described above, the second conductive layer L2 itself is configured to suppress reflected light.
Therefore, it is not necessary to take a light shielding measure inside and around the connection hole V with a member different from the second conductive layer L2. For example, instead of the protective film PF, the black filler FI need not be provided in and around the connection hole V.

Next, a method for manufacturing the display device DSP of this embodiment will be described. Here, a method of forming the connection hole V will be described.
As shown in FIG. 28, a plurality of irradiation regions of the second insulating substrate 20 are irradiated with laser light from above the second main surface 20Ba. Thereby, a plurality of holes Vu1, Vu2, and Vu3 having different sizes are formed in the second insulating substrate 20.

  The hole Vu1 corresponds to the first hole Vt1 described above, and has the largest size among the holes Vu1, Vu2, and Vu3. For example, the hole Vu1 is formed deepest and has the largest opening area in the second main surface 20Ba. The hole Vu2 corresponds to the second hole Vp2 described above. The hole Vu3 corresponds to the first hole Vp1 described above, and has the smallest size among the holes Vu1, Vu2, and Vu3. For example, the hole Vu3 is formed shallowest and the opening area in the second main surface 20Ba is the smallest.

  As described above, after the holes Vu1, Vu2, and Vu3 opened in the second main surface 20Ba are formed in the second insulating substrate 20, the first insulating substrate 10 and the second insulating substrate 20 are etched (such as polishing or slimming). ) As a result, the thicknesses of the first insulating substrate 10 and the second insulating substrate 20 are reduced. The first insulating substrate 10 can obtain the fourth main surface 10B located on the third main surface 10A side from the fourth main surface 10Ba. The second insulating substrate 20 can obtain the second main surface 20B located on the first main surface 20A side from the second main surface 20Ba. In the second insulating substrate 20, etching is promoted not only in the second main surface 20Ba but also in the holes Vu1, Vu2, and Vu3.

  As a result, as shown in FIG. 29, the first through hole VA is formed in the connection hole V. Also in the present embodiment, when the first through hole VA is formed, laser light irradiation and etching are used in combination. For this reason, it is possible to suppress the occurrence of cracks in the second insulating substrate 20 from the first through hole VA.

Next, the laser beam LA is irradiated from above the display panel PNL toward the organic insulating film OI inside the first through hole VA. As a result, the portion of the organic insulating film OI irradiated with the laser beam LA is sublimated, and the second through hole VB is formed in the organic insulating film OI. Thereby, the connection hole V is formed.
As shown in FIG. 27, subsequently, a conductive layer is formed inside the connection hole V and on the second main surface 20B, and the conductive layer is patterned. For example, the conductive layer has a laminated structure of a metal layer and a transparent conductive layer. As a result, the second conductive layer L2 is formed inside the connection hole V and on the second main surface 20B. Thereafter, a protective film PF is formed inside the connection hole V, and on the second main surface 20B and the second conductive layer L2.

  Also in the display device DSP according to the fourth embodiment configured as described above, the connection hole V similar to that of the third embodiment can be obtained, and the same effects as those of the third embodiment can be obtained. Can be obtained. In addition, since the configuration in which the second conductive layer L2 is laminated after the connection hole V is formed, the connection material C described above does not exist in the connection hole V and the periphery thereof, and the first conductive layer L1 and the second conductive layer L2 are formed. The conductive layer L2 is directly electrically joined. As a result of such a configuration, it is not necessary to take a light shielding measure when the connecting material C is provided. In addition, the connection resistance between the first conductive layer L1 and the second conductive layer L2 can be improved.

(Modification 1 of 4th Embodiment)
Next, Modification 1 of the fourth embodiment will be described.
As shown in FIG. 30, in the first modification, the connection hole V further includes the third through hole VC and the recess CC, and the point where the connection material C is used, This is different from the embodiment. The first through hole VA is formed by a first hole Vt1, a first hole Vp1, and a second hole Vp2. The second through hole VB, the third through hole VC, and the recess CC are formed independently of the first hole Vt1. Of the second through hole VB, the third through hole VC, and the recess CC, the second through hole VB is connected to the first hole Vt1. The connection material C adheres to the surface of the connection hole V and is in contact with the first conductive layer L1 (pad P). In addition, when forming the connection material C, the application quantity of a metal material is adjustable. In any case, the connecting material C only needs to be in contact with the first conductive layer L1 (pad P).

  The second conductive layer L2 covers the connection hole V and the connection material C and is in contact with the connection material C. In the first modification, the second conductive layer L2 completely covers the connection hole V and the connection material C. Therefore, the second conductive layer L2 is electrically connected to the first conductive layer L1 (pad P) via the connecting material C. Further, the second conductive layer L2 also has a function as a light shielding layer for the connection material C.

Regarding the method for manufacturing the display device DSP of the first modification, the method for manufacturing the display device DSP of the fourth embodiment can be applied. Here, differences from the manufacturing method of the fourth embodiment will be described.
As shown in FIG. 31, in the first modification, not only the second through-hole VB but also the third through-hole VC that penetrates the first conductive layer L1 and the first insulating substrate 10 are irradiated by the laser light LA. A recess CC is also formed. And as shown in FIG. 30, before forming the 2nd conductive layer L2, the connection material C is formed in the inside of the hole V for a connection.
Also in this modification 1, the 1st through-hole VA similar to the said 4th Embodiment can be obtained, and the effect similar to the said 4th Embodiment can be acquired.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof. It is possible to combine a plurality of embodiments as required.

  For example, as shown in FIG. 32, the detection electrodes Rx1, Rx2, Rx3,... May extend in the second direction Y and be arranged in the first direction X at intervals. The main body RS extends in the second direction Y in the display area DA. Further, the terminal portions RT1, RT2, RT3,... Are located between the display area DA and the wiring board 3, and are arranged at intervals in the first direction X. The connection holes V1, V2, V3,... Are arranged in the first direction X at intervals. When the connection hole V has the long axis AX, it is desirable that the long axis AX is parallel to the first direction X.

In addition, as shown in FIG. 33, the connection material C includes an inner surface LS1 of the first conductive layer L1 and a top surface LT1 of the first conductive layer L1 in the third through hole VC of the connection hole V in the first substrate SUB1. May be in contact with each other.
FIG. 34 is a plan view showing the first conductive layer L1 and the organic insulating film OI as viewed from the second insulating substrate 20 side. FIG. 34 shows only the first conductive layer L1 and the organic insulating film OI. A region of the upper surface LT1 that is not covered with the organic insulating film OI is provided with a diagonal line rising to the right. As shown in FIG. 34, the size of the second through hole VB is larger than the size of the third through hole VC in plan view. The region RA in contact with the connecting material C on the upper surface LT1 of the first conductive layer L1 is a region that is not covered with the organic insulating film OI by the second through hole VB. Here, the region RA is formed in an annular shape in plan view. In the drawing, the region RA is hatched. In a plan view, the shape of the second through hole VB and the third through hole VC is a perfect circle, but is not limited to this, and may be another circular shape such as an ellipse, or a shape other than a circle. Also good.

DSP ... display device,
SUB1 ... first substrate, 10 ... first insulating substrate, L1 ... first conductive layer, SUB2 ... second substrate,
20 ... 2nd insulating substrate, 20A ... 1st main surface, 20B ... 2nd main surface, L2 ... 2nd conductive layer,
OI ... organic insulating film, 20I, OII ... inner peripheral surface, V ... connection hole, VA, VB ... through hole,
Vt1 ... 1st hole, Vp1 ... 1st hole, Vp2 ... 2nd hole, Vp3 ... 3rd hole,
C: connecting material, DA: display area, NDA: non-display area,
Pa ... 1st plane, Pb ... 2nd plane, Ls1 ... 1st straight line, Ls2 ... 2nd straight line,
θ1, θ2 ... angle, AX ... long axis,
WI1, WI1a, WI2, WI2a, WI3, Wt1, Wp1, Wp2, Wp3... Width.

Claims (12)

A first substrate having a first insulating substrate and a first conductive layer;
A first main surface facing the first conductive layer and located away from the first conductive layer; a second main surface opposite to the first main surface; the first main surface and the second A second insulating substrate including a first through hole penetrating between the main surface and a second conductive layer provided on the second main surface;
A connecting material for electrically connecting the first conductive layer and the second conductive layer through the first through-hole,
On a virtual first plane that passes through the first through hole and is parallel to the normal of the first main surface, a first straight line extending along the normal and the first main of the first through hole The angle formed between the first opening end on the surface side and the second straight line connecting the second opening end on the second main surface side of the first through hole is 45 ° or more.
Display device. On the first plane, an angle formed by the second main surface and the second straight line is 135 ° or more.
The display device according to claim 1. On the first plane, an angle formed by each tangent to the inner peripheral surface of the second insulating substrate in the first through hole and the first straight line is 45 ° or more.
The display device according to claim 1. On the first plane, the inner peripheral surface of the second insulating substrate in the first through hole protrudes from the second straight line to the second main surface side.
The display device according to claim 1. The second conductive layer and the connecting material are integrally formed of the same material,
The display device according to claim 1. On the first plane, the inner peripheral surface of the second insulating substrate in the first through hole has a step.
The display device according to claim 1. The first through hole has a long axis in plan view,
The long axis is parallel to the first plane;
The inner peripheral surface of the second insulating substrate does not have the step on a virtual second plane that passes through the first through hole and is orthogonal to the first plane and parallel to the normal line.
The display device according to claim 6. A display area;
A non-display area provided along an outer edge of the display area,
The first through hole is located in the non-display area, and has a long axis parallel to a side edge facing the first through hole among the outer edges of the display area,
The major axis is parallel to the first plane;
The display device according to claim 1. An organic insulating film positioned between the first conductive layer and the second insulating substrate;
A connection hole having the first through hole and a second through hole penetrating the organic insulating film and connected to the first through hole;
The first plane passes through the connection hole,
On the first plane, an angle formed by the first straight line and a third straight line connecting the third opening end of the connection hole on the first insulating substrate side and the second opening end is 45 °. That's it,
The display device according to claim 1. On the first plane, the inner peripheral surface of the second insulating substrate and the organic insulating film in the connection hole has a step.
The display device according to claim 9. The connection hole includes a first hole that penetrates the second insulating substrate and the organic insulating film, and the first hole that opens in the second main surface and does not open in the first main surface. A first hole connected to
The connection hole has a long axis in plan view,
The first hole and the first hole are aligned along the long axis,
In a direction orthogonal to the long axis in plan view, the width of the first hole is larger than the width of the first hole.
The display device according to claim 10. An organic insulating film positioned between the first conductive layer and the second insulating substrate;
A connection hole having the first through hole and a second through hole penetrating the organic insulating film and connected to the first through hole;
The connection material adheres to the surface of the connection hole, contacts the first conductive layer,
The second conductive layer covers the connection hole and the connection material,
The display device according to claim 1.

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