JP2018148511A - Rush current control circuit and power supply circuit - Google Patents

Abstract

A rush current suppressing circuit with enhanced environmental resistance and an electronic device using the rush current suppressing circuit are provided. An inrush current suppression circuit is provided between a power supply and a load circuit. The inrush current suppression circuit includes a first line electrically connected to one of the power supply potential and the ground potential, a second line electrically connected to the other of the power supply potential and the ground potential, and a first line. a reactor inserted in a second line; a transistor inserted in a second line; a thermistor connected in parallel to the transistor; a voltage dividing resistor that divides the voltage generated between the line and the second line and applies it to the gate of the transistor; and a diode that electrically connects a node on the load circuit side of the transistor and a node on the power supply side of the reactor. including. [Selection drawing] Fig. 4

Description

  The present invention relates to an inrush current prevention circuit and a power supply circuit including the inrush current prevention circuit.

  Various electronic devices have a power supply circuit. A general power supply circuit has elements such as a coil (inductor) and a capacitor (capacitor). It is known that when a power supply is turned on to a power supply circuit, a current much larger than a current flowing during a normal operation instantaneously flows due to such elements. Such a large current that flows when the power is turned on is called an inrush current.

Conventionally, several circuit configurations for suppressing such inrush current have been proposed.
In Japanese Patent Laid-Open No. 2001-127613 (Patent Document 1), in a circuit in which a DC power source, a load circuit, and a MOSFET are connected in series, the ON voltage of the MOSFET is increased immediately after the switch is turned on, Disclosed is an inrush current prevention circuit that lowers the on-voltage.

  Japanese Patent Application Laid-Open No. 11-289657 (Patent Document 2) discloses an inrush current suppression device in which the loss in the case of steady operation is reduced as compared with the case where only the resistor is used.

  Japanese Patent Laying-Open No. 2013-222607 (Patent Document 3) discloses a power supply circuit that can suppress an inrush current even when an input power supply is restored after a short interruption.

JP 2001-127613 A JP-A-11-289657 JP 2013-222607 A

  General-purpose electronic devices may be used in various applications and places, and it is important to adapt them to various usage environments. By the way, the physical constants of the circuit elements constituting the inrush current suppression circuit as described above have temperature characteristics, and the characteristic values may change greatly depending on the environmental temperature.

  None of the above-described Patent Documents 1 to 3 considers the environmental temperature or the like. An object of the present invention is to provide an inrush current suppression circuit with improved environmental resistance and an electronic device using the inrush current suppression circuit.

  According to an aspect of the present invention, an inrush current suppression circuit disposed between a power supply and a load circuit is provided. The inrush current suppression circuit includes a first line electrically connected to one of the power supply potential and the ground potential, a second line electrically connected to the other of the power supply potential and the ground potential, and the first line. And a reactor inserted in the second line, a transistor inserted in the second line, a thermistor connected in parallel to the transistor, and the first line and the second line, and the first line A voltage dividing resistor that divides a voltage generated between the first line and the second line and applies the divided voltage to the gate of the transistor, and a diode that electrically connects a node on the load circuit side of the transistor and a node on the power source side of the reactor, including.

  Preferably, the forward voltage of the diode is set so that the voltage applied between the terminals of the transistor does not exceed the voltage between the power supply potential and the ground potential.

  Preferably, the inrush current suppression circuit further includes a capacitor connected in parallel to the transistor.

  According to another aspect of the present invention, a power supply circuit for supplying power from a source to a load is provided. The power supply circuit includes a first line electrically connected to one of the power supply potential and the ground potential, a second line electrically connected to the other of the power supply potential and the ground potential, and a first line. The first line and the reactor inserted, the transistor inserted in the second line, the thermistor connected in parallel to the transistor, and the first line and the second line. A voltage dividing resistor that divides the voltage generated between the first line and the second line and applies the divided voltage to the gate of the transistor, a capacitor electrically connected between the first line and the second line, and a load of the transistor A diode that electrically connects the node on the circuit side and the node on the power source side of the reactor is included.

  ADVANTAGE OF THE INVENTION According to this invention, the inrush current suppression circuit which improved environmental resistance, and the electronic apparatus using the inrush current suppression circuit are realizable.

It is a schematic diagram which shows the circuit structure of the power supply circuit containing the inrush current suppression circuit which concerns on the related technique of this invention. 3 is a time chart for explaining an operation example immediately after power-on of the power supply circuit shown in FIG. 1. 2 is a time chart for explaining an operation example when a transistor transits to an off state in a low temperature environment of the power supply circuit shown in FIG. 1. It is a schematic diagram which shows the circuit structure of the power supply circuit containing the inrush current suppression circuit which concerns on this Embodiment. 5 is a time chart for explaining an operation example when a transistor transits to an off state in a low temperature environment of the power supply circuit shown in FIG. 4. It is a schematic diagram which shows the circuit structure of the power supply circuit containing the inrush current suppression circuit which concerns on the modification of this Embodiment.

  Embodiments of the present invention will be described in detail with reference to the drawings. Note that the same or corresponding parts in the drawings are denoted by the same reference numerals and description thereof will not be repeated.

<A. Inrush current suppression circuit according to related technology>
First, an inrush current suppressing circuit according to the related art of the present invention will be described. FIG. 1 is a schematic diagram showing a circuit configuration of a power supply circuit 200 including an inrush current suppressing circuit according to the related art of the present invention.

  Referring to FIG. 1, power supply circuit 200 has a circuit configuration for supplying power to an arbitrary load, and includes a power supply unit 10, an inrush current suppression circuit 20 #, and a load circuit 30.

  The power supply unit 10 is a circuit that supplies DC power, and includes a power supply node 12 (DC) maintained at a predetermined power supply potential and a ground node 14 connected to the ground potential. The power supply unit 10 applies a predetermined DC voltage between the power supply node 12 and the ground node 14. A load is electrically connected between power supply node 12 and ground node 14. Although not shown, the power supply unit 10 may include a rectifier circuit such as a bridge circuit for converting AC power into DC power.

  The inrush current suppression circuit 20 # is a circuit that restricts an excessive current from flowing immediately after the power supply from the power supply unit 10 is started, and the power supply line 22 that is electrically connected to the power supply node 12. And a ground line 24 electrically connected to the ground node 14.

  A reactor L1 is inserted in series in the power supply line 22, and a transistor TR1 is inserted in series in the ground line 24. Reactor L1 functions as a kind of line filter for suppressing harmonic components. This line filter may function as a common choke mode filter. The transistor TR1 functions as a bypass transistor, for example, an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is used.

  Two resistors R1 and R2 connected in series are arranged between the power supply line 22 and the ground line 24, and a connection node between the resistors R1 and R2 is electrically connected to the gate G of the transistor TR1. ing. That is, the voltage generated by dividing the voltage generated between the ground line 24 and the power supply line 22 by the ratio of the resistance values of the resistors R1 and R2 is applied to the gate G of the transistor TR1.

  A limiting resistor Rth is electrically connected in parallel with the source S-drain D of the transistor TR1. The limiting resistor Rth is preferably configured using a thermistor. This is because by using the thermistor, the temperature rises due to heat generation that causes current to flow, and thereby the resistance value can be gradually reduced. That is, in this specification, the “thermistor” includes an element having a temperature-resistance value characteristic in which the resistance value decreases as the temperature increases. For this reason, not only the “thermistor” in a narrow sense but also an element having the same temperature-resistance value characteristic can be used.

  As an example of the load circuit 30, for example, a configuration in which a necessary voltage is supplied by switching is illustrated. More specifically, the load circuit 30 includes a capacitor C1, a driver circuit 32, and a load 34.

  The driver circuit 32 may be a circuit that performs a step-up operation or a step-down operation by chopping a DC voltage, such as a switching regulator, or a circuit that generates an AC voltage from a DC voltage, such as an inverter. May be. Capacitor C <b> 1 is electrically connected between power supply line 22 and ground node 14, and smoothes DC power supplied to driver circuit 32. The load 34 includes any circuit or element that consumes power.

FIG. 2 is a time chart for explaining an operation example immediately after power-on of the power supply circuit 200 shown in FIG. FIG. 2 shows an operation example immediately after the power supply from the power supply unit 10 is started. As shown in FIG. 2 (a), a voltage V _in applied between the power supply node 12 and ground node 14 of the power supply unit 10 is increased to a predetermined value at time t0. Then, as shown in FIG. 2B, charging of the capacitor C1 electrically connected between the power supply node 12 and the ground node 14 is started, and the charging voltage V _C1 of the capacitor _C1 is set at a predetermined time. Increase by a constant.

  Immediately after power-on (time t0), the voltage applied to the gate G of the transistor TR1 (the voltage between the source S and the gate G) is lower than the threshold value of the transistor TR1, so that the transistor TR1 is in the off state (non-conducting state). ). Therefore, the current for charging the capacitor C1 flows through the limiting resistor Rth.

  The limiting resistor Rth is a thermistor, and has a relatively large resistance value almost immediately according to the ambient temperature immediately after the power is turned on (time t0). At time t0), an excessive current flowing from the power supply node 12 to the ground node 14 is limited.

  Thereafter, the resistance value gradually decreases due to heat generation according to the current flowing through the limiting resistor Rth. As a result, most of the applied voltage of the power supply unit 10 is applied to the capacitor C1. After that, when the capacitor C1 is sufficiently charged, the voltage (source S-gate G voltage) applied to the gate G of the transistor TR1 exceeds the threshold value, and the transistor TR1 is activated and turned on (conductive state). ) (Time t1).

When the transistor TR1 is turned on, the current flowing through the ground line 24 flows through the transistor TR1 and the limiting resistor Rth, but the resistance value of the transistor TR1 is lower than the resistance value of the limiting resistor Rth. , most of the current will be flowing through the transistor TR1 (temporal variation of the current _{I Rth} flowing through limiting resistor Rth of the current _{I DS} and 2 flowing between the drain D- source S (d) shown in FIG. 2 (c) See).

As a result, as shown in FIG. 2 (e), the voltage V _DS between the source S- drain D of the transistor TR1, so the voltage corresponding to the forward voltage transistor TR1 occurs in the ON state occurs.

  As described above, in power supply circuit 200 including inrush current suppression circuit 20 # shown in FIG. 1, the inrush current immediately after power-on is limited by the resistance value of limiting resistor Rth, and during the subsequent steady operation, current loss is reduced. By using a small number of transistors TR1, inrush current can be suppressed and efficiency can be improved. Further, by using the inrush current suppression circuit 20 # shown in FIG. 1, it is not necessary to add an auxiliary power source or the like, so that the cost can be reduced.

<B. Discovery of new issues>
The inventors of the present application have found a new problem for the inrush current suppression circuit 20 # as shown in FIG. In the inrush current suppression circuit 20 # shown in FIG. 1, a thermistor is used as the limiting resistor Rth so that the temperature characteristic of the resistance value of the thermistor can be used.

  Under a low temperature environment, the thermistor exhibits a relatively large resistance value. For example, a thermistor of about 10Ω in a normal temperature environment may show about 200Ω at −40 ° C. That is, the resistance value changes about 20 times.

  On the other hand, when an IGBT, MOSFET, or the like is used as the transistor TR1, the temperature characteristics of the forward voltage are small, and the characteristics of the forward voltage are almost the same in both a normal temperature environment and a low temperature environment.

  Assuming operation in a low temperature environment, when the transistor TR1 is in an on state, almost no current flows through the limiting resistor Rth, so that the temperature of the limiting resistor Rth does not increase and a relatively large resistance value is exhibited. ing. In such a state, when the transistor TR1 transitions from the on state to the off state, the current that has been flowing through the transistor TR1 so far flows through the limiting resistor Rth.

  The transition of the transistor TR1 from the on state to the off state is caused by, for example, the charge stored in the capacitor C1 due to the operation of a protection circuit (not shown) or due to the increase in power consumption in the driver circuit 32 or the load 34. Is assumed to be rapidly discharged. Typically, when the voltage applied to the gate G of the transistor TR1 falls below a threshold value, the transistor TR1 is turned off.

  The resistance value of the limiting resistor Rth is sufficiently larger than the resistance value of the transistor TR1 (resistance value between the drain D and the source S). Further, in response to a change in the current value accompanying a change in the current path from the transistor TR1 to the limiting resistor Rth, the reactor L1 functioning as a line filter generates an induced electromotive force in a direction that prevents the change in the current value. As a result, a potential higher than the potential applied from the power supply node 12 of the power supply unit 10 is generated at the drain D of the transistor TR1.

  FIG. 3 is a time chart for explaining an operation example when the transistor TR1 is turned off in the low temperature environment of the power supply circuit 200 shown in FIG. FIG. 3 shows an example in which a protection circuit (not shown) transitions the transistor TR1 to the off state while the transistor TR1 is on.

As shown in FIG. 3 (a), with a voltage V _in applied between the power supply node 12 and ground node 14 of the power supply unit 10 is maintained at a predetermined value, as shown in FIG. 3 (b) , the charging voltage V _C1 of the capacitor C1 is also maintained at a predetermined value.

As shown in FIG. 3C, it is assumed that the transistor TR1 transitions from the on state to the off state at time t3 for some reason. Then, as shown in FIG. 3 (d), the current _IDS flowing between the drain D and the source S of the transistor TR1 becomes zero at time t3, and as shown in FIG. 3 (e), the current flowing through the limiting resistor Rth. I _Rth increases to compensate for the current I _DS .

At this time, an induced electromotive force is generated in the reactor L1 functioning as a line filter due to a temporal change in the current accompanying a change in the state of the transistor TR1, and the generated induced electromotive force is applied to the drain D of the transistor TR1. . As a result, as shown in FIG. 3E, the voltage V _DS between the source S and the drain D of the transistor TR1 is in addition to the voltage drop generated in the limiting resistor Rth, and the induced electromotive force generated by the reactor L1. A corresponding voltage is applied.

Thus, the voltage V _DS that is applied between the source S- drain D of the transistor TR1 may be as large as up to over voltage V _in the power supply unit 10 is applied. If the voltage applied between the source S and the drain D exceeds the breakdown voltage of the transistor TR1, the transistor TR1 may be damaged.

  The inventors of the present application have found a new problem of the possibility of element damage that may occur in a low temperature environment in an inrush current suppression circuit having a line filter as described above and using a thermistor as a limiting resistor. The inventors of the present application have invented the following improved circuit configuration for such a new problem.

<C. Inrush current suppression circuit according to the present embodiment>
FIG. 4 is a schematic diagram showing a circuit configuration of the power supply circuit 100 including the inrush current suppression circuit 20 according to the present embodiment. Referring to FIG. 4, power supply circuit 100 according to the present embodiment includes a power supply unit 10, an inrush current suppression circuit 20, and a load circuit 30. Since power supply unit 10 and load circuit 30 are similar to power supply unit 10 and load circuit 30 of power supply circuit 200 shown in FIG. 1, detailed description will not be repeated.

  The inrush current suppression circuit 20 is disposed between the power supply unit 10 that is a power source and the load circuit 30. Inrush current suppression circuit 20 includes a power supply line 22 electrically connected to power supply node 12 at the power supply potential, and a ground line 24 electrically connected to ground node 14 at the ground potential. A reactor L1 that functions as a line filter is inserted in the power supply line 22, and a transistor TR1 is inserted in the ground line 24. Further, inrush current suppression circuit 20 includes a limiting resistor Rth, which is a thermistor connected in parallel with transistor TR1. Further, the inrush current suppression circuit 20 is electrically connected between the power supply line 22 and the ground line 24, and divides the voltage generated between the power supply line 22 and the ground line 24 to be applied to the gate of the transistor TR1. A voltage dividing resistor (resistor R1 and resistor R2) to be applied is included. Such a basic configuration is the same as that of the inrush current suppression circuit 20 # shown in FIG.

  Further, inrush current suppression circuit 20 includes a diode D1 electrically connected between drain D of transistor TR1 and power supply node 12 with respect to inrush current suppression circuit 20 # shown in FIG. That is, the inrush current suppression circuit 20 electrically connects the node on the load circuit 30 side of the transistor TR1 (drain D in the example shown in FIG. 4) and the node on the power source side (power supply unit 10 side) of the reactor L1. Including a diode D1.

The diode D1 forms a forward circuit from the drain D of the transistor TR1 toward the power supply node 12 of the power supply unit 10. In normal conditions the application of the voltage V _in between the power supply unit 10 and power supply node 12 and ground node 14, the potential of the power supply node 12 as compared to the drain D of the transistor TR1 is high, the diode D1 Remains off.

  On the other hand, a potential higher than that of the power supply node 12 may be applied to the drain D of the transistor TR1 immediately after the transistor TR1 transitions from the on state to the off state in a low temperature environment as shown in FIG. In such a state, the diode D1 transitions to the on state, and electrically connects the drain D of the transistor TR1 and the power supply node 12.

That is, the diode D1 substantially applies the voltage V _DS applied between the source S and the drain D of the transistor TR1 to the voltage applied between the power supply node 12 and the ground node 14 of the power supply unit 10. to function as a limiter circuit or a clip circuit is limited to V _in. In other words, the diode D1 can also be regarded as a circuit for returning the excessively supplied current to the drain D of the transistor TR1 to the reactor L1.

  FIG. 5 is a time chart for explaining an operation example when the transistor TR1 is turned off in the low temperature environment of the power supply circuit 100 shown in FIG. FIG. 5 shows an example in which a protection circuit (not shown) transitions the transistor TR1 to the off state when the transistor TR1 is on, as in FIG.

As shown in FIG. 5 (a), with a voltage V _in applied between the power supply node 12 and ground node 14 of the power supply unit 10 is maintained at a predetermined value, as shown in FIG. 5 (b) , the charging voltage V _C1 of the capacitor C1 is also maintained at a predetermined value.

As shown in FIG. 5C, it is assumed that the transistor TR1 transitions from the on state to the off state at time t3 for some reason. Then, as shown in FIG. 5 (d), the current _IDS flowing between the drain D and the source S of the transistor TR1 becomes zero at time t3, and as shown in FIG. 5 (e), the current flowing through the limiting resistor Rth. I _Rth increases to compensate for the current I _DS .

At this time, an induced electromotive force is generated in the reactor L1 functioning as a line filter due to a temporal change in the current accompanying a change in the state of the transistor TR1, and the generated induced electromotive force is applied to the drain D of the transistor TR1. . As a result, as shown in FIG. 5 (e), the voltage V _DS between the source S- drain D of the transistor TR1, in addition to the voltage drop that occurs limiting resistor Rth, the induced electromotive force Reactor L1 has occurred A corresponding voltage is applied.

Here, when the potential of the drain D of the transistor TR1 becomes higher than the potential of the power supply node 12, and exceeds the forward voltage of the diode D1, the diode D1 transitions to the ON state. Then, the potential of the drain D of the transistor TR1 is limited to substantially the same value as the potential of the power supply node 12. Consequently, for the voltage _{V DS} of the source S- drain D of the transistor TR1, it is maintained at substantially the same size as the voltage _{V in} supplied by the power supply unit 10.

As described above, the forward voltage of the diode D1 is such that the voltage applied between the terminals of the transistor TR (between the source S and the drain D) is between the power supply potential (power supply node 12) and the ground potential (ground node 14). It is set not to exceed the voltage. By disposing such a diode D1, the voltage V _DS generated between the source S and the drain D of the transistor TR1 does not become excessive, and the transistor TR1 can be reliably prevented from being damaged.

<D. Modification>
The following modifications may be made to power supply circuit 100 including inrush current suppression circuit 20 and inrush current suppression circuit 20 according to the above-described embodiment.

(D1: Addition of capacitor)
In the inrush current suppression circuit 20 of the power supply circuit 100 shown in FIG. 4, a capacitor may be electrically connected in parallel with the diode D1.

  FIG. 6 is a schematic diagram showing a circuit configuration of a power supply circuit 100A including an inrush current suppression circuit 20A according to a modification of the present embodiment. Referring to FIG. 6, power supply circuit 100 </ b> A according to the present embodiment includes a power supply unit 10, an inrush current suppression circuit 20 </ b> A, and a load circuit 30. Since power supply unit 10 and load circuit 30 are similar to power supply unit 10 and load circuit 30 of power supply circuit 100 shown in FIG. 4, detailed description will not be repeated.

  Inrush current suppression circuit 20A further includes a capacitor C2 connected in parallel to diode D1. Capacitor C2 capacitively couples between power supply node 12 of power supply unit 10 and drain D of transistor TR1. Since the change in voltage applied across the diode D1 is alleviated by capacitive coupling by the capacitor C2, the state transition between the ON state and the OFF state of the diode D1 can be stabilized. Thereby, it is possible to stably perform the operation of returning the excessively supplied current to the drain L of the transistor TR1 to the reactor L1.

(D2: transistor polarity)
4 and 6 show an example in which the transistor TR1 and the limiting resistor Rth are arranged on the ground line 24, but they may be arranged on the power line 22 side.

  Moreover, although the example which arrange | positions the reactor L1 in series with the power supply line 22 is shown, a reactor may be arrange | positioned to the ground line 24 and a reactor may be arrange | positioned to both the power supply line 22 and the ground line 24.

  In the power supply circuit according to the present embodiment, the reactor is used as a line filter for reducing a noise component included in the current supplied to the load circuit 30, and thus is not particularly limited with respect to the arranged polarity. Absent.

<E. Advantage>
By using the inrush current suppressing circuit according to the present embodiment and the power supply circuit including the inrush current suppressing circuit, it is possible to prevent an excessive voltage from being applied to the bypass transistor without being affected by the surrounding environment. That is, by employing the inrush current suppression circuit according to this embodiment, the transistor can be prevented from being damaged due to a transient overvoltage that may occur in a low temperature environment.

  The embodiment disclosed this time must be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  DESCRIPTION OF SYMBOLS 10 Power supply part, 12 Power supply node, 14 Ground node, 20, 20A Inrush current suppression circuit, 22 Power supply line, 24 Ground line, 30 Load circuit, 32 Driver circuit, 34 Load, 100, 100A, 200 Power supply circuit, C1, C2 capacitor, D drain, D1 diode, G gate, L1 reactor, R1, R2 resistance, Rth limiting resistance, S source, TR1 transistor.

Claims (4)

An inrush current suppression circuit disposed between a power supply and a load circuit,
A first line electrically connected to one of a power supply potential and a ground potential;
A second line electrically connected to the other of the power supply potential and the ground potential;
A reactor inserted in the first line;
A transistor interposed in the second line;
A thermistor connected in parallel to the transistor;
An electrical connection is made between the first line and the second line, and a voltage generated between the first line and the second line is divided and applied to the gate of the transistor. A voltage dividing resistor,
An inrush current suppression circuit comprising a diode that electrically connects a node on the load circuit side of the transistor and a node on the power source side of the reactor.   2. The inrush current suppression circuit according to claim 1, wherein the forward voltage of the diode is set so that a voltage applied between terminals of the transistor does not exceed a voltage between the power supply potential and the ground potential. .   The inrush current suppression circuit according to claim 1, further comprising a capacitor connected in parallel to the transistor. A power supply circuit for supplying power from a power supply to a load,
A first line electrically connected to one of a power supply potential and a ground potential;
A second line electrically connected to the other of the power supply potential and the ground potential;
A reactor inserted in the first line;
A transistor interposed in the second line;
A thermistor connected in parallel to the transistor;
An electrical connection is made between the first line and the second line, and a voltage generated between the first line and the second line is divided and applied to the gate of the transistor. A voltage dividing resistor,
A capacitor electrically connected between the first line and the second line;
A power supply circuit comprising a diode that electrically connects a node on the load circuit side of the transistor and a node on the power supply side of the reactor.

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