JP2018038177A - Abnormality information transmission circuit - Google Patents

Abstract

Provided is an abnormality information transmission circuit that simplifies connection wiring connected to a receiving device and that can identify in which part of a power conversion circuit an abnormality has occurred by the receiving device. Magnetic couplers Mp1 to Mp3, Mn1 that receive an abnormality signal indicating an occurrence of an abnormality in switching elements SWp1 to SWp3, SWn1 to SWn3, and transmit an abnormality detection signal to a control device 40 according to the received abnormality signal. And Mn3, and a logic circuit 30 that performs a logical operation on the abnormality detection signal and outputs the result of the logical operation to the control device 40, and includes magnetic couplers Mp1 to Mp3, Mn1 to Mn3, and the logic circuit 30. The total number of connection wirings that connect the logic circuit 30 and the control device 40 is smaller than the total number of connection wirings to be connected, and the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 correspond to the magnetic couplers Mp1 to Mp3 according to the abnormal signal. , Mn1 to Mn3 are transmitted with abnormality detection signals having different waveforms. [Selection] Figure 5

Description

  The present invention relates to an abnormality information transmission circuit that transmits information indicating an abnormality of a power conversion circuit to a receiving device that is insulated from the power conversion circuit.

  The inverter device (power conversion circuit) that drives the in-vehicle motor constitutes a high voltage system, and the control device that controls the inverter device constitutes a low voltage system insulated from the high voltage system. When transmitting the temperature information of the switching elements constituting the inverter device and the signal representing the abnormality information notifying the abnormality of the switching device from the inverter device to the control device, the signal is transmitted from the high voltage system to the low pressure system. Since the high-voltage system and the low-voltage system are insulated, signal transmission from the inverter device to the control device is performed via an insulating element.

  In Patent Document 1, a photocoupler is used as an insulating element, and the secondary side of the photocoupler is connected in series to share a transmission path from the insulating element to the control device (receiving device). When an abnormality occurs in at least one of the parts corresponding to the switching element, a signal indicating the abnormality is input to the control device. By sharing the transmission path to the control device, the wiring between the control device and the insulating element can be simplified.

JP 2009-136115 A

  Here, in the configuration in which the secondary side of the photocoupler is connected in series, when an abnormality occurs in any one of the plurality of parts of the power conversion circuit, the signal input to the receiving device is stopped. For this reason, it is difficult to specify in which part of the power conversion circuit the abnormality has occurred.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and simplifies the connection wiring connected to the receiving device, and allows the receiving device to identify in which part of the power conversion circuit an abnormality has occurred. The main purpose is to provide a transmission circuit.

  A first configuration is an abnormality information transmission circuit that transmits information representing an abnormality of a power conversion circuit (INV) to a receiving device (40) that is insulated from the power conversion circuit, and the power conversion circuits are insulated from each other. The abnormality signal is provided between each of the plurality of parts (SWp1 to SWp3, SWn1 to SWn3) and the receiving device, and receives an abnormal signal indicating an occurrence of an abnormality in the part from the corresponding part. According to the insulation elements (Mp1 to Mp3, Mn1 to Mn3) for transmitting an abnormality detection signal to the receiving device, and between the plurality of insulating elements and the receiving device, A logical operation unit (30) that performs an operation and outputs a result of the logical operation to the receiving device, and includes a total number of connection wirings that connect the plurality of insulating elements and the logical operation unit. Also, the less towards the total number of connection line which connects the receiving apparatus and the logical operation unit, said isolation element in response to the abnormality signal, transmits the abnormality detection signal of a different waveform for each of the insulating element.

  According to the above configuration, the number of connection wirings (terminals of the receiving device) connected to the receiving device can be reduced by collecting the abnormality detection signals in the logic operation unit. For example, if the logical operation unit is configured to output the result of the logical operation to the receiving device via one connection wiring, the n connection wirings input to the logical operation unit are consolidated into one. can do. Further, the insulation element transmits an abnormality detection signal having a different waveform for each insulation element. With this configuration, the receiving apparatus can determine which part of the insulating element corresponds to an abnormality based on the waveform input from the logic operation unit. In other words, it is possible to simplify the connection wiring connected to the receiving device and to identify at which part the abnormality has occurred by the receiving device.

  Specifically, the logic operation unit is configured to include a logic circuit, thereby collecting the abnormality detection signals. For example, in the configuration in which the abnormality detection signal is in a high state when each part is normal, using an AND circuit as the logic circuit, the output of the signal aggregating unit and the abnormality detection signal corresponding to the part where the abnormality has occurred Are equal. Similarly, in the configuration in which the abnormality detection signal is in a low state when each part is normal, when an OR circuit is used as the logic circuit, the output of the signal aggregating unit and the abnormality detection signal corresponding to the part where the abnormality has occurred And become equal. Instead of the logic circuit, a high-impedance output element may be used as an insulating element, and a wired OR may be obtained by connecting the output of the insulating element.

  According to a second configuration, in the first configuration, each of the plurality of insulation elements transmits a periodic signal as the abnormality detection signal, and the frequency of the abnormality detection signal transmitted by each of the plurality of insulation elements Are different from each other.

  The insulating element transmits a periodic signal having a different frequency for each insulating element as an abnormality detection signal. According to this configuration, it is possible for the receiving apparatus to determine which part of the insulating element corresponds to which abnormality has occurred with a simple configuration. Here, the “periodic signal” is not limited to a rectangular wave, and may be a sine wave, a sawtooth wave, a triangular wave, or the like.

  According to a third configuration, in each of the first and second configurations, each of the plurality of insulating elements transmits a rectangular wave as the abnormality detection signal, and each of the plurality of the insulating elements transmits the abnormality detection signal. Duty is different from each other.

  The insulating element transmits a rectangular wave having a different duty for each insulating element as an abnormality detection signal. According to this configuration, it is possible for the receiving apparatus to determine which part of the insulating element corresponds to which abnormality has occurred with a simple configuration. Here, a configuration having both the present configuration and the second configuration, that is, a configuration in which the insulating elements output rectangular waves having different frequencies and different duties for each insulating element may be employed.

  According to a fourth configuration, in any one of the first to third configurations, the insulating element corresponds to the magnetic coupling element (23, 32) that insulates the power conversion circuit side from the receiving device side. A buffer (21, 33) for outputting the abnormality detection signal in accordance with the abnormality signal when an abnormality signal indicating the occurrence of abnormality in the region is received from the region;

  The insulating element insulates the power conversion circuit side from the receiving device side by the magnetic coupling element, and when the abnormal signal indicating the occurrence of abnormality in the corresponding part is received from the corresponding part by the buffer, the abnormal signal is Hold. By holding the abnormal signal, it is possible to secure a period until the receiving device acquires the abnormal detection signal and performs the abnormality determination.

  In a fifth configuration according to any one of the first to fourth configurations, the insulating element is a magnetic coupler.

  The insulating element is specifically a magnetic coupler, and an abnormal information transmission circuit can be realized with a simple configuration.

  In a sixth configuration according to any one of the first to fifth configurations, the plurality of portions include a plurality of first portions (SWp1 to SWp3) and a plurality of second portions (SWn1 to SWn3), As the logical operation unit, a first logical operation unit (30A) that performs a logical operation on the abnormality detection signal output from the insulating element corresponding to the plurality of first parts and outputs a result of the logical operation And a second logical operation unit (30B) that performs a logical operation on the abnormality detection signal output from the insulating element corresponding to the plurality of second parts and outputs a result of the logical operation. , Connecting wiring connecting the insulating elements corresponding to the plurality of first parts and the first logic operation unit, and connecting the insulating elements corresponding to the plurality of second parts and the second logic operation unit Total number of connecting wires to be combined Remote, less towards the total number of connection line which connects the receiving apparatus and each of the first logic operation unit and the second logical operation section.

  The output of the insulating element corresponding to the first part is input to the receiving device via the first logic operation unit, and the output of the insulating element corresponding to the second part is input to the receiving device via the second logic operation unit. The configuration is as follows. With this configuration, when there is an abnormality in each of the first part and the second part, the receiving device can perform determination of abnormality in the first part and determination of abnormality in the second part. It becomes possible.

  In any one of the first to sixth configurations, the seventh configuration includes the plurality of third sites (SWp1 to SWp3) and the plurality of fourth sites (SWn1 to SWn3), The receiving device instructs the insulating elements corresponding to the plurality of third portions to transmit the abnormality detection signal in a predetermined first period, and also corresponds to the plurality of fourth portions. The insulating element is instructed to transmit the abnormality detection signal in a predetermined second period that does not overlap with the first period.

  The receiving device instructs the insulating element corresponding to the third part and the insulating element corresponding to the fourth part to transmit an abnormality detection signal so that the periods do not overlap. By adopting this configuration, when the abnormality is occurring in each of the third part and the fourth part while sharing the logical operation unit applied to the third part and the fourth part, the receiving device It is possible to perform the determination of the abnormality in and the determination of the abnormality in the fourth part. When this configuration is applied to the sixth configuration, each of the first portion and the second portion may include a third portion and a fourth portion.

  In an eighth configuration according to any one of the first to seventh configurations, the abnormal signal is an abnormality of an open abnormality in which the semiconductor switching element provided in each part of the power conversion circuit is always open. Including an occurrence and an occurrence of a closing abnormality in which the semiconductor switching element is normally closed, and the insulating element is different for each insulating element according to the abnormal signal and corresponds to The abnormality detection signal having a different waveform is transmitted when the opening abnormality of the semiconductor switching element occurs and when the closing abnormality occurs.

  According to the above configuration, it is possible to specify the semiconductor switching element in which an abnormality has occurred, and further specify whether the abnormality that has occurred in the semiconductor switching element is an open abnormality or a closing abnormality.

  According to a ninth configuration, in the eighth configuration, the power conversion circuit is an inverter circuit (INV), and the semiconductor switching element configures the inverter circuit. One of the elements (SWp1 to SWp3) and the lower arm switching elements (SWn1 to SWn3), and the receiving device is a control device for the inverter circuit, and is based on the abnormality detection signal, and The determination unit for determining the occurrence of the opening abnormality and the occurrence of the closing abnormality in the arm switching element and the lower arm switching element, and when the closing abnormality has occurred in the semiconductor switching element, the closing abnormality has occurred. The upper arm switching element or the lower arm connected in series to the semiconductor switching element A stop portion for stopping driving of the switching element; and when the open abnormality occurs in the semiconductor switching element, the upper arm switching element or the lower switch connected in series to the semiconductor switching element in which the open abnormality occurs A permission unit that permits driving of the arm switching element.

  In the semiconductor switching element connected in series with the semiconductor switching element in which the abnormality has occurred, control is performed according to the type of abnormality of the semiconductor switching element in which the abnormality has occurred. This control makes it possible to continuously operate the inverter circuit even when an abnormality has occurred in the semiconductor switching elements constituting the inverter circuit.

The figure showing the electric constitution of an inverter apparatus. Schematic showing the circuit board in which an inverter apparatus is mounted. Schematic showing the structure of a power card (semiconductor switching element). The figure showing the electric constitution of a magnetic coupler. The figure showing the connection of the magnetic coupler and logic circuit in 1st Embodiment. The table | surface which shows the abnormality detection signal output at the time of the normal of each semiconductor switching element, and abnormality. The figure showing the abnormality detection signal from which a frequency mutually differs. The figure showing the abnormality detection signal from which a duty differs mutually. The figure showing the connection of the magnetic coupler and logic circuit in 3rd Embodiment. The figure showing the connection of the magnetic coupler and logic circuit in 4th Embodiment. The table | surface which shows the abnormality detection signal output at the time of normal of each semiconductor switching element, an open abnormality, and a closing abnormality. The figure showing the insulating element in 8th Embodiment. The figure showing the connection of the magnetic coupler and logic circuit in 9th Embodiment.

(First embodiment)
Hereinafter, an embodiment in which an “abnormal information transmission circuit” applied to a “power conversion circuit” is applied to a hybrid vehicle will be described with reference to the drawings.

  FIG. 1 shows an electrical configuration of the power converter according to the present embodiment. The motor generator 10 is mechanically coupled to drive wheels and an internal combustion engine. The motor generator 10 is connected to the inverter device INV. The inverter device INV (power conversion circuit) converts the DC power into AC power using the output voltage of the DC power supply 12 as an input voltage. Here, DC power supply 12 is a high voltage battery whose terminal voltage is a high voltage of, for example, 100 V or higher. The DC power source may be a buck-boost converter or the like.

  The inverter device INV is configured by connecting three series connection bodies of switching elements SWp1 to SWp3 (upper arm switching elements) on the high voltage side and switching elements SWn1 to SWn3 (lower arm switching elements) on the low voltage side in parallel. Yes. Connection points of these switching elements SWp <b> 1 to SWp <b> 3 and switching elements SWn <b> 1 to SWn <b> 3 are connected to respective phases of the motor generator 10. Switching elements SWp1 and SWn1 correspond to the U phase, switching elements SWp2 and SWn2 correspond to the V phase, and switching elements SWp3 and SWn3 correspond to the W phase, respectively.

  Further, between the input / output terminals (between the collector and the emitter) of the switching elements SWp1 to SWp3 on the high voltage side and the switching elements SWn1 to SWn3 on the low voltage side, free wheel diodes FDp1 to 3 on the high voltage side and low The cathodes and anodes of the voltage-side freewheel diodes FDn1 to FDn1 are connected.

  The capacitor CA is connected to the collectors (high voltage side terminals) of the upper arm switches SWp1 to SWp3 and the emitters (low voltage side terminals) of the lower arm switches SWn1 to SWn3, and smoothes the voltage between both terminals. It is a capacitor.

  The semiconductor switching elements SW (SWp1 to SWp3, SWn1 to SWn3) constituting the inverter device INV are all power semiconductors, and more specifically, insulated gate bipolar transistors (IGBTs).

  The control device 40 is a microcomputer and is digital processing means for controlling the control amount of the motor generator 10 by operating the inverter device INV. Specifically, the control device 40 outputs an operation signal to each switching element SW of the inverter device INV via an interface 42 including magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 as insulating means to be described later, whereby the inverter device Operate INV.

  More specifically, the control device 40 outputs drive command signals to the drive circuits Dp1 to Dp3 and Dn1 to Dn3 that input drive signals to the control terminals (gates) of the switching elements SW via the interface 42. Specifically, the drive command signal is a PWM (Pulse Width Modulation) signal set based on the target value of the output voltage of the inverter device INV and the detected value of the input voltage of the inverter device INV. Here, the reason why the interface 42 is provided with an insulating means is to insulate the high voltage system including the inverter device INV and the DC power supply 12 from the low voltage system including the control device 40.

  The emitters of the switches SWp1 to SWp3, SWn1 to SWn3 are insulated and connected to different reference voltages. The drive circuits Dp1 to Dp3 and Dn1 to Dn3 are connected to the emitters of the switches SWp1 to SWp3 and SWn1 to SWn3 to be driven. The drive circuits Dp1 to Dp3 and Dn1 to Dn3 apply voltages to the gates of the switches SWp1 to SWp3 and SWn1 to SWn3 to be driven using the voltages of the emitters of the switches SWp1 to SWp3 and SWn1 to SWn3 to be driven as reference voltages.

  FIG. 2 shows a circuit board 50 on which the inverter device INV according to the present embodiment is mounted. The illustrated circuit board 50 has both a high voltage circuit region HV connected to the inverter device INV and a low voltage circuit region LV. Here, basically, in the drawing, the region on the right side (the direction opposite to the direction in which the upper arm switch SWp2 is provided with respect to the upper arm switch SWp3) is the low voltage circuit region LV, and the center and left side ( The region in the direction in which the upper arm switch SWp2 is provided with respect to the upper arm switch SWp3 is the high voltage circuit region HV. However, in the high voltage circuit area HV, there are also components that constitute both the low voltage system and the high voltage system, such as magnetic couplers Mp1 to Mp3 and Mn1 to Mn3.

  The control device 40 is disposed in the low voltage circuit region LV on the right side in the drawing. The electrolytic capacitor (not shown) for the flyback converter that constitutes the power supply circuit of the drive circuits Dp1 to Dp3 and Dn1 to Dn3 of each switching element SW that constitutes the inverter device INV is a low voltage that constitutes a low voltage system. Arranged in the circuit region LV. Further, the primary winding side of the transformer (not shown) for the flyback converter constituting the power supply circuit of the drive circuits Dp1 to Dp3, Dn1 to Dn3 is arranged in the low voltage circuit region LV as constituting the low voltage system. The secondary winding side is arranged in the high voltage circuit area HV as a component of the high voltage system.

  As shown in FIG. 3, each switching element SW constituting the inverter device INV is inserted and connected to the circuit board 50 from the back side (the back side of the surface shown in FIG. 2) of the circuit board 50. Here, each switching element SW is covered with an insulating material together with other elements to constitute a power card PWC (module). The power card PWC also stores a freewheel diode FD and a temperature sensitive diode SD, but the description of the freewheel diode FD is omitted in FIG.

  The power card PWC has the same structure in which the switching element SWp on the high voltage side is housed and in which the switching element SWn on the low voltage side is housed. The power card PWC has a plurality of signal terminals exposed to the outside from the insulating material. Specifically, the gate terminal G of the switching element SW, the emitter detection terminal KE, the sense terminal SE, and the anode A and cathode K terminals of the temperature-sensitive diode SD are inserted and connected to the circuit board 50. Here, the emitter detection terminal KE is connected to the emitter E of the switching element SW and is an electrode having the same voltage as the emitter E. The collector detection terminal KC is connected to the collector of the switching element SW and is an electrode having the same voltage as the collector. The sense terminal SE is a terminal for outputting a minute current having a correlation with the current flowing through the switching element SW.

  As shown in FIG. 2, since the switching elements SW constitute a high voltage system, an insulating region IA is provided on the circuit board 50 in order to insulate each of the switching elements SW from other circuits. Yes. The insulating region IA is a region where a circuit (element, wiring, power supply pattern) is not arranged.

  In the upper row in the figure, terminals of the power card PWC including the upper arm switches SWp1 to SWp3 are shown, which are separated from each other by an insulating region IA. Then, driving circuits Dp1 to Dp3 for driving the upper arm switches SWp1 to SWp3 are mounted in a region surrounded by the insulating region IA. This is because the voltage at the emitter detection terminal KE between the upper arm switches SWp1 to SWp3 varies greatly depending on whether the corresponding lower arm switches SWn1 to SWn3 are in the on state or the off state. For this reason, it is necessary to insulate the drive circuits Dp1 to Dp3 from each other even though the operation voltages of these drive circuits Dp1 to Dp3 are small. The width of the insulating region IA is determined from the viewpoint of avoiding legal requirements, dielectric breakdown, and the like.

  In the lower column of the figure, terminals of the power card PWC including the lower arm switches SWn1 to SWn3 are shown. Since the voltages of the emitter detection terminals KE corresponding to these lower arm switches SWn1 to SWn3 are close, the insulating region IA is not provided between them. The operating voltages of the components of the drive circuits Dn1 to Dn3 are not necessarily higher than those of the components in the low voltage circuit region LV. For this reason, the drive circuits Dn1 to Dn3 of the lower arm switches SWn1 to SWn3 do not necessarily need to be provided with the insulating region IA on the circuit board 50.

  However, the reference voltages (voltages of the emitters of the corresponding switches SWn1 to SWn3) of the drive circuits Dn1 to Dn3 are different from each other depending on the resistance component and the induction component between the emitters of the switches SWn1 to SWn3 during the operation of the inverter device INV. is there. For this reason, although the insulating region IA is not provided between the drive circuits Dn1 to Dn3, the drive circuits Dn1 to Dn3 are insulated from each other.

  The drive circuits Dp1 to Dp3, Dn1 to Dn3 (hereinafter also referred to as drive circuit D) are connected to the gate terminal G and the emitter detection terminal KE of the corresponding switching element SW, and apply a voltage to the gate terminal G of the switching element SW. By applying the voltage, the switching element SW is driven.

  Furthermore, the drive circuit D of the present embodiment is connected to the sense terminal SE of the corresponding switching element SW and the anode A and cathode K of the temperature sensitive diode SD. Then, the drive circuit D detects the current flowing through the switching element SW based on the voltage value of the sense terminal SE. Further, the drive circuit D detects the temperature of the switching element SW based on the voltage between the anode A and the cathode K of the temperature sensitive diode SD. Further, the drive circuit D determines the abnormality of the switching element SW based on the detected value of the current flowing through the switching element SW and the detected value of the temperature of the switching element SW. Further, the drive circuit D determines an abnormality of the drive circuit D itself. Then, the drive circuit D transmits an abnormality signal indicating abnormality information (that is, an abnormality corresponding to the switching element SW) of the switching element SW and the driving circuit D to the control device 40 as a “reception device”. Note that the subject of abnormality determination may be the switching element SW or another IC.

  Here, as described above, the drive circuit D and the control device 40 are connected via the interface 42. More specifically, the drive circuit D and the control device 40 are connected via magnetic couplers Mp1 to Mp3, Mn1 to Mn3 (hereinafter also referred to as magnetic coupler M) constituting the interface 42. The magnetic couplers Mp1 to Mp3, Mn1 to Mn3 correspond to “insulating elements”, and a plurality of parts insulated from each other of the inverter device INV (switches SWp1 to SWp3, SWn1 to SWn3 and drive circuits Dp1 to Dp3, Dn1 to Dn3) And the control device 40. The magnetic couplers Mp1 to Mp3, Mn1 to Mn3 receive an abnormal signal indicating the occurrence of an abnormality in the corresponding part (driving circuits Dp1 to Dp3, Dn1 to Dn3), and detect an abnormality according to the received abnormal signal. The signal is transmitted to the control device 40.

  As shown in FIG. 4, the magnetic coupler M includes an input circuit 22 on the drive circuit D side, an output circuit 21 on the control device 40 side, and a transformer 23 that is an insulating element between the input circuit 22 and the output circuit 21. I have. The input circuit 22 receives an input signal input from the drive circuit D to the magnetic coupler M. Then, the input circuit 22 transmits a pulse signal to the output circuit 21 via the transformer 23 according to the input signal. The output circuit 21 transmits an output signal from the magnetic coupler M to the control device 40 in accordance with the pulse signal transmitted from the input circuit 22. Here, the signal input from the drive circuit D to the input circuit 22 is an abnormal signal detected by the drive circuit D. The transformer 23 corresponds to a “magnetic coupling element”, and the output circuit 21 corresponds to a “buffer”.

  Further, the magnetic coupler M includes an input circuit 24 on the control device 40 side, an output circuit 25 on the drive circuit D side, and a transformer 26 that is an insulating element between the input circuit 24 and the output circuit 25. The input circuit 24 receives an input signal input from the control device 40 to the magnetic coupler M. Then, the input circuit 24 transmits a pulse signal to the output circuit 25 via the transformer 26 according to the input signal. The output circuit 25 transmits an output signal from the magnetic coupler M to the drive circuit D in accordance with the pulse signal transmitted from the input circuit 24. Here, the signal input from the control device 40 to the input circuit 24 is a drive command signal for the drive circuit D.

  Here, the output circuit 21 of the magnetic coupler M outputs a signal by driving the switches S1 and S2. The switches S1 and S2 are MOS-FETs, and when the magnetic coupler M is operated, one of the switches S1 and S2 is turned on. When the switch S1 is turned on, the output terminal and the power source are brought into conduction, and a high state signal is output from the output terminal. Further, when the switch S2 is turned on, the output terminal and the ground voltage are brought into conduction, and a low signal is output from the output terminal. That is, the magnetic coupler M transmits an output signal according to an input signal by a binary signal that takes one of a binary value of a high state and a low state with a predetermined reference voltage (ground voltage) as a reference. The output circuit 25 of the magnetic coupler M outputs a signal by driving the switches S3 and S4, similarly to the output circuit 21.

  As shown in FIG. 5, in this embodiment, a logic circuit 30 is provided between the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 and the control device 40 in order to simplify the circuit configuration. Here, the simplification of the circuit configuration means a reduction in the number of terminals used for receiving abnormality information in the control device 40, and simplification of connection wiring between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the control device 40. It is a change.

  The magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 of the present embodiment are respectively connected to the secondary side (the control device 40 side) when an abnormal signal indicating an abnormality is input from the primary side drive circuits Dp1 to Dp3, Dn1 to Dn3. ), A periodic signal such as a rectangular wave is transmitted as the abnormality detection signal. Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are abnormal detection signals having different waveforms for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, more specifically, different frequencies for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. Anomaly detection signal is sent. Here, the ratio (duty) of the ON time with respect to one period of the abnormality detection signal is set to 50%, for example.

  Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are provided when no abnormal signal indicating abnormality is input from the primary side drive circuits Dp1 to Dp3, Dn1 to Dn3, that is, the corresponding switching elements SW and drive circuits D. If is normal, it continues to output a high signal. In other words, a signal with a duty of 100% is continuously output.

  FIG. 6 shows a table of abnormality detection signals output when the switching elements SWp1 to SWp3 and SWn1 to SWn3 (U, V, W phase upper arm, U, V, W phase lower arm) are normal and abnormal.

  FIG. 7 shows a magnetic coupler M1 (any one of magnetic couplers Mp1 to Mp3, Mn1 to Mn3) and a magnetic coupler M2 (of magnetic couplers Mp1 to Mp3, Mn1 to Mn3, different from the magnetic coupler M1). An abnormality detection signal to be output is shown. In FIG. 7, the magnetic coupler M1 outputs an abnormality detection signal having a frequency f1, and the magnetic coupler M2 outputs an abnormality detection signal having a frequency f2 different from the frequency f1.

  Here, the magnetic coupler M may output the abnormal signal output from the corresponding drive circuit D as it is to the control device 40 side as an abnormal detection signal. That is, the drive circuit D may output a periodic abnormality signal having a different frequency for each drive circuit D.

  Further, the magnetic coupler M to which the abnormality signal is input from the drive circuit D may output an abnormality detection signal having a different frequency for each magnetic coupler M. In this case, for example, the drive circuit D transmits a pulse wave as an abnormal signal to the magnetic coupler M, and the magnetic coupler M that has received the pulse wave holds the abnormal signal, and periodically has a different frequency for each magnetic coupler M. An abnormality detection signal may be output.

  The logic circuit 30 performs a logical operation after aggregating output signals of all the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. And the result of the logical operation is output to the control apparatus 40 via one connection wiring. As a result, the paths through which abnormal signals are input to the control device 40 from the plurality of magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are made common. Here, the total number of connection wirings connecting the logic circuit 30 and the control device 40 is smaller than the total number of connection wirings connecting the plurality of magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the logic circuit 30. That's fine. That is, the total number of connection wirings connecting the logic circuit 30 and the control device 40 is smaller than the total number (6) of connection wirings connecting the six magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the logic circuit 30. Anything is acceptable.

  Further, the logic circuit 30 uses an AND circuit to calculate the logical product of the output signals of all the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, and to detect an abnormality from any one of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. When the detection signal is input, the abnormality detection signal is output to the control device 40 as it is. Thereby, when a rectangular wave is input from the logic circuit 30, the control device 40 acquires the frequency of the rectangular wave, and detects an abnormality from any of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 based on the acquired frequency. It can be determined whether a signal is being output. That is, the control device 40 can determine which abnormality has occurred in the switching element SW or the drive circuit D corresponding to which of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3.

  As shown in FIG. 5, the logic circuit 30 connects adjacent magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 in series (serial connection). Here, as shown in FIG. 2, the magnetic coupler Mn3 and the magnetic coupler Mn2 are adjacent, the magnetic coupler Mn2 and the magnetic coupler Mn1 are adjacent, the magnetic coupler Mn1 and the magnetic coupler Mp1 are adjacent, and the magnetic coupler Mp1. The magnetic coupler Mp2 is adjacent, and the magnetic coupler Mp2 and the magnetic coupler Mp3 are adjacent.

  The logic circuit 30 includes an AND circuit An2 to which the output of the magnetic coupler Mn3 and the output of the magnetic coupler Mn2 are input. Further, an AND circuit An1 to which the output of the AND circuit An2 and the output of the magnetic coupler Mn1 are input is provided. Further, an AND circuit Ap1 to which the output of the AND circuit An1 and the output of the magnetic coupler Mp1 are input is provided. Further, an AND circuit Ap2 into which the output of the AND circuit Ap1 and the output of the magnetic coupler Mp2 are input is provided. Further, an AND circuit Ap3 into which the output of the AND circuit Ap2 and the output of the magnetic coupler Mp3 are input is provided.

  In this configuration, as described above, the AND circuits Ap1 to Ap3, An1, and An2 are provided so that the adjacent magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are connected in series. Thereby, the wiring between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, the logic circuit 30, and the control device 40 can be further simplified.

  As shown in FIG. 2, in the AND circuits Ap <b> 1 to Ap <b> 3, An <b> 1, An <b> 2, the magnetic coupler Mp <b> 3 corresponding to the AND circuit Ap <b> 3, which is a “second logic element” input to the control device 40, Is the closest distance. For this reason, the length of the wiring L between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, the logic circuit 30, and the control device 40 can be shortened. Thereby, the control device 40 can acquire the abnormality of the drive circuits Dp1 to Dp3, Dn1 to Dn3 earlier.

  Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are abnormal when no abnormality signal indicating abnormality is input from the drive circuits Dp1 to Dp3, Dn1 to Dn3, that is, all of the drive circuits Dp1 to Dp3, Dn1 to Dn3 are abnormal. If no signal is detected, a high signal is continuously output. The input terminals of the AND circuits Ap1 to Ap3, An1, and An2 are pulled down by being connected to a power source through a resistor. For this reason, when no abnormality occurs in the entire system, a high signal is input to the AND circuits Ap1 to Ap3, An1, and An2, and the entire system is normal from the logic circuit 30 (AND circuit Ap3). A high state signal is output.

  According to this configuration, when an open abnormality occurs due to disconnection or the like in the connection between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the AND circuits Ap1 to Ap3, An1 and An2, the AND circuits Ap1 to Ap3, An1 and An2 One of the inputs is a rectangular wave. As a result, the logic circuit 30 outputs a rectangular wave representing the occurrence of an abnormality. In addition, in the connection between the AND circuits Ap1 to Ap3, An1 and An2, when an open abnormality occurs due to disconnection or the like, one of the inputs of the AND circuits Ap1 to Ap3 and An1 is set to a low state. As a result, the logic circuit 30 outputs a low state signal indicating the occurrence of an abnormality.

  That is, according to the present configuration, the open abnormality in the connection between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the AND circuits Ap1 to Ap3, An1 and An2, and the connection between the AND circuits Ap1 to Ap3, An1 and An2 An open abnormality can be detected as an abnormality in the entire system.

  Further, when the operation of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 is stopped due to an abnormality of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 itself, one of the inputs of the AND circuits Ap1 to Ap3, An1 and An2 is in a low state. Is done. As a result, the logic circuit 30 outputs a low-state signal indicating the occurrence of an abnormality in the entire system. That is, according to this configuration, it is possible to detect an abnormality in the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 itself as an abnormality in the entire system.

(Second Embodiment)
In the first embodiment, the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 are configured to output rectangular waves having different frequencies for the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 as abnormality detection signals. This is changed so that the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 output rectangular waves having the same frequency and different duties for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 as the abnormality detection signals.

  FIG. 8 shows a magnetic coupler M1 (any one of magnetic couplers Mp1 to Mp3, Mn1 to Mn3) and a magnetic coupler M2 (of magnetic couplers Mp1 to Mp3, Mn1 to Mn3, different from the magnetic coupler M1). An abnormality detection signal to be output is shown. As shown in FIG. 8, when an abnormal signal is input from the drive circuit Dp1, the magnetic coupler M1 is configured to output a rectangular wave with a duty of 40%, for example, and the magnetic coupler M2 receives the abnormal signal from the drive circuit Dp2. For example, a rectangular wave with a duty of 60% is output.

  With such a configuration, when a rectangular wave is input from the logic circuit 30, the control device 40 acquires the duty of the rectangular wave, and based on the acquired duty, which magnetic coupler Mp1 to Mp3 It can be determined whether an abnormality detection signal is output from Mn1 to Mn3. That is, the control device 40 can determine which abnormality has occurred in the switching element SW or the drive circuit D corresponding to which of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3.

(Third embodiment)
The configuration of the third embodiment is shown in FIG. In the present embodiment, the magnetic couplers Mp1 to Mp3 are connected in series by a first logic circuit 30A (first logic operation unit) composed of AND circuits Ap1 and Ap2, and the magnetic couplers Mn1 to Mn3 are connected from the AND circuits An1 and An2. The second logic circuit 30B (second logic operation unit) is connected in series. Then, the outputs of the logic circuits 30A and 30B are independently input to the control device 40.

  That is, the first logic circuit 30A receives abnormality detection signals from the magnetic couplers Mp1 to Mp3 corresponding to the upper arm switches SWp1 to SWp3 (first portion). Similarly, abnormality detection signals are input to the second logic circuit 30B from the magnetic couplers Mn1 to Mn3 corresponding to the lower arm switches SWn1 to SWn3 (second part).

  That is, the connection wiring for connecting the magnetic couplers Mp1 to Mp3 corresponding to the plurality of first parts and the first logic circuit 30A, and the magnetic couplers Mn1 to Mn3 and the second logic circuit 30B corresponding to the plurality of second parts are provided. The total number of connection wirings connecting the first logic circuit 30A and the second logic circuit 30B and the control device 40 is smaller than the total number of connection wirings to be connected.

  According to the configuration of the present embodiment, when an abnormality occurs simultaneously in any one of the upper arm switches SWp1 to SWp3 and any one of the lower arm switches SWn1 to SWn3, the control device 40 causes the abnormality in which part. Can be determined.

  The control device 40 drives the control device 40 by independently acquiring the abnormal signals of the drive circuits Dp1 to Dp3 of the upper arm switches SWp1 to SWp3 and the abnormal signals of the drive circuits Dn1 to Dn3 of the lower arm switches SWn1 to SWn3. It becomes possible to acquire the abnormality of the circuits Dp1 to Dp3, Dn1 to Dn3 earlier.

(Fourth embodiment)
The configuration of the fourth embodiment is shown in FIG. In this embodiment, the outputs of the magnetic couplers Mp1 and Mn1 are input to the AND circuit A1, the outputs of the magnetic couplers Mp2 and Mn2 are input to the AND circuit A2, and the outputs of the magnetic couplers Mp3 and Mn3 are input to the AND circuit A3. . Then, the outputs of the AND circuits A1 to A3 are independently input to the control device 40.

  According to the configuration of this embodiment, any one of the U-phase upper and lower arm switches SWp1 and SWn1, the V-phase upper and lower arm switches SWp2 and SWn2, and the W-phase upper and lower arm switches SWp3 and SWn3 When an abnormality occurs at the same time, the control device 40 can determine in which part the abnormality has occurred.

(Fifth embodiment)
In the configuration of this embodiment, similarly to the configuration of the first embodiment shown in FIG. 5, the outputs of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 are input to the control device 40 via the logic circuit 30. .

  Here, the control device 40 of the present embodiment transmits an abnormality detection signal in a predetermined first period to the magnetic couplers Mp1 to Mp3 corresponding to the upper arm switches SWp1 to SWp3 as “third parts”. To Further, the control device 40 transmits an abnormality detection signal to the magnetic couplers Mn1 to Mn3 corresponding to the lower arm switches SWn1 to SWn3 as the “fourth part” in a predetermined second period that does not overlap with the first period. To command.

  Here, the command signal that instructs the control device 40 to transmit the abnormality detection signal to each of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 is specifically rectangular waves having different frequencies. The command signal may be a digital signal representing a bit string (for example, 0) indicating “third part” and a digital signal representing a bit string (for example, 1) indicating “fourth part”. In this case, when a digital signal representing 0 is input to the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, the magnetic couplers Mp1 to Mp3 output an abnormality detection signal, and the digital signal representing 1 is the magnetic couplers Mp1 to Mp3, Mn1. When input to .about.Mn3, the magnetic couplers Mn1 to Mn3 output abnormality detection signals.

  That is, when the control device 40 instructs the magnetic couplers Mp1 to Mp3 to transmit an abnormality detection signal, the control device 40 generates a rectangular wave having a frequency A and a predetermined duty (for example, 50%) as the magnetic coupler Mp1. Output to ~ Mp3, Mn1 to Mn3. The magnetic couplers Mp <b> 1 to Mp <b> 3 that have received the rectangular wave having the frequency A and the predetermined duty output an abnormality detection signal to the control device 40.

  Further, when the control device 40 instructs the magnetic couplers Mn1 to Mn3 to transmit an abnormality detection signal, a rectangular wave having a frequency B (≠ A) and a predetermined duty (for example, 50%) is generated. Output to the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. The magnetic couplers Mn <b> 1 to Mn <b> 3 that have received the rectangular wave having the frequency B and a predetermined duty output an abnormality detection signal to the control device 40.

  According to the configuration of the present embodiment, when an abnormality occurs simultaneously in any one of the upper arm switches SWp1 to SWp3 and any one of the lower arm switches SWn1 to SWn3, the control device 40 causes the abnormality in which part. Can be determined. The logic circuit 30 can be shared by the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3.

  Here, the control device 40 may instruct the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 to output the abnormality detection signal in different periods. Specifically, the command signal instructing the control device 40 to transmit the abnormality detection signal to each of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 is a rectangular wave having a different frequency. The command signal may be a digital signal representing a bit string (for example, Mp1: 000, Mp2: 001, Mp3: 010, Mn1: 100, Mn2: 101, Mn3: 110) indicating each insulating element. In this case, for example, when a digital signal representing 000 is input to the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, the magnetic coupler Mp1 outputs an abnormality detection signal, and a digital signal representing 100 is represented by the magnetic couplers Mp1 to Mp3, Mn1. When input to .about.Mn3, the magnetic coupler Mn1 outputs an abnormality detection signal.

(Sixth embodiment)
The magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 of the present embodiment are respectively connected to the secondary side (the control device 40 side) when an abnormal signal indicating an abnormality is input from the primary side drive circuits Dp1 to Dp3, Dn1 to Dn3. ), A periodic signal such as a rectangular wave is transmitted as the abnormality detection signal. Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 transmit abnormality detection signals having different frequencies for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3.

  Here, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 output an abnormality detection signal with a duty of 30% when an open abnormality occurs in the switches SWp1 to SWp3, SWn1 to SWn3. Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 output an abnormality detection signal with a duty of 70% when a closing abnormality occurs in the switches SWp1 to SWp3, SWn1 to SWn3. That is, an abnormality detection signal with a different duty is output for the opening abnormality and the closing abnormality. Thereby, the control device 40 as the “determination unit” determines which of the switches SWp1 to SWp3 and SWn1 to SWn3 has an abnormality based on the abnormality detection signal, and which of the opening abnormality and the closing abnormality is present. It can be determined whether it has occurred.

  FIG. 11 shows abnormality detections output when the switching elements SWp1 to SWp3, SWn1 to SWn3 (U, V, W phase upper arm, U, V, W phase lower arm) are normal, open abnormal, and closed abnormal. Signals are shown as a table.

  Here, the open abnormality is an abnormality (open failure) in which the switch SW is always open regardless of the signal input to the drive terminal (gate terminal), and the close abnormality is the switch SW is connected to the drive terminal (gate). This is an abnormality (short fault) that is normally closed regardless of the signal input to the terminal. The opening abnormality and the closing abnormality are caused by an abnormality in the wiring between the switch SW and other elements in addition to the abnormality of the switch SW itself.

  Further, according to the type of abnormality of each switch SW, the control device 40 according to the present embodiment drives the switch SW (switch SW belonging to the same leg) connected in series to the switch SW in which the abnormality has occurred. Restrict.

  In other words, when the switch SW is abnormally closed, the control device 40 as the “stop unit” stops driving the switch SW connected in series to the switch SW in which the abnormal close is generated. As a result, the upper arm switch and the lower arm switch are simultaneously turned on, and it is possible to prevent both terminals of the DC power supply 12 from being short-circuited.

  Further, when an open abnormality occurs in the switch SW, the control device 40 as the “permission unit” permits driving of the switch SW connected in series to the switch SW in which the open abnormality occurs. As a result, even if an abnormality occurs in the switch SW, it becomes possible to pass a current to the switch SW connected in series to the switch SW in which the abnormality has occurred, and the switches belonging to other legs An increase in current flowing through SW can be suppressed.

  Moreover, in the said embodiment, it was set as the structure which transmits the abnormality detection signal of a different frequency for every magnetic coupler Mp1-Mp3, Mn1-Mn3, and also outputs the abnormality detection signal of a different duty by open abnormality and closing abnormality. This may be changed. That is, in each of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3, an abnormality detection signal having a different frequency is output depending on whether the abnormality is open or closed, and an abnormality detection signal having a different frequency for each magnetic coupler Mp1 to Mp3, Mn1 to Mn3. It is good also as a structure which transmits.

  That is, the opening abnormality of the switch SWp1 is represented by the frequency A, the closing abnormality of the switch SWp1 is represented by the frequency B, the opening abnormality of the switch SWp2 is represented by the frequency C, the closing abnormality of the switch SWp2 is represented by the frequency D, and the opening of the switch SWp3 is represented. Abnormality is represented by frequency E, closing abnormality of switch SWp3 is represented by frequency F, opening abnormality of switch SWn1 is represented by frequency G, closing abnormality of switch SWn1 is represented by frequency H, and opening abnormality of switch SWn2 is represented by frequency I. The switch SWn2 may be closed by frequency J, the switch SWn3 may be opened abnormally by frequency K, and the switch SWn3 may be closed by frequency L (however, the frequencies A to L are different from each other).

(Seventh embodiment)
In the first embodiment, the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 are configured to output rectangular waves having different frequencies for the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 as abnormality detection signals. In the fifth embodiment, this is changed, and the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 use, as abnormality detection signals, rectangular waves having the same frequency and different duties for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. The configuration is to output.

  For example, the magnetic coupler Mp1 has a rectangular wave with a duty of 30% as an abnormality detection signal, the magnetic coupler Mp2 has a rectangular wave with a duty of 35% as an abnormality detection signal, the magnetic coupler Mp3 has a rectangular wave with a duty of 40% as an abnormality detection signal, The magnetic coupler Mn1 outputs a rectangular wave with a duty of 45% as an abnormality detection signal, the magnetic coupler Mn2 outputs a rectangular wave with a duty of 50% as an abnormality detection signal, and the magnetic coupler Mn3 outputs a rectangular wave with a duty of 55% as an abnormality detection signal. The configuration is as follows. The control device 40 can determine which of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 has an abnormality based on the duty of the received abnormality detection signal.

  The magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 may output a rectangular wave having a different frequency and a different duty for each of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 as the abnormality detection signal.

(Eighth embodiment)
In the above embodiment, the magnetic coupler is used as the “insulating element”. However, the receiver 31, the insulating transformer 32, and the driver 33 may be used instead. Specifically, as shown in FIG. 12, a receiver 31 (buffer) to which an abnormal signal indicating an abnormality is input from the primary side drive circuits Dp1 to Dp3, Dn1 to Dn3, and a signal from the receiver to the primary coil. A configuration may be employed in which an insulating transformer 32 is input and a driver 33 (buffer) that receives a signal from the secondary coil of the insulating transformer 32 and outputs the signal to the control device 40 side. A primary side and a secondary side are separated by a buffer.

(Ninth embodiment)
The magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 of the ninth embodiment have a periodic signal, for example, a rectangular signal, as an abnormality detection signal when an abnormality signal indicating abnormality is input from the drive circuits Dp1 to Dp3, Dn1 to Dn3. Send a wave. Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 transmit abnormality detection signals having different frequencies for the magnetic couplers Mp1 to Mp3, Mn1 to Mn3. Here, the ratio (duty) of the off time with respect to one cycle of the abnormality detection signal is, for example, 50%. Further, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are when no abnormal signal indicating abnormality is input from the primary side drive circuits Dp1 to Dp3, Dn1 to Dn3, that is, when each switching element SW is normal. Continue to output a low signal.

  Furthermore, the logic circuit 30C according to the ninth embodiment uses an OR circuit, so that when the abnormality detection signal is input from one of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3, the abnormality is given to the control device 40. The detection signal is output as it is. Thereby, when a rectangular wave is input from the logic circuit 30, the control device 40 acquires the frequency of the rectangular wave, and detects an abnormality from any of the magnetic couplers Mp1 to Mp3 and Mn1 to Mn3 based on the acquired frequency. It can be determined whether a signal is being output. In other words, the control device 40 can determine which magnetic coupler Mp1 to Mp3, Mn1 to Mn3 has an abnormality in the switching element SW.

  FIG. 13 shows the configuration of the ninth embodiment. In the logic circuit 30C, the outputs of the magnetic couplers Mn3 and Mn2 are input to the OR circuit On2. The output of the OR circuit On2 and the output of the magnetic coupler Mn1 are input to the OR circuit On1. The output of the AND circuit An1 and the output of the magnetic coupler Mp1 are input to the OR circuit Op1. The output of the OR circuit Op1 and the output of the magnetic coupler Mp2 are input to the OR circuit Op2. The output of the OR circuit Op2 and the output of the magnetic coupler Mp3 are input to the OR circuit Op3. The output signal of the OR circuit Op3 is input to the control device 40 as the output signal of the logic circuit 30C.

  In the configuration of FIG. 13 in which the logic circuit 30C includes OR circuits Op1 to Op3, On1, and On2, the inputs of the OR circuits Op1 to Op3, On1, and On2 are pulled up. Further, when none of the drive circuits Dp1 to Dp3, Dn1 to Dn3 detects an abnormality, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 continue to output a low state signal.

  According to the above configuration, when an open abnormality occurs in the connection between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the OR circuits Op1 to Op3, On1 and On2, the controller 40 is prevented from generating an abnormality as a whole system. A high state signal is input. Similarly, when an open abnormality occurs in the connection between the OR circuits Op <b> 1 to Op <b> 3, On <b> 1, On <b> 2, a high state signal indicating the occurrence of an abnormality in the entire system is input to the control device 40. Further, when the operations of the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are stopped, a high state signal indicating the occurrence of an abnormality in the entire system is input to the control device 40.

  That is, according to the above configuration, the open abnormality in the connection between the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 and the OR circuits Op1 to Op3, On1, On2, and the connection between the OR circuits Op1 to Op3, On1, On2 An open abnormality can be detected as an abnormality in the entire system.

(Other embodiments)
The pull-up on the input side of the AND circuits Ap1 to Ap3, An1, and An2 may be omitted. In the configuration in which the pull-down on the input side of the AND circuits Ap1 to Ap3, An1 and An2 is omitted, the magnetic couplers Mp1 to Mp3, Mn1 to Mn3 are high when the drive circuits Dp1 to Dp3, Dn1 to Dn3 have not detected an abnormality. It is not necessary to continue outputting the status signal.

  In the configuration of the first embodiment, a NAND circuit may be used instead of the AND circuits Ap1 to Ap3 and An1 to An3. In this case, the output of each NAND circuit may be inverted and input to the adjacent NAND circuit. Similarly, in the configuration of the ninth embodiment, a NOR circuit may be used instead of the OR circuit. In this case, the output of each NOR circuit is preferably inverted and input to the adjacent NOR circuit.

  In the above embodiment, a 2-input 1-output OR circuit or AND circuit is used as the logic element, but an n-input 1-output OR circuit or AND circuit may be used by changing this. A natural number of 3 or more).

  The “power conversion circuit” may be other than the inverter circuit. For example, a DCDC converter may be used.

  The output circuits 21 and 25 of the magnetic coupler M shown in FIG. 4 are a push-pull method, and output a high state (power supply voltage) or low state (ground voltage) voltage. By changing this, an open drain method may be used. When the output circuits 21 and 25 are of an open drain type, the output circuits 21 and 25 are in an open state or output a ground voltage (reference voltage).

  As the “insulating element”, a capacitively coupled insulating element may be used. Further, a photocoupler or the like may be used.

  The “periodic signal” output from the magnetic coupler M is not limited to a rectangular wave, and may be a sine wave, a sawtooth wave, a triangular wave, or the like.

  The logic operation unit may use a wired AND or a wired OR instead of a logic circuit such as an AND circuit or an OR circuit.

  DESCRIPTION OF SYMBOLS 30 ... Logic circuit, 40 ... Control apparatus, INV ... Inverter apparatus, Mp1-Mp3, Mn1-Mn3 ... Magnetic coupler, SWp1-SWp3, SWn1-SWn3 ... Upper arm switch.

Claims (9)

An abnormality information transmission circuit for transmitting information representing an abnormality of the power conversion circuit (INV) to a receiving device (40) insulated from the power conversion circuit,
Provided between the receiving device and a plurality of mutually insulated parts (SWp1 to SWp3, SWn1 to SWn3) of the power conversion circuit, and receive an abnormality signal indicating the occurrence of abnormality in the part from the corresponding part And an insulating element (Mp1 to Mp3, Mn1 to Mn3) for transmitting an abnormality detection signal to the receiving device according to the received abnormality signal,
A logic operation unit (30) provided between the plurality of insulating elements and the receiving device, performing a logical operation on the abnormality detection signal, and outputting a result of the logical operation to the receiving device; ,
Less than the total number of connection wirings connecting the plurality of insulating elements and the logic operation unit, the total number of connection wirings connecting the logic operation unit and the receiving device,
The insulation element is an abnormality information transmission circuit that transmits the abnormality detection signal having a waveform different for each insulation element in accordance with the abnormality signal. Each of the plurality of insulating elements transmits a periodic signal as the abnormality detection signal,
The abnormality information transmission circuit according to claim 1, wherein the frequencies of the abnormality detection signals transmitted by the plurality of insulating elements are different from each other. Each of the plurality of insulating elements transmits a rectangular wave as the abnormality detection signal,
The abnormality information transmission circuit according to claim 1 or 2, wherein the duty of the abnormality detection signal transmitted by each of the plurality of insulating elements is different from each other. The insulating element is
A magnetic coupling element (23, 32) that insulates the power conversion circuit side from the receiver side;
A buffer (21, 33) for outputting the abnormality detection signal in response to the abnormality signal when an abnormality signal indicating the occurrence of abnormality in the part is received from the corresponding part;
The abnormality information transmission circuit according to any one of claims 1 to 3.   The abnormality information transmission circuit according to claim 1, wherein the insulating element is a magnetic coupler. The plurality of parts include a plurality of first parts (SWp1 to SWp3) and a plurality of second parts (SWn1 to SWn3),
As the logical operation unit, a first logical operation unit (30A) that performs a logical operation on the abnormality detection signal output from the insulating element corresponding to the plurality of first parts and outputs a result of the logical operation And a second logical operation unit (30B) that performs a logical operation on the abnormality detection signal output from the insulating element corresponding to the plurality of second parts and outputs a result of the logical operation. ,
A connection wiring that connects the insulating elements corresponding to the plurality of first parts and the first logic operation part, and a connection wiring that connects the insulation elements corresponding to the plurality of second parts and the second logic operation part. The total number of connection wirings that connect each of the first logical operation unit and the second logical operation unit and the receiving device is smaller than the total number of connection wirings. The abnormality information transmission circuit described. The plurality of parts include a plurality of third parts (SWp1 to SWp3) and a plurality of fourth parts (SWn1 to SWn3),
The receiving device instructs the insulating elements corresponding to the plurality of third portions to transmit the abnormality detection signal in a predetermined first period, and also corresponds to the plurality of fourth portions. The abnormality information transmission circuit according to claim 1, wherein the abnormality element is instructed to transmit the abnormality detection signal in a predetermined second period that does not overlap with the first period. The abnormal signal represents the occurrence of an open abnormality in which the semiconductor switching elements (SWp1 to SWp3, SWn1 to SWn3) that constitute the power conversion circuit and are provided for each part are always open, and the semiconductor switching Including the occurrence of a closing abnormality in which the element is normally closed,
The insulation element is different for each insulation element according to the abnormality signal, and the abnormality detection signal having a waveform different between the occurrence of the opening abnormality and the occurrence of the closing abnormality of the corresponding semiconductor switching element. The abnormality information transmission circuit according to claim 1, which transmits the abnormality information. The power conversion circuit is an inverter circuit (INV),
The semiconductor switching element constitutes the inverter circuit, and is one of an upper arm switching element (SWp1 to SWp3) and a lower arm switching element (SWn1 to SWn3) connected in series,
The receiving device is a control device of the inverter circuit,
Based on the abnormality detection signal, a determination unit that determines the occurrence of the opening abnormality and the occurrence of the closing abnormality in the upper arm switching element and the lower arm switching element,
When the closing abnormality occurs in the semiconductor switching element, a stop unit that stops driving the upper arm switching element or the lower arm switching element connected in series to the semiconductor switching element in which the closing abnormality occurs,
A permission unit for permitting driving of the upper arm switching element or the lower arm switching element connected in series to the semiconductor switching element in which the open abnormality has occurred when the open abnormality has occurred in the semiconductor switching element; ,
The abnormality information transmission circuit according to claim 8.

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