JP2018033214A - Power system - Google Patents

Abstract

A power supply system in which at least two buck-boost converters are connected in parallel between a DC power supply and an inverter. to avoid potential failures. A DC power supply (3), two buck-boost converters (10a, 10b) connected in parallel, an inverter (20), a failure detection device (12), and a controller (9) are provided. Failure detection device 12 monitors whether or not an ON failure has occurred in the upper arm switching element of any of the buck-boost converters, and when an ON failure occurs, controller 9 turns off the other upper arm switching element for a predetermined time. hold in state. [Selection drawing] Fig. 3

Description

  The present specification discloses a power supply system. In particular, a power supply system for a motor vehicle (including a hybrid vehicle) in which a plurality of voltage conversion converters are connected in parallel between a DC power supply and an inverter and a motor is connected to the inverter is disclosed.

  Some motor vehicles include a converter that boosts the voltage of a DC power supply and supplies it to an inverter. In addition, since the traveling motor may be a generator, some motor vehicles charge a DC power supply by stepping down a voltage generated by the traveling motor with a converter. Such a motor vehicle uses a buck-boost converter.

  As disclosed in Patent Document 1, a technique for connecting a plurality of buck-boost converters in parallel between a DC power source and an inverter has been developed. Rather than covering the range from low output to high output with a single buck-boost converter, it is better to adjust the number of buck-boost converters to operate according to the amount of power required for the motor. Opportunities to utilize output ranges with high power conversion efficiency are increased. Alternatively, output voltage fluctuations can be suppressed by shifting the phase between the plurality of buck-boost converters.

  The step-up / down converter includes a power supply-side positive terminal connected to the positive electrode of the DC power supply, a power supply-side negative electrode terminal connected to the negative electrode of the DC power supply, an inverter-side positive terminal connected to the positive electrode of the inverter, and an inverter An inverter-side negative electrode end connected to the negative electrode of the inverter, two switching elements connected in series between the inverter-side positive electrode end and the inverter-side negative electrode end, and one end connected to the power source-side positive electrode end The other end is provided with the reactor connected to the connection part of two switching elements mentioned above.

  In the above-described buck-boost converter, a high voltage sent from the inverter is obtained by turning on / off a switching element (referred to as an upper arm switching element in this specification) on the inverter-side positive electrode side among the two switching elements described above. Step down to charge the DC power supply. Conversely, by turning on and off the switching element (referred to as the lower arm switching element in this specification) on the negative side of the inverter side, the voltage of the DC power source is boosted and supplied to the inverter.

JP 2012-210138 A

  In the case of a power supply system in which a plurality of step-up / step-down converters are connected in parallel, the upper arm switching element of any one of the step-up / step-down converters may be turned on (failure that is always turned on and cannot be turned off). In that case, when the upper arm switching element of the other step-up / down converter is turned on, a circuit for connecting the DC power supply and the inverter in parallel by a plurality of reactors is formed. When the reactors are connected in parallel, the total inductance decreases. When comparing a circuit in which the DC power supply and the inverter are connected by a single reactor with a circuit in which the DC power supply and the inverter are connected by a parallel circuit of a plurality of reactors, However, when the circuit is based on the latter circuit rather than the former circuit, there is a problem that a large inrush current flows on the DC power source side, the voltage on the DC power source side increases excessively, and a secondary failure occurs.

  In the present specification, in a power supply system in which a plurality of buck-boost converters are connected in parallel between a DC power supply and an inverter, even if an on-failure occurs in the upper arm switching element of any buck-boost converter, the DC power supply A technique in which an excessively large voltage is not applied to the side is disclosed.

The power supply system disclosed in this specification includes a DC power supply, an inverter, a plurality of step-up / step-down converters connected in parallel between the DC power supply and the inverter, a failure detection device, and a controller.
Each of the step-up / step-down converters has a power supply side positive terminal connected to the positive terminal of the DC power supply, a power supply side negative terminal connected to the negative terminal of the DC power supply, and an inverter side positive terminal connected to the positive terminal of the inverter. The inverter-side negative electrode end connected to the negative electrode of the inverter is provided. The positive and negative electrodes of the inverter here correspond to the high potential side and the low potential side, the high potential side is called the positive electrode, and the low potential side is called the negative electrode. Two switching elements are connected in series between the inverter-side positive electrode end and the inverter-side negative electrode end. Each of the step-up / step-down converters further includes a reactor. One end of the reactor is connected to the positive electrode end on the power source side, and the other end of the reactor is connected to the connection portion of the two switching elements.
The failure detection device detects that the switching element (upper arm switching element) on the inverter positive side of any of the buck-boost converters has failed. When the failure detection device detects an on failure of the upper arm switching element of any of the buck-boost converters, the controller holds the upper arm switching elements of the other buck-boost converters in an off state for a predetermined time.

According to the technique disclosed in this specification, when an on-failure occurs in the upper arm switching element of any of the buck-boost converters, the upper arm switching element of another buck-boost converter is held in the off state. As a result, a circuit that connects the DC power supply and the inverter in parallel by a plurality of reactors is not formed. As a result, it is possible to prevent a large inrush current from flowing on the DC power source side and excessively increasing the voltage on the DC power source side to cause a secondary failure.
Details and further improvements of the technology disclosed in this specification will be described in the following “DETAILED DESCRIPTION”.

It is a block diagram of the electric power system of the electric vehicle 100 including the power supply system 2 of an Example. 6 is a flowchart of an on-failure monitoring process performed by the failure detection device 12. It is a flowchart of the switching control of the upper arm switching element which the controller 9 performs. It is a time chart which shows transition of switching operation of an upper arm switching element, and an inverter side voltage and a power source side voltage. 10 is another flowchart of failure determination by the failure detection device 12.

The main features of the embodiments described below are listed.
(Characteristic 1) An upper arm switching element having an on-failure is identified, and the control procedure of the other upper arm switching elements (not having an on-failure) is switched for an abnormal time.
(Feature 2) Although it detects that an on-failure has occurred in any of the upper-arm switching elements, it does not specify the upper-arm switching element in which an on-failure has occurred. Switch the control procedure of all upper arm switching elements for abnormal use.
(Feature 3) A plurality of converters connected in parallel are controlled in common.
(Feature 4) A plurality of converters connected in parallel are individually controlled.
(Feature 5) A converter to be operated is selected from a plurality of converters connected in parallel.

A power supply system 2 according to the embodiment will be described with reference to FIG. The electric vehicle 100 travels by supplying driving power from the power supply system 2 to the traveling motor 30. The power supply system 2 is mounted on the electric vehicle 100.
The electric vehicle 100 according to the embodiment includes a DC power source 3, two step-up / down converters 10a and 10b, an inverter 20, a traveling motor 30, and the like. The DC power supplied from the DC power source 3 is converted into AC power by the inverter 20, and the traveling motor 30 is rotated by the AC power, and the electric vehicle 100 travels. When the driver steps on the brake, the motor 30 is reversely driven from the output shaft side, and the motor 30 generates power. The AC power generated by the motor 30 is converted into DC power by the inverter 20 and charges the DC power supply 3. The fact that the motor 30 generates torque and the vehicle travels is referred to as “power running”, and that the motor 30 functions as a generator to generate electric power is referred to as “regeneration”. The electric power generated by regeneration is referred to as regenerative power. The regenerative power is used to charge the DC power supply 3.

  In addition to the DC power supply 3 and the inverter 20, the power supply system 2 includes two buck-boost converters 10a and 10b, a failure detection device 12, a controller 9, a system main relay 13, a filter capacitor 14, a smoothing capacitor 15, and the like. In the power supply system 2, each of the two step-up / down converters 10 a and 10 b boosts the DC voltage supplied from the DC power supply 3 and supplies it to the inverter 20. Each of the step-up / step-down converters 10 a and 10 b can also step down the regenerative power sent from the inverter 20 and charge the DC power supply 3. That is, the buck-boost converters 10a and 10b are bidirectional DC-DC converters. Hereinafter, the step-up / down converter 10a may be referred to as a first converter 10a, and the step-up / down converter 10b may be referred to as a second converter 10b.

  The DC power supply 3 is a lithium ion battery, for example, and is a secondary battery. Two step-up / down converters 10 a and 10 b are connected in parallel between the DC power supply 3 and the inverter 20. When viewed from the step-up / down converters 10a and 10b, the DC power supply 3 side is referred to as a power supply side 17 and the inverter 20 side is referred to as an inverter side 18. A terminal connected to the positive electrode of the DC power source 3 is referred to as a power source positive electrode end 17a, and a terminal connected to the negative electrode of the DC power source 3 is referred to as a power source negative electrode end 17b. A terminal connected to the high potential electrode of the inverter 20 is referred to as an inverter-side positive terminal 18a, and a terminal connected to the low potential electrode of the inverter 20 is referred to as an inverter-side negative terminal 18b. The power supply side positive electrode end 17a, the power supply side negative electrode end 17b, the inverter side positive electrode end 18a, and the inverter side negative electrode end 18b are common to the first converter 10a and the second converter 10b.

  A system main relay 13 is connected between the DC power supply 3 and the two buck-boost converters 10a and 10b. The system main relay 13 is interlocked with a main switch (not shown) of the vehicle. When a main switch (not shown) of the vehicle is turned on, the system main relay 13 is closed, and the DC power supply 3 and the two step-up / down converters 10a and 10b are connected. When the main switch is turned off, the system main relay 13 is opened, and the two buck-boost converters 10a and 10b are disconnected from the DC power source 3.

  The first converter 10a and the second converter 10b have the same circuit configuration. The first converter 10a will be described. The first converter 10a includes a reactor 4a, two transistors 5a and 6a, and two diodes 7a and 8a. The two transistors 5a and 6a are IGBTs (Insulated Gate Bipolar Transistors). The two transistors 5a and 6a are connected in series. The high-potential side of the two transistors 5a and 6a connected in series is connected to the inverter-side positive terminal 18a, and the low-potential side is connected to the inverter-side negative terminal 18b. For convenience of explanation, the transistor on the high potential side may be referred to as the upper arm transistor 5a, and the transistor on the low potential side may be referred to as the lower arm transistor 6a. The diode 7a is connected in antiparallel to the high potential side transistor 5a, and the diode 8a is connected in antiparallel to the low potential side transistor 6a. One end of the reactor 4a is connected to the power supply side positive electrode end 17a, and the other end is connected to the connection part of the two transistors 5a and 6a. The inverter side negative electrode end 18b and the power source side negative electrode end 17b are directly connected.

  The second converter 10b includes two transistors 5b and 6b, a reactor 4b, and diodes 7b and 8b. As can be understood from FIG. 1, the circuit configuration of the second converter 10b is the same as the circuit configuration of the first converter 10a. Therefore, detailed explanation is omitted. For convenience of explanation, of the two transistors 5b and 6b, the high-potential side transistor may be referred to as the upper arm transistor 5b, and the low-potential side transistor may be referred to as the lower arm transistor 6b.

  A filter capacitor 14 is connected between the power supply side positive electrode end 17a and the power supply side negative electrode end 17b. The filter capacitor 14 is a common capacitor for the two step-up / step-down converters 10a and 10b, and temporarily stores and discharges electric energy in conjunction with the reactors 4a and 4b. A smoothing capacitor 15 is connected between the inverter-side positive end 18a and the inverter-side negative end 18b. The smoothing capacitor 15 is also a common capacitor for the two buck-boost converters 10a and 10b, and smoothes the pulsation of the current supplied from the buck-boost converters 10a and 10b to the inverter 20.

  As described above, the step-up / step-down converters 10 a and 10 b boost the voltage of the DC power supply 3 and supply it to the inverter 20, and step down the regenerative power sent from the inverter 20 and supply it to the DC power supply 3. A step-down operation can be performed. Lower arm transistor 6a of first converter 10a is involved in the step-up operation, and upper arm transistor 5a is involved in the step-down operation. Similarly, the lower arm transistor 6b of the second converter 10b is involved in the step-up operation, and the upper arm transistor 5b is involved in the step-down operation. The transistors 5a, 5b, 6a, and 6b are turned on and off by a PWM signal (drive signal) supplied from the controller 9 to the gate, respectively. The controller 9 generates a PWM signal that drives the transistors 5a, 5b, 6a, and 6b. For convenience of explanation, the drive signal supplied to the upper arm transistor 5a is referred to as an A1 drive signal, and the drive signal supplied to the lower arm transistor 6a is referred to as an A2 drive signal. Similarly, a drive signal supplied to the upper arm transistor 5b is referred to as a B1 drive signal, and a drive signal supplied to the lower arm transistor 6b is referred to as a B2 drive signal. “A1”, “A2”, “B1”, and “B2” in the figure mean an A1 drive signal, an A2 drive signal, a B1 drive signal, and a B2 drive signal, respectively.

  In the electric vehicle 100, the accelerator pedal and the brake pedal are frequently switched. That is, in the electric vehicle 100, power running and regeneration are frequently switched. That is, the direction of current in the first converter 10a is frequently switched. Therefore, the controller 9 of the power supply system 2 supplies a complementary drive signal (PWM pulse signal) to the transistors 5a and 6a. Specifically, a PWM signal obtained by inverting the HIGH potential and the LOW potential of the PWM signal (A2 drive signal) supplied to the lower arm transistor 6a involved in the boosting operation is supplied to the upper arm transistor 5a as an A1 drive signal. Then, the first converter 10a operates so as to maintain a constant ratio between the low-voltage side voltage and the high-voltage side voltage regardless of the direction of the current. The same applies to the second converter 10b. That is, the controller 9 supplies a complementary drive signal (PWM pulse signal) to the transistors 5b and 6b. Specifically, a PWM signal obtained by inverting the HIGH potential and the LOW potential of the PWM signal (B2 drive signal) supplied to the lower arm transistor 6b involved in the boosting operation is supplied to the upper arm transistor 5b as a B1 drive signal.

The controller 9 supplies drive signals (A1 drive signal and B1 drive signal) having the same waveform to the upper arm transistors 5a and 5b of the respective buck-boost converters so that the first converter 10a and the second converter 10b perform the same operation. To do. Similarly, the controller 9 supplies drive signals (A2 drive signal and B2 drive signal) having the same waveform to the lower arm transistors 6a and 6b of the respective buck-boost converters. Here, the same waveform means the same duty ratio. The controller 9 determines the target rotational speed and target torque of the motor 30 based on the vehicle state (for example, the charging amount of the DC power supply 3) such as the depression amount of an accelerator pedal (not shown), and from these, the target of the converters 10a and 10b is determined. Determine the voltage. In order to realize the target voltage, the duty ratio of the drive signal to be applied to each transistor, that is, the PWM signal is determined. As described above, the duty ratios of the upper arm transistors 5a and 5b are the same, and the duty ratios of the lower arm transistors 6a and 6b are also the same.
In this embodiment, the A1 drive signal and the B1 drive signal are common, and the A2 drive signal and the B2 drive signal are common. Two converters 10a and 10b connected in parallel are controlled in common. In this embodiment, only one of the two inverters 10a and 10b can be operated. For example, only the converter 10a can be operated with the B1 drive signal and the B2 drive signal fixed at OFF. When the amount of power passing through the inverter is low, only one of the inverters can be used and the other inverter can be stopped. Instead of the above, a phase difference may be provided between the A1 drive signal and the B1 drive signal. By shifting the phase, pulsations such as output voltage can be reduced. Alternatively, the A1 drive signal and the B1 drive signal may be controlled independently.

  The target voltages of the two step-up / down converters 10 a and 10 b are determined with reference to a voltage map stored in the controller 9. The voltage map is a map in which a coordinate system with the target rotational speed of the motor 30 on the horizontal axis and the target torque of the motor 30 on the vertical axis is divided into a plurality of regions. The voltage assigned to the region to which the set of the target rotational speed and target torque of the motor 30 belongs becomes the target voltage.

  The power supply system 2 also includes a first ammeter 12a that detects a current value ia flowing through the first upper arm switching element 5a and a second ammeter that detects a current value ib flowing through the second upper arm switching element 5a. 12b. The first ammeter 12 a and the second ammeter 12 b are connected to the failure detection device 12.

  FIG. 2 shows an on-failure monitoring process of the upper arm transistors 5a and 5b by the failure detection device 12. In Step 1 and Step 2, it is monitored whether or not a current flows through the first upper arm transistor 5a even though the off-voltage is applied to the gate of the first upper arm transistor 5a. If an ON failure occurs in the first upper arm transistor 5a, step 2 becomes YES. In this case, in step 3, the first flag indicating that an on-failure has occurred in the first upper arm transistor 5a is turned on. In step 4 and step 5, it is monitored whether or not a current flows through the second upper arm transistor 5b even though the off-voltage is applied to the gate of the second upper arm transistor 5b. If an on failure occurs in the second upper arm transistor 5b, step 5 becomes YES. In that case, in step 6, a second flag indicating that an on-failure has occurred in the second upper arm transistor 5b is turned on. The processing of FIG. 2 is repeatedly executed at single time intervals. When an on-failure occurs, steps 3 and 6 are performed, and a flag indicating the on-failure is turned on. “Turn on a flag” means that a predetermined value (for example, “1”) is stored in a “flag” that is a variable in the program. In the subroutine of FIG. 3, which is a subroutine different from the subroutine of FIG. 2, the value of “flag” is referred to, and different processing is executed depending on whether or not an on-failure has occurred.

  The controller 9 performs switching control of the upper arm transistors 5a and 5b of the buck-boost converters 10a and 10b based on the determination information from the failure detection device 12.

FIG. 3 shows a processing procedure in which the controller 9 performs switching control of the upper arm transistors 5a and 5b. A flow of switching control of the upper arm transistor will be described with reference to FIG. In step 11, it is determined whether at least one of the first flag and the second flag is on. If both are off, the process at the time of abnormality is skipped and the process of that time is finished.
If any one of the upper arm transistors has an on-failure, it is determined whether or not the timing of executing the processing of FIG. 3 is within a period for turning on the upper arm transistor that has not been on-failed. If it is within the on-period (if S12 is YES), the upper arm transistor (a normal switching element that is not on-failed) is forcibly turned off (S14). If it is within the off period (if S12 is NO), the upper arm transistor (a normal switching element that is not on-failed) is kept off for a predetermined time (S13). As a result, both the upper arm transistor that has failed to turn on and the upper arm transistor that has not failed to turn on are prevented from turning on. For a predetermined time after an on-failure, both are prevented from turning on. Steps 13 and 14 are processes performed when there is an abnormality, and are not performed when normal.

  FIG. 4 shows the state of the upper arm transistor 5a of the first converter 10a, the switching operation of the upper arm transistor 5b of the second converter 10b, and the transition of the inverter side voltage VH and the power supply side voltage VL. FIG. 4 illustrates a case where an ON failure has occurred in the first upper arm transistor 5a.

The horizontal axis in FIG. 4 indicates the passage of time. Graph A shows the state of the first upper arm transistor 5a of the first converter 10a. FIG. 4 illustrates a case where the first upper arm transistor 5a has an on failure at time t1. In this case, as shown in the graph B, since the first flag is turned on, it is understood that the first upper arm transistor 5a has failed.
A graph C1 indicated by a solid line shows a state change of the second upper arm transistor 5b when not relying on the present technology, and a constant duty ratio after time t2 when it is determined that an on failure has occurred in the upper arm transistor 5a. Then, the on / off operation is repeated. On the other hand, a graph C2 indicated by a broken line shows a second upper graph in the case of using this technology (a technology in which a normal upper arm transistor is kept off for a certain time if any upper arm transistor is turned on). A change in state of the arm transistor 5b is indicated, and after time t2 when it is determined that an on failure has occurred in the upper arm transistor 5a, it is kept off for a certain time.

  Before time t1, both the first upper arm transistor 5a and the second upper arm transistor 5b are normal, and the switching operation is performed at a constant duty ratio. In this case, the voltage VH on the inverter side shows a boosted voltage value of 650 V as shown in the graph D. Further, the power supply side voltage VL is held at a constant voltage of 300 V as shown in the graphs E1 and E2.

The graph E1 shows the change in the power supply voltage VL when not relying on the present technology. In order to turn on the second upper arm transistor 5b that normally operates in addition to the first upper arm transistor 5a that has been turned on, the parallel circuit of the reactors 4a and 4b is used between the DC power supply 3 and the smoothing capacitor 15. It will be connected. For this reason, a large inrush current flows from the smoothing capacitor 15 (650 V was applied) to the DC power supply 3 (maintained at 300 V). As indicated by a solid line graph E1 in FIG. 4, the power supply side voltage temporarily rises to a large value.
A graph E2 indicated by a broken line shows a change in the power supply voltage VL in the case of depending on the present technology. Since only the first upper arm transistor 5a that has been turned on is turned on and the second upper arm transistor 5b that operates normally is kept off, only the reactor 4a is connected between the DC power supply 3 and the smoothing capacitor 15. Connected through. For this reason, a large inrush current does not flow from the smoothing capacitor 15 to the DC power supply 3. As shown in the graph E2 shown by the broken line in FIG. 4, the power supply side voltage temporarily rises, but its peak value is suppressed to be smaller than the peak value of the graph E1.

  In any case, when the voltage of the smoothing capacitor 15 becomes equal to the voltage of the DC power supply 3, the inrush current stops flowing, and the voltage of the smoothing capacitor 15 becomes equal to the voltage of the DC power supply 3. In the process of FIG. 4, the upper arm switching element that operates normally is kept off until then.

  It should be noted that the shorter the time from when the upper arm transistor 5a is turned on to when the failure is determined, that is, the time from time t1 to time t2, the power supply side voltage VL can be suppressed more quickly and more effectively. is there.

  In the above description, the case where the upper arm transistor 5a of the first converter 10a fails to turn on has been described. However, even when the upper arm transistor 5b of the second converter 10b fails to turn on, the upper arm transistor is controlled by the same control by the controller 9. 5a is kept off for a predetermined time. For this reason, the on-states of the upper arm transistors of both converters do not overlap, and it is possible to prevent the power supply side element from being damaged by the inrush current.

The on failure monitoring process is not limited to that shown in FIG. For example, you may utilize for the technique as described in Unexamined-Japanese-Patent No. 2007-068305. In that case, the power source side voltage VL of the DC power source and the inverter side voltage VH are detected, and the processing of FIG. 5 is performed.
In step 21, it is determined whether or not the absolute value ΔV1 of the potential difference between the inverter side voltage VH and the power source side voltage VL is greater than or equal to the threshold value A. The value of A is set to the minimum potential difference when the converters 10a and 10b are normally stepped up / down. Further, it is determined whether or not the absolute value ΔV2 of the potential difference between the target voltage VP and the inverter-side voltage VH is equal to or less than the threshold value B. As the value of B, a maximum error when the converters 10a and 10b are operating normally is set. If ΔV1 is equal to or greater than A and ΔV2 is equal to or less than B, it is understood that converters 10a and 10b are operating normally. In that case, go to Step 25.
When step 21 is NO, that is, when ΔV1 <A or ΔV2> B, the duration is compared with the threshold value C. If an on-failure occurs, the threshold value C is exceeded and the process proceeds to step 23. If the normal condition is satisfied before the threshold C is exceeded, step 25 is executed. If an on-failure occurs in either converter 10a or 10b, the process proceeds from step 23 to step 24, and the failure determination flag is turned on.

  In the process of FIG. 5, it is not known which of the first upper arm transistor 5a and the second upper arm transistor 5b has an on failure. In the present embodiment, the first converter 10a and the second converter 10b are simultaneously controlled in the same manner. In this case, if an on failure occurs in either the first upper arm transistor 5a or the second upper arm transistor 5b, both the first upper arm transistor 5a and the second upper arm transistor 5b are turned off. When both the first upper arm transistor 5a and the second upper arm transistor 5b are controlled in common, an on-failure has occurred in either the first upper arm transistor 5a or the second upper arm transistor 5b. May be known, and it may be unclear which is on-failed.

  In the above embodiment, the control in the power supply system in which two buck-boost converters are connected in parallel has been described. However, the technique disclosed in this specification can also be applied to a power supply system in which three or more buck-boost converters are connected in parallel. In that case, when it is determined that one of the three or more buck-boost converters has an ON failure in one of the buck-boost converters, the other two or more buck-boost converter upper arm transistors are connected. By maintaining the off state for a certain period of time, a secondary failure can be prevented.

  In the above-described embodiment, in the on-failure determination, the on-failure of the upper arm transistor is determined based on the potential difference between the power supply side voltage and the inverter side voltage and the difference between the output side target voltage and the actually measured value. However, the on-failure determination is not limited to this, and any known on-failure determination can be applied.

  In the power supply system 2 of the embodiment, when the failure detection device 12 detects the on-failure of the upper arm transistor of any of the buck-boost converters, the controller 9 turns off the upper arm transistors of other buck-boost converters for a predetermined time. Hold. Here, the “predetermined time” is set to a time until the generated inrush current becomes sufficiently small. The time is determined depending on the characteristics of the reactors 4 a and 4 b and the characteristics of the smoothing capacitor 15.

  The transistors 5a, 6a, 5b, and 6b in the above-described embodiments correspond to an example of “switching element” in the claims. The “switching element” is not limited to the IGBT. The “switching element” in the claims may be, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or other elements.

  Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

2: Power supply system 3: DC power supplies 4a, 4b: Reactors 5a, 6a, 5b, 6b: Transistors 7a, 8a, 7b, 8b: Diode 9: Controller 10a: First buck-boost converter 10b: Second buck-boost converter 12: Failure detection devices 12a and 12b: Ammeter 13: System main relay 14: Filter capacitor 15: Smoothing capacitor 17a: Power supply side positive end 17b: Power supply side negative end 18a: Inverter side positive end 18b: Inverter side negative end 20: Inverter 30 : Motor 100: Electric car

Claims (1)

A DC power supply, an inverter, a plurality of buck-boost converters connected in parallel between the DC power supply and the inverter, a failure detection device, and a controller;
Each of the step-up / step-down converters includes a power supply-side positive end connected to the positive electrode of the DC power supply, a power supply-side negative end connected to the negative electrode of the DC power supply, and an inverter-side positive end connected to the positive electrode of the inverter An inverter-side negative end connected to the negative electrode of the inverter, two switching elements connected in series between the inverter-side positive end and the inverter-side negative end, and one end of the power source-side positive end And a reactor having the other end connected to the connecting portion of the two switching elements,
The failure detection device detects that the switching element (upper arm switching element) on the inverter positive side of one of the buck-boost converters has failed on,
When the failure detection device detects an on-failure of the upper arm switching element of any one of the buck-boost converters, the controller holds the other upper arm switching elements of the other buck-boost converters in an off state for a predetermined time. .

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