JP2018099021A - Non-insulated DC / DC converter, its controller, and electronic equipment - Google Patents

Abstract

A non-insulated DC / DC converter capable of generating a low voltage is provided.
A buck converter 202 includes a switching transistor _{M 1.} A switching line 204 connected to the source of the switching transistor M ₁ is connected to the ground of the controller 300. The controller 300 drives the switching transistor _{M 1,} to produce a boosting pulse _{S 1.} The booster circuit 210 receives the output voltage V _OUT of the DC / DC converter 200 and generates the power supply voltage VB _OST of the controller 300 using the boost pulse S ₁ .
[Selection] Figure 2

Description

  The present invention relates to a non-insulated DC / DC converter.

  Various home appliances such as refrigerators, washing machines, and rice cookers operate by receiving commercial AC power from the outside. Such home appliances and electronic devices (hereinafter collectively referred to as electronic devices) incorporate a power supply device (AC / DC converter) that converts commercial AC voltage into AC / DC (AC / DC).

  FIG. 1 is a block diagram showing a basic configuration of an AC / DC converter 100R examined by the present inventors. The AC / DC converter 100R mainly includes a rectifier circuit 104, a smoothing capacitor 106, and a DC / DC converter 200R.

The rectifier circuit 104 is a diode bridge circuit that full-wave rectifies the _AC voltage VAC. The output voltage of the rectifier circuit 104 is smoothed by the smoothing capacitor 106 and converted into a direct-current voltage _VDC .

In home appliances such as washing machines and refrigerators, electrical terminals are not exposed to the outside, and the entire product has an insulating structure. In such home appliances, a non-insulated DC / DC converter is used in place of the insulating flyback converter. DC / DC converters 200R nonisolated receives a DC voltage _{V DC} to an input terminal _{P 1,} the load steps down it, is connected to the output voltage _{V OUT} stabilized at the target value to the output terminal _{P 2} (Not shown). The DC / DC converter 200R includes a non-insulated buck converter 202, a controller 300, and other peripheral components. The buck converter 202 includes a switching transistor M ₁ , an inductor L ₁ , a rectifier diode D ₁ , and an output capacitor C ₁ .

The controller 300R drives the switching transistor _{M 1,} to generate a regulated output voltage _{V OUT} at the output terminal _{P 2.} Switching transistor _{M 1} is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor ). Ground controllers 300R (GND) pin is connected to the source of the switching transistor _{M 1,} thus ground controller 300R will vary synchronization source voltage _{V S} next to the switching transistor _{M 1,} a switching of the switching transistor _{M 1} .

Between the output terminal (output line) _{P 2} and GND pin of the DC / DC converter 200R, the diode _{D 2} and capacitor _{C 2} is provided. Power (VIN) pin of the controller 300R is connected to the connection node diode _{D 2} and capacitor _{C 2.} Power supply voltage _{V DD} of the controller 300R becomes a potential difference between VIN and GND pins, thus equal to the voltage across _{V C2} of the capacitor _{C 2.}

Period of the switching transistor _{M 1} is turned off, the source voltage _{V S} of the switching transistor _{M 1} is -V _F. That is at one end of the capacitor _{C 2 V} OUT -V _F is applied, -V _F is applied to the other end. V _F is the forward voltage of the diode. At this time the voltage across _{V C2} of the capacitor _{C 2} is charged to _{V OUT,} thus the power supply voltage _{V DD} of the controller 300R is equal to the output voltage _{V OUT.}

In the off period of the switching transistor _{M 1,} the source voltage _{V S} of the GND pin, jump to the vicinity of the DC voltage _{V DC.} Input voltage _{V IN} at this time of the capacitor _{C 2} and the other end _{becomes V} DC ₊ V _OUT. Since V _IN > V _OUT , the capacitor C ₂ and the output terminal P ₂ are disconnected by the rectifier diode D ₂ , and the voltage across the capacitor C ₂ is maintained. Therefore even in the off-period of the switching transistor _{M 1,} the power supply voltage _{V DD} of the controller 300R is equal to the output voltage _{V OUT.}

The DC voltage _VDC is input to the high voltage (VH) pin of the controller 300R. When the DC / DC converter 200R is activated, the starter circuit inside the controller 300R uses the direct current voltage V _DC to charge the capacitor C ₂ to generate its own power supply voltage _VIN .

A voltage V _FB obtained by dividing the generated voltage V _C2 of the capacitor C ₂ by the resistors R ₁₁ and R ₁₂ is fed back to the feedback (FB) pin of the controller 300R. The controller 300R is the feedback voltage _{V FB} is to match the internal reference voltage _{V REF,} feedback control of the duty ratio of the gate drive pulse _{V G} of the switching transistor _{M 1} (or frequency). As a result, the output voltage V _OUT is stabilized at the target voltage V _{OUT (REF)} .
V _{OUT (REF)} = V _REF × (R ₁₁ + R ₁₂ ) / R ₁₂

JP 2001-136735 A

  As a result of studying the DC / DC converter 200R of FIG. 1, the present inventor has come to recognize the following problems.

As described above, the power supply voltage V _DD of the DC / DC converter 200R depends on the output voltage _VOUT . To turn on the switching transistor _{M 1 has} to be satisfied _{V DD>} V _{GS (th)} is, _therefore, needs to _{V OUT>} V _{GS (th)} is established. V _{GS (th)} is the gate threshold voltage of the switching transistor M ₁ .

As described above, the DC / DC converter 200R has a problem that the setting range (lower limit) of the output voltage V _OUT is restricted by the characteristics of the switching transistor M ₁ (gate threshold voltage V _{GS (th)} ). .

  SUMMARY An advantage of some aspects of the invention is to provide a DC / DC converter capable of generating a low voltage.

  One embodiment of the present invention relates to a non-insulated DC / DC converter. The DC / DC converter includes a buck converter including a switching transistor, a switching line connected to the source of the switching transistor is connected to the ground, drives the switching transistor, generates a boost pulse, and a DC / DC converter And a booster circuit that receives the output voltage and generates a power supply voltage of the controller using the boost pulse.

  According to this aspect, the output voltage can be boosted by the booster circuit, and a power supply voltage higher than the output voltage can be generated. Therefore, the set value of the output voltage of the DC / DC converter can be lowered.

  The switching transistor may be incorporated in the same package as the controller.

  The controller includes an oscillator, a pulse width modulator that generates a pulse signal in synchronization with a signal generated by the oscillator, a driver that drives a switching transistor according to the pulse signal, and a boost pulse based on the signal generated by the oscillator. And a boost pulse generator to be generated.

  The booster circuit includes a first capacitor having one end connected to the switching line, a first diode receiving the output voltage of the DC / DC converter at the anode, and a cathode connected to the other end of the first capacitor, and the switching line connected to the ground. And a charge pump circuit that receives a voltage across the first capacitor as an input voltage and performs a boosting operation according to the boosting pulse.

The controller may receive the voltage at the other end of the first capacitor as a feedback voltage and drive the switching transistor so that the feedback voltage matches the reference voltage.
As a result, the output voltage of the DC / DC converter can be stabilized at a target voltage corresponding to the reference voltage.

  The charge pump circuit may generate a voltage obtained by adding the voltage across the first capacitor and the amplitude of the boost pulse.

  The charge pump circuit may include a plurality of diodes.

  The charge pump circuit may include a plurality of switches. A drive circuit that drives the plurality of switches in synchronization with the boost pulse may be further included.

  The plurality of switches and the drive circuit may be integrated on the same semiconductor substrate as the controller.

  Another embodiment of the present invention relates to an electronic device. The electronic device includes a load, a diode rectifier circuit that full-wave rectifies an AC voltage, a smoothing capacitor that generates a DC input voltage by smoothing the output voltage of the diode rectifier circuit, and steps down the DC input voltage and supplies it to the load And a DC / DC converter.

  Another aspect of the present invention relates to a controller for a non-insulated DC / DC converter. In addition to the controller, the DC / DC converter includes a buck converter and a booster circuit that generates a power supply voltage for the controller in accordance with the output voltage and booster pulse of the DC / DC converter. The controller includes a switching transistor, a ground pin connected to the source of the switching transistor, a high voltage pin connected to the drain of the switching transistor, a feedback pin to receive a feedback voltage according to the output voltage of the DC / DC converter, an oscillator, In synchronization with the oscillator, a pulse modulator that generates a pulse signal whose duty ratio changes so that the feedback voltage and the reference voltage approach, a driver that drives the switching transistor based on the pulse signal, and in synchronization with the oscillator, A boost pulse generator for generating a boost pulse.

  The controller may be integrated on a single semiconductor substrate.

  Note that any combination of the above-described constituent elements and the constituent elements and expressions of the present invention replaced with each other among methods, apparatuses, systems, and the like are also effective as an aspect of the present invention. Furthermore, the description of the means for solving this problem does not explain all the indispensable features, and therefore the sub-combination of these features described can also be the present invention.

  According to an aspect of the present invention, the output voltage of the DC / DC converter can be lowered.

It is a block diagram which shows the basic composition of the AC / DC converter which this inventor examined. 1 is a circuit diagram of an AC / DC converter including a DC / DC converter according to a first embodiment. FIG. 3 is an operation waveform diagram of the DC / DC converter of FIG. 2. FIG. 3 is a circuit diagram illustrating a specific configuration example of the DC / DC converter of FIG. 2. It is a circuit diagram which shows the structural example of a controller. 6A and 6B are circuit diagrams showing modifications of the booster circuit. It is a circuit diagram of the DC / DC converter which concerns on a 2nd modification. It is a circuit diagram of an AC / DC converter provided with the DC / DC converter which concerns on 2nd Embodiment. FIG. 9 is an operation waveform diagram of the DC / DC converter of FIG. 8. It is a circuit diagram which shows the specific structural example of the DC / DC converter of FIG. It is a circuit diagram which shows the structural example of a controller. 12A and 12B are circuit diagrams showing modifications of the booster circuit. It is a figure which shows an electronic device provided with an AC / DC converter.

  The present invention will be described below based on preferred embodiments with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are denoted by the same reference numerals, and repeated descriptions are omitted as appropriate. The embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

  In this specification, “the state in which the member A is connected to the member B” means that the member A and the member B are physically directly connected, or the member A and the member B are electrically connected. The case where it is indirectly connected through other members that do not affect the state or inhibit the function is also included.

  Similarly, “the state in which the member C is provided between the member A and the member B” refers to the case where the member A and the member C or the member B and the member C are directly connected, as well as an electrical condition. This includes cases where the connection is indirectly made through other members that do not affect the connection state or inhibit the function.

(First embodiment)
FIG. 2 is a circuit diagram of an AC / DC converter 100 including the DC / DC converter 200 according to the first embodiment. The AC / DC converter 100 includes a rectifier circuit 104, a smoothing capacitor 106, and a DC / DC converter 200.

The DC / DC converter 200 includes a non-insulated buck converter (step-down converter) 202, a step-up circuit 210, a controller 300, and peripheral components. The configuration of the buck converter 202 is the same as that of FIG. 1, and includes a switching transistor M ₁ , a rectifier diode D ₁ , an inductor L ₁ , and an output capacitor C ₁ .

The controller 300 includes a VH pin, a GND pin, a VIN pin, an FB pin, and a boost (BOOST) pin. The switching transistor M ₁ of the buck converter 202 is built in the same package as the controller 300.

GND pin is connected to the source of the switching transistor _{M 1.} A wiring connected to the GND pin is referred to as a switching line 204. The controller 300 operates using the potential of the GND pin (that is, the potential V _{S of the} switching line 204) as the ground. The controller 300 generates a pulse signal whose duty ratio (or frequency) is changed so that the voltage V _FB that is fed back to the FB pin is coincident with the predetermined target value, switching the gate drive pulse V _G in response to the pulse signal supplied to the gate of the transistor _{M 1.} A voltage having a correlation with the output voltage _VOUT may be fed back to the FB pin, and the voltage is not particularly limited.

The controller 300 generates a boosting pulse _{S 1,} and outputs from the BOOST pin. The boost pulse S ₁ is input to the boost circuit 210. For example the duty ratio of the step-up pulse _{S 1} is desirably not dependent on the operating state of the DC / DC converter 200, it is fixed to a predetermined value in the vicinity of 50% (40% to 60%).

Boosting circuit 210 receives the output voltage _{V OUT} of the DC / DC converter 200 (buck converter 202), at its output OUT by using the boosting pulse _{S 1,} the power supply voltage _{V BOOST} which is obtained by boosting the output voltage _{V OUT} Is supplied to the input pin (VIN) of the controller 300. The power supply voltage V _BOOST varies while maintaining a constant potential difference ΔV and high with respect to the voltage V _S of the switching line 204.
V _BOOST = V _S + ΔV (1)

When the potential difference ΔV is that the boosted voltage width by the booster circuit 210 and _{V ADD,}
ΔV = V _OUT + V _ADD (2A)
Given in. From another point of view, the potential difference ΔV generated by the booster circuit 210 may be expressed as in Expression (2B), where α is a boost rate by the booster circuit 210 (where α> 1).
ΔV = α × V _OUT (2B)

The potential difference ΔV is determined to be larger than the gate threshold voltage V _{GS (th)} of the switching transistor M ₁ .
ΔV> V _{GS (th)} (3)

The above is the configuration of the DC / DC converter 200. Next, the operation will be described. FIG. 3 is an operation waveform diagram of the DC / DC converter 200 of FIG. In the steady state, the switches at the duty ratio D of the switching transistor _{M 1 is,} are stabilized to _{V OUT} ≒ D × _{V DC.} At this time, the voltage V _{S of the} switching line switches between V _DC and −V _F.

As described above, the power supply voltage V _BOOST varies while maintaining a state higher than the voltage V _S of the switching line 204 by the potential difference ΔV. This potential difference ΔV is larger than the gate threshold voltage V _{GS (th)} of the switching transistor M ₁ .
V _BOOST = V _S + ΔV (4)
However, ΔV = V _OUT + V _ADD > V _{GS (th)}

The potential difference between the VIN pin and the GND pin of the controller 300, that is, the power supply voltage V _DD of the controller 300 is V _DD = V _BOOST −V _S = ΔV. Since the maximum amplitude of the voltage (gate-source voltage) V _{GS that} can be generated between the gate and source of the switching transistor M _{1 by} the controller 300 is the power supply voltage V _DD = ΔV, ΔV> V _{GS (th)} holds. the controller 300 can turn on reliably switching transistor M _1.

In the DC / DC converter 200R of FIG. 1, since ΔV = V _DD ≈V _OUT , it is necessary to _satisfy V _OUT > V _{GS (th)} . On the other hand, according to the DC / DC converter 200 of FIG. 2, ΔV = V _OUT + V _ADD is established, and therefore, V _OUT <V _{GS (th)} can be satisfied. That is, the target voltage of the output voltage V _OUT can be arbitrarily set without being restricted by the gate threshold voltage V _{GS (th),} and can be made lower than before.

As a modification, it is also conceivable to use the gate drive pulse V _G as the boost pulse S ₁ . Then, the duty ratio of the gate drive pulse V _G is varied, the duty ratio of the step-up pulse S ₁ is changed, unfavorable conditions in the step-up operation may occur. In this embodiment, the duty ratio of the step-up pulses S _1, it is possible to set the optimum value for the boost operation.

  Hereinafter, in order not to narrow the scope of the present invention but to assist in understanding the essence and circuit operation of the invention, and to clarify them, specific configuration examples and examples related to the first embodiment will be described. explain.

FIG. 4 is a circuit diagram showing a specific configuration example of the DC / DC converter 200 of FIG. The booster circuit 210 includes a first diode D ₂₁ , a first capacitor C _21, and a charge pump circuit 212.

One end of the first capacitor C ₂₁ is connected to the switching line 204. The first diode _{D 21} receives an output voltage _{V OUT} of the DC / DC converter 200 (buck converter 202) to the anode and a cathode connected to the other end of the first capacitor _{C 21.}

The charge pump circuit 212 is configured with the switching line 204 as a ground. The charge pump circuit 212 receives the voltage across _{V C21} of the first capacitor _{C 21} as the input voltage, performs a boosting operation in response to the boosting pulse _{S 1.}

The charge pump circuit 212 is a voltage addition type charge pump, and includes a second diode D ₂₂ , a third diode D ₂₃ , a flying capacitor C ₂₂ , and an output capacitor C ₂₃ . By the boosting operation of the charge pump circuit 212, the across the output capacitor _{C 23,} the voltage _{V C23} generated. Here, the forward voltage of the diode is ignored.
V _C23 ≈V _C21 + V _AMP (5)
V _AMP is the amplitude of the boost pulse S ₁ when the potential V _S of the switching line 204 is used as a reference. Considering the forward voltage,
V _C23 = V _C21 + V _AMP −2V _F (6)
It becomes.

The voltage V _C21 in FIG. 4 is a voltage corresponding to the voltage _VIN in FIG. 1, and is therefore equal to V _OUT . The voltage V _C23 of the output capacitor C ₂₃ is ΔV in FIG. Therefore, equation (5) can be rewritten to equation (7).
ΔV = V _OUT + V _AMP (7)
As described above, according to the booster circuit 210 in FIG. 4, an appropriate power supply voltage V _BOOST can be supplied to the VIN pin of the DC / DC converter 200.

For example, the voltage V _FB obtained by dividing the voltage V _C21 across the first capacitor C ₂₁ by the resistors R ₂₁ and R ₂₂ is fed back to the FB pin of the controller 300. In this case, the gate drive pulse V _G is generated so that V _FB = V _C21 × R ₂₂ / (R ₂₁ + R ₂₂ ) matches the internal reference voltage V _REF . Therefore,
V _C21 = (R ₂₁ + R ₂₂ ) / R ₂₂ × V _REF
Feedback is taken to be As described above, since V _C21 = V _OUT , the target voltage V _{OUT (REF)} of the output voltage V _OUT is
V _{OUT (REF) =} (R ₂₁ + R ₂₂ ) / R ₂₂ × V _REF
It becomes.

FIG. 5 is a circuit diagram illustrating a configuration example of the controller 300. The controller 300 is a peak current mode controller. Buck converter 202 includes a current sense resistor _{R CS} provided between the switching transistor _{M 1} and the inductor _{L 1.} A current detection signal V _CS corresponding to the voltage drop of the current sense resistor R _CS is input to the current sense (CS) pin of the controller 300.

The internal circuit of the controller 300 operates using the voltage V _S of the switching line 204 supplied to the GND pin as the ground. The controller 300 includes a pulse modulator 301, an oscillator 306, a driver 314, and a boost pulse generator 320.

The oscillator 306 oscillates at a predetermined frequency and generates a set pulse S _SET and a slope signal V _SLOPE . The pulse modulator 301 generates a pulse signal S _PWM in synchronization with the signals S _SET and V _SLOPE generated by the oscillator 306.

The reference voltage source 308 generates a reference voltage _VREF . The error amplifier 302 amplifies an error between the voltage V _FB fed back to the FB pin and the reference voltage V _REF to generate an error signal V _ERR . Slope compensator 310 superimposes the slope signal _{V SLOPE} to the current detection signal _{V CS} that is input to the CS pin. The comparator 304 compares the error signal V _ERR and the current detection signal V _CS ′ on which the slope signal V _SLOPE is superimposed, and asserts the reset pulse S _RESET (for example, high level) when V _CS ′> V _ERR . The flip-flop 312 generates a pulse signal S _PWM that transitions to an off level (for example, low level) in response to the assertion of the reset pulse S _RESET and transitions to an on level (for example, high level) in response to the set pulse S _SET. To do. The driver 314 generates a gate drive pulse V _G for the switching transistor M ₁ based on the pulse signal S _PWM . The starter circuit 316 receives the DC voltage V _DC input to the VH pin, and charges the capacitor C ₂₃ via the _VIN pin when the controller 300 is activated.

The boost pulse generator 320 generates the boost pulse S ₁ based on the clock signal CK generated by the oscillator 306. Boosted pulse generator 320 receives the clock signal CK, it may be a buffer or inverter to be applied to the flying capacitor C _22.

The frequency of the clock signal CK (i.e. switching frequency of the switching transistor M ₁₎ are not always suitable to the operating frequency of the charge pump circuit 212. Therefore, the boost pulse generator 320 may include a frequency divider that multiplies or divides the clock signal CK, and may generate the boost pulse S ₁ having a frequency optimum for the operation of the charge pump circuit 212.

Next, a modified example related to the first embodiment will be described.
(First modification)
The configuration of the booster circuit 210 is not limited to FIG. FIGS. 6A and 6B are circuit diagrams showing modifications of the booster circuit 210. FIG. The charge pump circuit 212a in FIG. 6 (a), comprises a switch _{M 22, M 23,} a driving circuit 214 of the switch _{M 22, M 23} in place of the diode _{D 22, D 23.} The drive circuit 214 drives the switches M ₂₂ and M ₂₃ in synchronization with the clock signal CK generated by the oscillator 306. The drive circuit 214 may be built in the controller 300. Further, switches M ₂₂ and M ₂₃ formed of MOSFETs may be built in the controller 300.

FIG. 6B shows a two-stage charge pump circuit 212b including two flying capacitors C ₂₂ and C ₂₄ . If the forward voltage of the rectifying element is ignored, the boosted voltage is expressed by the following equation.
V _BOOST = V _OUT + V _AMP × 2
The number of stages of the charge pump circuit is not particularly limited, and may be three or more.

(Second modification)
Switching transistor _{M 1} may be external to the controller 300. FIG. 7 is a circuit diagram of a DC / DC converter 200 according to the second modification. The controller 300 is provided with an OUT pin connected to the gate of the switching transistor _{M 1.} The driver 314 outputs a gate drive pulse _{V G} from the OUT pin. Other configurations are the same as those in FIG.

(Third Modification)
The configuration of the controller 300 is not limited to those shown in FIGS. 5 and 7, and an average current mode controller or a voltage mode controller may be used. Further, the buck converter 202 may be a synchronous rectification type.

(Second Embodiment)
FIG. 8 is a circuit diagram of an AC / DC converter 100 including the DC / DC converter 200 according to the embodiment. The AC / DC converter 100 includes a rectifier circuit 104, a smoothing capacitor 106, and a DC / DC converter 200.

The DC / DC converter 200 includes a non-insulated buck converter (step-down converter) 202, a step-up circuit 210, a controller 300, and peripheral components. The configuration of the buck converter 202 is the same as that of FIG. 1, and includes a switching transistor M ₁ , a rectifier diode D ₁ , an inductor L ₁ , and an output capacitor C ₁ .

  The controller 300 includes a VH pin, an OUT pin, a GND pin, a VIN pin, and an FB pin. The controller 300 may be a commercially available controller, and its configuration is not particularly limited.

The wiring connected to a source of the switching transistor M ₁ is referred to as a switching line 204. The GND pin (ground) of the controller 300 is connected to the switching line 204. The controller 300 generates a pulse signal whose duty ratio (or frequency) is changed so that the voltage V _FB that is fed back to the FB pin is coincident with the predetermined target value, the gate drive pulse V _G in response to the pulse signal, supplied to the gate of the switching transistor _{M 1} through the OUT pin. A voltage having a correlation with the output voltage _VOUT may be fed back to the FB pin, and the voltage is not particularly limited.

Boosting circuit 210 receives an output voltage _{V OUT} and the gate drive pulse _{V G} of the DC / DC converter 200 (buck converter 202). The booster circuit 210 to the output OUT, and generates a power supply voltage _{V BOOST} which is obtained by boosting the output voltage _{V OUT,} supplies the input pin of the controller 300 (VIN). The power supply voltage V _BOOST varies while maintaining a constant potential difference ΔV and high with respect to the voltage V _S of the switching line 204.
V _BOOST = V _S + ΔV (1)

When the potential difference ΔV is that the boosted voltage width by the booster circuit 210 and _{V ADD,}
ΔV = V _OUT + V _ADD (2A)
Given in. From another point of view, the potential difference ΔV generated by the booster circuit 210 may be expressed as in Expression (2B), where α is a boost rate by the booster circuit 210 (where α> 1).
ΔV = α × V _OUT (2B)

The potential difference ΔV is determined to be larger than the gate threshold voltage V _{GS (th)} of the switching transistor M ₁ .
ΔV> V _{GS (th)} (3)

The above is the configuration of the DC / DC converter 200. Next, the operation will be described. FIG. 9 is an operation waveform diagram of the DC / DC converter 200 of FIG. In the steady state, the switches at the duty ratio D of the switching transistor _{M 1 is,} are stabilized to _{V OUT} ≒ D × _{V DC.} At this time, the voltage V _{S of the} switching line switches between V _DC and −V _F.

As described above, the power supply voltage V _BOOST varies while maintaining a state higher than the voltage V _S of the switching line 204 by the potential difference ΔV. This potential difference ΔV is larger than the gate threshold voltage V _{GS (th)} of the switching transistor M ₁ .
V _BOOST = V _S + ΔV (4)
However, ΔV = V _OUT + V _ADD > V _{GS (th)}

The potential difference between the VIN pin and the GND pin of the controller 300, that is, the power supply voltage V _DD of the controller 300 is V _DD = V _BOOST −V _S = ΔV. The maximum amplitude of a voltage (gate-source voltage) V _{GS that} the controller 300 can generate between the OUT pin and the GND pin, that is, between the gate and source of the switching transistor M ₁ is the power supply voltage V _DD = ΔV, but ΔV> V _{GS ( since th)} is made up, the controller 300 can turn on reliably switching transistor _{M 1.}

In the DC / DC converter 200R of FIG. 1, since ΔV = V _DD ≈V _OUT , it is necessary to _satisfy V _OUT > V _{GS (th)} . On the other hand, according to the DC / DC converter 200 of FIG. 8, since ΔV = V _OUT + V _ADD is established, it is possible to satisfy V _OUT <V _{GS (th)} . That is, the target voltage of the output voltage V _OUT can be arbitrarily set without being restricted by the gate threshold voltage V _{GS (th),} and can be made lower than before.

  The present invention is understood as the block diagram and circuit diagram of FIG. 8 or extends to various devices and circuits derived from the above description, and is not limited to a specific configuration. In the following, more specific configuration examples and examples will be described in order not to narrow the scope of the present invention but to help understanding and clarify the essence and circuit operation of the present invention.

FIG. 10 is a circuit diagram illustrating a specific configuration example of the DC / DC converter 200. The booster circuit 210 includes a first diode D ₂₁ , a first capacitor C _21, and a charge pump circuit 212.

One end of the first capacitor C ₂₁ is connected to the switching line 204. The first diode _{D 21} receives an output voltage _{V OUT} of the DC / DC converter 200 (buck converter 202) to the anode and a cathode connected to the other end of the first capacitor _{C 21.}

The charge pump circuit 212 is configured with the switching line 204 as a ground. The charge pump circuit 212 receives the voltage across _{V C21} of the first capacitor _{C 21} as the input voltage, performs a boosting operation according to the gate drive pulse _{V G.}

The charge pump circuit 212 is a voltage addition type charge pump, and includes a second diode D ₂₂ , a third diode D ₂₃ , a flying capacitor C ₂₂ , and an output capacitor C ₂₃ . By the boosting operation of the charge pump circuit 212, the across the output capacitor _{C 23,} the voltage _{V C23} generated. Here, the forward voltage of the diode is ignored.
V _C23 ≈V _C21 + V _AMP (5)
V _AMP is the amplitude of the gate drive pulse _{V G} when with respect to the potential _{V S} of the switching line 204. Considering the forward voltage,
V _C23 = V _C21 + V _AMP −2V _F (6)
It becomes.

The voltage V _C21 in FIG. 10 is a voltage corresponding to the voltage _VIN in FIG. 1 and is therefore equal to V _OUT . The voltage V _C23 of the output capacitor C ₂₃ is ΔV in FIG. Therefore, equation (5) can be rewritten to equation (7).
ΔV = V _OUT + V _AMP (7)
As described above, according to the booster circuit 210 of FIG. 10, an appropriate power supply voltage V _BOOST can be supplied to the VIN pin of the DC / DC converter 200.

For example, the voltage V _FB obtained by dividing the voltage V _C21 across the first capacitor C ₂₁ by the resistors R ₂₁ and R ₂₂ is fed back to the FB pin of the controller 300. In this case, the gate drive pulse V _G is generated so that V _FB = V _C21 × R ₂₂ / (R ₂₁ + R ₂₂ ) matches the internal reference voltage V _REF . Therefore,
V _C21 = (R ₂₁ + R ₂₂ ) / R ₂₂ × V _REF
Feedback is taken to be As described above, since V _C21 = V _OUT , the target voltage V _{OUT (REF)} of the output voltage V _OUT is
V _{OUT (REF) =} (R ₂₁ + R ₂₂ ) / R ₂₂ × V _REF
It becomes.

FIG. 11 is a circuit diagram illustrating a configuration example of the controller 300. The controller 300 is a peak current mode controller. Buck converter 202 includes a current sense resistor _{R CS} provided between the switching transistor _{M 1} and the inductor _{L 1.} A current detection signal V _CS corresponding to the voltage drop of the current sense resistor R _CS is input to the current sense (CS) pin of the controller 300.

The internal circuit of the controller 300 operates using the voltage V _S of the switching line 204 supplied to the GND pin as the ground. The controller 300 includes a pulse modulator 301, an oscillator 306, a driver 314, and a starter circuit 316. The oscillator 306 oscillates at a predetermined frequency and generates a set pulse S _SET and a slope signal V _SLOPE . The pulse modulator 301 generates a pulse signal S _PWM in synchronization with the signals S _SET and V _SLOPE generated by the oscillator 306.

The reference voltage source 308 generates a reference voltage _VREF . The error amplifier 302 amplifies an error between the voltage V _FB fed back to the FB pin and the reference voltage V _REF to generate an error signal V _ERR . Slope compensator 310 superimposes the slope signal _{V SLOPE} to the current detection signal _{V CS} that is input to the CS pin.

The comparator 304 compares the error signal V _ERR and the current detection signal V _CS ′ on which the slope signal V _SLOPE is superimposed, and asserts the reset pulse S _RESET (for example, high level) when V _CS ′> V _ERR . The flip-flop 312 generates a pulse signal S _PWM that transitions to an off level (for example, low level) in response to the assertion of the reset pulse S _RESET and transitions to an on level (for example, high level) in response to the set pulse S _SET. To do. The driver 314 generates a gate drive pulse V _G for the switching transistor M ₁ based on the pulse signal S _PWM . The starter circuit 316 receives the DC voltage V _DC input to the VH pin, and charges the capacitor C ₂₃ via the _VIN pin when the controller 300 is activated.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. is there. Hereinafter, such modifications will be described.

(Fourth modification)
The configuration of the booster circuit 210 is not limited to FIG. 12A and 12B are circuit diagrams illustrating modifications of the booster circuit 210. FIG. The charge pump circuit 212a in FIG. 12 (a) includes a switch _{M 22, M 23,} a driving circuit 214 of the switch _{M 22, M 23} in place of the diode _{D 22, D 23.} Drive circuit 214, in synchronization with the gate driving pulse _{V G,} to drive the switch _{M 22, M 23.} The drive circuit 214 may be built in the controller 300. Further, switches M ₂₂ and M ₂₃ formed of MOSFETs may be built in the controller 300.

FIG. 12B shows a two-stage charge pump circuit 212b including two flying capacitors C ₂₂ and C ₂₄ . If the forward voltage of the rectifying element is ignored, the boosted voltage is expressed by the following equation.
V _BOOST = V _OUT + V _AMP × 2
The number of stages of the charge pump circuit is not particularly limited, and may be three or more.

(5th modification)
The configuration of the controller 300 is not limited to that shown in FIG. 11, and an average current mode controller or a voltage mode controller may be used. Further, the buck converter 202 may be a synchronous rectification type.

(Use)
Next, the application of the DC / DC converter 200 described in the first or second embodiment will be described.

  FIG. 13 is a diagram illustrating an electronic device 900 including the AC / DC converter 100. Although the electronic device 900 in FIG. 7 is a refrigerator, the type of the electronic device 900 is not particularly limited, and is widely used in so-called white goods including a power supply device such as a washing machine, a vacuum cleaner, and a rice cooker. Alternatively, the AC / DC converter 100 can be employed in a lighting device.

Plug 902 is subjected to a commercial AC voltage _{V AC} from the wall outlet (not shown). The AC / DC converter 100 is mounted in the housing 904. The DC output voltage _VOUT generated by the AC / DC converter 100 is supplied to a load such as an inverter, a converter, a microcomputer, a lighting device, an analog circuit, and a digital circuit (not shown) mounted in the same housing 904.

  Although the present invention has been described using specific terms based on the embodiments, the embodiments only illustrate the principles and applications of the present invention, and the embodiments are defined in the claims. Many variations and modifications of the arrangement are permitted without departing from the spirit of the present invention.

P ₁ input terminal P ₂ output terminal M ₁ switching transistor C ₁ output capacitor L ₁ inductor D ₁ rectifier diode 100 AC / DC converter 104 rectifier circuit 106 smoothing capacitor 200 DC / DC converter 202 buck converter 204 switching line 210 booster circuit 212 charge Pump circuit D ₂₁ 1st diode C ₂₁ 1st capacitor 300 Controller 301 Pulse modulator 302 Error amplifier 304 Comparator 306 Oscillator 308 Reference voltage source 310 Slope compensator 312 Flip-flop 314 Driver 316 Starter circuit 320 Boost pulse generator 800 AC adapter 802 Plug 804 housing 806 connector 810,900 electronic device 902 plug 904 housing

Claims (14)

A non-insulated DC / DC converter,
A buck converter including a switching transistor;
A switching line connected to the source of the switching transistor is connected to the ground, drives the switching transistor, and generates a boost pulse; and
A booster circuit that receives an output voltage of the DC / DC converter and generates a power supply voltage of the controller using the booster pulse;
A DC / DC converter comprising:   2. The DC / DC converter according to claim 1, wherein the switching transistor is built in the same package as the controller. The controller is
An oscillator,
A pulse width modulator that generates a pulse signal in synchronization with the signal generated by the oscillator;
A driver for driving the switching transistor in response to the pulse signal;
A boost pulse generator for generating the boost pulse based on a signal generated by the oscillator;
The DC / DC converter according to claim 1, comprising:   The DC / DC converter according to claim 1, wherein the boost pulse is a gate drive pulse supplied to a gate of the switching transistor. The booster circuit includes:
A first capacitor having one end connected to the switching line;
A first diode receiving an output voltage of the DC / DC converter at an anode and having a cathode connected to the other end of the first capacitor;
A charge pump circuit configured with the switching line as a ground, receiving a voltage across the first capacitor as an input voltage, and performing a boost operation according to the boost pulse;
5. The DC / DC converter according to claim 1, comprising:   The DC / DC converter according to claim 5, wherein the controller receives the voltage at the other end of the first capacitor as a feedback voltage, and drives the switching transistor so that the feedback voltage matches a reference voltage. DC converter.   The DC / DC converter according to claim 5 or 6, wherein the charge pump circuit generates a voltage obtained by adding a voltage across the first capacitor and an amplitude of the boost pulse.   The DC / DC converter according to claim 5, wherein the charge pump circuit includes a plurality of diodes. The charge pump circuit includes a plurality of switches,
The DC / DC converter according to any one of claims 5 to 7, further comprising a drive circuit that drives the plurality of switches in synchronization with the boost pulse.   The DC / DC converter according to claim 9, wherein the plurality of switches and the drive circuit are integrated on the same semiconductor substrate as the controller. A controller for a non-insulated DC / DC converter,
The DC / DC converter is
In addition to the controller,
A buck converter,
A booster circuit that generates a power supply voltage of the controller in accordance with an output voltage of the DC / DC converter and a booster pulse;
With
The controller is
A switching transistor;
A ground pin connected to a source of the switching transistor;
A high voltage pin connected to the drain of the switching transistor;
A feedback pin to receive a feedback voltage according to the output voltage of the DC / DC converter;
An oscillator,
A pulse modulator that generates a pulse signal whose duty ratio changes so that the feedback voltage and a reference voltage approach each other in synchronization with the oscillator;
A driver for driving the switching transistor based on the pulse signal;
A step-up pulse generator for generating the step-up pulse in synchronization with the oscillator;
A controller comprising:   The controller according to claim 11, wherein the controller is integrated on a single semiconductor substrate.   A DC / DC converter comprising the controller according to claim 11. Load,
A diode rectifier circuit for full-wave rectification of AC voltage;
A smoothing capacitor that smoothes the output voltage of the diode rectifier circuit and generates a DC input voltage;
The DC / DC converter according to any one of claims 1 to 10, wherein the DC input voltage is stepped down and supplied to a load.
An electronic device comprising:

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