JP2017514268A - High speed communication jack testing apparatus and operation method thereof - Google Patents

Abstract

A substrate, a plurality of vias provided in the substrate, a plurality of pin traces having a height and a width, each extending from the respective via toward the edge of the substrate, and a plurality of terminations having a height and a width Traces, each termination trace having a plurality of termination traces extending from the end of the respective pin trace toward the edge of the substrate, and having a height and width, each from the side of the respective pin trace Including a plurality of branch traces extending and a plurality of traces extending from the end of each termination trace, branch trace or pin trace to the edge of the substrate, each termination trace adjacent to a respective branch trace , Test unit. [Selection] Figure 5

Description

  The present disclosure relates to a network connection jack test framework used to connect a network cable to a device.

  As telecommunication equipment and related applications of telecommunication equipment become more sophisticated and powerful, the ability of telecommunication equipment to collect information and share information with other equipment becomes more important. With the proliferation of these intelligent inter-network devices, it is necessary to increase the data processing capacity on the network to which these devices are connected and to provide the improved data rate necessary to meet this requirement. . As a result, existing communication protocol standards are constantly being improved or new standards are being created. Nearly all of these standards require or benefit significantly from high-quality signal communication over a wired network, either directly or indirectly. The transmission of these high quality signals may have higher bandwidth and correspondingly higher frequency requirements and needs to be supported in a consistent manner. However, even though newer versions of various standards theoretically provide higher data rates or data rates, these high definition signals are still limited by the current design of certain physical components. . Unfortunately, the design of such physical components faces difficulties by not understanding what is necessary to achieve consistent signal quality at multi-gigahertz and higher frequencies.

  For example, a communication jack is used in a communication device and a device that connects or links cables used for transmitting and receiving electrical signals representing data to be communicated. A registered jack (RJ) is a standardized physical interface used to connect telecommunication and data devices. The RJ standardized physical interface has both a jack structure and a wiring pattern. The RJ standardized physical interface commonly used for data devices is the RJ45 physical network interface, also called the RJ45 jack. The RJ45 jack is widely used in local area networks, such as networks that implement the Institute of Electrical and Electronics Engineers (IEEE) 802.3 Ethernet protocol. RJ45 jacks are described in various standards, including those promulgated by the American National Standards Institute (ANSI) / American Telecommunications Industry Association (TIA) at ANSI / TIA-1096-A.

  All electrical interface components such as cables and jacks, including RJ45 jacks, not only resist the initial current flow, but also resist any current change. This characteristic is called reactance. Two related types of reactance are inductive reactance and capacitive reactance. Inductive reactance may occur, for example, based on the movement of current through a cable that creates resistance, causing a magnetic field that induces a voltage in the cable. On the other hand, capacitive reactance is generated by charging that appears when electrons from two opposing surfaces approach each other.

  The various components of the communication circuit preferably have matching impedances so as to reduce or avoid any degradation of the transmitted signal. Otherwise, a load with one impedance value reflects or echoes part of the signal carried by cables with different impedance levels, causing a signal failure. For this reason, designers and manufacturers of data communication equipment, such as cable distributors, are responsible for verifying that cable impedance values and resistance and capacitance levels meet certain performance parameters. Design and test the cables. The RJ45 jack is an important component in almost all communication circuits, but the manufacturer of the jack has not paid as much attention to the performance of the jack. Thus, while the problems with existing RJ45 jacks are well documented in testing and the adverse effects of existing RJ45 jacks on high frequency signal lines are understood, the industry is concerned with this important component of the physical layer. It seems not ambitious to deal with.

  As a result, an improved high speed jack is needed.

  One embodiment of the present invention includes a substrate, a plurality of vias provided in the substrate, a plurality of focus points having a height and a width, each extending from the respective via toward the edge of the substrate. A plurality of termination traces having a race and a height and a width, each termination trace extending from an end of a respective pin trace toward the edge of the substrate; A plurality of branch traces, each having a width, each extending from a side of a respective pin trace, and a plurality of terminals extending from the end of each termination trace, branch trace or pin trace to the edge of the substrate Each termination trace is adjacent to a respective branch trace, each termination trace is adjacent to a respective branch trace on one side, and adjacent to a pin trace on each side, and each pin trace is on one side Of adjacent to Pinto race, discloses a test unit.

  In another embodiment, each pin trace is separated from each trace by a first distance.

  In another embodiment, each termination trace is separated from each trace by a second distance.

  In another embodiment, each branch trace is separated from the adjacent termination trace by a third distance.

  In another embodiment, adjacent pin traces are separated by a fourth distance.

  In another embodiment, the test unit includes a ground plane on the substrate that is spaced a distance from each trace.

  In another embodiment, the height and width of adjacent traces and the distance separating adjacent traces are adjusted so that adjacent traces are magnetically coupled.

  In another embodiment, the inductance and capacitance of each trace is adjusted by adjusting a first distance between the ground plane and each trace.

  In another embodiment, the height and width of adjacent termination and branch traces are adjusted such that the termination trace is magnetically coupled to the adjacent branch trace.

  In another embodiment, the substrate is Rogers material RO XT8100.

  In another embodiment, the capacitance of each trace is adjusted between approximately 0.51 picofarads (pF) and approximately 2 pF.

  In another embodiment, the test unit includes a second ground plane disposed between the first ground plane and the surface of the substrate opposite the surface of the substrate having the plurality of traces.

  In another embodiment, the inductance and capacitance of each trace adjusts the distance between the first ground plane and the second ground plane and the distance between the first ground plane and each trace. It is adjusted by doing.

  In another embodiment, an RJ45 jack pin is connected to each via.

  In another embodiment, the end of each trace is coupled to a connection unit.

  In another embodiment, the connection unit is an RJ45 connector.

  In another embodiment, the height and width of adjacent pin traces and the distance separating adjacent pin traces are adjusted so that adjacent pin traces are magnetically coupled.

  In another embodiment, the height and width of adjacent termination and branch traces and the distance separating adjacent termination and branch traces are such that adjacent termination and branch traces are magnetically coupled. Adjusted.

  In another embodiment, the inductance and capacitance of each termination trace and branch trace is adjusted by adjusting the distance between the ground plane and each termination trace and each branch trace.

  In another embodiment, the inductance and capacitance of each pin trace is adjusted along the length of the trace by adjusting a predetermined distance between the ground plane and each termination trace.

  Another embodiment of the present invention is a method for testing a high speed communication jack, wherein the capacitance and inductance of adjacent traces along the length of each adjacent trace are embedded in each adjacent trace and substrate. Adjusting the distance between the adjacent ground planes and adjusting the height, width and separation of adjacent traces on the substrate so that the two adjacent traces are magnetically coupled. Adjusting, transmitting a signal from the first signal generator over each adjacent trace to the high speed communication jack, transmitting a signal from the high speed communication jack over the cable, and receiving the signal at the signal receiving device And a step of comparing the received signal with the transmitted signal to obtain a signal difference.

  In another embodiment, the high speed communication jack is an RJ45 communication jack.

  In another embodiment, the substrate is Rogers material RO XT8100.

  In another embodiment, the capacitance of each adjacent trace is adjusted between approximately 0.51 picofarads (pF) and approximately 2 pF.

It is a figure which shows the test unit of the jack for high-speed communication. It is a figure which shows the matching part of the test unit of FIG. It is the schematic of the test unit of FIG. It is a figure of the circuit formed in the test unit of FIG. It is a figure which shows one Embodiment of the test unit of the jack for high-speed communication. FIG. 6 shows one embodiment of the connection of two test units of a high speed connection jack.

  FIG. 1 shows a test unit 100 for a high-speed communication jack. The test unit 100 or test framework includes a pin connection 102 configured to attach to a high speed communication jack such as, but not limited to, an RJ45 communication jack. Traces 104, 106, 108, 110, 112, 114, 116 and 118 extend radially from the pin connection 102 to the outer edge of the test unit 100. The end of each trace 104, 106, 108, 110, 112, 114, 116 and 118 terminates at the edge of the test unit 100 to allow connection of a communication unit (not shown). The connection units 120, 122, 124, 126, 128, 130, 132, and 134 can be any type of connector, including but not limited to an RJ45 connector.

  FIG. 2 shows an enlarged view of the connecting portion 102. Connection portion 102 includes vias 202, 204, 206, 208, 210, 212, 214, and 216 that are sized to engage the pins of the high-speed communication jack. Pin traces 218, 220, 222, 224, 226, 228, 230 and 232 are traced from vias 202, 204, 206, 208, 210, 212, 214 and 216 to traces 104, 106, 108, 110, 112, 114, 116. And 118 extending radially toward 118. Each pin trace 218, 220, 222, 224, 226, 228, 230, and 232 matches an adjacent pin trace 218, 220, 222, 224, 226, 228, 230, or 232. In the illustrative example, pin trace 218 matches pin trace 220, pin trace 222 matches pin trace 224, pin trace 226 matches pin trace 228, and pin trace 230 matches pin trace 232. Each pin trace 218, 220, 222, 224, 226, 228, 230 and 232 and 234 has a length (L), a height (H) and a width (W), and a distance (S ). The width of each pin trace 218, 220, 222, 224, 226, 228, 230 and 232 is approximately 35 mils. By adjusting the length, height and width of adjacent pin traces, the inductance of adjacent pin traces can be matched. The end of each pin trace 218, 220, 222, 224, 226, 228, 230 and 232 is spaced a predetermined distance (Se) from the respective trace 102, 104, 106, 108, 110, 112 or 114. .

  Branch traces 234, 236, 238 and 240 extend from respective pin traces 218, 222, 226 and 232. From the end of each pin trace 220, 224, 228 and 230 toward the respective aligned pin, termination traces 242, 244, 246 and 248 are substantially relative to corresponding branch traces 234, 236, 238 and 240. And between the end of each pin trace 218, 220, 222, 224, 226, 228, 230 or 232 and the end of each trace 102, 104, 106, 108, 110, 112 or 114 Extends to be placed. Termination traces 242, 244, 246 and 248 and branch traces 234, 236, 238 and 240 are spaced a predetermined distance Se from the end of each respective trace 102, 104, 106, 108, 110, 112 or 114. . In one embodiment, the distance Se is constant along the length of the termination trace 236, 238, 240, 242, 244, 246, 248 or 250. In another embodiment, the distance Se varies along the length of the termination trace 236, 238, 240, 242, 246, 248 or 250. Each branch trace 234, 236, 238 and 240 and each termination trace 242, 244, 246 and 248 has a length (L), a width (W) and a height (H). Different inductive and conductive configurations by adjusting the length, height and width of each branch trace 234, 236, 238 and 240 and each end trace 242, 244, 246 and 248 along with the separation Se Can be achieved. By matching the conductive and inductive patterns of two adjacent traces, the traces can be magnetically coupled. The width of each branch trace 234, 236, 238 and 240 can be approximately 35 mils. The width of each termination trace 242, 244, 246 and 248 may be approximately 10 mils.

  FIG. 3 shows a cutaway view of the connecting portion 102. Connection portion 102 includes an upper surface 302. Traces 218, 220, 234, and 242 are disposed on top surface 304, and first ground trace 306 and second ground trace 308 are disposed in a dielectric layer below the top surface, and first ground traces. 306 is separated from the top surface 302 by a first dielectric layer having a height H1. The second ground trace 308 is separated from the first ground trace 306 by a second dielectric layer 310 having a second height H2. By adjusting the heights H1 and H2 of the dielectric layers 308 and 310, the capacitance of each trace can be adjusted. Further, by changing the length, width and height of each trace 218, 220, 234 and 242 the impedance of each trace 218, 220, 234 and 242 can be adjusted. By adjusting the impedance of adjacent traces, crosstalk or noise can be removed and adjacent traces can be magnetically coupled to each other. The dielectric layer is made from a material with a dielectric constant greater than 3.0, such as but not limited to ROGERS Material's RO XT8100, or any other material that can isolate high frequency electrical signals.

  FIG. 4 shows a diagram of a circuit formed in the test unit 100. The wiring diagram includes a connection unit 402, an input stimulus 404, an RJ45 high-speed communication jack 406, and an output load 408. RJ45 jack 406 includes internal traces 410 and 412 connected to pins 414 and 416 that engage vias 418 and 420. Vias 418 and 410 are electrically connected to pin traces 422 and 424 of test unit 100. The inductances at pin traces 422 and 424 and at various locations along the trace are represented by inductors PCB 3 and 4 and vias 3 and 4. The inductance of each trace adjusts the height H1 of the dielectric layer under the pin trace and the height H2 between the second ground trace 306 and the first ground trace 304 under each trace. Will be changed by. The inductance and capacitance of the branch and termination traces are represented by capacitors C8 and C10 and inductors L1 and L5. Capacitors C8 and C10 are provided by changing the height, width and length of the termination and branch traces, as well as the distance between the termination traces 242, 244, 246 and 248 and the branch traces 234, 236, 238 and 240. Adjusted. Adjust the height H1 of the dielectric layer under the termination trace or branch trace and the height H2 between the second ground trace 306 and the first ground trace 304 under each termination trace or branch trace. This alters the inductance of branch traces 234, 236, 238 and 240 and termination traces 242, 244, 246 and 248. Capacitors generated by traces including pin traces, termination and branch traces, and ground traces 304 and 306 are sized between approximately 0.51 picofarads (pF) and approximately 2 pf. To further enhance the operation of the circuit, the top and bottom surfaces of the unit 100 can be covered with a plastic insulating layer. In one embodiment, the signal is driven through the line with an output between approximately 4 mW and 20 mW.

  FIG. 5 illustrates one embodiment of a test unit for a high-speed communication jack. The test unit 500 includes a high-speed communication jack 502 connected to the connection portion 102 of the test unit 500. The high-speed communication jack 502 includes an RJ type connector, a universal serial bus (USB) connector and jack, and a fire wire (Fire- wire) (1394) connector and jack, HDMI (high definition multimedia interface) connector and jack, D-subminiature type connector and jack, ribbon type connector or jack, or other receiving high-speed communication signals It can be any connector or jack. The high-speed communication jack 502 is connected to the connection unit 102 so that each pin of the high-speed communication jack 502 corresponds to one of the vias 202, 204, 206, 208, 210, 212, 214, and 216. . The high speed communication jack 502 can be configured such that pin pairs are magnetically coupled to each other.

  Each trace 104, 106, 108, 110, 112, 114, 116 and 118 extends from the connection 102 to the connection units 120, 122, 124, 126, 128, 130, 132 and 134. The connection units 120, 122, 124, 126, 128, 130, 132, and 134 can detach cables having connectors such as RJ45 connectors to each of the connection units 120, 122, 124, 126, 128, 130, 132, and 134. It is configured so that it can be attached to. The connection units 120, 122, 124, 126, 128, 130, 132 and 134 are connected units 120, 122, 124, 126, 128, 130, 132 and 134 and connection units 104, 106, 108, 110, 112, Signals are transmitted from cables connected to associated traces 104, 106, 108, 110, 112, 114, 116 or 118 connected to 114, 116 and 118. The connection units 104, 106, 108, 110, 112, 114, 116 and 118 are attached to a connection plate 504 that extends around the outer periphery of the test unit 502. The connection plate 504 can be made from a metal such as steel or plastic. Each of the connection units 104, 106, 108, 110, 112, 114, 116 and 118 is such that the central axis of the connection unit 104, 106, 108, 110, 112, 114, 116 or 118 is relative to the surface of the test unit 500. It is attached to the side of the connection plate 504 so as to be substantially parallel.

  FIG. 6 shows a schematic representation of test units connected to each other by a network. The first test unit 602 is connected to the second test unit 604 by a cable 606 connected to the high-speed communication jack of each of the test units 602 and 604. The cable 606 may be a communication cable such as an Ethernet cable, category 5, 6 or 7 cable, serial cable, fire wire cable, USB cable or any other type of communication cable. Cable 606 includes a connector (not shown) that allows cable 606 to be removably connected to a high-speed communication jack. In one embodiment, the high speed communication jack of the first test unit 602 is the same type as the high speed communication jack of the second test unit 604. In another embodiment, the high speed communication jack of the first test unit 602 is a different type than the high speed communication jack of the second test unit 604. The cable can be any length including but not limited to 3 feet, 6 feet, 10 feet, 12 feet, 15 feet or 20 feet.

  Each of the connection units 104, 106, 108, 110, 112, 114, 116 or 118 is connected to the signal transmission / reception units 610 and 612, one end of which is the connection unit 104, 106, 108, 110, 112, 114, 116 or 118. The other end is connected via a cable connected to the signal transmission / reception units 610 and 612. In one embodiment, the signal transmission / reception unit 610 transmits signals from the first test unit 602 to the second test unit 604 via the high-speed communication jacks of the first test unit 602 and the second test unit 604. Send. Upon receiving the signal, the second test unit 604 transmits the signal to the signal transmitting / receiving unit 612. In one embodiment, the signal transceiver unit 612 transmits a new signal back to the signal transceiver unit 610 via the cable 608. In one embodiment, the signal transmission / reception unit 612 transmits to the signal transmission / reception unit 612 a second signal based on the signal previously transmitted by the signal transmission / reception unit 610. In another embodiment, the signal transceiver unit 612 transmits a second signal to the signal transceiver unit 610 that is substantially the same as the signal previously transmitted by the signal transceiver unit 610.

The foregoing detailed description is merely some examples and embodiments of the disclosure, and numerous modifications to the disclosed embodiments can be made without departing from the spirit and scope of the disclosure herein. Can be done according to. Accordingly, the foregoing description is not intended to limit the scope of the present disclosure, but to provide a disclosure sufficient to enable one of ordinary skill in the art to practice the invention without undue burden. .

Claims (24)

A substrate,
A plurality of vias provided in the substrate;
A plurality of pin traces having a height and a width, each extending from a respective via toward the edge of the substrate;
A plurality of termination traces having a height and a width, each termination trace extending from an end of a respective pin trace toward the edge of the substrate;
A plurality of branch traces, each having a height and width, each extending from a side of a respective pin trace;
A plurality of traces extending from an end of each respective termination trace, branch trace or pin trace to the edge of the substrate;
Including
Each termination trace is adjacent to its respective branch trace,
Each termination trace is adjacent to the respective branch trace on one side and the pin trace on the other side,
A test unit, where each pin trace is adjacent to another pin trace on one side.   The test unit of claim 1, wherein each pin trace is separated from each trace by a first distance.   The test unit of claim 1, wherein each termination trace is spaced a second distance from each trace.   The test unit of claim 1, wherein each branch trace is separated from the adjacent termination trace by a third distance.   The test unit of claim 1, wherein adjacent pin traces are separated by a fourth distance.   The test unit of claim 1, wherein the substrate includes a ground plane that is spaced a distance from each trace.   The test unit of claim 1, wherein the height and width of adjacent traces and the distance separating adjacent traces are adjusted so that the adjacent traces are magnetically coupled.   7. The test unit of claim 6, wherein the inductance and capacitance of each trace is adjusted by adjusting the first distance between the ground plane and each trace.   The test unit of claim 4, wherein the height and width of adjacent termination traces and branch traces are adjusted such that the termination traces are magnetically coupled to adjacent branch traces.   The test unit according to claim 1, wherein the substrate is RO XT8100 of Rogers material.   9. The test unit of claim 8, wherein the capacitance of each trace is adjusted between approximately 0.51 picofarads (pF) and approximately 2 pF.   The test unit according to claim 6, comprising a second ground plane disposed between the first ground plane and a surface of the substrate opposite to the surface of the substrate having the plurality of traces. .   The inductance and capacitance of each trace adjusts the distance between the first ground plane and the second ground plane and the distance between the first ground plane and each trace. The test unit according to claim 12, adjusted by:   The test unit according to claim 1, wherein a pin of an RJ45 jack is connected to each via.   The test unit according to claim 1, wherein an end of each trace is coupled to a connection unit.   The test unit according to claim 15, wherein the connection unit is an RJ45 connector.   The test unit of claim 1, wherein the height and width of adjacent pin traces and the distance separating adjacent pin traces are adjusted so that the adjacent pin traces are magnetically coupled.   The height and width of adjacent termination and branch traces and the distance separating adjacent termination and branch traces are adjusted such that the adjacent termination and branch traces are magnetically coupled. The test unit according to claim 1.   7. The test unit of claim 6, wherein the inductance and capacitance of each termination trace and branch trace are adjusted by adjusting the distance between the ground plane and each termination trace and each branch trace.   7. The test of claim 6, wherein the inductance and capacitance of each pin trace is adjusted along the length of the trace by adjusting a predetermined distance between the ground plane and each termination trace. unit. A method for testing a jack for high-speed communication,
Adjusting the capacitance and inductance of adjacent traces along the length of each adjacent trace by changing the distance between each adjacent trace and the ground plane embedded in the substrate;
Adjusting the height, width, and separation of adjacent traces on the substrate such that two adjacent traces are magnetically coupled;
Transmitting a signal from the first signal generator across each adjacent trace to a high-speed communication jack;
Transmitting the signal from the high-speed communication jack over a cable;
Receiving the signal in a signal receiving device;
Comparing the received signal with the transmitted signal to determine a difference between the signals;
Including methods.   The method according to claim 21, wherein the high-speed communication jack is an RJ45 communication jack.   The method of claim 21, wherein the substrate is RO XT8100 of Rogers material. The method of claim 21, wherein the capacitance of each adjacent trace is adjusted between approximately 0.51 pF and approximately 2 pF.