JP2017169029A - Level shift circuit, electronic device and integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a level shift circuit including a transistor, in which the malfunction due to the leakage current in the use under the high-temperature environment is reduced.SOLUTION: A level shift circuit 110A used to convert the voltage level of an input signal into a level of the power source voltage and outputs the result of conversion includes an input terminal IN to receive the input signal, a transistor TR1, an output terminal OUT, and a current compensation circuit 110. The transistor includes a first electrode and a second electrode, which are electrically coupled to a power source voltage VCC2 and a ground node GND respectively, and a control electrode coupled to the input terminal. The output terminal is electrically coupled to one of the first electrode and the second electrode. The current compensation circuit includes a temperature detection unit 120 for detecting the temperature of the transistor. The current compensation circuit adjusts the current flowing in the output electrode coupled to the output terminal of the first electrode and the second electrode in accordance with the leakage current leaking out of the transistor depending on the temperature of the transistor.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a level shift circuit, an electronic device including the level shift circuit, and an integrated circuit in which the level shift circuit is integrated.

  In many electronic devices, a level shift circuit that converts a logic level between two digital circuits having different voltage levels is used. The level shift circuit is designed to prevent the logic from being transmitted correctly due to the difference in threshold voltage in each circuit when the logic level is transmitted from the low voltage circuit to the high voltage circuit or vice versa. Used. Japanese Unexamined Patent Publication No. 2007-180797 (Patent Document 1) discloses an example of a level shift circuit.

JP 2007-180797 A

  Generally, in a level shift circuit, a transistor that is a switching element is used. In a transistor, it is known that leakage current leaks even when the transistor is off (non-conducting) (off-leakage current). When such a leakage current occurs, the voltage level of the signal output from the transistor changes, and as a result, the logic level output from the transistor may be reversed.

  In particular, it is known that the leakage current of a transistor tends to increase as the temperature rises when used in a high temperature environment. In recent years, the number of cases in which electronic circuits are used in a relatively high temperature environment has increased, and it is necessary to prevent malfunctions even when used in such an environment.

  Furthermore, in recent years, in order to save energy, improvements have been made to increase the impedance in the electronic circuit and reduce the power consumption (that is, the current value used). In this case, because of the high impedance, even if a small amount of leakage current of, for example, a microampere level occurs, voltage fluctuation associated with the leakage current increases, and there is a concern that malfunctions are likely to occur.

  In particular, with the miniaturization and miniaturization of an integrated circuit (IC), the thickness of the insulator of the transistor is reduced, so that such a leakage current is likely to occur.

  The present invention has been made to solve such problems, and an object of the present invention is to reduce the occurrence of malfunction due to leakage current in use in a high temperature environment in a level shift circuit including a transistor. That is.

  The level shift circuit in the present invention is used for converting the voltage level of the input signal into the level of the power supply voltage and outputting it. The level shift circuit includes an input terminal that receives an input signal, a transistor, an output terminal, and a current compensation circuit. The transistor includes a first electrode and a second electrode that are electrically coupled to a power supply voltage and a ground node, respectively, and a control electrode coupled to an input terminal. The output terminal is electrically coupled to one of the first electrode and the second electrode. The current compensation circuit includes a temperature detection unit that detects the temperature of the transistor. The current compensation circuit adjusts the current flowing through the output electrode coupled to the output terminal of the first electrode and the second electrode in response to the leakage current leaking from the transistor according to the temperature of the transistor.

  With such a configuration, it is possible to supply a current corresponding to the leakage current of the transistor generated in a high temperature environment to the output electrode, or to draw the leakage current flowing through the output electrode to the ground node. As a result, fluctuations in the voltage level of the output electrode due to the leakage current can be suppressed, so that malfunction of the output signal output from the output terminal can be reduced.

  According to the present invention, in a level shift circuit including a transistor, it is possible to reduce the occurrence of malfunction due to leakage current when used in a high temperature environment.

It is a figure which shows an example of the electronic device containing a level shift circuit. It is a figure for demonstrating the structure of the level shift circuit in a comparative example, and the operation state at the time of normal. It is a figure which shows the relationship between the temperature of a transistor, and leakage current. It is a figure for demonstrating the operation state at the time of the high temperature malfunction of the level shift circuit in a comparative example. FIG. 5 is a time chart for explaining a change in an operation state in the case of FIG. 4. FIG. It is a figure for demonstrating the structure of the level shift circuit according to this Embodiment 1, and the operation state at the time of leak current generation | occurrence | production. It is a time chart for demonstrating the change of the operation state in the case of FIG. FIG. 10 is a diagram showing a level shift circuit according to a modification of the first embodiment. FIG. 10 is a diagram showing a first example of a level shift circuit according to the second embodiment. FIG. 10 is a diagram showing a second example of the level shift circuit according to the second embodiment. FIG. 11 is a diagram showing a first example of a level shift circuit according to the third embodiment. It is a figure which shows an example of the detail of the current compensation circuit in FIG. FIG. 11 is a diagram showing a second example of the level shift circuit according to the third embodiment. It is a figure which shows an example of the detail of the current compensation circuit in FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

  FIG. 1 is a diagram illustrating an example of an electronic device 10 including a level shift circuit 100. Referring to FIG. 1, level shift circuit 100 receives, for example, a 0-3V logic signal output from inverter INV1 driven by first power supply voltage VCC1 (= 3V) at input terminal IN, and The signal is converted into a logic signal of 0-5V and output from the output terminal OUT.

  FIG. 2 is a diagram for explaining the configuration of the level shift circuit 100 in the comparative example and the operation state at the normal time (when no malfunction occurs). 2A shows a case where the logic level of the input signal is Low, and FIG. 2B shows a case where the logic level of the input signal is High.

  Referring to FIG. 2A, the level shift circuit 100 includes a transistor TR1, a resistor R1, and an inverter INV2. The transistor TR1 is a NOMSFET (N-type Metal Oxide Semiconductor Field-Effect Transistor) in which a control electrode (gate) and a second electrode (source) are connected, and an input terminal IN is electrically connected to the gate. . The first electrode (drain) of the transistor TR1 is electrically connected to the second power supply voltage VCC2 via the resistor R1. The source of transistor TR1 is electrically connected to ground node GND.

  The inverter INV2 is driven by the second power supply voltage VCC2 (= 5V). The input of the inverter INV2 is electrically connected to a connection node N1 between the resistor R1 and the transistor TR1. The output of the inverter INV2 is electrically connected to the output terminal OUT. The threshold voltage Vth of the inverter INV2 is, for example, 2.5V. The inverter INV2 outputs Low when the voltage level of the input signal exceeds 2.5V, and the voltage level of the input signal is When the voltage falls below 2.5V, High is output.

  The transistor TR1 turns on and off the voltage output to the inverter INV2 in response to an input signal input to the input terminal IN.

  Under normal conditions, when an input signal having a logic level Low (= 0V) is input to the input terminal IN, the transistor TR1 is turned off (non-conducting state), whereby the voltage level of the connection node N1 is High (= 5V). Become. Therefore, the inverter INV2 outputs a signal having a logic level Low (= 0V) to the output terminal OUT.

  Referring to FIG. 2B, when an input signal having a logic level High (= 3V) is input to the input terminal IN, the transistor TR1 is turned on (conducting state), whereby the voltage level of the connection node N1. Becomes the ground potential, that is, Low (= 0 V). Therefore, the inverter INV2 outputs a signal of logic level High (= 5V) to the output terminal OUT.

  Thus, during normal operation, the level shift circuit 100 converts an input signal having a logic level of 0-3V into an output signal having a logic level of 0-5V.

  Here, it is known that the leakage current of a transistor such as a MOSFET has an exponential temperature dependency as shown in FIG. Therefore, when the transistor is used in a high temperature environment (for example, 100 ° C. or higher), there is a concern that malfunction due to leakage current may occur.

  4 and 5 are circuit diagrams (FIG. 4) for explaining an operation state when a leakage current in an off state occurs when the level shift circuit 100 shown in FIG. 2 is used in a high temperature environment. And FIG. 5 is a time chart showing a result of simulating a case where the temperature of the transistor TR1 is changed in the circuit (FIG. 5). In FIG. 5, the horizontal axis indicates time, and the vertical axis indicates the temperature Temp of the transistor TR1, the input signal level Vin, the voltage level V1 at the connection node N1, the output signal level Vout, and the leakage current flowing through the transistor TR1. Ileak is shown.

  Referring to FIGS. 4 and 5, in the initial state (time t0), the logic level of the input signal is Low (= 0V), which is a normal state in which no leak current is generated. In this state, as described in FIG. 2, the voltage level V1 of the connection node N1 is High (= 5V), and the logic level of the output signal is Low (= 0V).

  Until time t1, a normal state is maintained in which leakage current does not occur even when the temperature Temp rises, or occurs only to a negligible level.

  When the temperature Temp of the transistor TR1 exceeds a predetermined threshold value T0 at time t1, the leakage current Ileak increases remarkably as the temperature Temp increases. As the leakage current Ileak increases, the voltage level V1 of the connection node N1 gradually decreases, and when the voltage level V1 falls below the threshold voltage Vth of the inverter INV2 (time t2), the output signal The voltage level becomes High (= 5V).

  As described above, when the voltage level of the connection node N1 coupled to the output terminal OUT is reduced due to the leakage current of the transistor TR1, the logic level (Low) of the input signal and the logic level (High) of the output signal are changed. It will be in a different state. That is, the input signal cannot be transmitted correctly (malfunction).

  In particular, in recent years, in order to reduce the power consumption of the circuit, the resistance R1 is increased to increase the impedance of the circuit, and the current flowing through the circuit tends to be reduced. As a result, even if the leakage current is small, the voltage drop in the resistor R1 becomes large, and malfunction is likely to occur.

  Therefore, in this embodiment, a configuration including a current compensation circuit that adjusts a current flowing through an electrode (output electrode) of a transistor that is electrically coupled to an output terminal in response to a leakage current accompanying a temperature rise of the transistor. And As a result, the fluctuation of the potential at the output electrode is suppressed, and the logic level of the signal input to the inverter can be maintained even if a leak current is generated when the transistor is off. As a result, even when a leakage current occurs, it is possible to prevent a malfunction in which the logic levels of the input signal and the output signal are different.

[Embodiment 1]
FIG. 6 is a circuit diagram for illustrating level shift circuit 100A according to the first embodiment. The level shift circuit 100A in FIG. 6 has a configuration in which a current compensation circuit 110 is added to the level shift circuit 100 in FIG. 2 shown in the comparative example. In FIG. 6, the description of the elements overlapping with those in FIG. 2 will not be repeated.

  Referring to FIG. 6, current compensation circuit 110 includes a temperature detection unit 120, a transistor TR2, a resistor R2, and an inverter INV3.

  The transistor TR2 is a PMOSFET (P-type Metal Oxide Semiconductor Field-Effect Transistor) in which the gate and the drain are connected, the drain is electrically connected to the second power supply voltage VCC2, and the source is connected via the resistor R2. It is electrically connected to connection node N1. Note that the resistance value of the resistor R2 is smaller than the resistance value of the resistor R1.

  The temperature detection unit 120 is electrically connected to the gate of the transistor TR2 through the inverter INV3. The temperature detector 120 detects the temperature of the transistor TR1 and outputs a high temperature detection signal HTD that becomes High when the temperature exceeds a predetermined threshold value. The inverter INV3 receives the high temperature detection signal HTD from the temperature detection unit 120, and outputs the inverted signal to the gate of the transistor TR2.

  Note that the temperature detection of the transistor TR1 in the temperature detection unit 120 may be detected based on a signal from a temperature sensor (not shown) provided in the vicinity of the transistor TR1 or a leakage current Ileak flowing through the transistor TR1. For example, it may be calculated from the relationship between the leakage current and the temperature as shown in FIG.

  With such a configuration, when the temperature detector 120 detects that the transistor TR1 is at a high temperature in the off state of the transistor TR1, the transistor TR2 is turned on (conducting state), and the connection node N1 is connected. A compensation current I2 is supplied. Here, as described above, since the resistance value of the resistor R2 is smaller than the resistance value of the resistor R1, the compensation current I2 is larger than the current I1 flowing through the resistor R1. That is, by compensating the leakage current Ileak with the compensation current I2, the current I1 flowing through the resistor R1 can be reduced, and as a result, the potential of the connection node N1 can be prevented from decreasing. Therefore, it is possible to prevent malfunction caused by the occurrence of leakage current.

  FIG. 7 is a time chart of a simulation result when the temperature of the transistor TR1 is changed in the level shift circuit 100A shown in FIG. 6 as in FIG. In FIG. 7, the horizontal axis indicates time, and the vertical axis indicates the temperature Temp of the transistor TR1, the input signal level Vin, the voltage level V1 at the connection node N1, the output signal level Vout, and the leakage current flowing through the transistor TR1. Ileak, high temperature detection signal HTD from temperature detection unit 120, and currents I1 and I2 flowing through resistors R1 and R2, respectively.

  Referring to FIG. 7, until time t11 at which temperature Temp of transistor TR1 reaches threshold value T0, leakage current Ileak is not generated or is in a normal state where it can be ignored. The voltage level of N1 is in the High state, and the input signal level Vin and the output signal level Vout are both in the Low state.

  When the temperature Temp of the transistor TR1 exceeds the threshold value T0 at time t11, the leakage current Ileak starts to increase as the temperature Temp increases. At this time, since the transistor TR2 of the current compensation circuit 110 is in the off state, the leakage current Ileak is supplied by the current I1 flowing through the resistor R1.

  At time t12, when the temperature detection unit 120 of the current compensation circuit 110 detects that the transistor TR1 is at a high temperature based on the leak current Ileak or the temperature sensor, the high temperature detection signal HTD is set to the high state. As a result, the transistor TR2 is turned on (conductive state), so that the leak current Ileak is supplied by the compensation current I2 supplied from the current compensation circuit 110. Further, since the resistance value of the resistor R2 is smaller than the resistance value of the resistor R1, the current value of the current I2 is larger than the current value of the current I1 according to the law of shunting, and the current I1 flowing through the resistor R1 is greatly reduced. The decrease in the voltage level V1 of the connection node is suppressed. For example, when the resistance value of the resistor R2 is nine times the resistance value of the resistor R1, the decrease in the voltage level V1 at the connection node is about 1/10 that of the resistor R1 alone. As a result, the output signal level Vout is maintained in the low state.

  As described above, in level shift circuit 100A in the first embodiment, when it is detected that the temperature is high when transistor TR1 is in the off state, the current corresponding to the leakage current is compensated by current compensation circuit 110, and Variations in the voltage level at the output terminal can be suppressed. As a result, it is possible to prevent malfunction caused by leakage current when used in a high temperature environment.

(Modification of Embodiment 1)
FIG. 8 shows a level shift circuit 100B according to a modification of the first embodiment. The level shift circuit 100B in FIG. 8 is different from the level shift circuit 100B in that the resistor R1 in FIG. 6 is replaced with the constant current source CS1, and the other configurations are the same as those in FIG.

  Also in the configuration of FIG. 8, since the leakage current of the transistor TR1 is compensated by the current compensation circuit 110, the fluctuation of the voltage level at the output terminal can be suppressed.

  In the first embodiment, the “drain (first electrode)” of the transistor TR1 corresponds to the “output electrode” in the present invention.

[Embodiment 2]
In the level shift circuit according to the first embodiment, the case where the transistor driven by the input signal is an NMOSFET has been described. In the second embodiment, a case where a transistor driven by an input signal is a PMOSFET will be described.

  FIG. 9 is a diagram for illustrating level shift circuit 100C according to the second embodiment. 9, a transistor TR3 and a resistor R3 are provided in place of the resistor R1 and the transistor TR1 in FIG. 6, and a current compensation circuit 110C is provided in place of the current compensation circuit 110.

  Referring to FIG. 9, transistor TR3 is a PMOSFET having a gate and a drain connected, the drain is electrically connected to second power supply voltage VCC2, and the source is electrically connected to ground node GND via resistor R3. Connected to. The gate of the transistor TR3 is connected to the input terminal IN. The transistor TR3 turns on and off the voltage output to the inverter INV2 via the connection node N3 between the source of the transistor TR3 and the resistor R3 in response to the input signal input to the input terminal IN.

  Current compensation circuit 110C includes a temperature detection unit 130, a resistor R4, and a transistor TR4.

  Similar to temperature detection unit 120 in the first embodiment, temperature detection unit 130 detects the temperature of transistor TR3 and outputs high temperature detection signal HTD.

  The transistor TR4 is a NOMOSFET in which a gate and a source are connected, and a high temperature detection signal HTD from the temperature detection unit 130 is input to the gate. The source of the transistor TR4 is electrically connected to the ground node GND, and the drain is electrically connected to the connection node N3 via the resistor R4. The resistance value of the resistor R4 is smaller than the resistance value of the resistor R3.

  In the second embodiment, when the logic level of the input signal is in the low state (= 0V), the transistor TR3 is on (conductive state) and the voltage level of the connection node N3 is high (= 5V). . As a result, the logic level of the output signal is also lowered by the inverter INV2.

  On the other hand, when the logic level of the input signal becomes a high state (= 5 V), the transistor TR3 is turned off (non-conducting state), so that no current flows through the resistor R3, and the voltage level of the connection node N3 becomes low. As a result, the logic level of the output signal becomes High.

  Here, when the transistor TR3 is in an off state (that is, the logic level of the input signal is high), if the temperature of the transistor TR3 rises and a leak current Ileak occurs, the voltage level of the connection node N3 is pulled up by the resistor R3. Is done. When the voltage level of the connection node N3 exceeds the threshold voltage Vth of the inverter INV2, the logic level of the output signal becomes low, which may be different from the logic level (High) of the input signal.

  When the temperature detection unit 130 of the current compensation circuit 110C detects that the transistor TR3 is at a high temperature based on the leak current Ileak, the temperature detection unit 130C sets the high temperature detection signal HTD to a high state. As a result, the transistor TR4 is turned on (conductive state). Since the resistance value of the resistor R4 is lower than the resistance value of the resistor R3, most of the leakage current Ileak flowing into the connection node N3 flows to the ground node GND via the resistor R4. For this reason, the pull-up amount at the resistor R3 is reduced, and an increase in the voltage level of the connection node N3 can be suppressed. As a result, the logic level of the output signal can be maintained in a high state.

  As described above, even in the level shift circuit using the PMOSFET as the driving transistor, the leakage current is generated in use in a high temperature environment by bypassing the leakage current to the ground node by the current compensation circuit. In addition, the voltage level of connection node N3 electrically coupled to the output terminal can be maintained in a low state. As a result, it is possible to prevent malfunction caused by a leakage current when used in a high temperature environment in the level shift circuit.

(Modification of Embodiment 2)
FIG. 10 is a diagram showing a level shift circuit 100D of the second example having a configuration in which the resistor R3 in the level shift circuit 100C shown in FIG. 9 is replaced with a constant current source CS2, similarly to the modification of the first embodiment. It is.

  Also in the level shift circuit 100D, the current compensation circuit 110C is connected to the connection node N4 between the transistor TR3 and the constant current source CS2.

  Even in this case, the leakage current Ileak flowing into the connection node N4 can be made to flow to the ground node GND by the current compensation circuit 110D, so that it is possible to prevent malfunction due to the leakage current during use in a high temperature environment. .

  In the second embodiment, the “source (second electrode)” of the transistor TR4 corresponds to the “output electrode” in the present invention.

[Embodiment 3]
In the first and second embodiments, when the transistor temperature rises due to use in a high-temperature environment and a leakage current is generated, the transistor in the current compensation circuit is turned on (conductive state), whereby the output terminal is electrically connected. A configuration for adjusting the current of the output electrodes coupled to each other has been described. In the first and second embodiments, a compensation current (current supplied from the current compensation circuit or current drawn into the current compensation circuit) that flows through the current compensation circuit when the temperature of the transistor exceeds a predetermined threshold value. Is basically determined from the magnitude relationship between the impedance of the current compensation circuit and the impedance of the resistor (or constant current source).

  In the current compensation circuit according to the third embodiment, a configuration in which the compensation current is positively and variably adjusted according to the temperature level of the transistor will be described.

  FIG. 11 is a diagram showing a first example of the level shift circuit according to the third embodiment, and shows an example in which an NMOSFET is used as a transistor driven by an input signal as in the first embodiment.

  In the level shift circuit 100E shown in FIG. 11, the current compensation circuit 110 in the level shift circuit 100A of the first embodiment shown in FIG. 6 is replaced with a current compensation circuit 110E. In the description of FIG. 11, description of elements overlapping with those in FIG. 6 will not be repeated.

  Referring to FIG. 11, current compensation circuit 110E includes a temperature level detection unit 140 and a variable current source CS3. The temperature level detection unit 140 detects the temperature of the transistor TR1 and outputs a high temperature detection signal HTD # that is variably set according to the temperature level.

  Variable current source CS3 is connected to second power supply voltage VCC2 and connection node N1. The variable current source CS3 variably controls the compensation current I2 supplied to the connection node N1 in response to the high temperature detection signal HTD # from the temperature level detection unit 140. As shown in FIG. 3, the voltage level of the connection node N1 is adjusted more appropriately by setting the high temperature detection signal HTD # corresponding to the relationship between the transistor temperature and the leakage current and adjusting the compensation current I2. can do. Therefore, it is possible to prevent malfunction of the level shift circuit more reliably.

  FIG. 12 is a diagram illustrating an example of a detailed circuit of the current compensation circuit 110E. Referring to FIG. 12, temperature level detection unit 140 includes a PMOSFET transistor TR5 whose source and gate are connected, and an NMOSFET transistor TR6 whose source and gate are connected. The variable current source CS3 includes a PMOSFET transistor TR7.

  The drain of the transistor TR5 is connected to the second power supply voltage VCC2, and the source is connected to the drain of the transistor TR6. The source of transistor TR6 is connected to ground node GND.

  The drain of the transistor TR7 is connected to the second power supply voltage VCC2, and the source is connected to the connection node N1. The gate of the transistor TR7 is connected to the gate of the transistor TR5. The transistor TR5 and the transistor TR7 form a current mirror circuit.

  Here, as the transistor TR6, a transistor having a characteristic that more leakage current flows than the transistor TR1 at the same temperature is used. In other words, a current that can compensate for the leakage current flowing through the transistor TR1 can be supplied. For example, the transistor TR6 may have a configuration in which a plurality of (for example, four) transistors having the same characteristics as the transistor TR1 are connected in parallel.

  With such a configuration, when a leak current Ileak occurs in the transistor TR1 as the temperature rises, a leak current larger than the leak current Ileak can also occur in the transistor TR6. Then, the compensation current I2 capable of covering the leakage current is supplied from the transistor TR7 to the connection node N1 by the current mirror circuit (TR5, TR7). The compensation current I2 can be appropriately adjusted by designing the temperature characteristics of the leakage current of the transistor TR6 to be desired.

(Modification of Embodiment 3)
FIG. 13 is a diagram illustrating a second example of the level shift circuit according to the third embodiment, and illustrates an example in which a PMOSFET is used as a transistor driven by an input signal as in the second embodiment.

  In the level shift circuit 100F shown in FIG. 13, the current compensation circuit 110C in the level shift circuit 100C of the second embodiment shown in FIG. 9 is replaced with the current compensation circuit 110F. In the description of FIG. 13, description of elements overlapping with those in FIG. 9 will not be repeated.

  Referring to FIG. 13, current compensation circuit 110F includes a temperature level detection unit 140 and a variable current source CS4. Similarly to FIG. 11, temperature level detection unit 140 # detects the temperature of transistor TR3 and outputs high temperature detection signal HTD # that is variably set according to the temperature level.

  Variable current source CS4 is connected to connection node N3 and ground node GND. Variable current source CS4 variably controls compensation current I4 drawn from connection node N3 to ground node GND in response to high temperature detection signal HTD # from temperature level detection unit 140 #. Even in the configuration as shown in FIG. 13, the compensation current I4 can be more appropriately controlled, so that the malfunction of the level shift circuit can be prevented more reliably.

  FIG. 14 is a diagram illustrating an example of a detailed circuit of the current compensation circuit 110F. Referring to FIG. 14, temperature level detection unit 140 # includes a PMOSFET transistor TR8 having a drain and a gate connected, and an NMOSFET transistor TR9 having a drain and a gate connected. The variable current source CS4 includes an NMOSFET transistor TR10.

  The drain of the transistor TR8 is connected to the second power supply voltage VCC2, and the source is connected to the drain of the transistor TR9. The source of transistor TR9 is connected to ground node GND.

  Transistor TR10 has a drain connected to connection node N3 and a source connected to ground node GND. The gate of the transistor TR10 is connected to the gate of the transistor TR9. The transistor TR9 and the transistor TR10 form a current mirror circuit.

  As the transistor TR8, a transistor having a characteristic that more leakage current flows than the transistor TR3 at the same temperature is used, like the transistor TR5 in FIG. 12 of the third embodiment. That is, most of the leakage current can be drawn from connection node N3 to ground node GND. For example, the transistor TR8 may have a configuration in which a plurality of (for example, four) transistors having the same characteristics as the transistor TR3 are connected in parallel.

  With such a configuration, when a leak current Ileak occurs in the transistor TR3 as the temperature rises, a leak current larger than the leak current Ileak can also occur in the transistor TR8. Then, the current mirror circuit (TR9, TR10) can draw the leakage current as the compensation current I4 from the connection node N3 to the ground node GND through the transistor TR10. The compensation current I4 can be appropriately adjusted by designing the temperature characteristics of the leakage current of the transistor TR8 to be desired.

  The level shift circuit described in any of Embodiments 1 to 3 can be combined with any other circuit to constitute an electronic device. Further, the level shift circuit can be formed as an integrated circuit.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  10 electronic equipment, 100, 100A to 100F level shift circuit, 110, 110C, 110E, 110F current compensation circuit, 120, 130 temperature detection unit, 140, 140 # temperature level detection unit, CS1 to CS4 current source, GND ground node, IN input terminal, INV1 to INV3 inverter, N1 to N4 connection node, OUT output terminal, R1 to R4 resistors, TR1 to TR10 transistors.

Claims (23)

A level shift circuit for converting a voltage level of an input signal into a power supply voltage level and outputting the power level,
An input terminal for receiving the input signal;
A transistor including a first electrode and a second electrode electrically coupled to the power supply voltage and a ground node, respectively, and a control electrode coupled to the input terminal;
An output terminal electrically coupled to one of the first electrode and the second electrode;
A temperature detection circuit for detecting a temperature of the transistor, coupled to the output terminal of the first electrode and the second electrode in response to a leakage current leaking from the transistor according to the temperature of the transistor; A level shift circuit comprising: a current compensation circuit configured to suppress a variation in voltage level of the output terminal by adjusting a current flowing through the output electrode. A first resistor coupled to the power supply voltage and the first electrode;
The transistor is an NMOSFET in which the control electrode and the second electrode are connected,
The level shift circuit according to claim 1, wherein the output terminal is electrically coupled to the first electrode.   The level shift circuit according to claim 2, wherein the current compensation circuit supplies a current corresponding to the leakage current to the output electrode when a temperature of the transistor exceeds a predetermined threshold value. The current compensation circuit is:
A switch coupled to the power supply voltage and operating in accordance with a signal from the temperature detection circuit;
The level shift circuit of claim 3, further comprising a second resistor coupled to the switch and the output terminal.   The level shift circuit according to claim 4, wherein a resistance value of the second resistor is smaller than a resistance value of the first resistor. A first constant current source coupled to the power supply voltage and the first electrode;
The transistor is an NMOSFET in which the control electrode and the second electrode are connected,
The level shift circuit according to claim 1, wherein the output terminal is electrically coupled to the first electrode.   The level shift circuit according to claim 6, wherein the current compensation circuit supplies a current corresponding to the leakage current to the output electrode when a temperature of the transistor exceeds a predetermined threshold value. The current compensation circuit is:
A switch coupled to the power supply voltage and operating in accordance with a signal from the temperature detection circuit;
The level shift circuit of claim 7, further comprising a second resistor coupled to the switch and the output terminal.   The level shift circuit according to claim 2, further comprising an inverter coupled to the first electrode and the output terminal.   The level shift circuit according to claim 2, wherein the current compensation circuit increases a current supplied to the output electrode as the temperature of the transistor increases.   11. The level according to claim 10, wherein the current compensation circuit further includes a variable current source configured to change a magnitude of a current supplied to the output electrode in response to a temperature level signal from the temperature detection circuit. Shift circuit. A third resistor coupled to the second electrode and the ground node;
The transistor is a PMOSFET in which the control electrode and the first electrode are connected,
The level shift circuit according to claim 1, wherein the output terminal is electrically coupled to the second electrode.   13. The level shift circuit according to claim 12, wherein the current compensation circuit causes a current corresponding to the leakage current to flow from the output electrode to the ground node when a temperature of the transistor exceeds a predetermined threshold value. The current compensation circuit is:
A switch coupled to the ground node and operating according to a signal from the temperature detection circuit;
The level shift circuit of claim 13, further comprising a fourth resistor coupled to the second electrode and the switch.   The level shift circuit according to claim 14, wherein a resistance value of the fourth resistor is smaller than a resistance value of the third resistor. A second constant current source coupled to the second electrode and the ground node;
The transistor is a PMOSFET in which the control electrode and the first electrode are connected,
The level shift circuit according to claim 1, wherein the output terminal is electrically coupled to the second electrode.   The level shift circuit according to claim 16, wherein the current compensation circuit causes a current corresponding to the leakage current to flow from the output electrode to the ground node when a temperature of the transistor exceeds a predetermined threshold value. The current compensation circuit is:
A switch coupled to the ground node and operating according to a signal from the temperature detection circuit;
The level shift circuit of claim 17, further comprising a fourth resistor coupled to the second electrode and the switch.   The level shift circuit according to claim 12, further comprising an inverter coupled to the second electrode and the output terminal.   The level shift circuit according to any one of claims 12 to 18, wherein the current compensation circuit increases a current flowing to the ground node as a temperature of the transistor increases.   The current compensation circuit further includes a variable current source configured to change a magnitude of a current flowing from the output terminal to the ground node in accordance with a temperature level signal from the temperature detection circuit. The level shift circuit described.   The electronic device carrying the level shift circuit of any one of Claims 1-21.   An integrated circuit in which the level shift circuit according to any one of claims 1 to 21 is integrated.

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