JP2017009845A - Electro-optic device, method for driving electro-optic device, and electronic apparatus - Google Patents

Abstract

To suppress the occurrence of disclination.
A first pixel including a first pixel electrode and a first counter electrode, and a second pixel electrode and a second counter electrode are arranged in at least one of a column direction and a row direction with respect to the first pixel. A counter electrode voltage supply unit that supplies a first voltage and a second voltage to the counter electrode 108A and the counter electrode 108B, respectively, and a pixel electrode 118A and a pixel electrode 118B to the first pixel and the second pixel, respectively. And a counter electrode voltage supply unit that detects a difference in potential between the first voltage and the second voltage for each writing period to the first pixel and the second pixel. Is set to a voltage value that is ½ or less of the maximum potential difference between the voltage supplied to the counter electrode 108A and the voltage supplied to the counter electrode 108A. And also set to different values to either voltage value.
[Selection] Figure 7

Description

  The present invention relates to a technique for suppressing the occurrence of disclination.

  In a liquid crystal panel, due to a potential difference between adjacent pixels, an electric field that should go from the pixel electrode to the counter electrode (or the opposite direction) generates a lateral electric field in the direction of the adjacent pixel electrode, and the liquid crystal molecules Disclination may occur in a direction different from the intended orientation direction. The occurrence of disclination causes the display quality of the liquid crystal panel to deteriorate. Patent Document 1 discloses a technique for suppressing the occurrence of disclination.

JP 2009-25417 A

By the way, if the display data of one or both of these pixels is corrected so as to reduce the difference in applied voltage between the pixels where the lateral electric field becomes strong, the lateral electric field becomes weak and the occurrence of disclination is suppressed. It is done. However, if the change in the applied voltage is increased in order to reduce the potential difference between the pixels, the change in the display contents accompanying the voltage change is easily recognized by the user, and another problem of display contradiction occurs. Sometimes.
The present invention has been made in view of the above-described circumstances, and an object thereof is to suppress the occurrence of disclination.

  In order to solve the above-described problem, one embodiment of the present invention includes a first pixel including a first pixel electrode and a first counter electrode, and arranged in at least one of a column direction and a row direction with respect to the first pixel. A second pixel including a second pixel electrode and a second counter electrode; a counter electrode voltage supply unit for supplying a first voltage and a second voltage to the first counter electrode and the second counter electrode; and the first pixel. An image signal supply unit that supplies image signals corresponding to the first pixel and the second pixel to the electrode and the second pixel electrode, respectively, and the counter electrode voltage supply unit includes the first pixel and the second pixel. As a voltage value of the first voltage and the second voltage for each writing period, a potential difference between the first voltage and the second voltage is applied to the voltage supplied to the first pixel electrode and the first counter electrode. 1 / of the maximum potential difference from the supplied voltage Set the voltage value that is less, for each of the write period, and sets a different value of at least one of the voltage value of the first voltage and the second voltage.

  According to the aspect, for example, a voltage that maximizes the potential difference is supplied to the first pixel electrode and the first counter electrode in the first pixel, and the second pixel is arranged in at least one of the column direction and the row direction with respect to the first pixel. In the pixel, if a voltage that is ½ or less of the maximum potential difference is supplied to the second pixel electrode and the second counter electrode, the voltage is supplied to the first counter electrode and the second counter electrode. Since the potential difference between the second voltage and the voltage supplied to the first pixel electrode and the voltage supplied to the second pixel electrode is less than 1/2 of the maximum potential difference. 2 or less, suppressing the occurrence of disclination.

  In one aspect of the electro-optical device described above, one image forming period is formed in the plurality of writing periods, and the counter electrode voltage supply unit is configured to supply the first voltage and the second voltage in the one image forming period. A ternary voltage value may be used as the value. In this case, the direction of the electric field between the first pixel electrode and the first counter electrode and the direction of the electric field between the second pixel electrode and the second counter electrode, that is, supplied to the first pixel and the second pixel. Even when the polarity of the voltage to be switched is changed for each writing period, ternary voltage values are used as the voltage values of the first voltage and the second voltage within one image forming period. The potential difference between the voltage supplied to the one pixel electrode and the voltage supplied to the second pixel electrode can be easily reduced to ½ or less of the maximum potential difference, thereby suppressing the occurrence of disclination.

  In one aspect of the electro-optical device described above, a plurality of the first pixels and the second pixels may be alternately provided in a checkered pattern. In this case, in both the row direction and the column direction, the voltage values of the first voltage and the second voltage for each writing period to the first pixel and the second pixel are voltages supplied to the first pixel electrode. And a voltage value that is equal to or less than ½ of the maximum potential difference between the voltage supplied to the first counter electrode and the first counter electrode. Therefore, in both the row direction and the column direction, the potential difference between the voltage supplied to the first pixel electrode and the voltage supplied to the second pixel electrode can be easily reduced to ½ or less of the maximum potential difference. Reduce the occurrence of disclinations.

  In one aspect of the electro-optical device described above, each of the plurality of first pixels and the second pixels is arranged in a line shape in a row direction or a column direction, and the line of the first pixel and the line of the second pixel May be provided alternately. In this case, in the row direction or the column direction, the voltage values of the first voltage and the second voltage for each writing period to the first pixel and the second pixel are first opposed to the voltage supplied to the first pixel electrode. A voltage value that is ½ or less of the maximum potential difference from the voltage supplied to the electrode is set. Therefore, in the row direction or the column direction, the potential difference between the voltage supplied to the first pixel electrode and the voltage supplied to the second pixel electrode can be easily reduced to ½ or less of the maximum potential difference. Reduce the occurrence.

  An electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention. Such an electronic device can improve image quality by suppressing the occurrence of disclination in a display device such as a liquid crystal display.

  According to one aspect of the driving method of the electro-optical device according to the invention, the first pixel including the first pixel electrode and the first counter electrode, and the first pixel are arranged in at least one of the column direction and the row direction. A driving method of an electro-optical device including a two-pixel electrode and a second pixel including a second counter electrode, wherein a first voltage and a second voltage are supplied to the first counter electrode and the second counter electrode, respectively. When the image signal corresponding to the first pixel and the second pixel is supplied to the first pixel electrode and the second pixel electrode, respectively, and the first voltage and the second voltage are supplied, the first pixel and the second pixel are supplied. As a voltage value of the first voltage and the second voltage for each writing period to the pixel, a potential difference between the first voltage and the second voltage is a voltage supplied to the first pixel electrode and the first counter electrode. 1 / of the maximum potential difference from the voltage supplied to Set the voltage value that is less, for each of the write period, and sets a different value of at least one of the voltage value of the first voltage and the second voltage.

1 is a block diagram illustrating a configuration of an electro-optical device according to a first embodiment of the invention. FIG. It is a figure which shows the structure of the liquid crystal panel of an electro-optical apparatus. It is a circuit diagram which shows the structure of a pixel. It is a figure which shows arrangement | positioning of a counter electrode. It is a figure explaining the connection of a counter electrode and a counter power supply line. It is a figure explaining the connection of a pixel electrode and a scanning line. 6 is a timing chart showing the operation of the electro-optical device. It is a figure which shows the electric potential difference of a counter electrode and the electric potential difference of a pixel electrode at the time of performing white display in both the pixel of the 1st row | line | column and the 1st row | line 2nd column pixel. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing white color display in the pixel of 1st row | line | column and 1st row | line and 2nd column pixel. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing a neutral color display in the pixel of 1st row | line and 1st column, and performing white display in the pixel of 1st row | line and 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing intermediate color display in both the pixel of 1st row | line 1st column and the pixel of 1st row | line 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing a white display in the pixel of the 1st row | line | column and the black display in the pixel of the 1st row | line and the 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing black display in the pixel of the 1st row and 1st column, and performing white display in the pixel of 1st row and 2nd column. It is a figure which shows the electric potential difference of a counter electrode and the electric potential difference of a pixel electrode at the time of performing black display in both the pixel of the 1st row | line 1st column and the pixel of 1st row | line 2nd column. In the display area of 8 rows × 6 columns from the first row, the first column to the eighth row, the sixth column, the third row, the second column to the third row, the fifth column, and the fourth row, the second column to the fourth row, the fourth row. It is a figure which shows the voltage value of the common voltage applied to the counter electrode in the 1st field at the time of performing intermediate color display for the pixels up to 5 columns, and performing the white display for the other pixels. FIG. 16 is a diagram showing voltage values of image signals applied to pixel electrodes in the first field in the case of FIG. 15. It is a figure which shows the electric potential difference between the counter electrodes in the row direction and column direction in the case of FIG. It is a figure which shows the electric potential difference between the pixel electrodes in the row direction and column direction in the case of FIG. It is a figure which shows the voltage value of the common voltage applied to the counter electrode in the 2nd field in the case of FIG. FIG. 16 is a diagram illustrating a voltage value of an image signal applied to a pixel electrode in a second field in the case of FIG. 15. It is a figure which shows the electric potential difference between the counter electrodes in the row direction and column direction in the case of FIG. FIG. 21 is a diagram illustrating a potential difference between pixel electrodes in the row direction and the column direction in the case of FIG. 20. It is a figure which shows the voltage value of the common voltage applied to the counter electrode in the 3rd field in the case of FIG. FIG. 16 is a diagram illustrating a voltage value of an image signal applied to a pixel electrode in a third field in the case of FIG. 15. It is a figure which shows the electric potential difference between the counter electrodes in the row direction and column direction in the case of FIG. FIG. 25 is a diagram illustrating a potential difference between pixel electrodes in the row direction and the column direction in the case of FIG. 24. It is a figure which shows the voltage value of the common voltage applied to the counter electrode in the 4th field in the case of FIG. FIG. 16 is a diagram showing voltage values of image signals applied to pixel electrodes in a fourth field in the case of FIG. 15. It is a figure which shows the electric potential difference between the counter electrodes in the row direction and column direction in the case of FIG. It is a figure which shows the electric potential difference between the pixel electrodes in the row direction and column direction in the case of FIG. FIG. 11 is a diagram showing a potential difference between counter electrodes and a potential difference between pixel electrodes in the second field of FIG. 9 and a potential difference between counter electrodes and a potential difference between pixel electrodes in the second field of FIG. It is a figure which shows the relationship between the ratio of the electrical potential difference between adjacent pixels with respect to a full range, and a domain amount. It is a figure which shows the position of the pixel of a holding state. It is a figure which shows the voltage value of the gate-source voltage and the drain-source voltage in each field of the pixel connected to the signal line 114-1 among the pixels in the holding state shown in FIG. It is a figure which shows the voltage value of the gate-source voltage and the drain-source voltage in each field of the pixel connected to the signal line 114-2 among the pixels in the holding state shown in FIG. 12 is a timing chart illustrating an operation of the electro-optical device according to the second embodiment. It is a figure which shows the electric potential difference of a counter electrode and the electric potential difference of a pixel electrode at the time of performing white display in both the pixel of the 1st row | line | column and the 1st row | line 2nd column pixel. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing white color display in the pixel of 1st row | line | column and 1st row | line and 2nd column pixel. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing a neutral color display in the pixel of 1st row | line and 1st column, and performing white display in the pixel of 1st row | line and 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing intermediate color display in both the pixel of 1st row | line 1st column and the pixel of 1st row | line 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing a white display in the pixel of the 1st row | line | column and the black display in the pixel of the 1st row | line and the 2nd column. It is a figure which shows the electrical potential difference of a counter electrode, and the electrical potential difference of a pixel electrode at the time of performing black display in the pixel of the 1st row and 1st column, and performing white display in the pixel of 1st row and 2nd column. It is a figure which shows the electric potential difference of a counter electrode and the electric potential difference of a pixel electrode at the time of performing black display in both the pixel of the 1st row | line 1st column and the pixel of 1st row | line 2nd column. It is a figure which shows the voltage value of the gate-source voltage and the drain-source voltage in each field of the pixel connected to the signal line 114-1 among the pixels in the holding state shown in FIG. It is a figure which shows the voltage value of the gate-source voltage and the drain-source voltage in each field of the pixel connected to the signal line 114-2 among the pixels in the holding state shown in FIG. It is explanatory drawing which shows the other example of an electronic device. It is explanatory drawing which shows the other example of an electronic device. It is explanatory drawing which shows an example of an electronic device. It is a figure which shows the voltage value of the gate-source voltage and the drain-source voltage in a comparative example.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 is a block diagram illustrating an overall configuration of the electro-optical device according to the first embodiment. As shown in FIG. 1, the configuration of the electro-optical device 1 includes a timing control circuit 10, a liquid crystal panel 100, and a display control circuit 20.
The timing control circuit 10 generates various control signals and controls each part of the electro-optical device 1 in synchronization with a synchronization signal Sync given from a host device (not shown). The display control circuit 20 controls the display of the electro-optical device 1. Input display data Da-in is input to the display control circuit 20 from an external device in synchronization with the synchronization signal Sync.
The input display data Da-in is digital data that designates the gradation level of each pixel of a plurality of pixels (a display area 101 described later) included in the liquid crystal panel 100. The gradation level is a parameter that defines the brightness level of the pixel. Here, the input display data Da-in is 8 bits, and the gradation level to be expressed by the pixel is 256 gradations in increments of “1” from the darkest “0” to the brightest “255”. It is specified.
The input display data Da-in is supplied in the scanning order according to the vertical scanning signal, horizontal scanning signal, and dot clock signal (all not shown) included in the synchronization signal Sync. The display control circuit 20 processes the input display data Da-in and outputs the display data Da-out to the liquid crystal panel 100.
The liquid crystal panel 100 is, for example, an active matrix display device (display unit) in which each pixel is driven by a switching element such as a transistor. The liquid crystal panel 100 displays an image based on the display data Da-out supplied from the display control circuit 20.
The input display data Da-in designates the gradation level of each pixel (pixel 110 described later) of the liquid crystal panel 100, but the applied voltage of the liquid crystal element is determined according to the gradation level. The data Da-in can be said to specify the voltage applied to the liquid crystal element.

FIG. 2 is a diagram illustrating a configuration of the liquid crystal panel 100. As shown in FIG. 1, in a display area 101 on the liquid crystal panel 100 where an image is displayed, m rows of scanning lines 112 extending in the X direction and n extending in the Y direction and orthogonal to the scanning lines 112. Column signal lines 114 are formed (m and n are natural numbers). Each signal line 114 and each scanning line 112 are provided so as to be electrically insulated from each other. The pixels 110 are provided corresponding to the intersections of the m rows of scanning lines 112 and the n columns of signal lines 114, respectively. Therefore, in this embodiment, in the display area 101, the pixels 110 are arranged in a matrix with m rows × n columns.
Around the display area 101, a scanning line driving circuit 130 and a signal line driving circuit 140 are arranged. The scanning line driving circuit 130 selects the scanning line 112 specified by the selection signal Yctr supplied from the timing control circuit 10. The scanning line driving circuit 130 sets the scanning signal for the selected scanning line 112 to the H level corresponding to the selection voltage, while setting the scanning signal for the other scanning lines 112 to the L level corresponding to the non-selection voltage.
The signal line driving circuit 140 drives the pixel 110 by a so-called voltage modulation method based on the display data Da-out. Specifically, the signal line driving circuit 140 applies voltage data corresponding to the display data Da-out to the signal lines 114 in the first to nth columns according to the selection signal Xctr supplied from the timing control circuit 10. Supply the signal.
An image display period required to display one frame of an image by driving the liquid crystal panel 100 is called a frame. For example, when the frequency of the vertical scanning signal included in the synchronization signal Sync is 60 Hz, the period is 16.7 milliseconds which is the reciprocal thereof.
The driving circuit in the electro-optical device 1 is realized by the cooperation of the scanning line driving circuit 130 and the signal line driving circuit 140 having the above configuration.
The pixel 110 has a liquid crystal element in which a liquid crystal is sandwiched between a pixel electrode and a counter electrode, and a data signal supplied to the signal line 114 is applied to the pixel electrode when the scanning line 112 is selected. .

FIG. 3 is a diagram illustrating an equivalent circuit of the pixel 110. As shown in FIG. 3, the pixel 110 corresponds to the intersection of the scanning line 112 and the signal line 114, and includes the first pixel electrode 118A and the first counter electrode 108A, or the second pixel electrode 118B and the second pixel electrode. In this configuration, the liquid crystal element 120 sandwiching the liquid crystal 105 is arranged between the counter electrode 108B. A COM power line 117A is connected to the first counter electrode 108A, and a COM power line 117B is connected to the second counter electrode 108B. As described above, in the present embodiment, the counter electrode is configured by two systems of the first counter electrode 108A and the second counter electrode 108B. Details will be described later.
In the equivalent circuit of the pixel 110, an auxiliary capacitor (storage capacitor) 125 is provided in parallel with the liquid crystal element 120. The auxiliary capacitor 125 has one end connected to the first pixel electrode 118 </ b> A or the second pixel electrode 118 </ b> B and the other end commonly connected to the capacitor line 115. The capacitor line 115 is maintained at a constant voltage over time.
Here, when the scanning line 112 becomes H level, the TFT 116 whose gate electrode is connected to the scanning line is turned on, and the first pixel electrode 118A or the second pixel electrode 118B is connected to the signal line 114. Therefore, when a data signal having a voltage corresponding to the gradation is supplied to the signal line 114 when the scanning line 112 is at the H level, the data signal is supplied to the first pixel via the turned-on TFT 116. The voltage is supplied to the electrode 118A or the second pixel electrode 118B. When the scanning line 112 becomes L level, the TFT 116 is turned off, but the voltage applied to the first pixel electrode 118A or the second pixel electrode 118B is held by the capacitive element of the liquid crystal element 120 and the auxiliary capacitor 125.
In the liquid crystal element 120, the molecular orientation state of the liquid crystal 105 changes according to the electric field generated by the first pixel electrode 118A and the first counter electrode 108A, or the second pixel electrode 118B and the second counter electrode 108B. For this reason, if the liquid crystal element 120 is a transmission type, it has a transmittance corresponding to the applied / holding voltage. In the liquid crystal panel 100, since the transmittance varies for each liquid crystal element 120, each of the pixels 110 includes the liquid crystal element 120.
In this embodiment, the liquid crystal 105 is a VA (Vertical Alignment) method, and is a normally black mode in which the liquid crystal element 120 is in a black state when no voltage is applied.

As shown in FIG. 4, the counter electrode 108 of the present embodiment is divided into two systems, a first counter electrode 108A and a second counter electrode 108B. As an example, in the present embodiment, the first counter electrode 108A and the second counter electrode 108B are alternately arranged in a row direction and a column direction in a checkered pattern.
As shown in FIG. 5, the first counter electrode 108A and the second counter electrode 108B are connected to the common power supply line 117A and the common power supply line 117B through the through hole 109A and the through hole 109B, respectively. The common voltage COM1 as the first voltage is supplied to the counter electrode 108A via the common power line 117A. Further, the common voltage COM2 as the second voltage is supplied to the counter electrode 108B through the common power line 117B.
The voltage values of the common voltage COM1 and the common voltage COM2 are not fixed voltage values, but ternary voltage values are switched for each field as a writing period. As an example, in the present embodiment, the three voltage values of 5.75 V, 7.00 V, and 8.25 V are switched for each field as the common voltage COM1 and the common voltage COM2, and the first counter electrode 108A The voltage is applied to the second counter electrode 108B.
The common voltage COM1 and the common voltage COM2 are set to have different voltage values in each field, and the potential difference between the common voltage COM1 and the common voltage COM2 is set to 1.25 V in each field. In the present embodiment, since the full range potential difference, which is the maximum potential difference between the counter electrode 108 and the pixel electrode 118, is 5.00 V, the potential difference 1.25 V between the common voltage COM1 and the common voltage COM2 is 25% of the full range potential difference. Become.
In the present embodiment, the common voltage COM1 is switched in the order of 7.00V, 8.25V, 7.00V, and 5.75V for each field, and the common voltage COM2 is 5.75V, 7.75V for each field. It is switched in the order of 00V, 8.25V, 7.00V.

In order to prevent the deterioration of the liquid crystal 105, it is a principle that the pixel capacitance is AC driven. However, when the liquid crystal element 120 is AC driven, the amplitude when the pixel is driven to express a certain gradation level. Two types are available: positive polarity with the pixel electrode voltage on the higher side relative to the common voltage as the center voltage, and negative polarity with the pixel electrode voltage on the lower side with respect to the common voltage as the amplitude center voltage. Necessary.
For the voltages of the embodiments, except for the voltage applied to the liquid crystal element 120, the ground potential not shown is used as a reference for zero voltage unless otherwise specified. The applied voltage of the liquid crystal element 120 is a potential difference between the common voltage COM of the counter electrode 108 and the voltage of the pixel electrode 118. When the liquid crystal element 120 holds a voltage corresponding to the gradation level and the writing polarity is positive, the potential of the pixel electrode 118 becomes higher than the common voltage COM of the counter electrode 108 and the writing polarity is negative. In the case of the characteristic, the potential of the pixel electrode 118 is lower than the voltage COM of the counter electrode 108.
In the present embodiment, as shown in FIG. 6, the first pixel electrode 118A is disposed opposite to the position facing the first counter electrode 108A, and the second pixel electrode 118B is positioned opposite to the second counter electrode 108B. Be placed. The common voltage COM1 and the common voltage COM2 are set to different voltage values so as to have a potential difference of 1.25 V in each field, and are switched so as to have any one of three voltage values for each field. Therefore, even if the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are the same gradation, depending on the voltage value of the common voltage COM1 or the common voltage COM2, either positive or negative Different voltage values are set according to the write polarity set.

Next, as an example, an 8 × 6 pixel liquid crystal panel in which 8 pixels are arranged in the X direction (column direction) and 6 pixels in the Y direction (row direction), white display, gray display that is halftone, and A voltage value of the pixel electrode 118A and the pixel electrode 118B when black display is performed will be described. In the following description, the same image is displayed in one frame period (one image display period). Further, the pixel electrode potential of the gray display pixel is not limited to 2.5 V with respect to the counter electrode, and can take an 8-bit gradation potential.
FIG. 7 is a timing chart of this operation example. In FIG. 7, the voltages of the counter electrodes are indicated as H, M, and L. H corresponds to 8.25V, M corresponds to 7.00V, and L corresponds to 5.75V. In addition, the timing chart in FIG. 7 illustrates an operation example of pixels connected to the signal line 114-1 and the signal line 114-2 in the region R1 in FIG.
FIG. 8 corresponds to a pixel corresponding to the first counter electrode 108A (for example, a pixel in the first row and the first column) and a second counter electrode 108B (for example, a pixel in the first row and the second column) adjacent to the pixel. It is a figure which shows the voltage value of the common voltage COM1 and the common voltage COM2, and the voltage value of the 1st pixel electrode 118A and the 2nd pixel electrode 118B in the case where all display white in a pixel. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is a positive first pattern (hereinafter referred to as positive polarity 1), the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, and the voltage of the first pixel electrode 118A is The voltage of 12.00V and the second pixel electrode 118B is set to 10.75V.
The second field is a negative second pattern (hereinafter referred to as negative polarity 2), the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, and the voltage of the first pixel electrode 118A is The voltage of 3.25V and the second pixel electrode 118B is set to 2.00V.
The third field is a negative first pattern (hereinafter referred to as negative polarity 1), the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, and the voltage of the first pixel electrode 118A is The voltage of 2.00V and the second pixel electrode 118B is set to 3.25V.
The fourth field is a positive second pattern (hereinafter referred to as positive polarity 2), the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, and the voltage of the first pixel electrode 118A is The voltage of 10.75V and the second pixel electrode 118B is set to 12.00V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is also any case. Is also 1.25V.

FIG. 9 shows common voltage COM1 and common voltage COM2 in the case where white is displayed on the pixel corresponding to the first counter electrode 108A and intermediate gray is displayed on the pixel corresponding to the second counter electrode 108B adjacent to the pixel. FIG. 6 is a diagram illustrating the voltage values of the first pixel electrode 118A and the second pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 12.00V, and the voltage of the second pixel electrode 118B is Set to 8.25V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 3.25V, and the voltage of the second pixel electrode 118B is Set to 4.50V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 2.00V, and the voltage of the second pixel electrode 118B is Set to 5.75V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 10.75V, and the voltage of the second pixel electrode 118B is 9. Set to 50V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is positive. 1 is 3.75 V, negative polarity 2 is 1.25 V, negative polarity 1 is 3.75 V, and positive polarity 2 is 1.25 V.

FIG. 10 shows the common voltage COM1 and the common voltage COM2 in the case where the gray corresponding to the first counter electrode 108A is displayed in gray and the white corresponding to the second counter electrode 108B adjacent to the pixel is displayed in white. It is a figure which shows a voltage value and the voltage value of 118 A of 1st pixel electrodes, and the 2nd pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 9.50V, and the voltage of the second pixel electrode 118B is It is set to 10.75V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 5.75V, and the voltage of the second pixel electrode 118B is Set to 2.00V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 4.50V, and the voltage of the second pixel electrode 118B is 3. Set to 25V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 8.25V, and the voltage of the second pixel electrode 118B is Set to 12.00V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is positive. 1 is 1.25 V, negative polarity 2 is 3.75 V, negative polarity 1 is 1.25 V, and positive polarity 2 is 3.75 V.

FIG. 11 shows the common voltage COM1 and the common voltage COM2 when the gray corresponding to the first counter electrode 108A and the pixel corresponding to the second counter electrode 108B adjacent to the pixel are both displayed in gray. It is a figure which shows a voltage value and the voltage value of 118 A of 1st pixel electrodes, and the 1st pixel electrode. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 9.50V, and the voltage of the second pixel electrode 118B is Set to 8.25V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 5.75V, and the voltage of the second pixel electrode 118B is Set to 4.50V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 4.50V, and the voltage of the second pixel electrode 118B is Set to 5.75V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 8.25V, and the voltage of the second pixel electrode 118B is 9. Set to 50V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is also any case. Is also 1.25V.

FIG. 12 shows the voltage values of the common voltage COM1 and the common voltage COM2 when displaying white in the pixel corresponding to the first counter electrode 108A and displaying black in the pixel corresponding to the second counter electrode 108B adjacent to the pixel. FIG. 6 is a diagram illustrating voltage values of the first pixel electrode 118A and the second pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 12.00V, and the voltage of the second pixel electrode 118B is Set to 5.75V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 3.25V, and the voltage of the second pixel electrode 118B is Set to 7.00V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 2.00V, and the voltage of the second pixel electrode 118B is Set to 8.25V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 10.75V, and the voltage of the second pixel electrode 118B is Set to 7.00V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is positive. It is 6.25 V in 1, 3.75 V in negative polarity 2, 6.25 V in negative polarity 1, and 3.75 V in positive polarity 2.

FIG. 13 shows the voltage values of the common voltage COM1 and the common voltage COM2 when displaying black in the pixel corresponding to the first counter electrode 108A and displaying white in the pixel corresponding to the second counter electrode 108B adjacent to the pixel. FIG. 6 is a diagram illustrating voltage values of the first pixel electrode 118A and the second pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 7.00V, and the voltage of the second pixel electrode 118B is It is set to 10.75V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 8.25V, and the voltage of the second pixel electrode 118B is Set to 2.00V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 7.00V, and the voltage of the second pixel electrode 118B is 3. Set to 25V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 5.75V, and the voltage of the second pixel electrode 118B is Set to 12.00V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is positive. In Example 1, the voltage is 3.75 V, in negative electrode 2 is 6.25 V, in negative electrode 1 is 3.75 V, and in positive electrode 2 is 6.25 V.

FIG. 14 shows the common voltage COM1 and the common voltage COM2 when the gray corresponding to the first counter electrode 108A and the pixel corresponding to the second counter electrode 108B adjacent to the pixel are both displayed in gray. It is a figure which shows a voltage value and the voltage value of 118 A of 1st pixel electrodes, and the 2nd pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.
The first field is positive polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 5.75V, the voltage of the first pixel electrode 118A is 7.00V, and the voltage of the second pixel electrode 118B is Set to 5.75V.
The second field is negative polarity 2, the common voltage COM1 is set to 8.25V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 8.25V, and the voltage of the second pixel electrode 118B is Set to 7.00V.
The third field is negative polarity 1, the common voltage COM1 is set to 7.00V, the common voltage COM2 is set to 8.25V, the voltage of the first pixel electrode 118A is 7.00V, and the voltage of the second pixel electrode 118B is Set to 8.25V.
The fourth field is positive polarity 2, the common voltage COM1 is set to 5.75V, the common voltage COM2 is set to 7.00V, the voltage of the first pixel electrode 118A is 5.75V, and the voltage of the second pixel electrode 118B is Set to 7.00V.
In this case, the potential difference between the adjacent first counter electrode 108A and the second counter electrode 108B is 1.25 V in any case, and the potential difference between the adjacent first pixel electrode 118A and the second pixel electrode 118B is also any case. Is also 1.25V.

  FIG. 15 shows pixels from the third row and second column to the third row and seventh column, and from the fourth row and second column to the fourth row and seventh column. It is a figure which shows the voltage value of the common voltage COM1 in the positive polarity 1, and the common voltage COM2 when displaying gray of intermediate color and displaying white in another pixel. FIG. 16 is a diagram showing voltage values of the first pixel electrode 118A and the second pixel electrode 118B in the case of FIG. FIG. 17 is a diagram illustrating a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the column direction (X direction) in the case of FIG. FIG. 18 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the row direction (Y direction) in the case of FIG.

  FIG. 19 is a diagram illustrating the voltage values of the common voltage COM1 and the common voltage COM2 in the negative polarity 2 of the display example illustrated in FIG. FIG. 20 is a diagram illustrating voltage values of the first pixel electrode 118A and the second pixel electrode 118B in the case of FIG. FIG. 21 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the column direction (X direction) in the case of FIG. FIG. 22 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the row direction (Y direction) in the case of FIG.

  FIG. 23 is a diagram illustrating voltage values of the common voltage COM1 and the common voltage COM2 in the negative polarity 1 of the display example illustrated in FIG. FIG. 24 is a diagram illustrating voltage values of the first pixel electrode 118A and the second pixel electrode 118B in the case of FIG. FIG. 25 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the column direction (X direction) in the case of FIG. FIG. 26 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the row direction (Y direction) in the case of FIG.

  FIG. 27 is a diagram illustrating voltage values of the common voltage COM1 and the common voltage COM2 in the positive polarity 2 of the display example illustrated in FIG. FIG. 28 is a diagram showing voltage values of the first pixel electrode 118A and the second pixel electrode 118B in the case of FIG. FIG. 29 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the column direction (X direction) in the case of FIG. FIG. 30 is a diagram showing a potential difference between the first pixel electrode 118A and the second pixel electrode 118B adjacent in the row direction (Y direction) in the case of FIG.

Consider a case where the display color combination of the pixel corresponding to the first counter electrode 108A and the pixel corresponding to the second counter electrode 108B adjacent to the pixel is white, which is gray, which is an intermediate color. In this case, as shown in FIG. 31, the state in which the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 1.25 V (hereinafter referred to as state 1), the first pixel electrode 118A, and the second pixel electrode 118A It can be seen that there is a state where the potential difference of the pixel electrode 118B is 3.75 V (hereinafter referred to as state 2). For example, in the positive polarity region R3 shown in FIG. 16, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 3.75 V, and in the region R4, the first pixel electrode 118A and the second pixel electrode 118B The potential difference is 1.25V. In the negative-polarity 2 region R3 shown in FIG. 20, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 1.25 V, and in the region R4, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 3.75V. In the negative polarity 1 region R3 shown in FIG. 24, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 3.75 V, and in the region R4, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 1.25V. In the negative polarity 1 region R3 shown in FIG. 28, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 1.25 V, and in the region R4, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 3.75V.
As shown in FIG. 32, in the case of a combination in which white is displayed on the pixel corresponding to the first counter electrode 108A and gray that is an intermediate color is displayed on the pixel corresponding to the second counter electrode 108B adjacent to the pixel (FIG. 9). In the case of positive polarity 1, state 2, negative polarity 2 is state 1, negative polarity 1 is state 2, and positive polarity 2 is state 1. State 1 and state 2 occur the same number of times in one frame. In the case of a combination in which gray corresponding to the first color is displayed on the pixel corresponding to the first counter electrode 108A and white is displayed on the pixel corresponding to the second counter electrode 108B adjacent to the pixel (see FIG. 10), State 1 is positive, state 1 is negative 2, state 2 is negative 1, state 1 is negative 1, state 2 is positive 2, and state 1 and state 2 are generated the same number of times in one frame.

The first pixel electrode 118A and the second pixel electrode 118B when the combination of display colors of the pixel corresponding to the first counter electrode 108A and the pixel corresponding to the second counter electrode 108B adjacent to the pixel is white and black. Is 5.00 V, and this case is 100%. In the conventional example in which the common voltage COM is fixed at 7.00 V, when the second pixel electrode 118B of the pixel displaying white is 2.00 V, for example, the voltage of the first pixel electrode 118A of the pixel displaying intermediate gray is 4 .50V, and the potential difference between the second pixel electrode 118B and the first pixel electrode 118A is 2.50V. This potential difference of 2.50 V is 50% when 5.00 V when the display color is white and black is 100%.
On the other hand, in the state 1, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 1.25V, which is 25% with respect to 5.00V when the display color is white and black. In the case of the state 2, the potential difference between the first pixel electrode 118A and the second pixel electrode 118B is 3.75V, which is 75% with respect to 5.00V when the display color is white and black.

  The domain amount increases after the ratio of the potential difference between adjacent pixels to the full range (5.00 V) exceeds 25%, and increases nonlinearly as shown by a curve shown in FIG. In the present embodiment, when the display color is a combination of white and gray which is an intermediate color, since the state 1 and the state 2 are alternately repeated as described above, the effective value of the domain amount has the ratio of 25%. Is the average value of the domain amount when the ratio is 75%, and the domain amount when the ratio is 50% of the ratio when the display color of the conventional example is a combination of white and intermediate gray. It turns out that it is improved.

  As described above, according to this embodiment, two systems of counter electrodes are arranged in a checkered pattern, the common voltage applied to each counter electrode is switched for each field, and the potential difference between adjacent counter electrodes is 1 Since it is set to .25 V, the domain amount can be reduced by the time integration value as compared with the conventional example.

  Further, according to the present embodiment, since the image signal is written continuously for two fields in both the positive polarity and the negative polarity, the vertical crosstalk on the lower side of the screen can be reduced. For example, in the case where a part of the area is displayed in white on a gray background, the area below the part of the window is white in the period where the positive polarity is continuous for two fields. In the two-field period from shake, positive polarity to negative polarity, or from negative polarity to positive polarity, the black side swings. Therefore, it is canceled by time integration, and the vertical crosstalk on the lower side of the window-like partial region can be reduced as compared with the conventional driving.

Furthermore, according to this embodiment, flicker can be reduced as the applied voltage of the signal line changes. Hereinafter, the reduction of the flicker will be described.
34 and 35 are diagrams showing the potential of the pixel in the holding state in the region R5 surrounded by the dotted line shown in FIG. 33 at the moment when the signal line 114-1 or the signal line 114-2 shown in FIG. 33 is selected. It is.
FIG. 49 is a diagram showing the potential of the pixel in the holding state in the conventional comparative example in which a fixed COM voltage is applied to the counter electrode 108. If positive polarity writing is performed in the immediately preceding field, the voltage of the counter electrode 108 is 7.00 V, and therefore the voltage of the pixel electrode 118 is held at 9.50 V as shown in FIG. If negative polarity writing is performed in the next field, a voltage of 4.50 V is supplied to the signal line 114 in this state. Therefore, at this moment, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 5.00 V.
Similarly, if negative polarity writing is performed in the immediately preceding field, the voltage of the counter electrode 108 is 7.00 V, so the voltage of the pixel electrode is held at 4.50 V as shown in FIG. If positive polarity writing is performed in the next field, a voltage of 9.50 V is supplied to the signal line 114 in this state. Therefore, at this moment, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 5.00 V.
Therefore, in this embodiment, when the gate-source voltage Vgs or the drain-source voltage Vds is lower than that of the comparative example, the off-leak current of the active element is reduced and flicker is reduced. Hereinafter, the gate-source voltage Vgs and the drain-source voltage Vds of the pixel in the hold state according to the present embodiment will be described.

34 and 35 are diagrams showing the potential of the pixel in the holding state in the region R5 surrounded by the dotted line shown in FIG. 33 at the moment when the signal line 114-1 or the signal line 114-2 is selected. The display will be described on the assumption that halftone gray that is easy to visually recognize flicker is displayed. That is, the potential difference between the first counter electrode 108A and the first pixel electrode 118A, and the second counter electrode 108B and the second pixel electrode 118B is 2.50V.
As shown in FIG. 34, in the pixel connected to the signal line 114-1 and corresponding to the first counter electrode 108A, the COM voltage of the first counter electrode 108A is 7.00 V immediately before the writing of the first field, The voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −9.50 V, and the drain-source voltage Vds is 0 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the first counter electrode 108A is 8.25V, and the voltage of the first pixel electrode 118A is 10.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −5.75 V and the drain-source voltage Vds is 5.0 V. The gate-source voltage Vgs is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the third field, the COM voltage of the first counter electrode 108A is 7.00V, and the voltage of the first pixel electrode 118A is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Accordingly, the gate-source voltage Vgs is −5.75 V and the drain-source voltage Vds is 5.0 V, both of which are lower than those of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the first counter electrode 108A is 5.75V, and the voltage of the first pixel electrode 118A is 3.25V in order to hold the potential difference of 2.50V. A voltage of 8.25 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −3.25 V, and the drain-source voltage Vds is 5.0 V. In this case, the gate-source voltage Vgs is higher than that in the comparative example.

As shown in FIG. 34, in the pixel connected to the signal line 114-1 and corresponding to the second counter electrode 108B, the COM voltage of the second counter electrode 108B is 5.75 V immediately before writing in the first field, The voltage of the second pixel electrode 118B is 8.25V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 1.25 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 9.50V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −5.75 V, and the drain-source voltage Vds is 3.75 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the third field, the COM voltage of the second counter electrode 108B is 8.25V, and the voltage of the second pixel electrode 118B is 5.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 4.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V, the drain-source voltage Vds is 1.25 V, the drain-source voltage Vds is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 3.75 V. In this case, the drain-source voltage Vds is higher than that of the comparative example.

As shown in FIG. 35, in the pixel connected to the signal line 114-2 and corresponding to the first counter electrode 108A, the COM voltage of the first counter electrode 108A is 7.00 V immediately before writing in the first field, The voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 1.25 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the first counter electrode 108A is 8.25V, and the voltage of the first pixel electrode 118A is 10.75V in order to hold the potential difference of 2.50V. A voltage of 4.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V, the drain-source voltage Vds is 6.25 V, and the drain-source voltage Vds is higher than that of the comparative example.
Immediately before writing in the third field, the COM voltage of the first counter electrode 108A is 7.00V, and the voltage of the first pixel electrode 118A is 4.50V in order to maintain the potential difference of 2.50V. A voltage of 5.75 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V and the drain-source voltage Vds is 1.25 V. The drain-source voltage Vds is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the first counter electrode 108A is 5.75V, and the voltage of the first pixel electrode 118A is 3.25V in order to hold the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −3.25 V, and the drain-source voltage Vds is 6.25 V. In this case, both are higher than the comparative example.

As shown in FIG. 35, in the pixel connected to the signal line 114-2 and corresponding to the second counter electrode 108B, the COM voltage of the second counter electrode 108B is 5.75 V immediately before writing in the first field, The voltage of the second pixel electrode 118B is 8.25V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 0 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 9.50V in order to hold the potential difference of 2.50V. In addition, a voltage of 4.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 5.00 V, both of which are the same conditions as in the comparative example.
Immediately before writing in the third field, the COM voltage of the second counter electrode 108B is 8.25V, and the voltage of the second pixel electrode 118B is 5.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-2. Accordingly, the gate-source voltage Vgs is −5.75 V and the drain-source voltage Vds is 0 V, both of which are lower than those of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 5.00 V. In this case, the conditions are the same as in the comparative example.

  As described above, although there is a portion where the gate-source voltage Vgs or the drain-source voltage Vds or any of them is higher than that of the comparative example, the portion is local and instantaneous, and the degree of voltage Is not considered extreme. Therefore, as a whole, the part where the gate-source voltage Vgs or the drain-source voltage Vds, or one of them is lower than that of the comparative example becomes dominant, and flicker is reduced as a whole display.

Second Embodiment
Next, a second embodiment of the present invention will be described with reference to FIGS. This embodiment is different from the first embodiment in the switching pattern of the COM voltage applied to the counter electrode. As shown in FIGS. 37 to 43, in this embodiment, in the first field to the fourth field, the COM voltage is applied to the first counter electrode in the order of positive polarity 1, negative polarity 1, negative polarity 2, and positive polarity 2. Apply to 108A and the second counter electrode 108B.
As an example, as in the first embodiment, white display, gray display that is halftone, and black display are displayed on an 8 × 6 pixel liquid crystal panel in which 8 pixels are arranged in the X direction and 6 pixels are arranged in the Y direction. The voltage values of the first pixel electrode 118A and the second pixel electrode 118B in the case of being made will be described.
FIG. 36 is a timing chart of this operation example. In FIG. 36, the voltages of the counter electrodes are indicated as H, M, and L, but H corresponds to 8.25V, M corresponds to 7.00V, and L corresponds to 5.75V.
FIG. 37 shows the voltage values of the common voltage COM1 and the common voltage COM2 when white is displayed on the pixel corresponding to the first counter electrode 108A and the pixel corresponding to the second counter electrode 108B adjacent to the pixel. FIG. 6 is a diagram illustrating voltage values of the first pixel electrode 118A and the second pixel electrode 118B. The voltage values of the common voltage COM1 and the common voltage COM2 are indicated by solid lines, and the voltage values of the first pixel electrode 118A and the second pixel electrode 118B are indicated by dotted lines.

The second embodiment is different from the first embodiment only in the order of the COM voltage application pattern. Therefore, in the second embodiment, when the display color is a combination of white and intermediate gray, as described above. Since the state 1 and the state 2 are alternately repeated, the effective value of the domain amount is an average value of the domain amount when the ratio is 25% and the domain amount when the ratio is 75%. It can be seen that this is improved over the domain amount at 50% of the ratio when the display color is a combination of white and neutral gray.
As described above, also in this embodiment, two types of counter electrodes are arranged in a checkered pattern, the common voltage applied to each counter electrode is switched for each field, and the potential difference between adjacent counter electrodes is 1. Since the voltage is set to 25 V, the domain amount can be reduced by the time integration value as compared with the conventional example.

  Also in the present embodiment, since the image signal is written continuously for two fields in both the positive polarity and the negative polarity, the vertical crosstalk on the lower side of the screen can be reduced. For example, in the case where a part of the area is displayed in white on a gray background, the area below the part of the window is white in the period where the positive polarity is continuous for two fields. In the two-field period from shake, positive polarity to negative polarity, or from negative polarity to positive polarity, the black side swings. Therefore, it is canceled by time integration, and the vertical crosstalk on the lower side of the window-like partial region can be reduced as compared with the conventional driving.

  Furthermore, in this embodiment, since the COM voltage 1 and the COM voltage 2 are not simultaneously switched from M to L, the margin due to the depletion shift due to the change in the threshold voltage of the TFT is increased, and the tolerance of process and time-dependent variations is increased. Can be improved.

Furthermore, according to the present embodiment, flicker caused by a leakage current when the TFT disposed in the pixel is turned off can be reduced with a change in the applied voltage of the signal line. Hereinafter, reduction of flicker and vertical stroke in the present embodiment will be described.
44 and 45 are diagrams showing the potential of the pixel in the holding state in the region R5 surrounded by the dotted line shown in FIG. 33 at the moment when the signal line 114-1 or the signal line 114-2 is selected. The display will be described on the assumption that halftone gray that is easy to visually recognize flicker is displayed. That is, the potential difference between the first counter electrode 108A and the first pixel electrode 118A, and the second counter electrode 108B and the second pixel electrode 118B is 2.50V.
As shown in FIG. 44, in the pixel connected to the signal line 114-1 and corresponding to the first counter electrode 108A, the COM voltage of the first counter electrode 108A is 7.00 V immediately before the writing of the first field, The voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −9.50 V, and the drain-source voltage Vds is 0 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the first counter electrode 108A is 7.00V, and the voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 4.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V and the drain-source voltage Vds is 0 V. The drain-source voltage Vgs is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the third field, the COM voltage of the first counter electrode 108A is 8.25V, and the voltage of the first pixel electrode 118A is 5.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Accordingly, the gate-source voltage Vgs is −5.75 V and the drain-source voltage Vds is 0 V, both of which are lower than those of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the first counter electrode 108A is 5.75V, and the voltage of the first pixel electrode 118A is 3.25V in order to hold the potential difference of 2.50V. A voltage of 8.25 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −3.25 V, and the drain-source voltage Vds is 5.0 V. In this case, the gate-source voltage Vgs is higher than that in the comparative example.

As shown in FIG. 44, in the pixel connected to the signal line 114-1 and corresponding to the second counter electrode 108B, the COM voltage of the second counter electrode 108B is 5.75 V immediately before writing in the first field, The voltage of the second pixel electrode 118B is 8.25V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 1.25 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the second counter electrode 108B is 8.25V, and the voltage of the second pixel electrode 118B is 10.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 6.25. In this case, the gate-source voltage is higher than that of the comparative example.
Immediately before writing in the third field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V, the drain-source voltage Vds is 1.25 V, the drain-source voltage Vds is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-1. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 3.75 V. In this case, both are lower than the comparative example, and flicker is reduced.

As shown in FIG. 45, in the pixel connected to the signal line 114-2 and corresponding to the first counter electrode 108A, the COM voltage of the first counter electrode 108A is 7.00 V immediately before the writing of the first field, The voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 1.25 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the first counter electrode 108A is 7.00V, and the voltage of the first pixel electrode 118A is 9.50V in order to maintain the potential difference of 2.50V. A voltage of 5.75 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −5.70 V and the drain-source voltage Vds is 3.75 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the third field, the COM voltage of the first counter electrode 108A is 8.25V, and the voltage of the first pixel electrode 118A is 5.75V in order to hold the potential difference of 2.50V. A voltage of 4.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V and the drain-source voltage Vds is 1.25 V. The drain-source voltage Vds is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the first counter electrode 108A is 5.75V, and the voltage of the first pixel electrode 118A is 3.25V in order to hold the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −3.25 V, and the drain-source voltage Vds is 6.25 V. In this case, both are higher than the comparative example.

As shown in FIG. 45, in the pixel connected to the signal line 114-2 and corresponding to the second counter electrode 108B, the COM voltage of the second counter electrode 108B is 5.75 V immediately before writing in the first field, The voltage of the second pixel electrode 118B is 8.25V in order to maintain the potential difference of 2.50V. In addition, a voltage of 8.25 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −8.25 V, and the drain-source voltage Vds is 0 V, both of which are lower than the comparative example, and flicker is reduced.
Immediately before writing in the second field, the COM voltage of the second counter electrode 108B is 8.25V, and the voltage of the second pixel electrode 118B is 10.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −5.75 V, the drain-source voltage Vds is 5.00 V, the gate-source voltage is lower than that of the comparative example, and flicker is reduced.
Immediately before writing in the third field, the COM voltage of the second counter electrode 108B is 8.25V, and the voltage of the second pixel electrode 118B is 5.75V in order to hold the potential difference of 2.50V. In addition, a voltage of 5.75 V is supplied to the signal line 114-2. Accordingly, the gate-source voltage Vgs is −5.75 V and the drain-source voltage Vds is 0 V, both of which are lower than those of the comparative example, and flicker is reduced.
Immediately before writing in the fourth field, the COM voltage of the second counter electrode 108B is 7.00V, and the voltage of the second pixel electrode 118B is 4.50V in order to maintain the potential difference of 2.50V. In addition, a voltage of 9.50 V is supplied to the signal line 114-2. Therefore, the gate-source voltage Vgs is −4.50 V, and the drain-source voltage Vds is 5.00 V. In this case, the conditions are the same as in the comparative example.

  As described above, even in the second embodiment, although there is a portion where the gate-source voltage Vgs and / or the drain-source voltage Vds is higher than that of the comparative example, the location is local and instantaneous. It is perceived that the voltage level is not extreme. Therefore, as a whole, the part where the gate-source voltage Vgs or the drain-source voltage Vds, or one of them is lower than that of the comparative example becomes dominant, and flicker is reduced as a whole display.

<Modification>
The present invention is not limited to the above-described embodiments, and for example, various modifications described below are possible. Of course, each embodiment and each modification may be combined as appropriate.

(1) In each of the above-described embodiments, the example in which the counter electrodes 108A and 108B are arranged in a checkered pattern has been described. However, the present invention is not limited to such a configuration. 108B may be alternately arranged in a line.

(2) In the above-described embodiments, the case where the potential difference between the COM voltage 1 and the COM voltage 2 is 1.25 V, which is 25% of the full range, has been described. However, the present invention is not limited to this configuration. If the potential difference between the COM voltage 1 and the COM voltage 2 is 50% or less of the full range, the domain amount can be improved as compared with the conventional case.

<Application example>
The present invention can be used in various electronic devices. 46 to 48 illustrate specific modes of electronic devices to which the present invention is applied.

  FIG. 46 is a perspective view of a portable personal computer employing an electro-optical device. The personal computer 2000 includes an electro-optical device 1 that displays various images, and a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed.

  FIG. 47 is a perspective view of a mobile phone. The cellular phone 3000 includes a plurality of operation buttons 3001 and scroll buttons 3002, and the electro-optical device 1 that displays various images. By operating the scroll button 3002, the screen displayed on the electro-optical device 1 is scrolled. The present invention is also applicable to such a mobile phone.

  FIG. 48 is a schematic diagram showing a configuration of a projection display device (three-plate projector) 4000 that employs an electro-optical device. The projection display device 4000 includes three electro-optical devices 1 (1R, 1G, 1B) corresponding to different display colors R, G, B, respectively. The illumination optical system 4001 supplies the red component r of the light emitted from the illumination device (light source) 4002 to the electro-optical device 1R, the green component g to the electro-optical device 1G, and the blue component b to the electro-optical device 1B. To supply. Each electro-optical device 1 functions as a light modulator (light valve) that modulates each monochromatic light supplied from the illumination optical system 4001 in accordance with a display image. The projection optical system 4003 synthesizes the emitted light from each electro-optical device 1 and projects it onto the projection surface 4004. The present invention is also applicable to such a liquid crystal projector.

  As electronic devices to which the present invention is applied, in addition to the devices illustrated in FIGS. 1, 46 to 48, personal digital assistants (PDAs), digital still cameras, televisions, video cameras, car navigation systems. Equipment, on-vehicle display (instrument panel), electronic notebook, electronic paper, calculator, word processor, workstation, video phone, POS terminal, printer, scanner, copier, video player, equipment with touch panel, etc. .

DESCRIPTION OF SYMBOLS 1 ... Electro-optical apparatus, 10 ... Timing control circuit, 20 ... Display control circuit, 40 ... Control circuit, 100 ... Liquid crystal panel, 101 ... Display area, 105 ... Liquid crystal, 108A ... 1st counter electrode, 108B ... 2nd counter electrode 109A, 109B ... through hole, 110 ... pixel, 112 ... scan line, 114,114-1, 114-2 ... signal line, 115 ... capacitor line, 117A, 117B ... common power supply line, 118A, 118B ... pixel electrode, 120 ... Liquid crystal element, 125 ... Auxiliary capacitor, 130 ... Scanning line driving circuit, 140 ... Data line driving circuit.

Claims (6)

A first pixel comprising a first pixel electrode and a first counter electrode;
A second pixel arranged in at least one of a column direction and a row direction with respect to the first pixel, and comprising a second pixel electrode and a second counter electrode;
A counter electrode voltage supply unit for supplying a first voltage and a second voltage to the first counter electrode and the second counter electrode, respectively;
An image signal supply unit that supplies image signals corresponding to the first pixel and the second pixel to the first pixel electrode and the second pixel electrode, respectively.
The counter electrode voltage supply unit is configured such that a potential difference between the first voltage and the second voltage is a voltage value of the first voltage and the second voltage for each writing period to the first pixel and the second pixel. A voltage value that is ½ or less of the maximum potential difference between the voltage supplied to the first pixel electrode and the voltage supplied to the first counter electrode is set, and the first voltage and Setting at least one voltage value of the second voltage to a different value;
An electro-optical device. One image forming period is formed in the plurality of writing periods,
The counter electrode voltage supply unit uses ternary voltage values as the voltage values of the first voltage and the second voltage in the one image forming period.
The electro-optical device according to claim 1. A plurality of the first pixels and the second pixels are alternately provided in a checkered pattern,
The electro-optical device according to claim 1, wherein the electro-optical device is provided. Each of the plurality of first pixels and the second pixels is arranged in a line in the row direction or the column direction, and the lines of the first pixels and the lines of the second pixels are alternately provided.
The electro-optical device according to claim 1, wherein the electro-optical device is provided.   An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 4. A first pixel having a first pixel electrode and a first counter electrode; and a second pixel having a second pixel electrode and a second counter electrode arranged in at least one of a column direction and a row direction with respect to the first pixel. A method for driving an electro-optical device comprising:
Supplying a first voltage and a second voltage to the first counter electrode and the second counter electrode, respectively;
Supplying image signals corresponding to the first pixel and the second pixel, respectively, to the first pixel electrode and the second pixel electrode;
When supplying the first voltage and the second voltage, voltage values of the first voltage and the second voltage for each writing period to the first pixel and the second pixel are the first voltage and the second voltage. A voltage value is set such that the voltage difference is equal to or less than ½ of the maximum potential difference between the voltage supplied to the first pixel electrode and the voltage supplied to the first counter electrode. A voltage value of at least one of the first voltage and the second voltage is set to a different value;
A driving method for an electro-optical device.

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