JP2016116214A - Image pickup apparatus - Google Patents

Abstract

To reduce noise caused by charge leakage when charge accumulation periods do not overlap in two adjacent pixel rows. A pixel unit includes a plurality of first pixel rows and a plurality of second pixel rows each arranged adjacent to the first pixel row, and the first pixel rows arranged adjacent to each other. Among the second pixel rows, at least part of a period t17-t18 from the end t12 of the charge accumulation period of the second pixel row to the end of the output period in which the signal from the pixel of the first pixel row is output, The charges accumulated in the photoelectric conversion units of the pixels in the second pixel row are reset. [Selection] Figure 6

Description

  The present invention relates to a configuration in which signals are read collectively for each pixel group in an imaging apparatus having a plurality of pixel groups.

  2. Description of the Related Art There is known an imaging apparatus that provides a pixel group including an imaging pixel row and a pixel group including a focus detection pixel row on an imaging surface and reads out respective signals. Japanese Patent Application Laid-Open No. 2005-228561 describes an imaging apparatus that skips the focus detection pixel rows and collectively scans the imaging pixel rows, and then collectively scans the focus detection pixel rows. ing.

JP 2010-074243 A

  In the imaging apparatus described in Patent Document 1, the focus detection pixel row is arranged adjacent to the imaging pixel row. When an image of one frame is obtained, the focus detection pixel rows are skipped and the imaging pixel rows are sequentially scanned, and then the focus detection pixel rows are sequentially scanned. In a normal imaging device, adjacent pixel rows are sequentially scanned, so that the charge accumulation periods of the pixel rows overlap. On the other hand, when the scanning described in Patent Document 1 is performed, the charge accumulation periods do not overlap between the imaging pixel rows and the focus detection pixel rows arranged adjacent to each other. In this case, for example, during the charge accumulation period of one of the imaging pixel row and the focus detection pixel row, the other pixel row is not in the charge accumulation period. In such a state, when light is emitted to the pixels in the imaging pixel row and the focus detection pixel row, charges that are not used for signals are generated in the pixels in the other pixel row. In such a case, there is a possibility that charges are leaked from the pixels of the other pixel row to the pixels of one pixel row, and noise due to the charges is generated.

  In view of the above problems, the present invention provides an imaging device capable of reducing noise due to charge leakage when charge accumulation periods of two adjacent pixel rows do not overlap each other. For the purpose.

  The imaging device of the present invention has a pixel portion in which a plurality of pixels each having a photoelectric conversion portion are arranged in a matrix, and the charge accumulation period of each pixel is controlled by an electronic shutter operation, and the charge generated during the charge accumulation period is An image pickup device that outputs a signal based on a pixel row by sequentially scanning the pixel row, wherein the pixel unit includes a first pixel group having a plurality of first pixel rows, each adjacent to the first pixel row. A second pixel group having a plurality of second pixel rows, and each of the charge accumulation periods of the first pixel row and the second pixel row arranged adjacent to each other is The charge storage period of each photoelectric conversion unit included in the other pixel row is controlled to start after the charge storage period of each photoelectric conversion unit included in the pixel row ends, and the plurality of the first pixel groups in the first pixel group are controlled. After sequentially scanning one pixel row, a plurality of second pixel rows of the second pixel group are By performing the next scanning, the signals of the plurality of first pixel rows and the signals of the plurality of second pixel rows are output, and the first pixel row and the second pixel row arranged adjacent to each other, In at least a part of the period from the end of the charge accumulation period of the second pixel row to before the end of the output period in which signals from the pixels of the first pixel row are output, The charge accumulated in the photoelectric conversion unit of the pixel is reset.

  In two pixel rows arranged adjacent to each other, it is possible to reduce noise due to charge leakage when the charge accumulation periods do not overlap each other.

Block diagram of imaging device Pixel circuit diagram Illustration of the pixel part Read sequence diagram Drive timing diagram for explaining the problem Driving timing chart of the first embodiment Driving timing chart of the second embodiment Driving timing chart of the third embodiment Driving timing chart of Embodiment 4 Driving timing chart of Embodiment 5 Driving timing chart of Embodiment 6 Potential variation diagram of FD in Example 6

  Hereinafter, a solid-state imaging device according to an embodiment of the present invention will be described with reference to the drawings. In the drawings, elements having similar functions are denoted by the same reference numerals, and redundant description is omitted.

Example 1
The imaging apparatus 10 of the present embodiment will be described with reference to FIGS. The configuration of the imaging apparatus described in FIGS. 1 and 2 can be applied to other embodiments.

  FIG. 1 shows a block diagram of an imaging apparatus 10 of the present embodiment. The imaging apparatus 10 includes a pixel unit 100, a drive pulse generation unit 160, a vertical scanning circuit 120, a signal line 115, a column circuit 140, a horizontal scanning circuit 150, and an output unit 170.

  The pixel unit 100 includes a plurality of pixels 101 that convert light into a charge signal and output the converted electrical signal. The plurality of pixels 101 are arranged in a matrix.

  The drive pulse generator 160 generates a control pulse, and the vertical scanning circuit 120 receives the control pulse from the drive pulse generator 160 and supplies the drive pulse to each of the pixel rows V1 to Vn. The drive pulses supplied here are pTX for driving a transfer transistor, which will be described later, pRES for driving a reset transistor, and pSEL for driving a selection transistor. The column circuit 140 has an AD converter, and the AD converter converts a pixel signal that is an analog signal output from the unit pixel into a digital signal. The horizontal scanning circuit 150 outputs the signals processed in parallel by the column circuit 140 to the output unit 170 for each column. Note that the column circuit 140 may further include an amplifier and a noise removal circuit.

  FIG. 2 shows an example of a pixel equivalent circuit. In this embodiment, the signal charge is assumed to be electrons, and each transistor is described as an N-type transistor. However, holes may be used as signal charges, and P-type transistors may be used as pixel transistors.

  Further, the equivalent circuit is not limited to this, and a part of the configuration may be shared by a plurality of pixels.

  The pixel 101 includes a photoelectric conversion unit 103, a transfer transistor 104, a reset transistor 105, an amplification transistor 106, a floating diffusion (hereinafter referred to as FD) 108, and a selection transistor 107.

  The photoelectric conversion unit 103 generates charge pairs of an amount corresponding to the amount of incident light by photoelectric conversion and accumulates electrons. For example, a photodiode is used for the photoelectric conversion unit 103.

  The transfer transistor 104 transfers the electrons accumulated in the photoelectric conversion unit 103 to the FD 108. A drive pulse pTX is supplied to the gate of the transfer transistor 104 to switch between an on state and an off state. The FD 108 holds the electrons transferred by the transfer transistor 104.

  The amplification transistor 106 has its gate connected to the FD 108, and amplifies and outputs a signal based on the electrons transferred to the FD 108 by the transfer transistor 104. More specifically, the electrons transferred to the FD 108 are converted into a voltage corresponding to the amount, and an electric signal corresponding to the voltage is output to the signal line 115 via the amplification transistor 106. The amplification transistor 106 forms a source follower circuit together with a current source (not shown).

  The reset transistor 105 resets the potential of the input node of the amplification transistor 106. In addition, by resetting the ON periods of the reset transistor 105 and the transfer transistor 104, the charge accumulated in the photoelectric conversion unit 103 is reset (the photoelectric conversion unit 103 is reset to a predetermined potential). . A drive pulse pRES is supplied to the gate of the reset transistor 105 to switch between an on state and an off state. However, here, the configuration is such that the transfer transistor 104 is passed through in order to reset the photoelectric conversion unit 103, but the configuration may be such that the reset transistor 105 is directly connected to the photoelectric conversion unit 103 and the photoelectric conversion unit 103 is reset.

  The selection transistor 107 outputs a signal of a plurality of pixels 101 provided for one signal line 115 one pixel at a time or a plurality of pixels. The drain of the selection transistor 107 is connected to the source of the amplification transistor 106, and the source of the selection transistor 107 is connected to the signal line 115.

  Instead of the configuration of this embodiment, the selection transistor 107 may be provided between the drain of the amplification transistor 106 and the power supply wiring to which the power supply voltage is supplied. The selection transistor 107 may be arranged so as to control electrical conduction between the amplification transistor 106 and the signal line 115. A drive pulse pSEL is supplied to the gate of the selection transistor 107, and the on state and the off state of the selection transistor 107 are switched.

  Note that without selecting the transistor 107, the source of the amplifying transistor 106 and the signal line 115 are connected, and the potential of the drain of the amplifying transistor 106 or the gate of the amplifying transistor 106 is switched to switch between the selected state and the non-selected state. Also good. These are the same in the following embodiments.

  Next, the arrangement of a plurality of pixel rows V1 to Vn arranged in the pixel unit 100 will be described with reference to FIG. Here, 12 pixel rows (V1 to V12) will be described. In the pixel unit 100, a first pixel row (hereinafter referred to as an imaging pixel row) 201 in which pixels for acquiring an image are arranged as rows, and a pixel for acquiring a focus detection signal are arranged in rows. A second pixel row (hereinafter referred to as a focus detection pixel row) 202 is also arranged. A pixel for acquiring an image is an imaging pixel, and a pixel for acquiring a focus detection signal is a focus pixel. A plurality of these pixel rows are arranged, a plurality of imaging pixel rows 201 constitute a first pixel group (hereinafter referred to as imaging pixel group), and a plurality of focus detection pixel rows 202 constitute a second pixel group ( Hereinafter, a focus detection pixel group) is configured. In this embodiment, as shown in FIG. 3, the focus detection pixel row 202 is arranged adjacent to the imaging pixel row 201. In this embodiment, the number of focus detection pixel rows is smaller than the number of imaging pixel rows, and a plurality of imaging pixel rows (V5 to V7) are provided between two focus detection pixel rows (V4 and V8). ) Is arranged.

  In FIG. 3, three pixel rows V4, V8, and V12 are focus detection pixel rows, and the other pixel rows are imaging pixel rows. The imaging pixel row includes an imaging pixel, and the focus detection pixel row includes a focus detection pixel. The imaging pixel row may include not only imaging pixels but also other use pixels (for example, focus detection pixels). In this case, the number of imaging pixels is larger than the number of other use pixels. Many. Similarly, the focus detection pixel row may include not only the focus detection pixels but also pixels for other purposes (for example, imaging pixels). In this case, the number of focus detection pixels is different from that for other uses. More than the number of pixels.

  Here, one focus detection pixel has a configuration in which the photoelectric conversion unit is divided into a plurality of regions corresponding to one microlens (or a plurality of photoelectric conversion units corresponding to one microlens is provided. Configuration) or a configuration in which a part of the photoelectric conversion unit is shielded from light. Using these focus detection pixel signals, well-known phase difference detection type focus detection can be performed.

  FIG. 4 is a diagram showing a signal reading sequence of each pixel group shown in FIG. In FIG. 4, pixel row numbers are shown in the vertical direction, and time is shown in the horizontal direction. The pixel rows are arranged in this order in plan view. In the present embodiment, the charge accumulation period Ts of the pixel unit 100 is controlled by an electronic shutter operation. In this embodiment, when one pixel or one pixel row is viewed, the charge accumulation period is started by resetting the photoelectric conversion unit of the pixel, and the charge of the photoelectric conversion unit is transferred after a predetermined period has elapsed. Exit.

  The charge accumulation period of each of the plurality of imaging pixel rows starts by sequentially resetting the charges accumulated in the photoelectric conversion units of the pixels of each imaging pixel row for each row. Then, the charge accumulation period of each of the plurality of imaging pixel rows ends by sequentially transferring the charges accumulated in the photoelectric conversion units of the pixels of each imaging pixel row for each row.

  On the other hand, the charge accumulation period of each of the plurality of focus detection pixel rows starts by sequentially resetting the charge accumulated in the photoelectric conversion units of the pixels of each focus detection pixel row for each row. Then, the charge accumulation period of each of the plurality of focus detection pixel rows ends by sequentially transferring the charges accumulated in the photoelectric conversion units of the pixels of each focus detection pixel row for each row.

  After the charge accumulation period ends, a plurality of pixel rows are sequentially scanned for each row, and a signal based on the charge generated in the photoelectric conversion unit during the charge accumulation period is sequentially output to the signal line 115 for each pixel row. . Hereinafter, the period from the end of the charge accumulation period of the predetermined pixel row to the end of the output of the signal based on the charge generated in each photoelectric conversion unit of the predetermined pixel row to the signal line 115 is referred to as an output period Top. Call. The period indicated by the start point and the end point of the arrow in FIG. 4 indicates a period obtained by combining the charge accumulation period Ts and the output period Top in each row.

  In FIG. 4, a period including from the start of the charge accumulation period of all the pixel rows constituting the pixel unit 100 to the end of the output period is defined as one frame period. When a plurality of frame periods are consecutive, each frame period is represented as a first frame period FR1 and a second frame period FR2, and FR3 and subsequent steps are omitted in FIG.

  The first period S1 and the second period S2 are provided in the first frame period (in FR1), and the third period S3 and the fourth period S4 are provided in the second frame period (in FR2). It has been. The first period S1 and the third period S3 are periods in which the readout operation of the imaging pixel group is performed by skipping the focus detection pixel row 202. The second period S2 and the fourth period S4 are periods in which the readout operation is performed for the focus detection pixel group in which the readout operation was not performed in the first period S1 and the third period S3. Then, by repeating such a frame period for a predetermined period, moving image shooting is possible.

  The readout operation described here refers to an operation in a period from the start of the accumulation period Ts of a predetermined pixel row (more specifically, the start of the reset period Tres) to the end of the output period Top. Therefore, in the example of FIG. 4, one frame period is a period from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) to the end of the output period Top of all the pixel rows constituting the pixel unit 100. It is. The first period S1 and the third period S3 are periods from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) of the plurality of first pixel rows to the end of the output period Top. Similarly, the second period S2 and the fourth period S4 are periods from the start of the accumulation period Ts (more specifically, the start of the reset period Tres) of the plurality of second pixel rows to the end of the output period Top.

  Next, with reference to FIG. 5, in the signal readout sequence of the pixel row shown in FIG. 4, the part where the imaging pixel row 201 and the focus detection pixel row 202 are arranged adjacent to each other (FIG. 4). The pixel rows V3 to V5) are extracted and the problem of this embodiment will be described. The vertical direction of FIG. 5 shows drive pulses for each pixel row from V3 to V5, and the horizontal direction shows the passage of time. A horizontal scanning period HD is set by the horizontal synchronization pulse. Then, in the horizontal scanning period HD, the selection transistor of the pixel 101 from which a signal is read out from the imaging device in the horizontal scanning period HD is turned on.

  In FIG. 5, each transistor is turned on during a period when each drive pulse is at a high level. In the drive pulse of each transistor, each drive pulse (pRES, pTX, pSEL) is supplied from the vertical scanning circuit 120 to each transistor in the pixel row during a period indicated by a solid line. The period indicated by the broken line means that each signal is not supplied from the vertical scanning circuit 120 and the potential of each control wiring is held by the parasitic capacitance. However, the drive pulse may be supplied from the vertical scanning circuit 120 also in the portion indicated by the broken line.

  First, at time t0, the first horizontal scanning period HD1 starts with a horizontal synchronization pulse. At this time, the drive pulse pRES3 and the drive pulse pTX3 of the pixel row V3 become high level. Next, at time t1, the drive pulse pRES3 and the drive pulse pTX3 become low level. As a result, the photoelectric conversion unit 103 is reset, and a charge accumulation period Ts in the photoelectric conversion unit 103 of each pixel constituting the pixel row V3 starts. That is, time t1 is the start time of the charge accumulation period Ts of the pixel row V3.

  The period from t0 to t1 is called a reset period Tres in which the reset operation of the photoelectric conversion unit 103 is performed. Although not shown here, signals of pixels in a predetermined pixel row (for example, pixel row V1 in FIG. 4) are read out of the imaging apparatus by the horizontal scanning circuit 150 in a part of the first horizontal scanning period HD1. There is a case. Then, the first horizontal scanning period HD1 ends at time t2.

  The second horizontal scanning period HD2 starts at time t3. At this time, the drive pulse pRES5 and the drive pulse pTX5 of the pixel row V5 are at a high level. Next, at time t4, the drive pulse pRES5 and the drive pulse pTX5 are at a low level. As a result, the photoelectric conversion unit 103 is reset, and the charge accumulation period Ts in the photoelectric conversion unit of the pixel in the pixel row V5 starts. That is, time t4 is the start time of the charge accumulation period Ts of the pixel row V5. Then, the second horizontal scanning period HD2 ends at time t5.

  At time t6, the third horizontal scanning period HD3 starts, and the drive pulses pSEL3 and pRES3 of the pixel row V3 become high level. At time t7, pRES3 becomes low level. When the driving pulse pSEL3 becomes high level, the selection transistor 107 is turned on. Further, the FD is reset when the drive pulse pRES3 becomes high level.

  Therefore, the noise signal of the pixel row V3 is output to the signal line 115 during the period t7 to t8.

  At time t8, the drive pulse pTX3 becomes high level, and at time t9, the drive pulse pTX3 becomes low level. By this operation, the electric charge accumulated in the photoelectric conversion unit 103 is transferred to the FD 108. A period t1-19 from time t1 to time t9 is a charge accumulation period Ts of the pixel row V3.

  At time t10, the drive pulse pSEL becomes a low level and is turned off, and the third horizontal scanning period HD3 ends.

  For this reason, in a period t9-t10 from time t9 to time t10, a signal based on the charge generated in the photoelectric conversion unit included in each pixel of the pixel row V3 in the charge accumulation period Ts is output to the signal line 115. It will be. Here, the period t9-t10 is referred to as an output period Top.

  A signal from which noise has been removed by performing differential processing between the signal output during the period t7-t8 and the signal output during the period t9-t10 by the column circuit 140 or a CDS circuit (correlated double sampling circuit) (not shown). Can be obtained.

  Further, during a period from time t9 when the charge accumulation period Ts ends to time t19 which is the start of the reset operation in the second frame period of the pixel row V3, a state in which charges can be accumulated in the photoelectric conversion unit 103 of the pixel row V3 Become. However, since the charge accumulated in each photoelectric conversion unit 103 in the pixel row V3 during this period is not used for a signal output from the pixel row V3, this period is referred to as an invalid period Tnu of the pixels constituting the pixel row V3.

  Note that after the reset period Tres of the pixel row V3, the charge accumulation operation of the pixel row V5 is started in the second horizontal scanning period HD2 which is the next horizontal scanning period (in the second horizontal scanning period HD2, the pixel row V5 Reset period Tres is performed).

  Then, when the first period S1 (period of readout operation of the imaging pixel group) ends, the second period S2 (period of readout operation of the focus detection pixel group) starts from time t14. In the second period S2, the same operation as the readout operation of the image pickup pixel group performed in the first period S1 described with reference to FIG. 5 is performed as a focus detection pixel group (a plurality of focus detection pixel rows V4, V8,. V12).

  In this example, the imaging pixel rows (V3, V5, V7, V9, V11) and the focus detection pixel rows (V4, V8, V12) are arranged adjacent to each other. The charge accumulation periods of the imaging pixel row and the focus detection pixel row arranged adjacent to each other are changed to the other pixel row after the charge accumulation period of each photoelectric conversion unit included in the one pixel row ends. Control is performed so that the charge accumulation period of each photoelectric conversion unit included starts. When such a signal readout sequence of the pixel unit 100 is performed, for example, in the first period S1, charge leakage occurs in the pixel rows V3 and V5 arranged adjacent to the pixel row V4 from the pixel row V4. For this reason, there is a possibility that the signal output to the signal line 115 from the pixel row (V3, V5) arranged adjacent to the pixel row V4 may have an undesired effect such as noise.

  Note that, as shown in FIG. 4, this influence is caused by a pixel in which a read operation is finally performed (or a charge accumulation period Ts is finally started) in a plurality of imaging pixel rows (in the first pixel group). A row V11 and a focus detection pixel row V4 in which a read operation is first performed (or the charge accumulation period Ts is first started) in the plurality of focus detection pixel rows (in the second pixel group). It becomes larger when other imaging pixel rows (V5 to V10) among the imaging pixel rows are arranged therebetween. The above-described influence is that the amount of received light is excessive with respect to the amount of charge that can be stored in the photoelectric conversion unit 103, such as when a high-luminance subject is imaged, or when the invalid period Tnu is longer than the charge storage period Ts. It often occurs at any time. The above phenomenon often occurs when the charge accumulation period of each pixel is controlled by an electronic shutter operation. However, the above-described influence cannot be generated only when the electronic shutter operation is performed, such as when a high-luminance subject is imaged.

  As shown in FIGS. 4 and 5, in the first period S1, the pixel row V4 (focus detection pixel row) is in the invalid period Tnu. For this reason, when performing the read operation of the pixel rows (imaging pixel rows) V3 and V5 adjacent to the pixel row (focus detection pixel row) V4, the charges from the pixels of the pixel row V4 to the pixels of the pixel rows V3 and V5 are charged. May leak, and may adversely affect signals read from the pixel rows V3 and V5.

  Next, FIG. 6 shows the drive timing of this embodiment. The difference from the drive timing of FIG. 5 is that the pixels of the pixel row V4 adjacent to the pixel row V3 are reset during the output period Top of the pixel row V3 (until the output period Top ends). is there. That is, in the example of FIG. 6, of the two adjacent pixel rows (V3 and V4 or V4 and V5), the other pixel is from the start of the charge accumulation period of one pixel row to the end of the output period Top. The photoelectric conversion units in the row are reset.

  Specifically, it is a feature of this embodiment that at least one of the following three operations is performed.

  The first is an operation of resetting the photoelectric conversion unit of the pixel row V4 during the output period Top (period t9-t10) of the pixel row V3 (until the output period Top ends). Specifically, the drive pulses pRES4 and pTX4 are set to the high level. As a result, it is possible to reduce the leakage of charges from the pixel row V4 to the pixel row V3. In particular, in the output period of the pixel row V3, the signal output from each pixel 101 constituting the pixel row V3 to the signal line 115 depends on the charge transferred to the FD. For this reason, it is possible to reduce the leakage of charges from the photoelectric conversion unit of the pixel row V4 to the FD of the pixel row V3 by the reset operation.

  The second is an operation of resetting the photoelectric conversion unit of the pixel row V4 during the output period Top (period t12-t13) of the pixel row V5 (until the end of the output period Top) (not shown). Specifically, the drive pulses pRES4 and pTX4 are set to the high level during the period t12-t13. As a result, leakage of charges from the pixel row V4 to the pixel row V5 can be reduced.

  Thirdly, during the output period Top (period t17-t18) of the pixel row V4 (until the end of the output period Top), the photoelectric conversion unit of at least one of the pixel rows V3 and V5 is reset. It is an operation to do. Specifically, the drive pulses pRES3 and pTX3 or pRES5 and pTX5 are set to the high level during the period t17 to t18. Thereby, it is possible to reduce the leakage of charges from at least one of the pixel rows V3 and V5 to the pixel row V3.

  Here, when the first operation and the second operation are compared, it is better to reset the pixel row V4 in the output period of the pixel row V3 that performs the read operation first. This is because the above-described effect can be produced in both the adjacent pixel rows V3 and V5. The same applies to the following embodiments.

  Further, although all the above three operations may be performed, it is more preferable to perform only the first operation. This is because the signal output from the focus detection pixel is not required to be more accurate than the signal output from the imaging pixel, and the first operation is better than the second operation. As described above.

  The reset operation of this embodiment is also applicable to V8 and V12 in which the read operation is performed in the same second period S2 as the pixel row V4.

  In addition, the pixel group that performs the reading operation in the first period S1 and the third period S3 is the imaging pixel group, and the pixel group that performs the reading operation in the second period S2 and the fourth period S4 is the focus detection pixel group. The reverse may be possible. In other words, the first period and the second period provided within one frame period may be preceded by either one, and the second period S2 can be provided before or after the first period S1.

  In this embodiment, the readout operation of the focus detection pixel group is performed after the readout operation of the imaging pixel group. However, the present invention is not limited to this order. For example, the readout operation for the other pixel group may be performed after the readout operation for one pixel group is repeated a plurality of times. In this case, for example, in one frame period, the first period S1 is performed again after the first period S1, and then the second period S2 is performed.

  Furthermore, in the present embodiment, an example in which the pixels constituting the pixel unit 100 are the imaging pixel and the focus detection pixel is shown. However, in the present embodiment even in the case where only the imaging pixel or the focus detection pixel is used. Has the effect described. For example, the pixel unit 100 is configured by only a plurality of imaging pixel rows, and the readout operation of the remaining pixel rows excluding some pixel rows is performed in the first period S1, and the some pixel rows are performed in the second period S2. Even when the read operation is performed, the above-described effects can be obtained by performing the reset operation of this embodiment.

  According to the present embodiment, in the output period Top of a certain pixel row, when the pixel row located next to the pixel row is in the invalid period Tnu, noise is generated in the signal output from the certain pixel row to the signal line. It is possible to reduce the influence of such as.

(Example 2)
The imaging apparatus of the present embodiment will be described with reference to FIG.

  The difference between the drive timing of this embodiment shown in FIG. 7 and the drive timing of FIG. 6 shown in Embodiment 1 is the timing of resetting. In this embodiment, simultaneously with the reset operation for starting the charge accumulation period of the imaging pixel row, the photoelectric conversion unit of the focus detection pixel row V4 adjacent to the imaging pixel row is reset. Specifically, the drive pulses pRES4 and pTX4 of the focus detection pixel row V4 are set to the high level during the period t0 to t1 that is the reset period Tres of the imaging pixel row V3.

  Thereby, it is possible to align the start of the charge accumulation period Ts of the pixel row V3 and the start of the invalid period Tnu of the pixel row V4. Therefore, it is possible to reduce the possibility of charges leaking from the pixel row V4 to the pixel row V3 during the charge accumulation period Ts of the imaging pixel row V3.

  At the same time as the reset operation for starting the charge accumulation period Ts of the pixel row V4, at least one of the imaging pixel rows V3 and V5 can be reset. Specifically, as shown in FIG. 7, the imaging pixel rows V3 and V5 may be reset in the reset period Tres (period t14-t15) of the pixel row V4.

  According to the present embodiment, the same effect as in the first embodiment can be obtained. Further, in this embodiment, the control signals pTX3 and pRES3 of the pixel row V3 adjacent to the pixel row V4 or the control signals pTX5 and pRES5 of the pixel row V5 are used as the control signals pTX4 and pRES4 of the pixel row V4. This eliminates the need for the drive pulse generator 160 to generate a new control signal.

(Example 3)
The image pickup apparatus of the present embodiment will be described with reference to FIG. The difference between the driving timing of the present embodiment shown in FIG. 8 and the driving timing of FIG. 6 shown in FIG. 8 is that the focus detection pixel in the charge accumulation period Ts (period t1-t9) of the imaging pixel row V3. The photoelectric conversion unit in row V4 is reset. Also according to this embodiment, it is possible to reduce the leakage of charges from the pixels in the focus detection pixel row V4 to the pixels in the imaging pixel row V3. Similarly to the above-described embodiment, the photoelectric conversion units of the imaging pixel rows V3 and V5 may be reset in the charge accumulation period Ts (period t15 to t17) of the focus detection pixel row. Note that it is preferable to simultaneously reset the photoelectric conversion units of the pixel rows V3 and V5 in the charge accumulation period Ts of the focus detection pixel row.

  Also in this embodiment, the same effect as the above-described embodiment can be obtained.

Example 4
The image pickup apparatus of the present embodiment will be described with reference to FIG.

  The difference between the drive timing of this embodiment shown in FIG. 9 and the drive timing of FIG. 6 shown in Embodiment 1 is in the reset timing. Specifically, the photoelectric conversion unit of the pixel row V4 is reset at least during a period from the end time t18 of the output period Top of the focus detection pixel row V4 to the start time t19 of the reset period Tres of the imaging pixel row V3. It is a point to perform. Also according to this embodiment, it is possible to reduce the leakage of charges from the pixels in the focus detection pixel row V4 to the pixels in the imaging pixel row V3. Further, the photoelectric conversion unit of the pixel row V3 is at least partly from time t10, which is the end of the output period Top of the imaging pixel row V3, to time t14, which is the start of the reset period Tres of the focus detection pixel row V4. A reset may be performed. Further, the photoelectric conversion unit of the pixel row V5 during at least a part of the period from the time t13 when the output period Top of the imaging pixel row V5 ends to the time t14 when the reset period Tres of the focus detection pixel row V4 starts. May be reset.

  Also in this embodiment, the same effect as that of Embodiment 1 can be obtained.

(Example 5)
The imaging apparatus of the present embodiment will be described with reference to FIG.

  The difference between the drive timing of the present embodiment shown in FIG. 10 and the drive timing of FIG. 6 shown in Embodiment 1 is over all periods except the charge accumulation period Ts and the output period Top of the focus detection pixel row V4. Thus, the photoelectric conversion unit in the pixel row V4 is continuously reset. According to the present embodiment, most of the charges generated in the invalid period Tnu of the pixel row V4 are reset, so that the leakage of charges into the pixel rows V3 and V5 adjacent to the pixel row V4 is smaller than that in the above embodiment. Can be reduced.

  Further, as shown in FIG. 10, the same operation as the reset for the pixel row V4 described above may be performed for the imaging pixel rows V3 and V5.

  Although the present invention has been described with reference to specific embodiments, the present invention is not limited to the embodiments, and can be appropriately changed and combined within the scope of the idea.

  In the first to fourth embodiments, resets in different periods are shown, but the reset periods may be appropriately combined.

  In each embodiment, since the reset operation is sequentially performed for each pixel row, the signal is read by the rolling shutter operation in which the charge accumulation period is different for each pixel row. However, a global electronic shutter operation may be used. Alternatively, an operation in which the charge accumulation period is different for each of the plurality of pixel rows may be performed.

  In the global electronic shutter operation, for example, the start time of the accumulation period Ts of all the imaging pixel rows may be set to be the same, and the end time of the accumulation period Ts of all the imaging pixel rows may be set to be the same. Also, for the focus detection pixel rows, the start times of the accumulation periods Ts of all focus detection pixel rows are made the same in a period (non-overlapping period) different from the accumulation period Ts of the imaging pixel rows, and the accumulation period Ts. May be set to the same end time.

  In each of the above-described embodiments, an example in which one focus detection pixel row (V4) is arranged between two imaging pixel rows (V3 and V5) has been described, but two imaging pixel rows (V3 and V3) are arranged. A plurality of focus detection pixel rows (V4) may be arranged between V5).

  Further, the position of the focus detection pixel row is not particularly limited as long as it is adjacent to at least one of the imaging pixel rows. For example, one or a plurality of rows may be provided at the extreme end of the pixel portion 100 without being arranged between two imaging pixel rows (V3 and V5). For example, when the pixel unit 100 includes n pixel rows (V1 to Vn), the pixel row V1 and / or the pixel row Vn may be set as a focus detection pixel row. Furthermore, for example, the pixel rows V1 to V5 and / or the pixel rows Vn-4 to Vn may be used as focus detection pixel rows. In each of the above embodiments, the pixel group for imaging and the pixel group for focus detection are used as a combination of the pixel groups, but the present invention is not limited to this. For example, the focus detection pixel group may be replaced with a pixel group for detecting temperature or a pixel group for detecting near infrared.

(Example 6)
As an example of the drive timing of this modification, FIG. 11 shows a modification of FIG. Here, FIG. 7 is given as an example, but it is not always necessary to be FIG. Further, description of the driving similar to the driving timing chart of FIG. 7 is omitted.

  In the present embodiment, the pixels in the imaging pixel row V1 and the pixels in the imaging pixel row V2 shown in FIG. The pixels in the imaging pixel row V3 and the pixels in the focus detection pixel row V4 share the FD. The following pixel rows also share the FD 108 with two pixels in the same order. Therefore, some of the plurality of imaging pixel rows share the FD 108 with the pixels in the focus detection pixel row.

  The other part (for example, V1) of the plurality of imaging pixel rows shares the FD among the pixels in the imaging pixel row. In addition, a configuration in which some of the pixels in the imaging pixel row share the FD 108 with the pixels in the pixel rows other than the imaging and focus detection pixels.

  In this embodiment, pixels sharing the FD 108 share the reset transistor 105, the amplification transistor 106, and the selection transistor 107. Therefore, the drive pulses pSEL3 and pRES3 are shared by the imaging pixel row V3 and the focus detection pixel row V4.

  In the first period S1, during the period t7-t10 from the time t7 when the driving pulse pRES3 for resetting the FD 108 in the imaging pixel rows V3 and V4 is turned off to the time t10 when the output period Top ends, the driving pulse pTX3 is changed. Turn on and turn off the drive pulse pTX4. As a result, only the signal of the focus detection pixel row V3 is output to the FD.

  This suppresses mixing of the signals of the focus detection pixel row V4 when outputting the noise signal of the imaging pixel row V3 or when outputting the signal of the imaging pixel row V3. Here, the first period has been described as an example. In the second period S2, the same effect can be obtained by turning off the drive pulse pTX3 in the period t22-t18.

  If the time at which the drive pulse pTX4 is turned off from the first period S1 is the same as the time t7 at which the reset operation of the FD 108 closest to the output period in which the signal is output ends, the transfer transistor 103 The potential of the FD 108 may fluctuate due to the coupling capacitance between the gate and the FD 108 and the return charge when the transfer transistor 103 is turned off, resulting in noise.

  Therefore, it is better to set the start time of the period t7-t10 in which the drive pulse pTX4 is turned off in the first period S1 before the time t7.

  Preferably, in the horizontal scanning period HD3 including the time t7 when the reset operation of the FD 108 closest to the output period in which signals from some pixels in each pixel row are output is performed, the operation of turning the drive pulse pTX4 from on to off is performed. Not performed. In this case, for example, an operation of turning off the drive pulse pTX4 from on to off in a horizontal scanning period before the horizontal scanning period HD3 such as the horizontal scanning periods HD1 and HD2 is performed. Thereby, the noise which arises when the electric potential of FD displaces can be suppressed.

  In the second period S2, it is better to set the start time of the period t22-t18 in which the drive pulse pTX3 is turned off before the time t22. Preferably, in the horizontal scanning period HD10 including the time t22 when the reset operation of the FD 108 closest to the output period in which signals from some pixels in each pixel row are output is performed, an operation of turning off the driving pulse pTX3 is performed. Absent. In this case, for example, an operation of turning pTX3 from on to off in a horizontal scanning period before the horizontal scanning period HD10 such as the horizontal scanning periods HD8 and HD9 is performed.

  Alternatively, when the capacity of the FD is 3 fF to 6 fF, as shown in FIG. 12, in the first period S1, it is better to set the start time of the period t7-t10 at least 9 μsec before the time t7. That is, the operation for turning the drive pulse pTX4 from on to off is not performed from time t7 or more before 9 μsec to time t10. Similarly, in the second period S2, it is better that the start time of the period t22-t18 is 9 μsec or more before the time t22. That is, the operation for turning the drive pulse pTX3 from on to off is not performed from time t22 or more before 9 μsec to time t18.

  According to such a configuration, the potential fluctuation of the FD 108 caused by turning off pTX4 or pTX3 is suppressed. Thereby, kTC noise included in the output signal can be suppressed.

DESCRIPTION OF SYMBOLS 10 Imaging device 100 Pixel part 101 Pixel

Claims (18)

A pixel unit having a plurality of pixels each having a photoelectric conversion unit arranged in a matrix;
An image pickup apparatus in which a charge accumulation period of each pixel is controlled by an electronic shutter operation, and a signal based on the charge generated in the charge accumulation period is output by sequentially scanning pixel rows,
The pixel portion is
A first pixel group having a plurality of first pixel rows;
Each having a second pixel group having a plurality of second pixel rows arranged adjacent to the first pixel row,
The charge accumulation periods of the first pixel row and the second pixel row arranged adjacent to each other are included in the other pixel row after the charge accumulation period of each photoelectric conversion unit included in the one pixel row ends. Controlled to start the charge accumulation period of each photoelectric conversion unit,
By sequentially scanning the plurality of first pixel rows of the first pixel group and then sequentially scanning the plurality of second pixel rows of the second pixel group, the signals of the plurality of first pixel rows and the plurality of the plurality of first pixel rows are scanned. The signal of the second pixel row is output,
An output period in which signals from the pixels of the first pixel row are output from the end of the charge accumulation period of the second pixel row of the first pixel row and the second pixel row arranged adjacent to each other. The image pickup apparatus is characterized in that the charge accumulated in the photoelectric conversion unit of the pixels in the second pixel row is reset during at least a part of the period before the process ends. The charge accumulation period of the plurality of first pixel rows is:
This is started by sequentially resetting the charges accumulated in the photoelectric conversion units of the pixels of each first pixel row for each row, and the charges accumulated in the photoelectric conversion units of the pixels of each first pixel row are sequentially changed for each row. It ends by transferring,
The charge accumulation period of the plurality of second pixel rows is:
Starting by sequentially resetting the charges accumulated in the photoelectric conversion units of the pixels in each second pixel row for each row, the charges accumulated in the photoelectric conversion units of the pixels in each second pixel row are sequentially changed for each row. The imaging apparatus according to claim 1, wherein the imaging apparatus is terminated by transferring.   3. The photoelectric conversion unit of a pixel of the second pixel row adjacent to the first pixel row is reset simultaneously with a reset operation for starting the charge accumulation period of the first pixel row. The imaging device described.   In at least part of the period from the end of the charge accumulation period of the first pixel row to the end of the output period of the first pixel row, the photoelectrical of the pixels of the second pixel row adjacent to the first pixel row The imaging device according to claim 2, wherein the conversion unit is reset.   5. The photoelectric conversion unit of a pixel of the second pixel row adjacent to the first pixel row is reset during a part of the charge accumulation period of the first pixel row. The imaging device according to any one of the above.   Between the end of the output period of the first pixel row and the start of the charge accumulation period of the second pixel row adjacent to the first pixel row, the photoelectric conversion unit of the pixel of the second pixel row The imaging apparatus according to claim 2, wherein the imaging apparatus is reset.   2. The second pixel row continues to reset a photoelectric conversion unit of a pixel of the second pixel row in a period excluding the charge accumulation period and the output period of the second pixel row. The imaging device according to any one of 6.   The said 1st pixel row is comprised including the pixel for imaging, and the said 2nd pixel row is comprised including the pixel for focus detection, The any one of Claim 1 thru | or 7 characterized by the above-mentioned. Imaging device.   The imaging apparatus according to claim 1, wherein the electronic shutter operation is a rolling shutter operation. An imaging apparatus in which each pixel array includes a plurality of pixel rows each having a photoelectric conversion unit,
The plurality of pixel rows include a first pixel group composed of a plurality of first pixel rows and a second pixel group composed of a plurality of second pixel rows,
One pixel row of the plurality of second pixel rows is arranged adjacent to at least one pixel row of the plurality of first pixel rows,
The first pixel group and the second pixel group start a charge accumulation period in each photoelectric conversion unit of the second pixel group after ending a charge accumulation period in each photoelectric conversion unit of the first pixel group Controlled to
At the same time as resetting each photoelectric conversion unit of the pixel row to start a charge accumulation period in each photoelectric conversion unit of the at least one pixel row of the plurality of first pixel rows, adjacent to the pixel row An image pickup apparatus comprising: resetting each photoelectric conversion unit of one pixel row of the plurality of second pixel rows arranged in this manner. An imaging apparatus in which a plurality of pixel rows each having a plurality of pixels each having a photoelectric conversion unit are arranged,
The plurality of pixel rows include a first pixel row and a second pixel row disposed adjacent to the pixel row,
From the first pixel row of the signal based on the charge accumulated in each photoelectric conversion unit of the first pixel row from the start of charge accumulation in each photoelectric conversion unit of the first pixel row within one frame period Of the signal based on the charge accumulated in each photoelectric conversion unit in the second pixel row from the start of charge accumulation in each photoelectric conversion unit in the second pixel row from the first period until the reading of The second period until the reading from the second pixel row is completed is controlled so that the second period starts after the first period ends,
An imaging apparatus comprising: resetting each photoelectric conversion unit in the second pixel row within the first period and before reading out the signal from the first pixel row.   The imaging apparatus according to claim 11, wherein each photoelectric conversion unit in the second pixel row is reset over the entire first period. The plurality of pixel rows include a plurality of first pixel rows and a plurality of second pixel rows less than the number of the first pixel rows;
The imaging device according to claim 11, wherein any one of the plurality of first pixel rows is arranged next to each of the plurality of second pixel rows.   Within the one frame period, the charge accumulation starts last in the plurality of first pixel rows and the charge accumulation starts first in the plurality of second pixel rows. The imaging device according to claim 13, wherein another pixel row of the plurality of first pixel rows is arranged between the pixel row.   At least some pixel rows of the plurality of first pixel rows are arranged between one pixel row of the plurality of second pixel rows and another pixel row. The imaging device according to claim 10 or 14.   In the plurality of first pixel rows, charge accumulation in each photoelectric conversion unit is started sequentially for each row, and in the plurality of second pixel rows, charge in each photoelectric conversion unit is sequentially started for each row. The image pickup apparatus according to claim 15, wherein the storage of the image is started. Each of the plurality of pixels has a floating diffusion,
The imaging device according to claim 10, wherein some of the pixels in the plurality of first pixel rows share floating diffusion with some of the pixels in the plurality of second pixel rows. In some pixels of the first pixel row and some pixels of the second pixel row sharing the floating diffusion,
From the end of the reset operation of the floating diffusion that is closest to the output period in which signals from some pixels in the first pixel row are output, from the end of the output period, to a part of the second pixel row The image pickup apparatus according to claim 17, wherein charge transfer to the floating diffusion of a pixel is not performed.

Images