JP2016039279A - Processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a processing method by which an insulating film of a low-dielectric constant and a metal pattern located on a street can be removed appropriately.SOLUTION: A processing method comprises: a mask step for covering a surface of a device (17a) with a surface protective member (23) and leaving a street (15) exposed; a wet etching step for supplying a workpiece (11) with a wet etchant to remove a metal pattern (21) exposed on the street; a cleaning step for cleaning the workpiece after the wet etching step with a cleaning solvent; a drying step for drying the workpiece after the cleaning step; and a dry etching step for removing, by dry etching, a low-dielectric constant insulating film (19) exposed on the street of the workpiece after the drying step. The wet etching step, the cleaning step, the drying step, and the dry etching step are repeated in turn until the metal pattern and the low-dielectric constant insulating film on the street are removed and thus a semiconductor substrate is exposed.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a processing method for processing a plate-shaped workpiece.

  In a small and lightweight electronic device typified by a mobile phone, a device chip including an electronic circuit (device) such as an IC is indispensable. For example, a device chip is formed by dividing the surface of a semiconductor substrate made of a material such as silicon with a plurality of division lines called streets, forming devices in each region, and then dividing the semiconductor substrate along the streets. Can be manufactured.

  In recent years, a technique for insulating between device wirings with a low dielectric constant insulating film called a low-k film has been put into practical use. By using a low-k film for insulation between wirings, even if the wiring interval is narrowed due to miniaturization of the process, the capacitance generated between the wirings can be suppressed and signal delay can be suppressed. Thereby, the processing capability of the device is maintained high.

  The Low-k film described above is formed by stacking a plurality of layers, and its mechanical strength is low. Therefore, for example, when the semiconductor substrate is cut by a cutting blade and divided, the Low-k film is peeled off from the semiconductor substrate. In order to solve this problem, there has been proposed a processing method in which a semiconductor substrate is cut after irradiating a laser beam to remove a part of the Low-k film (for example, see Patent Document 1).

  In this processing method, first, a laser beam is irradiated along the street from the surface side of the semiconductor substrate, and a part of the Low-k film is removed by ablation. After that, if the region where the Low-k film is removed is cut with a cutting blade, the semiconductor substrate can be divided while suppressing the possibility of peeling of the Low-k film.

  Incidentally, a test element called a TEG (Test Elements Group) may be arranged on the street of the semiconductor substrate. When the above-described processing method is applied to the division of the semiconductor substrate, the laser beam is blocked by the metal pattern included in the TEG, and the Low-k film cannot be removed appropriately. If the output of the laser beam is increased, the Low-k film can be removed, but in that case, debris is likely to be scattered and the quality of the device chip is also deteriorated.

  In order to divide the semiconductor substrate, it may be possible to adopt a processing method using plasma etching (see, for example, Patent Documents 2 and 3). However, plasma etching for processing a semiconductor substrate made of a material such as silicon cannot adequately remove the metal pattern included in the TEG.

JP 2003-320466 A JP 2003-197569 A JP 2004-172365 A

  The present invention has been made in view of such problems, and an object of the present invention is to provide a processing method capable of appropriately removing a low dielectric constant insulating film and a metal pattern on a street.

  According to the present invention, a plurality of low dielectric constant insulating films and metal patterns are laminated on the surface of a semiconductor substrate, and devices are formed in a plurality of regions partitioned by streets formed in a lattice shape. A processing method for removing the low dielectric constant insulating film and the metal pattern on a street of a workpiece, the surface of the device formed on the workpiece being covered with a surface protection member, and a mask exposing the street A wet etching step of supplying a wet etching solution to the workpiece to remove the metal pattern exposed on the street, a cleaning step of cleaning the workpiece after the wet etching step with a cleaning solution, and the cleaning Drying the workpiece after the process, and dry etching the low dielectric constant insulating film exposed on the street of the workpiece after the drying process A dry etching step that is removed by etching, the wet etching step, the cleaning step, and the drying step until the metal pattern on the street and the low dielectric constant insulating film are removed to expose the semiconductor substrate. And a dry etching process are sequentially repeated.

  In the present invention, the metal pattern and the low dielectric constant insulating film on the street are removed, and the work piece from which the semiconductor substrate is exposed is dry-etched, and the work piece is separated into individual device chips along the street. It is preferable to further include a dividing step of dividing.

  The processing method according to the present invention includes a wet etching process for removing a metal pattern exposed on the street, a cleaning process for cleaning the workpiece, a drying process for drying the workpiece, and a low dielectric that is exposed on the street. Since the dry etching process for removing the dielectric constant insulating film is repeatedly performed, the low dielectric constant insulating film and the metal pattern on the street can be appropriately removed.

FIG. 1A is a perspective view schematically illustrating a configuration example of a workpiece, and FIG. 1B is a cross-sectional view schematically illustrating a configuration example of the workpiece. 2A is a cross-sectional view schematically showing the workpiece after the mask process, and FIG. 2B is a cross-sectional view schematically showing the workpiece after the wet etching process. 2 (C) is a cross-sectional view schematically showing the workpiece after the dry etching step. FIG. 3A is a cross-sectional view schematically showing the workpiece after removing the low dielectric constant insulating film and the metal pattern in the region overlapping with the street, and FIG. It is sectional drawing which shows a to-be-processed object typically.

  Embodiments of the present invention will be described with reference to the accompanying drawings. The processing method according to this embodiment includes a mask process (see FIG. 2A), a wet etching process (see FIG. 2B), a cleaning process, a drying process, and a dry etching process (see FIG. 2C), And a dividing step (see FIGS. 3A and 3B).

  In the mask process, the surface of the device provided in the workpiece on which the low dielectric constant insulating film and the metal pattern are laminated is covered with a surface protection member to expose the streets. In the wet etching process, the metal pattern exposed in the street is removed by wet etching.

  In the cleaning process, the workpiece after the wet etching process is cleaned with a cleaning liquid. In the drying process, the workpiece after the cleaning process is dried. In the dry etching process, the low dielectric constant insulating film exposed in the street is removed by dry etching. The wet etching process, the cleaning process, the drying process, and the dry etching process are repeated until the low dielectric constant insulating film and the metal pattern in the region overlapping the street (on the street) are removed.

  In the dividing step, the work piece from which the low dielectric constant insulating film and the metal pattern in the region overlapping with the street are removed is divided into a plurality of device chips along the street. Hereinafter, the processing method according to the present embodiment will be described in detail.

  First, a workpiece to be processed by the processing method of this embodiment will be described. FIG. 1A is a perspective view schematically illustrating a configuration example of a workpiece, and FIG. 1B is a cross-sectional view schematically illustrating a configuration example of the workpiece.

  As shown in FIGS. 1A and 1B, the workpiece 11 of this embodiment includes a disk-shaped semiconductor substrate 13 made of a semiconductor material such as silicon. The upper surface (front surface) 13a side of the semiconductor substrate 13 is divided into a central device region and an outer peripheral surplus region surrounding the device region.

  The device area is further divided into a plurality of areas by streets (division lines) arranged in a lattice pattern, and a device 17a such as an IC is formed in each area. On the other hand, as shown in FIG. 1B, a TEG (Test Elements Group) 17b, which is a test element, is arranged in an area overlapping the street 15.

  On the upper surface 13 a of the semiconductor substrate 13, a plurality of low dielectric constant insulating films 19 called low-k films and a plurality of metal patterns 21 constituting wirings and the like are stacked. The low dielectric constant insulating film 19 and the metal pattern 21 constitute part of the devices 17a and TEG 17b described above.

  In the processing method of this embodiment, first, the surface of the device 17a is covered with a surface protection member resistant to etching, and a mask process for exposing the street 15 is performed. FIG. 2A is a cross-sectional view schematically showing the workpiece after the mask process.

  In the masking process, first, the surface side of the workpiece 11 (the upper surface 13a side of the semiconductor substrate 13) is covered with a negative or positive photoresist that is resistant to wet etching and dry etching described later.

  Next, using a photomask provided with a transmission pattern that transmits light corresponding to the device 17a or a shielding pattern that blocks light corresponding to the device 17a, a photoresist that covers the surface side of the workpiece 11 is formed. The surface protection member 23 is formed by exposure and development.

  In this way, the surface of the device 17a can be covered with the surface protection member 23 resistant to wet etching and dry etching to expose the street 15 by so-called photolithography. In addition, the formation method of the surface protection member 23 is arbitrary.

  For example, the surface protection member 23 can be formed by a method of curing a resist material dropped on the surface of the device 17a using a template having a plurality of openings corresponding to the device 17a.

  After the mask process, a wet etching process for removing the metal pattern 21 exposed in the street 15 is performed. FIG. 2B is a cross-sectional view schematically showing the workpiece 11 after the wet etching process. In this wet etching step, a wet etching solution that reacts with the metal pattern 21 is supplied to the surface side of the workpiece 11.

  As the wet etching solution, for example, a mixed solution containing hydrofluoric acid, a mixed solution containing nitric acid, or the like can be used. As shown in FIG. 2B, when the metal pattern 21 exposed in the street 15 is removed, the wet etching process is finished. In this wet etching process, it is only necessary to remove the metal pattern 21 to such an extent that the low dielectric constant insulating film 19 and the like in the lower layer are exposed.

  After the wet etching process, a cleaning process for cleaning the workpiece 11 is performed. In the cleaning process, a predetermined cleaning solution is supplied to the surface side of the workpiece 11 to remove the wet etching solution and etching residue remaining on the workpiece 11. After this cleaning process, a drying process for drying the workpiece 11 is performed.

  After the drying process, a dry etching process for removing the low dielectric constant insulating film 19 exposed in the street 15 is performed. FIG. 2C is a cross-sectional view schematically showing the workpiece 11 after the dry etching process.

  In the dry etching process, first, the workpiece 11 is carried into a processing space of a vacuum chamber (not shown). Thereafter, the processing space is sealed and exhausted. In this state, when a predetermined high frequency power is supplied to the pair of electrodes in the vacuum chamber while supplying a dry etching gas at a predetermined flow rate, plasma including radicals and ions is generated between the electrodes, and the workpiece is processed. 11 can be dry etched (plasma etched).

As the dry etching gas, for example, a fluorine-based gas typified by SF ₆ , CF ₄ or the like can be used. Conditions such as the power supplied to the electrodes and the flow rate of the gas are set within a range in which the low dielectric constant insulating film 19 can be appropriately removed. When the low dielectric constant insulating film 19 exposed in the street 15 is removed, the dry etching process is finished. In this dry etching process, it is only necessary to remove the low dielectric constant insulating film 19 to such an extent that at least the underlying metal pattern 21 and the like are exposed.

  As described above, the workpiece 11 of the present embodiment has a plurality of low dielectric constant insulating films 19 and a plurality of metal patterns 21 that are stacked. Therefore, there is a high possibility that the low dielectric constant insulating film 19 and the metal pattern 21 in the region overlapping the street 15 cannot be completely removed only by performing the wet etching process and the dry etching process once.

  Therefore, in the processing method of this embodiment, the wet etching process, the cleaning process, the drying process, and the dry etching process are repeated until the low dielectric constant insulating film 19 and the metal pattern 21 in the region overlapping the street 15 are removed. FIG. 3A is a cross-sectional view schematically showing the workpiece 11 after the low dielectric constant insulating film 19 and the metal pattern 21 in the region overlapping the street 15 are removed.

  As shown in FIG. 3A, after removing the low dielectric constant insulating film 19 and the metal pattern 21 in the region overlapping with the street 15 and exposing the upper surface 13 a of the semiconductor substrate 13, the area covered along the street 15 is covered. A dividing step of dividing the workpiece 11 is performed. FIG. 3B is a cross-sectional view schematically showing the workpiece 11 after the dividing step.

  In the dividing step of this embodiment, the workpiece 11 is divided by dry etching. Specifically, as in the dry etching process described above, first, the workpiece 11 is carried into the processing space of the vacuum chamber. Thereafter, the processing space is sealed and exhausted.

  In this state, when a predetermined high frequency power is supplied to the pair of electrodes arranged in the vacuum chamber while supplying a dry etching gas at a predetermined flow rate, plasma including radicals and ions is generated between the electrodes, The semiconductor substrate 13 exposed in the street 15 can be dry-etched.

  The dry etching gas may be the same as in the dry etching process described above. Conditions such as the power supplied to the electrodes and the flow rate of the gas are set within a range where the semiconductor substrate 13 can be appropriately processed. As shown in FIG. 3B, when the workpiece 11 is divided into a plurality of device chips along the street 15, the dividing process ends. In addition, after completion | finish of a division | segmentation process, it is good to remove the surface protection member 23 which remain | survives on the surface side of the to-be-processed object 11 (device chip) by methods, such as ashing.

  As described above, in the processing method according to the present embodiment, the wet etching step for removing the metal pattern 21 exposed on the street 15, the cleaning step for cleaning the workpiece 11, and the drying for drying the workpiece 11. Since the process and the dry etching process for removing the low dielectric constant insulating film 19 exposed on the street 15 are repeated, the low dielectric constant insulating film 19 and the metal pattern 21 on the street 15 can be appropriately removed.

  In addition, this invention is not limited to description of the said embodiment, A various change can be implemented. For example, in the dividing step of the above embodiment, the workpiece 11 is divided by dry etching, but the workpiece 11 may be divided by a method such as cutting or laser ablation.

  In addition, the configurations, methods, and the like according to the above-described embodiments can be appropriately modified and implemented without departing from the scope of the object of the present invention.

11 Workpiece 13 Semiconductor substrate 13a Upper surface (surface)
15 Street (scheduled division line)
17a device 17b TEG
19 Low dielectric constant insulating film 21 Metal pattern 23 Surface protection member

Claims (2)

A street of a workpiece in which a plurality of low dielectric constant insulating films and metal patterns are laminated on a surface of a semiconductor substrate, and a device is formed in a plurality of regions partitioned by a grid-shaped street. A processing method for removing the low dielectric constant insulating film and the metal pattern on the top,
A mask process of covering the surface of the device formed on the workpiece with a surface protection member and exposing the street;
A wet etching step of supplying a wet etching solution to the workpiece to remove the metal pattern exposed on the street;
A cleaning step of cleaning the workpiece after the wet etching step with a cleaning liquid;
A drying step of drying the workpiece after the cleaning step;
A dry etching step of removing the low dielectric constant insulating film exposed on the street of the work piece by dry etching after the drying step;
The wet etching step, the cleaning step, the drying step, and the dry etching step are sequentially repeated until the metal pattern on the street and the low dielectric constant insulating film are removed and the semiconductor substrate is exposed. Processing method. A dividing step of dividing the workpiece into individual device chips along the street by performing dry etching on the workpiece from which the metal pattern and the low dielectric constant insulating film on the street are removed and the semiconductor substrate is exposed. The processing method according to claim 1, further comprising: