JP2016001646A - Solid-state imaging device and manufacturing method thereof - Google Patents

Abstract

A solid-state imaging device capable of preventing a decrease in the saturation charge amount Qs of a photodiode is provided. A solid-state imaging device includes a photodiode, a pixel isolation region, and a high concentration portion. The photodiodes are provided on a semiconductor substrate having a main surface and are arranged along the main surface. The pixel isolation region is provided on the semiconductor substrate, includes a non-carrier first impurity and a second impurity made of boron, and is disposed between the plurality of photodiodes. The high concentration portion is provided in the pixel isolation region, and both the concentration of the first impurity and the concentration of the second impurity are relatively high. [Selection] Figure 1

Description

  The present technology relates to a solid-state imaging device provided with a pixel separation region for partitioning photodiodes, and a manufacturing method thereof.

  A general solid-state imaging device has a semiconductor substrate on which photodiodes are formed side by side. A pixel separation region for partitioning the photodiodes is provided for each pixel on the semiconductor substrate of the solid-state imaging device. The pixel isolation region is formed by, for example, boron (B) ion implantation into a semiconductor substrate.

  When the dose of boron in the pixel isolation region is insufficient, the photodiodes are not sufficiently separated by the pixel isolation region, and color mixing between pixels occurs. On the other hand, if the dose of boron in the pixel isolation region is excessive, defects are likely to occur in the photodiode. That is, the quality of the solid-state imaging device is deteriorated if the dose of boron in the pixel isolation region is too large or too small.

  Even when the dose of boron to the pixel isolation region is appropriate, boron in the pixel isolation region may diffuse into the photodiode depending on the thermal history in the manufacturing process. In such a case, since the boron concentration in the pixel isolation region is lowered, isolation of each photodiode by the pixel isolation region tends to be insufficient.

  Further, the diffusion of boron into each photodiode reduces the photoelectric conversion region in each photodiode. As a result, the saturation charge amount Qs of the photodiode is reduced. In recent years, with the miniaturization of pixels of a solid-state imaging device, miniaturization of each photodiode has progressed. In a small photodiode, a decrease in the saturation charge amount Qs due to boron diffusion appears more remarkably.

  Patent Document 1 discloses a technique capable of suppressing diffusion of boron in the P-type region into the N-type region. In the technique described in Patent Document 1, a silicon carbide layer is disposed between a P-type region and an N-type region. Since boron is difficult to diffuse into the silicon carbide layer, diffusion of boron in the P-type region into the N-type region is prevented by the silicon carbide layer.

JP 2011-077498 A

  In the pixel isolation region formed by boron ion implantation, a boron concentration distribution occurs in the depth direction due to the nature of the ion implantation method. In the pixel isolation region, the higher the boron concentration, the easier the boron diffuses into the photodiode, and the lower the boron concentration, the harder the boron diffuses into the photodiode. That is, in the pixel isolation region, a high concentration portion where boron easily diffuses into the photodiode and a low concentration portion where boron hardly diffuses into the N-type region are generated.

  On the other hand, in the technique described in Patent Document 1, even if boron diffusion from the low concentration portion of the P-type region to the N-type region can be satisfactorily suppressed by the silicon carbide layer, There may be a case where the diffusion of boron into the mold region cannot be sufficiently suppressed. Therefore, even if the technique disclosed in Patent Document 1 is used, boron in the pixel isolation region is diffused into the photodiode, and the saturation charge amount Qs of the photodiode is reduced.

  In view of the circumstances as described above, an object of the present technology is to provide a solid-state imaging device capable of preventing a decrease in the saturation charge amount Qs of a photodiode, and a manufacturing method thereof.

In order to achieve the above object, a solid-state imaging device according to an embodiment of the present technology includes a photodiode, a pixel separation region, and a high concentration portion.
The photodiodes are provided on a semiconductor substrate having a main surface and are arranged along the main surface.
The pixel isolation region is provided on the semiconductor substrate, includes a non-carrier first impurity and a second impurity made of boron, and is disposed between the plurality of photodiodes.
The high concentration portion is provided in the pixel isolation region, and both the concentration of the first impurity and the concentration of the second impurity are relatively high.

  In this configuration, the high-concentration portion containing a large amount of boron in the pixel isolation region contains a large amount of first non-carrier impurities having a function of suppressing the diffusion of boron. The higher the concentration of boron in the pixel isolation region, the easier it is to diffuse, and the higher the concentration of the first impurity in the pixel isolation region, the better the diffusion of boron.

  Therefore, in the high concentration portion, although high concentration boron tends to diffuse into the photodiode, the high concentration first impurity acts to prevent diffusion of boron into the photodiode. As described above, in this configuration, even when there is a boron concentration distribution in the pixel isolation region, the diffusion of boron into the photodiode is favorably suppressed by the first impurity. Therefore, in this solid-state imaging device, it is possible to prevent the saturation charge amount Qs of the photodiode from decreasing.

The first impurity may be made of carbon.
In this configuration, since the first impurity made of carbon can more effectively suppress boron diffusion, it is possible to more effectively prevent the saturation charge amount Qs of the photodiode from decreasing.

The high concentration portion may include a plurality of high concentration portions having different depths from the main surface.
In this configuration, even when the pixel isolation region includes a plurality of high-concentration portions having a high boron concentration, the diffusion of boron into the photodiode is favorably suppressed by the high-concentration first impurities in the plurality of high-concentration portions. can do.

The semiconductor substrate may further include a lower layer region that includes the first impurity and the second impurity and is opposed to the main surface with the plurality of photodiodes interposed therebetween.
In this configuration, each photodiode can be partitioned by the pixel isolation region and the lower layer region, and boron diffusion from the pixel isolation region and the lower layer region to the photodiode can be well suppressed.

A high concentration layer extending in parallel with the main surface over the high concentration portion and the photodiode and having a relatively high concentration of the first impurity may be further provided.
In this configuration, the first impurity can be ion-implanted into the pixel isolation region without patterning the pixel isolation region with respect to the semiconductor substrate. Therefore, the manufacturing process can be simplified and the manufacturing cost can be reduced.

In the method for manufacturing a solid-state imaging device according to an aspect of the present technology, a pixel separation region is formed which is provided on a semiconductor substrate having a main surface and partitions between a plurality of photodiodes arranged along the main surface. The
First ion implantation of non-carrier first impurities is performed on the semiconductor substrate from the main surface under conditions based on a predetermined range position.
The semiconductor substrate subjected to the first ion implantation is subjected to heat treatment.
Second ion implantation of a second impurity made of boron is performed from the main surface to the pixel isolation region of the semiconductor substrate subjected to the heat treatment under a condition based on the range position.

  In this configuration, before the second ion implantation of boron is performed at the range position of the pixel isolation region, the first ion implantation of the non-carrier first impurity is performed at the range position in advance. Thereby, in the pixel isolation region, the first impurity by the first ion implantation and the boron by the second ion implantation have the same concentration distribution.

  Therefore, since the concentration of the first impurity is high in the portion where the boron concentration is high, the diffusion of boron into the photodiode is well suppressed by the first impurity. In addition, since the concentration of the first impurity is low in the portion where the boron concentration is low, the dose of the first impurity in the pixel isolation region is suppressed, and the occurrence of defects in the photodiode is suppressed.

The first ion implantation may be performed on the pixel isolation region.
The first ion implantation may be performed on the plurality of photodiodes and the pixel isolation region.
Thus, a specific configuration for performing the first ion implantation in the pixel isolation region is provided. In the configuration in which the first ion implantation is performed on the plurality of photodiodes and the pixel separation region, it is not necessary to pattern the main surface of the semiconductor substrate before the first ion implantation, which simplifies the manufacturing process and reduces the manufacturing cost. Can be planned.

The dose amount of the first impurity for each range position by the first ion implantation may be in the range of 5 × 10 ¹⁰ ions / cm ^{2 to} 1 × 10 ¹³ ions / cm ² .
In this configuration, the dose amount of the first impurity at each range position by the first ion implantation is sufficient to effectively suppress the diffusion of boron into the photodiode, and the generation of defects in the photodiode is prevented. It can be in the range which can be suppressed.

In the heat treatment, the semiconductor substrate may be held at 1000 ° C. or higher and 10 minutes or longer and 10 hours or shorter.
With this configuration, it is possible to satisfactorily recover defects generated in the photodiode by the first ion implantation.

The first ion implantation and the second ion implantation may be performed under a plurality of conditions based on a plurality of different range positions.
In this configuration, before the second ion implantation is performed under a plurality of conditions based on a plurality of different range positions, the first is performed under a plurality of conditions based on a plurality of range positions similar to the second ion implantation. Ion implantation is performed. Thereby, in the pixel isolation region, the first impurity by the first ion implantation and the boron by the second ion implantation have the same concentration distribution.

The first ion implantation and the second ion implantation may be performed not only on the pixel isolation region but also on a lower layer region facing the main surface with the plurality of photodiodes interposed therebetween.
In this configuration, each photodiode can be partitioned by the pixel isolation region and the lower layer region, and boron diffusion from the pixel isolation region and the lower layer region to the photodiode can be well suppressed.

Further, the semiconductor substrate subjected to the second ion implantation may be subjected to heat treatment.

With this configuration, it is possible to satisfactorily recover defects generated in the photodiode by the second ion implantation.

As described above, according to the present technology, it is possible to provide a solid-state imaging device capable of preventing a decrease in the saturation charge amount Qs of the photodiode and a manufacturing method thereof.
Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a fragmentary sectional view of the solid-state image sensing device concerning a 1st embodiment of this art. It is a figure which shows the density | concentration distribution of the impurity in the part enclosed with the dashed-dotted line of FIG. 1 of the said solid-state image sensor. It is a flowchart which shows the manufacturing method of the said solid-state image sensor. It is a fragmentary sectional view in the manufacturing process of the above-mentioned solid-state image sensing device. It is a figure which shows the density | concentration distribution of the impurity in the manufacturing process of the said solid-state image sensor. It is a fragmentary sectional view in the manufacturing process of the above-mentioned solid-state image sensing device. It is a flowchart which shows the manufacturing method of the solid-state image sensor which concerns on 2nd Embodiment of this technique. It is a figure which shows the density | concentration distribution of the impurity in the manufacturing process of the said solid-state image sensor. It is a fragmentary sectional view in the manufacturing process of the above-mentioned solid-state image sensing device. It is a flowchart which shows the manufacturing method of the solid-state image sensor which concerns on 3rd Embodiment of this technique. It is a fragmentary sectional view in the manufacturing process of the above-mentioned solid-state image sensing device. It is a fragmentary sectional view in the manufacturing process of the above-mentioned solid-state image sensing device.

Hereinafter, embodiments according to the present technology will be described with reference to the drawings.
In the drawing, an X axis, a Y axis, and a Z axis that are orthogonal to each other are shown as appropriate. The X axis, Y axis, and Z axis are common in all drawings.

<First Embodiment>
FIG. 1 is a partial cross-sectional view of a solid-state imaging device 1 according to the first embodiment of the present technology. The solid-state imaging device 1 according to the present embodiment is configured as a backside illumination type CMOS image sensor.

[Overall Configuration of Solid-State Image Sensor 1]
The solid-state imaging device 1 is configured in a flat plate shape extending along the XY plane, and includes a plurality of pixels 10R, 10G, and 10B arranged two-dimensionally along the XY plane. The solid-state imaging device 1 includes a semiconductor substrate 50, a color filter 30, and a lens array 40 that are stacked in the Z-axis direction.

  The semiconductor substrate 50 is configured as a silicon wafer having a first main surface 50a that is an upper surface in the Z-axis direction and a second main surface 50b that is a lower surface in the Z-axis direction.

  The semiconductor substrate 50 is provided with photodiodes 14 for the plurality of pixels 10R, 10G, and 10B. Each photodiode 14 includes an N-type region 11, an N-type layer 12, and a P-type layer 13. Further, the semiconductor substrate 50 includes a pixel isolation region 20 and a lower layer region 21 that partition the photodiode 14 for each of the pixels 10R, 10G, and 10B.

  N-type region 11 is an n − -type region containing a low-concentration N-type impurity, and is provided adjacent to second main surface 50 b of semiconductor substrate 50 with lower layer region 21 interposed therebetween. The N-type region 11 occupies most of the photodiode 14. The N-type layer 12 is an n + -type thin layer containing a high concentration of N-type impurities, and is provided adjacent to the N-type region 11 on the upper side in the Z-axis direction. Examples of N-type impurities that can be employed in the N-type region 11 and the N-type layer 12 include phosphorus (P) and arsenic (As).

  The P-type layer 13 is a p + -type thin layer containing a high concentration of boron (B). The P-type layer 13 is formed on the upper end of the photodiode 14 in the Z-axis direction, that is, on the first main surface 50 a of the semiconductor substrate 50. In contrast, it is provided adjacent to the upper side in the Z-axis direction. The P-type layer 13 and the N-type layer 12 form a PN junction.

  The pixel isolation region 20 and the lower layer region 21 are P-type regions containing low-concentration boron. The pixel isolation region 20 is adjacent to the photodiodes 14 in the X-axis direction and the X-axis direction, and partitions the photodiodes 14. The lower layer region 21 closes the lower side of the photodiode 14 in the Z-axis direction.

  Thus, the pixel isolation region 20 and the lower layer region 21 surround a portion other than the first main surface 50a of each photodiode 14 to partition each photodiode 14. The pixel isolation region 20 partitions the photodiodes 14 and prevents the movement of charges between the photodiodes 14. The lower layer region 21 shields each photodiode 14 from the outside, and prevents charge transfer between each photodiode 14 and the outside.

  The pixel isolation region 20 and the lower layer region 21 contain non-carrier impurities made of carbon (C) in addition to carrier impurities made of boron. The carbon in the pixel isolation region 20 and the lower layer region 21 has a function of suppressing diffusion of boron in the pixel isolation region 20 and the lower layer region 21 to the photodiode 14. Details of the pixel separation region 20 will be described later.

  The semiconductor substrate 50 is provided with pixel transistors such as a transfer transistor, a reset transistor, an amplification transistor, and a selection transistor. As an example, the transfer transistor is provided on the pixel isolation region 20 between the pixel 10R and the pixel 10G, and the reset transistor, the amplification transistor, and the selection transistor are provided on the pixel isolation region 20 between the pixel 10G and the pixel 10B. .

  The color filter 30 is arranged adjacent to the lower side in the Z-axis direction with respect to the semiconductor substrate 50, that is, facing the second main surface 50 b of the semiconductor substrate 50. The color filter 30 includes a red filter 30R disposed in the pixel 10R, a green filter 30G disposed in the pixel 10G, and a blue filter 30B disposed in the pixel 10B.

  The lens array 40 is disposed adjacent to the color filter 30 on the lower side in the Z-axis direction. The lens array 40 includes a plurality of lenses 40a arranged for each of the pixels 10R, 10G, and 10B. The lens array 40 is configured such that light that passes through the lens 40 a is incident on the photodiode 14 via the color filter 30 for each of the pixels 10R, 10G, and 10B.

[Pixel separation area 20]
FIG. 2 is a partial cross-sectional view of the solid-state imaging device 1 in which the portion surrounded by the alternate long and short dash line in FIG. 1 is enlarged. FIG. 2 shows a graph showing qualitatively the boron concentration distribution in the pixel separation region 20 and the carbon concentration distribution in the pixel separation region 20 together with a partial cross-sectional view of the solid-state imaging device 1. The vertical axis of each graph indicates the position of the pixel isolation region 20 in the Z-axis direction, and the horizontal axis of each graph indicates the concentration of boron and carbon.

  Boron and carbon are ion-implanted into the pixel isolation region 20 from the first main surface 50 a of the semiconductor substrate 50. In general, ion implantation is performed under conditions determined for each substance based on a predetermined range position Rp. The range position Rp indicates an average depth at which the ion-implanted material enters from the first main surface 50a of the semiconductor substrate 50.

  The concentration of the substance ion-implanted from the first main surface 50a of the semiconductor substrate 50 is highest at the range position Rp and decreases as the distance from the range position Rp increases. Therefore, a concentration distribution of the substance always occurs in the pixel isolation region 20 formed by ion implantation of the substance.

In the solid-state imaging device 1 according to the present embodiment, the position _{Rp 1,} Rp 2, Rp ₃ as three Fei shown in FIG. 2 is set, the condition based on the position _{Rp 1,} Rp 2, Rp ₃ as three Fei Boron and carbon are ion-implanted into the pixel isolation region 20. Therefore, as shown in the graph of FIG. 2, in the pixel isolation region 20, the boron concentration and the carbon concentration are relatively high at the three range positions Rp ₁ , Rp ₂ , Rp _3. Is formed.

  Boron in the pixel isolation region 20 diffuses into the N-type region 11 of the photodiode 14 according to the thermal history in the manufacturing process of the solid-state imaging device 1. Here, focusing only on the concentration of boron, diffusion of boron into the N-type region 11 of the photodiode 14 is more likely to occur in a portion where the boron concentration is higher, and the N-type region 11 of the photodiode 14 is directed toward a portion where the concentration of boron is lower. Difficult to cause boron diffusion to

  On the other hand, carbon in the pixel isolation region 20 suppresses diffusion of boron in the pixel isolation region 20 into the N-type region 11 of the photodiode 14. Here, focusing only on the carbon concentration, the higher the carbon concentration, the stronger the effect of suppressing the diffusion of boron into the N-type region 11 of the photodiode 14, and the lower the boron concentration, the higher the N of the photodiode 14. The action of suppressing the diffusion of boron into the mold region 11 is weak.

  In this regard, in the pixel isolation region 20 according to the present embodiment, as shown in the graph of FIG. 2, the boron concentration distribution and the carbon concentration distribution draw substantially similar curves. That is, the carbon concentration is high in the portion where the boron concentration is high, and the carbon concentration is low in the portion where the boron concentration is low. Thereby, the pixel isolation region 20 is configured such that the portion in which boron is more easily diffused has a stronger effect of suppressing the diffusion of boron.

  With this configuration, in the solid-state imaging device 1, the diffusion of boron into the N-type region 11 of the photodiode 14 is satisfactorily suppressed throughout the pixel isolation region 20 in the manufacturing process. In particular, the diffusion of boron into the N-type region 11 of the photodiode 14 is effectively suppressed even in the high concentration portion 22 where the boron concentration is high.

  As described above, in the solid-state imaging device 1, reduction of the N-type region 11 that is a photoelectric conversion region in each photodiode 14 due to diffusion of boron into the N-type region 11 of the photodiode 14 hardly occurs. Therefore, in the solid-state imaging device 1, it is possible to prevent the saturation charge amount Qs of the photodiode 14 from decreasing.

  Further, in the solid-state imaging device 1, the boron concentration in the pixel isolation region 20 is unlikely to decrease due to boron diffusion in the pixel isolation region 20. Therefore, in the solid-state imaging device 1, separation by the pixel separation region 20 between the photodiodes 14 is ensured, and color mixing between the pixels 10R, 10G, and 10B can be prevented.

  Furthermore, in the solid-state imaging device 1, since diffusion of boron to the N-type region 11 of the photodiode 14 is difficult to occur, the widths in the X-axis direction and the Y-axis direction of the N-type region 11 of each photodiode 14 are narrowed, and driving. Sometimes a strong electric field is prevented from being applied to the N-type region 11 of each photodiode 14. Thereby, in solid-state image sensor 1, generation | occurrence | production of screen defects, such as a white crack, can be prevented.

  The pixel isolation region 20 of the solid-state imaging device 1 is configured such that the concentration of carbon is low in the low concentration portion where the boron concentration between the high concentration portions 22 is low and boron diffusion is difficult to occur. Therefore, in the solid-state imaging device 1, the amount of carbon ion implantation (dose amount) in the pixel isolation region 20 is suppressed, and the occurrence of defects in the photodiode 14 is suppressed.

[Method for Forming Pixel Separation Region 20]
FIG. 3 is a flowchart showing a method for forming the pixel separation region 20. 4 to 6 are partial cross-sectional views of the semiconductor substrate 50 showing the formation process of the pixel isolation region 20. A method of forming the pixel isolation region 20 will be described along FIG. 3 with reference to FIGS.

(S10: Resist patterning)
As shown in FIG. 4A, a resist 60 is patterned on the first main surface 50a of the semiconductor substrate 50 in accordance with the pattern of the pixel isolation region 20. Thereby, the region other than the opening region 60a for forming the pixel isolation region 20 on the first main surface 50a of the semiconductor substrate 50 is covered with the resist 60, and is not affected by the ion implantation.

(S20: first ion implantation)
As shown in FIG. 4B, carbon ion implantation (first ion implantation) is performed from the first major surface 50a of the semiconductor substrate 50. The first ion implantation is performed under three conditions based on the three range positions Rp ₁ , Rp ₂ , and Rp ₃ , respectively. Thereby, the carbon implantation region 20a is formed below the opening region 60a in the Z-axis direction.

The carbon dose for each range position Rp ₁ , Rp ₂ , Rp ₃ in the first ion implantation is 5 × 10 ¹⁰ in order to effectively suppress the diffusion of boron into the photodiode 14 in the pixel isolation region 20. It is preferable that it is ions / cm ² or more. In addition, the dose amount for each range position Rp ₁ , Rp ₂ , Rp ₃ of carbon in the first ion implantation is 1 × 10 ¹³ ions / cm ² or less in order to suppress the occurrence of defects in the photodiode 14. It is preferable.

FIG. 5 is a diagram showing the concentration distribution of boron and carbon in the carbon implantation region 20a. As shown in FIG. 5, the carbon implanted region 20a, the carbon concentration at the position _{Rp 1, Rp 2, Rp 3} projected range are relatively high.

(S30: resist stripping)
As shown in FIG. 4C, the resist 60 is peeled off from the first main surface 50 a of the semiconductor substrate 50.

(S40: first heat treatment)
A heat treatment (first heat treatment) is performed on the semiconductor substrate 50 after the resist peeling illustrated in FIG. In the first heat treatment, the semiconductor substrate 50 is held at a relatively high temperature for a relatively long time to recover defects generated in the semiconductor substrate 50 due to the first ion implantation and to slightly diffuse the carbon in the carbon implantation region 20a. The width in the X-axis direction and the Y-axis direction of the carbon implantation region 20a is slightly expanded.

  In the first heat treatment, the carbon implantation region 20a is expanded from the region where boron is implanted, so that even if boron is slightly diffused from the pixel isolation region 20 after boron ion implantation, the boron is carbon implanted. It stays in the region 20a. As a result, the range in which boron in the pixel isolation region 20 diffuses and enters the photodiode 14 can be narrowed.

  In order to recover defects of the semiconductor substrate 50 and expand the carbon implantation region 20a satisfactorily, the temperature in the first heat treatment is preferably 1000 ° C. or more and 1100 ° C. or less, and the holding time in the first heat treatment is 10 minutes or more and 10 minutes or more. It is preferable that it is less than time.

(S50: Resist patterning)
As shown in FIG. 6A, a resist 60 is patterned on the first main surface 50 a of the semiconductor substrate 50 in accordance with the pattern of the pixel isolation region 20. Thereby, the region other than the opening region 60a for forming the pixel isolation region 20 on the first main surface 50a of the semiconductor substrate 50 is covered with the resist 60, and is not affected by the ion implantation.

(S60: second ion implantation)
As shown in FIG. 6B, boron ion implantation (second ion implantation) is performed from the first major surface 50 a of the semiconductor substrate 50. The second ion implantation is performed under three conditions based on the three range positions Rp ₁ , Rp ₂ , and Rp ₃ common to the first ion implantation. Thereby, the pixel separation region 20 is formed below the opening region 60a in the Z-axis direction.

The boron dose for each of the range positions Rp ₁ , Rp ₂ , Rp ₃ in the second ion implantation is preferably 5 × 10 ¹⁰ ions / cm ² or more and 1 × 10 ¹³ ions / cm ² or less.

(S70: resist stripping)
As shown in FIG. 6C, the resist 60 is peeled off from the first main surface 50 a of the semiconductor substrate 50.

(S80: second heat treatment)
A heat treatment (second heat treatment) is performed on the semiconductor substrate 50 after the resist is removed. In the second heat treatment, defects generated in the semiconductor substrate 50 due to the second ion implantation are recovered. In order to satisfactorily recover defects in the semiconductor substrate 50, the temperature in the second heat treatment is preferably 800 ° C. or higher and 1100 ° C. or lower, and the holding time in the second heat treatment is preferably 60 minutes or shorter. Note that the second heat treatment is not limited to a configuration in which the second heat treatment is held at a constant temperature. For example, the second heat treatment may have a configuration in which heating is stopped immediately after reaching the target temperature.

  The concentration distribution of boron and carbon in the pixel isolation region 20 obtained as described above is as shown in FIG.

  After the pixel isolation region 20 is formed, the above-described photodiode 14, the lower layer region 21, various pixel transistors, and the like are formed on the semiconductor substrate 50. Note that the photodiode 14 and the lower layer region 21 may be formed before the pixel isolation region 20. The solid-state imaging device 1 is completed by connecting the color filter 30 and the lens array 40 to the semiconductor substrate 50.

  As described above, in this embodiment, since the semiconductor substrate 50 can be manufactured using a general semiconductor process without introducing a special apparatus or the like, the manufacturing cost of the solid-state imaging device 1 can be kept low. it can.

<Second Embodiment>
The second embodiment of the present technology has a configuration other than the carbon concentration distribution in the semiconductor substrate 50 in common with the first embodiment. The description of the configuration common to the first embodiment in the second embodiment is omitted as appropriate.

  FIG. 7 is a flowchart showing a method for forming the pixel separation region 20. 8 and 9 are partial cross-sectional views of the semiconductor substrate 50 showing the formation process of the pixel isolation region 20. A method for forming the pixel isolation region 20 will be described along FIG. 7 with reference to FIGS. 8 and 9 as appropriate.

(S20: first ion implantation)
In the present embodiment, unlike the first embodiment, the resist 60 is not patterned before carbon ion implantation. That is, as shown in FIG. 8, carbon ion implantation (first ion implantation) is performed from the entire surface of the first main surface 50a of the semiconductor substrate 50 over the plurality of photodiodes 14 shown in FIG. 1 and the pixel isolation region 20 therebetween. Do.

The first ion implantation is performed under three conditions based on the range positions Rp ₁ , Rp ₂ , and Rp ₃ , respectively. As a result, high concentration layers having a relatively high carbon concentration are formed at the range positions Rp ₁ , Rp ₂ , and Rp ₃ shown in FIG. The high concentration layer is configured as a layer extending in parallel with the first main surface 50a over the entire surface of the first main surface 50a.

(S40: first heat treatment)
A heat treatment (first heat treatment) is performed on the semiconductor substrate 50 shown in FIG. In the first heat treatment, defects generated in the semiconductor substrate 50 due to ion implantation are recovered.

(S50: Resist patterning)
As shown in FIG. 9A, a resist 60 is patterned on the first main surface 50a of the semiconductor substrate 50 in accordance with the pattern of the pixel isolation region 20.

(S60: second ion implantation)
As shown in FIG. 9B, boron ion implantation (second ion implantation) is performed from the first main surface 50 a of the semiconductor substrate 50. The second ion implantation is performed under three conditions based on the three range positions Rp ₁ , Rp ₂ , and Rp ₃ common to the first ion implantation. Thereby, the pixel separation region 20 is formed below the opening region 60a in the Z-axis direction.

(S70: resist stripping)
As shown in FIG. 9C, the resist 60 is peeled off from the first main surface 50 a of the semiconductor substrate 50.

(S80: second heat treatment)
A heat treatment (second heat treatment) is performed on the semiconductor substrate 50 after the resist is removed.

  The concentration distribution of boron and carbon in the pixel isolation region 20 obtained as described above is as shown in FIG.

  As described above, in this embodiment, steps S10 and S30 of FIG. 3 according to the first embodiment can be omitted, so that the manufacturing process can be simplified and the manufacturing cost can be reduced. In the present embodiment, carbon is also ion-implanted into the photodiode 14, but the function of the photodiode 14 is not significantly affected by the presence of carbon.

<Third Embodiment>
In the third embodiment of the present technology, the lower layer region 21 is also formed when the pixel isolation region 20 is formed. In the third embodiment, the configuration other than this is common to the first embodiment. The description of the configuration common to the first embodiment in the third embodiment is omitted as appropriate.

FIG. 10 is a flowchart showing a method for forming the pixel isolation region 20 and the lower layer region 21. 11 and 12 are partial cross-sectional views of the semiconductor substrate 50 showing a process for forming the pixel isolation region 20 and the lower layer region 21. A method for forming the pixel isolation region 20 will be described with reference to FIGS.
(S10: Resist patterning)
As shown in FIG. 11A, a resist 60 is patterned on the first main surface 50 a of the semiconductor substrate 50 in accordance with the pattern of the pixel isolation region 20.

(S20: First ion implantation A)
As shown in FIG. 11B, carbon ion implantation (first ion implantation A) is performed from the first major surface 50 a of the semiconductor substrate 50. The first ion implantation A is performed under three conditions based on the three range positions Rp ₁ , Rp ₂ , and Rp ₃ , respectively.

(S30: resist stripping)
As shown in FIG. 11C, the resist 60 is peeled off from the first main surface 50 a of the semiconductor substrate 50.

(S35: First ion implantation B)
As shown in FIG. 11C, carbon is further ion-implanted (first ion implantation B) from the first major surface 50a of the semiconductor substrate 50. The first ion implantation B is performed under conditions based on the range position Rp ₄ corresponding to the lower layer region 21. Thereby, the carbon implantation region 21a corresponding to the lower layer region 21 is formed.

(S40: first heat treatment)
A heat treatment (first heat treatment) is performed on the semiconductor substrate 50 after the first ion implantation shown in FIG. In the first heat treatment, defects generated in the semiconductor substrate 50 due to the first ion implantation A and the first ion implantation B are recovered, and the carbon in the carbon implantation regions 20a and 20b is slightly diffused, so that the X axis of the carbon implantation region 20a is obtained. The width in the direction and the Y-axis direction and the width in the Z-axis direction of the carbon implantation region 20b are slightly expanded.

(S50: Resist patterning)
As shown in FIG. 12A, a resist 60 is patterned on the first main surface 50 a of the semiconductor substrate 50 in accordance with the pattern of the pixel isolation region 20.

(S60: second ion implantation A)
As shown in FIG. 12B, boron ion implantation (second ion implantation A) is performed from the first major surface 50 a of the semiconductor substrate 50. The second ion implantation A is performed under three conditions based on the three range positions Rp ₁ , Rp ₂ , Rp ₃ common to the first ion implantation A, respectively.

(S70: resist stripping)
As shown in FIG. 12C, the resist 60 is peeled off from the first main surface 50 a of the semiconductor substrate 50.

(S75: second ion implantation B)
As shown in FIG. 12C, boron is further ion-implanted (second ion implantation B) from the first major surface 50a of the semiconductor substrate 50. The second ion implantation B is performed under conditions based on the range position Rp ₄ common to the first ion implantation B. Thereby, the lower layer region 21 is formed.

(S80: second heat treatment)
A heat treatment (second heat treatment) is performed on the semiconductor substrate 50 after the second ion implantation shown in FIG.

  As described above, in this embodiment, since the lower layer region 21 is also formed when the pixel separation region 20 is formed, the manufacturing process of the solid-state imaging device 1 can be made efficient.

<Other embodiments>
As mentioned above, although embodiment of this technique was described, this technique is not limited only to the above-mentioned embodiment, Of course, in the range which does not deviate from the summary of this technique, various changes can be added.

  For example, the solid-state imaging device to which the present technology can be applied is not limited to the backside illumination type CMOS image sensor according to the above embodiment. The present technology can be widely applied to a solid-state imaging device having a configuration in which photodiodes are partitioned by a pixel separation region. Examples of such a solid-state imaging device include a surface irradiation type CMOS image sensor and a CCD image sensor.

  Further, in order to suppress diffusion of boron in the pixel isolation region into the photodiode, the non-carrier impurity ion-implanted into the pixel isolation region is not limited to carbon according to the above embodiment. Examples of non-carrier impurities that can suppress boron diffusion include nitrogen (N), fluorine (F), and argon (Ar).

Further, the range position Rp set for the ion implantation of fluorine and carbon is not limited to the _three range positions Rp ₁ , Rp ₂ , Rp _{3 according} to the above embodiment, and can be determined as appropriate. In addition, the number of range positions Rp set for fluorine and carbon ion implantation may be singular or plural, but in order to suppress the concentration distribution of fluorine and carbon in the pixel isolation region. It is desirable to have a plurality.

In addition, this technique can also take the following structures.
(1)
A photodiode provided on a semiconductor substrate having a main surface and arranged along the main surface;
A pixel isolation region provided between the plurality of photodiodes and provided between the plurality of photodiodes, the first substrate being provided on the semiconductor substrate, the first impurity having a non-carrier property, and a second impurity made of boron;
A solid-state imaging device comprising: a high-concentration portion provided in the pixel isolation region, wherein both the first impurity concentration and the second impurity concentration are relatively high.
(2)
The solid-state imaging device according to (1) above,
The solid-state imaging device, wherein the first impurity is made of carbon.
(3)
The solid-state imaging device according to (1) or (2) above,
The high-density part has a plurality of high-density parts having different depths from the main surface.
(4)
The solid-state imaging device according to any one of (1) to (3) above,
A solid-state imaging device, further comprising a lower layer region provided on the semiconductor substrate, including the first impurity and the second impurity, and opposed to the main surface across the plurality of photodiodes.
(5)
The solid-state imaging device according to any one of (1) to (4) above,
A solid-state imaging device further comprising a high-concentration layer extending in parallel with the main surface over the high-concentration portion and the photodiode and having a relatively high concentration of the first impurity.
(6)
A method for manufacturing a solid-state imaging device, which is provided on a semiconductor substrate having a main surface and forms a pixel separation region for partitioning a plurality of photodiodes arranged along the main surface,
First ion implantation of non-carrier first impurities is performed on the semiconductor substrate from the main surface under conditions based on a predetermined range position.
Heat-treating the semiconductor substrate subjected to the first ion implantation;
A method of manufacturing a solid-state imaging device, wherein second ion implantation of a second impurity composed of boron is performed from the main surface to the pixel isolation region of the semiconductor substrate subjected to the heat treatment under a condition based on the range position. .
(7)
A method for producing a solid-state imaging device according to (6) above,
The first ion implantation is performed on the pixel separation region.
(8)
The method for producing a solid-state imaging device according to (6) or (7) above,
The first ion implantation is performed on the plurality of photodiodes and the pixel isolation region.
(9)
A method for manufacturing a solid-state imaging device according to any one of (6) to (8) above,
The solid-state imaging device manufacturing method, wherein a dose amount of the first impurity by the first ion implantation is in a range of 5 × 10 ¹⁰ to 1 × 10 ¹³ ion / cm ² .
(10)
A method for manufacturing a solid-state imaging device according to any one of (6) to (9) above,
In the heat treatment, the semiconductor substrate is held at 1000 ° C. or higher for 10 minutes or longer and 10 hours or shorter.
(11)
A method for manufacturing a solid-state imaging device according to any one of (6) to (10) above,
The first ion implantation and the second ion implantation are respectively performed under a plurality of conditions based on a plurality of different range positions.
(12)
A method for producing a solid-state imaging device according to any one of (6) to (11) above,
The method of manufacturing a solid-state imaging device, wherein the first ion implantation and the second ion implantation are performed not only in the pixel isolation region but also in a lower layer region facing the main surface with the plurality of photodiodes interposed therebetween.
(13)
The method for producing a solid-state imaging device according to any one of (6) to (12) above,
Furthermore, the manufacturing method of the solid-state image sensor which heat-processes the said semiconductor substrate which performed said 2nd ion implantation.

DESCRIPTION OF SYMBOLS 1 ... Solid-state image sensor 10R, 10G, 10B ... Pixel 11 ... N-type area | region 12 ... N-type layer 13 ... P-type layer 14 ... Photodiode 20 ... Pixel separation area 21 ... Lower layer area 30 ... Color filter 40 ... Lens array 50 ... Semiconductor substrate

Claims (13)

A photodiode provided on a semiconductor substrate having a main surface and arranged along the main surface;
A pixel isolation region provided between the plurality of photodiodes, the first substrate being provided on the semiconductor substrate, the first impurity having a non-carrier property and a second impurity made of boron;
A solid-state imaging device, comprising: a high-concentration portion provided in the pixel isolation region, wherein both the concentration of the first impurity and the concentration of the second impurity are relatively high. The solid-state imaging device according to claim 1,
The solid-state imaging device, wherein the first impurity is made of carbon. The solid-state imaging device according to claim 1,
The high-density portion includes a plurality of high-density portions having different depths from the main surface. The solid-state imaging device according to claim 1,
A solid-state imaging device, further comprising a lower layer region provided on the semiconductor substrate, including the first impurity and the second impurity, and opposed to the main surface across the plurality of photodiodes. The solid-state imaging device according to claim 1,
A solid-state imaging device further comprising a high-concentration layer extending in parallel with the main surface over the high-concentration portion and the photodiode and having a relatively high concentration of the first impurity. A method for manufacturing a solid-state imaging device, which is provided on a semiconductor substrate having a main surface and forms a pixel separation region for partitioning a plurality of photodiodes arranged along the main surface,
First ion implantation of non-carrier first impurities is performed on the semiconductor substrate from the main surface under a condition based on a predetermined range position.
Heat-treating the semiconductor substrate subjected to the first ion implantation;
A method for manufacturing a solid-state imaging device, wherein second ion implantation of a second impurity composed of boron is performed from the main surface to the pixel isolation region of the semiconductor substrate subjected to the heat treatment under a condition based on the range position. . It is a manufacturing method of the solid-state image sensing device according to claim 6,
The first ion implantation is performed on the pixel separation region. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The first ion implantation is performed on the plurality of photodiodes and the pixel separation region. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The solid-state imaging device manufacturing method, wherein a dose amount of the first impurity for each range position by the first ion implantation is in a range of 5 × 10 ¹⁰ ion / cm ^{2 to} 1 × 10 ¹³ ion / cm ² . It is a manufacturing method of the solid-state image sensing device according to claim 6,
In the heat treatment, the semiconductor substrate is held at 1000 ° C. or more and 10 minutes or more and 10 hours or less. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The first ion implantation and the second ion implantation are respectively performed under a plurality of conditions based on a plurality of different range positions. It is a manufacturing method of the solid-state image sensing device according to claim 6,
The first ion implantation and the second ion implantation are performed not only in the pixel isolation region but also in a lower layer region facing the main surface with the plurality of photodiodes interposed therebetween. It is a manufacturing method of the solid-state image sensing device according to claim 6,
Furthermore, the manufacturing method of the solid-state image sensor which heat-processes the said semiconductor substrate which performed said 2nd ion implantation.

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