JP2016063114A - Through electrode substrate and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable through electrode substrate and a manufacturing method of the same.SOLUTION: The through electrode substrate includes: a first surface; a second surface on the opposite side of the first surface; an insulating substrate on which a through-hole that penetrates the first surface and the second surface is provided; and a through electrode for connecting the first surface and the second surface. An angle made by the first surface and a first side wall of the through-hole is greater than or equal to 91° and less than or equal to 100°. A diameter of the through-hole at the second surface is less than or equal to 1/2 of the thickness of the insulating substrate.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a through electrode substrate and a manufacturing method thereof, and one disclosed embodiment relates to an inclination angle between a side wall of a through hole formed in the through electrode substrate and a surface of the through electrode substrate.

  In recent years, integrated circuits have become more miniaturized and complicated with higher performance of integrated circuits. In such an integrated circuit, a connection terminal for inputting a power supply and a logic signal necessary for circuit operation from an external device (chip) is arranged. However, the connection terminals on the integrated circuit are arranged at a very narrow pitch due to the miniaturization and complexity of the integrated circuit, which is several to several tens of times smaller than the pitch of the connection terminals of the chip.

  As described above, when an integrated circuit and a chip having different connection terminal pitches are connected to each other, an interposer serving as an intermediary substrate for converting the connection terminal pitch is used. In the interposer, an integrated circuit is mounted on the first terminal disposed on one surface of the substrate, a chip is mounted on the second terminal disposed on the other surface, and the first terminal and the second terminal are They are connected by through electrodes that penetrate the substrate.

  As interposers, TSV (Through-Silicon Via), which is a through electrode substrate using a silicon substrate, and TGV (Through-Glass Via), which is a through electrode substrate using a glass substrate, have been developed (for example, patents). Reference 1). In particular, TGV can be manufactured using a large glass substrate having a vertical and horizontal size of 730 mm × 920 mm, for example, called the 4.5th generation, which is advantageous in that the manufacturing cost can be reduced. .

JP 2013-110347 A

  However, with the miniaturization and complexity of integrated circuits, when the aspect ratio of the through hole (hole depth with respect to the hole diameter) increases in TSV and TGV, the embedding property of the through electrode that fills the through hole (film attachment) Property) may deteriorate and voids may be formed inside the through electrode. When a void is formed inside the through electrode, there is a problem that the element and film quality are deteriorated due to degassing from the void, and the mechanical strength is lowered due to the void.

  In view of the above circumstances, an object of the present invention is to provide a through electrode substrate with high reliability and a method for manufacturing the same.

  A through electrode substrate according to an embodiment of the present invention has a first surface and a second surface opposite to the first surface, and is provided with a through hole penetrating the first surface and the second surface. A substrate and a through electrode disposed inside the through hole and connecting the first surface and the second surface, and an angle formed by the first surface and the first side wall of the through hole is 91 ° or more and 100 °. The diameter of the through hole in the second surface is equal to or less than ½ of the thickness of the insulating substrate.

  According to the above through electrode substrate, even if the through hole or the bottomed hole has an aspect ratio of 2 or more, the second conductive layer can be filled without generating a void inside the through hole or the bottomed hole. it can.

  In another aspect, the through hole further includes a second side wall on the second surface side of the first side wall, and an angle formed by the first surface and the second side wall is greater than 89 ° and less than 91 °. May be.

  According to the above through electrode substrate, the resistance in the depth direction of the second conductive layer inside the through hole can be reduced.

  Further, in another aspect, the through hole further has a second side wall on the second surface side of the first side wall, and an angle formed by the first surface and the second side wall is the first surface and the first side wall. It may be larger than the angle formed by.

  According to the above through electrode substrate, the probability that voids are generated inside the through hole or the bottomed hole can be further reduced.

  In another embodiment, the through electrode includes a first conductive layer and a second conductive layer, the first conductive layer is disposed between the insulating substrate and the second conductive layer, and the second conductive layer is formed through the through electrode. You may arrange | position with a hole being filled.

  In another aspect, the first conductive layer may be a material that suppresses diffusion of the second conductive layer.

  According to said penetration electrode substrate, it can suppress that a 2nd conductive layer diffuses in a board | substrate.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present invention, a bottomed hole having a tapered shape that forms an angle of 91 ° or more and 100 ° or less with respect to the first surface from the first surface side of the insulating substrate is formed. Then, a first conductive layer is formed on the first surface of the insulating substrate and the bottomed hole, a second conductive layer is formed on the first conductive layer so as to fill the bottomed hole, and the first of the insulating substrate is formed. The insulating substrate is etched from the second surface side opposite to the surface until the first conductive layer formed at the bottom of the bottomed hole is exposed.

  According to the above method for manufacturing a through electrode substrate, the second conductive layer is filled without generating voids in the through hole or the bottomed hole even if the through hole or the bottomed hole has an aspect ratio of 2 or more. can do.

  In another aspect, the first conductive layer is formed by a vapor deposition method, and the vapor deposition method is an oblique vapor deposition method in which vapor deposition is performed on the substrate from a direction inclined with respect to the normal line of the first surface of the insulating substrate. May be.

  According to the above method for manufacturing a through electrode substrate, even a bottomed hole having a higher aspect ratio can be formed with good coverage up to the outer peripheral end of the bottom of the bottomed hole.

  In another aspect, the second conductive layer is formed by a plating method, and the plating method includes an additive that suppresses the formation of the second conductive layer on the first conductive layer on the first surface side. A plating solution may be used.

  According to the manufacturing method of the through electrode substrate described above, it is possible to suppress the formation of the second conductive layer at a place other than the inside of the bottomed hole.

  In another embodiment, before forming the second conductive layer, a mask having an opening exposing the bottomed hole is formed, and after the second conductive layer is formed, the mask is removed and the second conductive layer is formed. The first conductive layer exposed from may be etched.

  According to the manufacturing method of the through electrode substrate described above, the step of removing the unnecessary second conductive layer can be omitted.

  In another aspect, when etching from the second surface side of the insulating substrate, the exposed first conductive layer may cover the second conductive layer as viewed from the second surface side.

  According to the manufacturing method of the through electrode substrate described above, the etching of the second conductive layer by etching can be suppressed.

  In another aspect, the first conductive layer may serve as an etching stopper when etching from the second surface side of the insulating substrate.

  According to the above method for manufacturing a through electrode substrate, the controllability of the etching process can be improved.

  According to the present invention, a highly reliable through electrode substrate and a method for manufacturing the same can be provided.

It is a top view which shows the outline | summary of the penetration electrode board | substrate which concerns on Embodiment 1 of this invention. It is AB sectional drawing of the penetration electrode substrate which concerns on Embodiment 1 of this invention. FIG. 5 is a cross-sectional view showing a step of irradiating a laser beam inside the substrate in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of forming an alteration field inside a substrate. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of etching the alteration field of a substrate using a chemical. It is sectional drawing which shows the process of forming a bottomed hole inside a board | substrate in the manufacturing method of the penetration electrode board | substrate which concerns on Embodiment 1 of this invention. It is sectional drawing which shows the process of forming a seed layer inside a bottomed hole in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. FIG. 5 is a cross-sectional view showing a step of forming a resist mask on a seed layer in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. It is sectional drawing which shows the process of forming a plating layer on the seed layer exposed from the resist mask in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. It is sectional drawing which shows the process of removing the resist mask on a seed layer in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. It is sectional drawing which shows the process of etching the seed layer exposed from the plating layer in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of bonding the 1st support substrate to the substrate in which the bottomed hole was formed. It is sectional drawing which shows the process of slimming the board | substrate with which the bottomed hole was formed from the back surface, and forming a through-hole in the manufacturing method of the through-electrode board | substrate which concerns on Embodiment 1 of this invention. It is sectional drawing which shows the process of removing the penetration electrode which protruded by slimming in the manufacturing method of the penetration electrode board | substrate which concerns on Embodiment 1 of this invention. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of forming an insulating layer on a penetration electrode substrate. FIG. 5 is a cross-sectional view showing a process of forming a seed layer on the insulating layer and the through electrode in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. FIG. 5 is a cross-sectional view showing a step of forming a resist mask on a seed layer in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. It is sectional drawing which shows the process of forming a plating layer on the seed layer exposed from the resist mask in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. It is sectional drawing which shows the process of removing the resist mask on a seed layer in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of forming the 2nd wiring by etching the seed layer exposed from the plating layer. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of peeling the 1st support substrate from the substrate in which the penetration hole and the 2nd wiring were formed. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of pasting the 2nd support substrate on the substrate in which the penetration electrode and the 2nd wiring were formed. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of forming the 1st wiring on the surface opposite to the surface where the 2nd wiring was formed. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of peeling the 2nd support substrate from the substrate in which the penetration hole, the 1st wiring, and the 2nd wiring were formed. In the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of filling the inside of a bottomed hole with a plating layer. In the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of filling the inside of a bottomed hole with a plating layer. In the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a sectional view showing the process of filling the inside of a bottomed hole with a plating layer. It is sectional drawing which shows the process of filling a plating layer inside a bottomed hole in the through-electrode board | substrate of a comparative example. It is sectional drawing which shows the process of filling a plating layer inside a bottomed hole in the through-electrode board | substrate of a comparative example. FIG. 9 is a cross-sectional view showing a process of filling a plated layer in a bottomed hole in a through electrode substrate according to Modification 1 of Embodiment 1 of the present invention. FIG. 6 is a cross-sectional view showing a process of filling a plated layer in a bottomed hole in a through electrode substrate according to Modification 2 of Embodiment 1 of the present invention. It is the schematic of the film-forming apparatus by diagonal vapor deposition used in the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention. In the manufacturing method of the penetration electrode substrate concerning Embodiment 1 of the present invention, it is a mimetic diagram showing the sectional view of the penetration electrode substrate in which the conductive layer was formed by slant vapor deposition. It is sectional drawing which shows the process of forming a plating layer on a seed layer in the manufacturing method of the penetration electrode substrate concerning modification 3 of Embodiment 1 of the present invention. It is sectional drawing which shows the process of etching a seed layer and a plating layer in the manufacturing method of the penetration electrode substrate concerning modification 3 of Embodiment 1 of the present invention. It is sectional drawing which shows the process of forming 1st wiring in the manufacturing method of the penetration electrode substrate concerning the modification 3 of Embodiment 1 of this invention. FIG. 10 is a cross-sectional view showing a process of forming a multilayer wiring structure on a first wiring in a method for manufacturing a through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. It is sectional drawing which shows the process of bonding a 1st support substrate to the board | substrate with which the multilayer wiring structure was formed in the manufacturing method of the penetration electrode board | substrate which concerns on the modification 3 of Embodiment 1 of this invention. It is sectional drawing which shows the process of slimming the board | substrate with which the bottomed hole was formed from the back surface, and forming a through-hole in the manufacturing method of the penetration electrode board | substrate which concerns on the modification 3 of Embodiment 1 of this invention. It is sectional drawing which shows the process of forming a 2nd wiring in the surface opposite to the surface in which the 1st wiring was formed in the manufacturing method of the penetration electrode substrate concerning the modification 3 of Embodiment 1 of this invention. It is sectional drawing which shows the penetration electrode substrate obtained by the manufacturing method of the penetration electrode substrate which concerns on the modification 3 of Embodiment 1 of this invention. It is a figure which shows the semiconductor device which concerns on 3rd Embodiment of this invention. It is a figure which shows another example of the semiconductor device which concerns on 3rd Embodiment of this invention. It is a figure which shows another example of the semiconductor device which concerns on 3rd Embodiment of this invention. 3 is a cross-sectional view of a through electrode showing an evaluation method in Example 1. FIG.

<Embodiment 1>
Hereinafter, a through electrode substrate and a manufacturing method thereof according to Embodiment 1 of the present invention will be described in detail with reference to the drawings. In addition, embodiment shown below is an example of embodiment of this invention, This invention is limited to these embodiment, and is not interpreted. Note that in the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference symbols or similar symbols, and repeated description thereof may be omitted. In addition, the dimensional ratio in the drawing may be different from the actual ratio for convenience of explanation, or a part of the configuration may be omitted from the drawing.

[Configuration of through electrode substrate]
The configuration of the through electrode substrate according to Embodiment 1 of the present invention will be described in detail with reference to FIGS. 1 and 2. In the first embodiment, a structure in which one layer of wiring is arranged on each of the front and back surfaces of the through electrode substrate and the wirings are connected by the through electrodes will be described. However, the present invention is not limited to this structure. Multi-layer wirings may be arranged on the device, and elements such as transistors may be arranged.

  FIG. 1 is a plan view showing an outline of a through electrode substrate according to Embodiment 1 of the present invention. FIG. 2 is a cross-sectional view taken along line AB of the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIGS. 1 and 2, the through electrode substrate 10 according to the first embodiment of the present invention has a first surface 101 and a second surface 102 opposite to the first surface 101, and the first surface 101. And a substrate 100 provided with a through hole 120 penetrating through the second surface 102, and a through electrode 110 disposed inside the through hole 120 and connecting the first surface 101 and the second surface 102.

  In FIG. 1, the through electrode 110 includes a first conductive layer 111 and a second conductive layer 112, the first conductive layer 111 is disposed between the substrate 100 and the second conductive layer 112, and the second conductive layer 112 is a through hole. 120 is filled and arranged. The first conductive layer 111 may be a material that suppresses diffusion of the second conductive layer 112 into the substrate 100. Here, an angle 131 formed by the first surface 101 and the first side wall 121 of the through hole 120 is 91 ° or more and 100 ° or less. Here, the angle 131 is preferably 91 ° or more and 95 ° or less. The angle 131 is more preferably 91.5 ° or more and 93.5 ° or less. Further, as shown in FIG. 1, the first hole diameter 123 of the through hole 120 in the first surface 101 is larger than the second hole diameter 124 of the through hole 120 in the second surface 102. That is, the through hole 120 has a tapered shape. Further, the second hole diameter 124 of the through hole 120 is not more than ½ of the thickness of the substrate 100. That is, the aspect ratio of the through hole 120 is 2 or more.

  A first insulating layer 140 and a first wiring 150 are disposed on the first surface 101 side of the substrate 100. The first insulating layer 140 is disposed on the first surface 101 of the substrate 100 and a part of the through electrode 110, and an opening 141 exposing a part of the through electrode 110 is provided. That is, the first insulating layer 140 is arranged so that at least a part thereof is in contact with the through electrode 110 and the other part is exposed to the outside. The first wiring 150 is disposed on the first insulating layer 140 and inside the opening 141 and is electrically connected to the through electrode 110. The first wiring 150 includes a third conductive layer 151 disposed on the first insulating layer 140 and the through electrode 110 and a fourth conductive layer 152 disposed on the third conductive layer 151.

  The second insulating layer 160 and the second wiring 170 are also arranged on the second surface 102 side of the substrate 100 in the same manner as the first surface 101 side. The second insulating layer 160 is disposed on the second surface 102 of the substrate 100 and a part of the through electrode 110, and an opening 161 that exposes a part of the through electrode 110 is provided. That is, the second insulating layer 160 is arranged so that at least a part thereof is in contact with the through electrode 110 and the other part is exposed to the outside. The second wiring 170 is disposed on the second insulating layer 160 and inside the opening 161 and is electrically connected to the through electrode 110. The second wiring 170 includes a fifth conductive layer 171 disposed on the second insulating layer 160 and the through electrode 110, and a sixth conductive layer 172 disposed on the fifth conductive layer 171.

As the substrate 100, a glass substrate can be used. In addition to a glass substrate, an insulating substrate such as a quartz substrate, a sapphire substrate, or a resin substrate, a semiconductor substrate such as a silicon substrate, a silicon carbide substrate, or a compound semiconductor substrate, or a conductive substrate such as a stainless steel substrate can be used. . In addition, as a material used for the substrate, a material having a thermal expansion coefficient in the range of 2 × 10 ⁻⁶ [/ K] to 17 × 10 ⁻⁶ [/ K] can be used. Moreover, these may be laminated. Although there is no restriction | limiting in particular in the thickness of the board | substrate 100, For example, the board | substrate of thickness of 100 micrometers or more and 800 micrometers or less can be used. The thickness of the substrate 100 is more preferably 200 μm or more and 400 μm or less. When the substrate becomes thinner than the lower limit of the thickness of the substrate, the deflection of the substrate increases. As a result, handling in the manufacturing process becomes difficult, and the substrate is warped by an internal stress such as a thin film formed on the substrate. Further, when the substrate becomes thicker than the upper limit of the thickness of the substrate, the process of forming the through hole becomes longer. As a result, the manufacturing process becomes longer and the manufacturing cost also increases.

  For the first conductive layer 111, a conductive material having good adhesion to the base substrate 100 can be used. For example, it is possible to use titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or alloys thereof. it can. In particular, when the second conductive layer 112 includes copper (Cu), the first conductive layer 111 can use a material that suppresses the diffusion of Cu. For example, titanium nitride (TiN), molybdenum nitride (MoN), Tantalum nitride (TaN) or the like may be used. Here, the thickness of the first conductive layer 111 is not particularly limited, but can be appropriately selected within a range of, for example, 50 nm or more and 400 nm or less.

  For the second conductive layer 112, a conductive material having good adhesion to the first conductive layer 111 and high electrical conductivity can be used. For example, a metal such as copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni), chromium (Cr) or the like It can select from the alloy etc. which used these. The second conductive layer 112 is disposed so as to fill the inside of the through hole 120. That is, no voids or the like are formed inside the through hole 120, and the space inside the through hole 120 is filled with the second conductive layer 112.

As the first insulating layer 140 and the second insulating layer 160, a resin layer having a property of transmitting gas and moisture can be used. As the resin layer, in addition to the above polyimide, epoxy resin, polyimide resin, benzocyclobutene resin, polyamide, phenol resin, silicone resin, fluororesin, liquid crystal polymer, polyamideimide, polybenzoxazole, cyanate resin, aramid, polyolefin , Polyester, BT resin, FR-4, FR-5, polyacetal, polybutylene terephthalate, syndiotactic polystyrene, polyphenylene sulfide, polyether ether ketone, polyether nitrile, polycarbonate, polyphenylene ether polysulfone, polyether sulfone, polyarylate , Polyetherimide and the like can be used. The above resins may be used alone or in combination of two or more kinds of resins. Further, an inorganic filler such as glass, talc, mica, silica, alumina or the like may be used in combination with the above resin. Here, the resin used for the first insulating layer 140 and the second insulating layer 160 is a resin having a Young's modulus of 1 × 10 ⁹ [dyne / cm ² ] or less at room temperature for the purpose of stress relaxation. Also good.

Further, the first insulating layer 140 and the second insulating layer 160 are not limited to resin layers, and inorganic insulating layers can also be used. As the inorganic insulating layer, silicon oxide (SiO ₂ ), silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride carbide (SiCN), carbon Additive silicon oxide (SiOC) or the like can be used. Here, as the first insulating layer 140 and the second insulating layer 160, the above-described inorganic insulating layer may be used as a single layer or may be used as a stacked layer. Further, as the first insulating layer 140 and the second insulating layer 160, a resin layer and an inorganic insulating layer may be stacked.

  The third conductive layer 151 and the fifth conductive layer 171 can be formed using a conductive material having good adhesion to the first insulating layer 140 and the second insulating layer 160 which are the base layers. For example, similarly to the first conductive layer 111, titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or These alloys can be used. In particular, when the fourth conductive layer 152 and the sixth conductive layer 172 include copper (Cu), the third conductive layer 151 and the fifth conductive layer 171 can use a material that suppresses diffusion of Cu. Titanium nitride (TiN), molybdenum nitride (MoN), tantalum nitride (TaN), or the like may be used. Here, the thicknesses of the third conductive layer 151 and the fifth conductive layer 171 are not particularly limited, but can be appropriately selected within a range of 20 nm to 1 μm, for example. The thicknesses of the third conductive layer 151 and the fifth conductive layer 171 are more preferably 100 nm or more and 300 nm or less.

  The fourth conductive layer 152 and the sixth conductive layer 172 can be formed using a conductive material having good adhesion to the third conductive layer 151 and the fifth conductive layer 171 and high electrical conductivity. For example, similar to the second conductive layer 112, copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni) , A metal such as chromium (Cr), or an alloy using these metals.

  As described above, according to the through electrode substrate 10 according to the first embodiment, the angle formed by the first surface 101 of the substrate 100 and the first side wall 121 of the through hole 120 is 91 ° or more and 100 ° or less. Even if the through hole has a ratio of 2 or more, the second conductive layer 112 can be filled without generating voids in the through hole 120. Therefore, a highly reliable through electrode substrate can be obtained.

  Further, the through electrode 110 includes the first conductive layer 111 and the second conductive layer 112 as described above, and by selecting a material that suppresses diffusion of the second conductive layer 112 as the first conductive layer 111, the through electrode The material contained in 110 can be prevented from diffusing into the substrate 100. That is, since the occurrence of a leak path can be suppressed, a highly reliable through electrode substrate can be obtained. Further, even when the adhesion between the second conductive layer 112 and the side wall of the through hole 120 is poor, the first conductive layer 111 is disposed, whereby the adhesion between the substrate 100 and the through electrode 110 in the through hole 120 is improved. Can be improved.

[Method of manufacturing through electrode substrate]
A method for manufacturing the through electrode substrate according to the first embodiment of the present invention will be described with reference to FIGS. 3 to 24, the same elements as those shown in FIG. 2 are denoted by the same reference numerals. Here, a manufacturing method when a glass substrate is used as the through electrode substrate will be described.

  FIG. 3 is a cross-sectional view showing a process of irradiating a laser beam inside the substrate in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. In FIG. 3, a method of etching by changing the material of the substrate in a region where a through hole is to be formed by irradiating the substrate 100 with a femtosecond laser will be described. Here, the laser beam 301 emitted from the light source 300 is incident from the first surface 101 side of the substrate 100 and is focused in a region where a through hole inside the substrate 100 is to be formed. At the position where the laser beam 301 is focused, high energy is supplied to the substrate 100, and the material of the substrate is altered. For example, when it is desired to form a through-hole so that the side wall of the through-hole has an inclination of an angle 131 with respect to the surface of the substrate, the light source 300 is scanned in the thickness direction of the substrate while changing the focal size of the laser beam 301. Good.

  FIG. 4 is a cross-sectional view showing a process of forming an altered region inside the substrate in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. The shape of the altered region 103 can be changed as appropriate according to the shape of the desired bottomed hole or through hole. In the manufacturing method according to the first embodiment, the through hole is formed by slimming the substrate after forming the bottomed hole. Therefore, in FIG. 3 and FIG. 4, the altered region 103 is not formed in all the thickness direction of the substrate 100. The method (that is, the altered region 103 is formed in the shape of the bottomed hole) is exemplified. On the other hand, when the through hole is formed only by the step of etching the altered region 103 without providing the step of forming the bottomed hole, the entire substrate may be altered in the thickness direction. Here, since the region of the altered region 103 becomes the size of the later bottomed hole or through hole, the altered region may be adjusted according to the desired size of the bottomed hole or through hole.

  FIG. 5 is a cross-sectional view showing a process of etching a denatured region of a substrate using a chemical solution in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. The altered region 103 has a higher etching rate due to the chemical solution than the unmodified region. In other words, the altered region 103 is etched selectively or at a higher speed than other regions by immersing the entire substrate in the chemical solution 311. FIG. 5 shows a method of performing etching by immersing the substrate 100 in a chemical solution 311 placed in a container 310. Here, if the substrate 100 is a glass substrate, hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant-added buffered hydrofluoric acid (LAL), or the like is used as the chemical solution 311 used for etching. Can do. The chemical solution used for etching can be appropriately selected depending on the material of the substrate. Further, the etching method may be a spin coat etching method in addition to the immersion method.

  FIG. 6 is a cross-sectional view showing a process of forming a bottomed hole in the substrate in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. The bottomed hole 320 is formed by removing the altered region 103 by etching using the chemical solution 311. Here, the bottomed hole 320 is formed so that the angle 131 formed by the side wall 321 of the bottomed hole 320 and the first surface 101 of the substrate 100 is 91 ° or more and 100 ° or less. Here, the angle 131 is preferably 91 ° or more and 95 ° or less. The angle 131 is more preferably 91.5 ° or more and 93.5 ° or less. Further, as shown in FIG. 6, the first hole diameter 323 of the bottomed hole 320 in the first surface 101 is larger than the second hole diameter 324 of the bottomed hole 320 in the second surface 102. That is, the bottomed hole 320 has a tapered shape. Further, the second hole diameter 324 of the bottomed hole 320 is ½ or less of the thickness of the substrate 100. That is, the aspect ratio of the bottomed hole 320 is 2 or more. Moreover, there is no restriction | limiting in particular in the shape in the planar view of the bottomed hole 320, For example, circular may be sufficient and a rectangle and a polygon may be sufficient besides that.

Here, in FIG. 3 to FIG. 6, the method of forming the bottomed hole by irradiating the region where the bottomed hole of the substrate 100 is to be formed with a laser beam to form an altered region and performing wet etching with a chemical solution has been described. The method is not limited to this. For example, the bottomed hole or the through hole may be formed by irradiating the substrate 100 with a high-power laser and melting the substrate. For example, a CO ₂ laser or the like can be used as a laser for processing a glass substrate.

  FIG. 7 is a cross-sectional view showing a step of forming a seed layer inside the bottomed hole in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 6, a seed layer 325 to be the first conductive layer 111 later is formed inside the bottomed hole 320 provided with the substrate 100. For the seed layer 325, for example, a single layer or a laminated layer of a metal such as Cu, Ti, Ta, or W or an alloy using these can be used, such as a PVD method (such as a vacuum deposition method and a sputtering method) or a CVD method. Can be formed. The material used for the seed layer 325 can be the same material as the plating layer 340 to be formed on the seed layer 325 later. The seed layer 325 is provided for use as a seed in the electrolytic plating method when the plating layer 340 is formed in a later step. Here, the seed layer 325 is preferably formed with a thickness of 20 nm to 1 μm. The seed layer 325 is more preferably formed with a thickness of 100 nm to 300 nm.

  FIG. 8 is a cross-sectional view showing a step of forming a resist mask on the seed layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 8, after applying a photoresist on the seed layer 325, a resist pattern 330 is formed by performing exposure and development. The resist pattern 330 is formed so as to expose at least the bottomed hole 320.

  FIG. 9 is a cross-sectional view showing a step of forming a plating layer on the seed layer exposed from the resist mask in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 8, after forming the resist pattern 330, the seed layer 325 is energized to perform electrolytic plating so that the bottomed hole 320 is filled on the seed layer 325 exposed from the resist pattern 330. A plating layer 340 is formed.

  Although FIG. 9 illustrates the method of forming the plating layer 340 by forming the resist pattern 330 so that the plating layer 340 is not formed in the region other than the bottomed hole 320, the method is not limited to this method. For example, in the electroplating method for forming the plating layer 340, electrolytic plating using a plating solution containing an additive that suppresses the formation of the plating layer 340 on the seed layer 325 of the first surface 101 of the substrate 100. Can do the law. In addition to the electrolytic plating method, a solder plating method or the like may be used.

  FIG. 10 is a cross-sectional view showing a step of removing the resist mask on the seed layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 10, after the plating layer 340 is formed, the photoresist constituting the resist pattern 330 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 11 is a cross-sectional view showing a step of etching the seed layer exposed from the plating layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 11, the seed layer 325 in a region covered with the resist pattern 330 and not formed with the plating layer 340 and the plating layer 340 protruding from the first surface 101 of the substrate 100 are removed.

  Here, in the steps of FIGS. 8 to 11, wirings can be formed on the first surface 101 of the substrate 100 separately from the plating layer 340 filled in the bottomed hole 320. Specifically, a resist pattern 330 having a region where wiring is to be formed is formed together with the bottomed hole 320, the seed layer 325 in that region is exposed, and a plating layer 340 is formed. Accordingly, wiring can be formed in the same process as the plating layer 340 filled in the bottomed hole 320 in the processes of FIGS. 8 to 11.

  FIG. 12 is a cross-sectional view illustrating a process of bonding a first support substrate to a substrate having a bottomed hole in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 12, the substrate 100 having the bottomed hole 320 filled with the seed layer 325 and the plating layer 340 and the first support substrate 345 are bonded together using an adhesive sheet 350. As the first support substrate 345, a substrate having a rigidity equal to or higher than that of the substrate 100 can be used so that the substrate 100 is not distorted in a later process. For example, when a glass substrate is used as the substrate 100, a glass substrate similar to the substrate 100 can be used as the first support substrate 345. In addition to the glass substrate, the first support substrate 345 may be an insulating substrate such as a sapphire substrate, a semiconductor substrate such as a silicon substrate, or a conductive substrate such as a stainless steel substrate.

  Moreover, the adhesive sheet 350 has an adhesive layer disposed on both sides of a member. Among the adhesive layers of the adhesive sheet 350, the adhesive layer on the side of the substrate 100 and the plating layer 340 (hereinafter sometimes referred to as a substrate adhesive layer) is reduced in adhesive force by application of a stimulus (in this example, heat of a predetermined temperature or higher). . For example, the pressure-sensitive adhesive may be used as the pressure-sensitive adhesive layer on the first support substrate 345 side of the pressure-sensitive adhesive sheet 350 (hereinafter sometimes referred to as a support pressure-sensitive adhesive layer). Moreover, the adhesive strength of the supporting adhesive layer hardly decreases at least in the degree of stimulation that reduces the adhesive strength of the substrate adhesive layer. Further, both or one of the substrate adhesive layer and the support adhesive layer may have conductivity.

  The positional relationship between the first support substrate 345 and the substrate 100 is fixed by the adhesive layers provided on both surfaces of the adhesive sheet 350. Thus, the first support substrate 345 supports the substrate 100 from the first surface 101 side via the adhesive sheet 350.

  Also, as shown in FIG. 12, the adhesive sheet 350 has a portion (outer peripheral portion 360) that extends outward from the end portion of the substrate 100. The outer peripheral portion 360 is in a state in which the surface 351 of the substrate adhesive layer is exposed. If the substrate adhesive layer of the adhesive sheet 350 has conductivity, a current is supplied from a power source when performing the process by the electrolytic plating method. It can be used as an electrode for

  FIG. 13 is a cross-sectional view showing a process of forming a through hole by etching (slimming) a substrate having a bottomed hole from the back surface in the method of manufacturing the through electrode substrate according to Embodiment 1 of the present invention. In FIG. 13, the substrate 100 is thinned by performing slimming from the second surface 102 side of the substrate 100. As the slimming, for example, wet etching or CMP (Chemical Mechanical Polishing) can be used. The through hole 120 is formed from the bottomed hole 320 by thinning the substrate 100 until the seed layer 325 formed at the bottom of the bottomed hole 320 is exposed by slimming. Here, since the substrate 100 is supported by the first support substrate 345, even if the substrate 100 is thinned, the warpage of the substrate 100 is suppressed, and the strength during the manufacturing process can be maintained.

  When wet etching is used for slimming, hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant-added buffered hydrofluoric acid (LAL), or the like can be used. The chemical solution used for etching can be appropriately selected depending on the material of the substrate. Further, when using CMP for slimming, cerium oxide (ceria) can be used as an abrasive. CMP using ceria can polish glass and silicon oxide at high speed. Ceria not only has a mechanical polishing action, but also has an action of working with water to chemically polish silicon oxide, so that a high polishing rate can be obtained.

  As described above, in the step of exposing the seed layer 325 formed at the bottom of the bottomed hole 320 by slimming, the seed layer 325 may have a stopper function for slimming treatment. For example, when slimming is performed using HF, a material that is not etched into HF or has an etching rate with respect to HF lower than that of the substrate 100 can be used as the seed layer 325, and Ti, TiN, Mo, MoN, or the like is used. be able to. In addition, the seed layer 325 may cover the plating layer 340 when viewed from the second surface 102 side in order to prevent the plating layer 340 from being etched by the slimming process. That is, it is preferable that the plating layer 340 does not have a portion exposed from the seed layer 325 when viewed from the second surface 102 side. However, if the plating layer 340 is not deformed to deteriorate the reliability by the slimming process, there may be a portion where the plating layer 340 is exposed from the seed layer 325 in the process.

  FIG. 14 is a cross-sectional view illustrating a process of removing the through electrode protruding by slimming in the method of manufacturing the through electrode substrate according to the first embodiment of the invention. Here, in the step shown in FIG. 13, the seed layer 325 and the plating layer 340 that function as a slimming stopper and protrude from the second surface 102 of the substrate 100 are removed. As a process of removing the seed layer 325 and the plating layer 340, dry etching, wet etching, or CMP can be used. By this step, the seed layer 325 and the plating layer 340 may be etched so as to be in a surface position with the second surface 102 of the substrate 100, and have a concave shape (a dent above the paper surface) with respect to the second surface 102. Shape) or a convex shape with respect to the second surface 102 (a shape protruding downward in the drawing). Through this step, the through electrode 110 including the first conductive layer 111 and the second conductive layer 112 is formed.

  FIG. 15 is a cross-sectional view showing a process of forming an insulating layer on the through electrode substrate in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. Here, a method using photosensitive polyimide as the second insulating layer 160 will be described. As shown in FIG. 15, photosensitive polyimide is applied as the second insulating layer 160 onto the second surface 102 of the substrate 100 using a coating method such as spin coating, and is exposed and developed using a photomask. Thus, the opening 161 exposing at least a part of the through electrode 110 is formed.

  After the opening 161 is formed, a thermosetting process is performed to cure the applied second insulating layer 160. The thermosetting treatment is preferably set to be equal to or lower than the glass transition temperature of the second insulating layer 160 to be used. This is because if the curing is performed at a temperature exceeding the glass transition temperature, the shape of the opening 161 is deformed, and problems such as an opening diameter larger than the design dimension occur. For example, when a photosensitive polyimide is used as the second insulating layer 160, if the glass transition temperature of the photosensitive polyimide is 280 ° C., heat treatment is preferably performed at 250 ° C., for example, 250 ° C. for 1 hour in a nitrogen atmosphere. Heat treatment should be performed below. In addition, it is preferable to perform not only the process of thermosetting but the heat processing after this process so that the glass transition temperature of photosensitive polyimide may not be exceeded.

  FIG. 16 is a cross-sectional view illustrating a process of forming a seed layer on the insulating layer and the through electrode in the method for manufacturing the through electrode substrate according to the first embodiment of the present invention. As shown in FIG. 16, a seed layer 370 to be a fifth conductive layer 171 later is formed on the second insulating layer 160 and the through electrode 110 exposed inside the opening 161. For the seed layer 370, for example, a single layer or a laminate of a metal such as Cu, Ti, Ta, or W or an alloy using these can be used, such as a PVD method (such as a vacuum deposition method and a sputtering method) or a CVD method. Can be formed. As the material used for the seed layer 370, the same material as that of the plating layer 390 to be formed on the seed layer 370 later can be selected. The seed layer 370 is provided for use as a seed in the electrolytic plating method when the plating layer 390 is formed in a later step. Here, the seed layer 370 is preferably formed to a thickness of 20 nm to 1 μm. The seed layer 370 is more preferably formed with a thickness of 100 nm to 300 nm.

  FIG. 17 is a cross-sectional view showing a step of forming a resist mask on the seed layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 17, after applying a photoresist on the seed layer 370, exposure and development are performed to form a resist pattern 380 in which a region where a wiring pattern is to be formed is opened.

  FIG. 18 is a cross-sectional view showing a step of forming a plating layer on the seed layer exposed from the resist mask in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 18, after forming the resist pattern 380, the plating layer 390 is formed on the seed layer 370 exposed from the resist pattern 380 by using an electrolytic plating method. Here, in the electrolytic plating method, current may be supplied from the surface 351 of the substrate adhesive layer exposed at the outer peripheral portion 360.

  FIG. 19 is a cross-sectional view showing a step of removing the resist mask on the seed layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 19, after forming the plating layer 390, the photoresist constituting the resist pattern 380 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 20 is a cross-sectional view showing a process of forming a second wiring by etching the seed layer exposed from the plating layer in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. As shown in FIG. 20, by removing (etching) the seed layer 370 in the region covered with the resist pattern 380 and not having the plating layer 390 formed thereon, the respective wirings are electrically separated. Since the surface of the plating layer 390 is also etched and thinned by the etching of the seed layer 370, it is preferable to set the thickness of the plating layer 390 in consideration of the influence of the thinning. As etching in this step, wet etching or dry etching can be used. By this step, the second wiring 170 including the fifth conductive layer 171 and the sixth conductive layer 172 is formed on the through electrode 110 and the second insulating layer 160.

  FIG. 21 is a cross-sectional view illustrating a process of peeling the first support substrate from the substrate on which the through hole and the second wiring are formed in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. By performing the heat treatment at a predetermined temperature or higher after the second wiring 170 is formed, the adhesive force of the substrate adhesive layer that is the adhesive layer on the substrate side of the adhesive sheet 350 is reduced. Then, the adhesive sheet 350 and the first support substrate 345 are peeled from the substrate 100. At this time, the heat treatment is preferably performed at a temperature at which the support adhesive layer disposed on the opposite side of the adhesive layer of the adhesive sheet 350 does not peel from the first support substrate 345. Here, the heat treatment may be a method of heating the entire substrate 100 and the first support substrate 345, or may be a method of locally heating the bonding portion by laser irradiation or the like.

  FIG. 22 is a cross-sectional view illustrating a process of bonding the second support substrate to the substrate on which the through electrode and the second wiring are formed in the method for manufacturing the through electrode substrate according to the first embodiment of the present invention. As shown in FIG. 22, the substrate 100 on which the through electrode 110 and the second wiring 170 are formed and the second support substrate 400 are bonded together using an adhesive sheet 410. As the second support substrate 400, a substrate having rigidity equal to or higher than that of the substrate 100 can be used so that the substrate 100 is not distorted in a later process. For example, when a glass substrate is used as the substrate 100, a glass substrate similar to the substrate 100 can be used as the second support substrate 400. In addition to the glass substrate, the second support substrate 400 may be an insulating substrate such as a sapphire substrate, a semiconductor substrate such as a silicon substrate, or a conductive substrate such as a stainless steel substrate.

  The adhesive sheet 410 to which the second support substrate 400 is bonded can be the same as the adhesive sheet 350 to which the first support substrate 345 is bonded. That is, the pressure-sensitive adhesive sheet 410 has adhesive layers on both sides of the member, and the support pressure-sensitive adhesive layer on the second support substrate 400 side is adhesive to the extent that the adhesive strength of the substrate pressure-sensitive adhesive layer on the substrate 100 side is reduced. Power is hardly reduced. Therefore, for example, the substrate 100 and the adhesive sheet 410 can be selectively peeled off by a stimulus such as heat treatment.

  As described above, the positional relationship between the second support substrate 400 and the substrate 100 is fixed by the adhesive layers provided on both surfaces of the adhesive sheet 410. Thus, the second support substrate 400 supports the substrate 100 from the second surface 102 side via the adhesive sheet 410.

  As shown in FIG. 22, the adhesive sheet 410 has a portion (outer peripheral portion 412) that extends outward from the end portion of the substrate 100. The outer peripheral portion 412 is in a state in which the surface 411 of the substrate adhesive layer is exposed, and if the substrate adhesive layer of the adhesive sheet 410 has conductivity, current is supplied from the power source when performing the process by the electrolytic plating method. It is used as an electrode for

  FIG. 23 is a cross-sectional view showing a process of forming the first wiring on the surface opposite to the surface on which the second wiring is formed in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. Here, by performing the same process as the steps shown in FIGS. 15 to 20, the first insulating layer 140 and the first wiring 150 are formed on the first surface 101 side of the substrate 100.

  24 is a cross-sectional view illustrating a process of peeling the second support substrate from the substrate on which the through hole, the first wiring, and the second wiring are formed in the method for manufacturing the through electrode substrate according to Embodiment 1 of the present invention. is there. By performing a heat treatment at a predetermined temperature or higher after the first wiring 150 is formed, the adhesive force of the substrate adhesive layer that is the adhesive layer on the substrate side of the adhesive sheet 410 is reduced. Then, the adhesive sheet 410 and the second support substrate 400 are peeled from the substrate 100. At this time, the heat treatment is preferably performed at a temperature at which the support adhesive layer disposed on the opposite side of the adhesive layer 410 to the substrate adhesive layer does not peel from the second support substrate 400. Here, the heat treatment may be a method of heating the entire substrate 100 and the second support substrate 400, or may be a method of locally heating the bonding portion by laser irradiation or the like.

  As described above, according to the manufacturing method of the through electrode substrate 10 according to the first embodiment, the angle formed by the first surface 101 of the substrate 100 and the first side wall 121 of the through hole 120 is 91 ° or more and 100 ° or less. Thus, even if the bottomed hole or the through hole has an aspect ratio of 2 or more, the second conductive layer 112 can be filled without generating a void in the through hole 120. Therefore, a highly reliable through electrode substrate can be obtained.

  Further, when the plating layer 340 filling the bottomed hole 320 is formed, the resist pattern 330 is formed to form the plating layer 340, or the plating layer 340 is formed on the seed layer 325 of the first surface 101 of the substrate 100. By forming the plating layer 340 using a plating solution containing an additive that suppresses the formation of, the formation of the plating layer 340 at a location other than the bottomed hole 320 can be suppressed. Therefore, the process of removing an unnecessary plating layer can be omitted, and the effects of shortening the process and reducing the manufacturing cost can be obtained.

  Further, when the substrate 100 is slimmed from the second surface 102 side, the seed layer 325 covers the plating layer 340 when viewed from the second surface 102 side. For example, the slimming is performed by wet etching using HF. In this case, the plating layer 340 can be prevented from being exposed to HF and etched. Therefore, since the generation of voids due to the shape change of the through electrode can be suppressed, a highly reliable through electrode substrate can be obtained. Further, since the seed layer 325 functions as an etching stopper for the slimming, the controllability of the slimming process can be improved.

[Step of filling plating layer into bottomed hole in the present invention]
The step of filling the inside of the bottomed hole with the plating layer in the through electrode substrate according to Embodiment 1 of the present invention will be described in detail with reference to FIGS. Here, a method of filling the plated layer 340 into the bottomed hole 320 formed in the substrate 100 will be described. The steps shown in FIGS. 25 to 27 describe the steps of FIGS. 8 to 9 in more detail.

  As described with reference to FIG. 9, the plating layer 340 is formed by an electrolytic plating method in which the seed layer 325 is energized. In the electroplating method, it is known that the growth rate of the plating layer becomes higher as the current density is higher. When a seed layer is formed on a bottomed hole or through hole as shown in FIG. 25 and the seed layer is energized, the current density near the stepped portion 326 (shoulder portion 326) of the bottomed hole or through hole increases. It has been found by the applicant's earnest examination that the plating layer 340 is formed thick in the vicinity of the shoulder portion 326.

  When the plating layer 340 is further grown from the state shown in FIG. 25, the angle 131 formed between the side wall 321 of the bottomed hole 320 and the first surface 101 of the substrate 100 is 91 ° or more and 100 ° or less. The plating layer 341 grown from the side wall 321 and the plating layer 342 grown from the bottom portion 322 are synthesized in the vicinity of the bottom of the substrate. As a result, as shown in FIG. 26, the plating layer 340 grows sequentially from the bottom 322 of the bottomed hole 320 toward the first surface 101 side of the substrate 100.

  Finally, as shown in FIG. 27, the plating layer 340 is formed so as to fill the bottomed hole 320. That is, the plating layer 340 is formed without generating voids in the bottomed hole 320. That is, in the vicinity of the bottomed hole or through hole shoulder portion 326 where the plating layer is formed thick, the angle of the bottomed hole or through hole side wall with respect to the first surface 101 of the substrate 100 is 91 ° or more and 100 ° or less. By doing so, it is possible to obtain a through electrode substrate having no voids and high reliability.

[Step of filling plating layer into bottomed hole in comparative example]
With reference to FIGS. 28 and 29, the step of filling the inside of the bottomed hole with the plating layer in the through electrode substrate of the comparative example will be described in detail. Here, a case where the side wall 521 of the bottomed hole 520 formed in the substrate 500 is perpendicular to the first surface 501 of the substrate 500 will be described.

  As described above, when the seed layer 525 is formed with respect to the bottomed hole 520, the current density in the vicinity of the shoulder portion 526 increases when the seed layer 525 is energized and subjected to the treatment by the electrolytic plating method, as shown in FIG. Thus, the plating layer 540 is formed thick in the vicinity of the shoulder portion 526.

  When the plating layer 540 is further grown from the state shown in FIG. 28, the growth rate of the plating layer 546 near the shoulder portion 526 is faster than the growth rate of the plating layer 541 near the side wall 521. The plated layer 546 in the vicinity of the shoulder portion 526 closes the bottomed hole 520 before the inside is filled with the plated layer 541. As a result, as shown in FIG. 29, a void 550 is formed inside the bottomed hole 520.

[Modification 1 of Embodiment 1]
FIG. 30 is a cross-sectional view showing a process of filling the inside of the bottomed hole with a plating layer in the through electrode substrate according to Modification 1 of Embodiment 1 of the present invention. The bottomed hole 420 shown in FIG. 30 is similar to the bottomed hole 320 shown in FIG. 27, but the bottomed hole 420 is a first side wall 421 and a second side wall on the second surface 102 side of the first side wall 421. 422, the angle 423 formed by the first side wall 421 and the first surface 101 is 91 ° to 100 °, and the angle 424 formed by the second side wall 422 and the first surface 101 is greater than 89 ° and 91 It differs from the bottomed hole 320 in that it is less than °. Here, the angle 423 is preferably 91 ° to 95 °. The angle 423 is more preferably 91.5 ° or more and 93.5 ° or less. The angle 424 is preferably a right angle.

[Modification 2 of Embodiment 1]
FIG. 31 is a cross-sectional view showing a step of filling the inside of the bottomed hole with a plating layer in the through electrode substrate according to Modification 2 of Embodiment 1 of the present invention. A bottomed hole 425 shown in FIG. 31 is similar to the bottomed hole 320 shown in FIG. 27, but the bottomed hole 425 includes a first side wall 426 and a second side wall on the second surface 102 side of the first side wall 426. 427, an angle 428 formed by the first side wall 426 and the first surface 101 is 91 ° to 100 °, and an angle 429 formed by the second side wall 427 and the first surface 101 is larger than the angle 428. In this respect, it is different from the bottomed hole 320. Here, the angle 428 is preferably 91 ° to 95 °. The angle 428 is more preferably 91.5 ° or more and 93.5 ° or less.

  The bottomed holes filled with the plating layer as shown in FIGS. 30 and 31 respectively become through electrode substrates by the method described with reference to FIGS. Here, when slimming the substrate 100 from the second surface 102 side, by stopping the slimming in the middle of the second side wall 422 or the second side wall 427, the first side wall and the first side wall having different angles with the first surface 101 are reduced. A through electrode substrate having a through hole provided with two side walls can be obtained.

  As described above, according to the through electrode substrate according to the modification of the first embodiment, at least in the vicinity of the bottomed hole or the through hole shoulder portion 430 where the plating layer is formed thick, the first bottomed hole or through hole is formed. By setting the side walls 421 and 426 to an angle of 91 ° or more and 100 ° or less with respect to the first surface 101 of the substrate 100, a through electrode substrate having no voids and high reliability can be obtained. Further, the angle formed between the second side walls 422 and 427 and the first surface 101 may be larger or smaller than the angle formed between the first side walls 421 and 426 and the first surface 101. Therefore, the degree of freedom in designing the through hole is improved. When it is desired to reduce the resistance in the depth direction of the second conductive layer inside the through hole, the angle 424 may be set larger than 89 ° and smaller than 91 ° as shown in FIG. Further, in order to further enhance the void generation suppressing effect inside the through hole or the bottomed hole, the angle 429 may be made larger than the angle 428 as shown in FIG.

[Method of forming seed layer]
Here, a method for forming the seed layer 325 illustrated in FIG. 7 will be described in detail. In the process of forming the seed layer 325, it is necessary to form a conductive layer inside a through hole having a high aspect ratio with an aspect ratio exceeding 2, so a film forming method with good film coverage is required. is there. As a method with good film throwing power, for example, a method in which film growth occurs isotropically with respect to the growth surface, such as an electroless plating method, or a film formation source and a substrate having high anisotropy, such as a vapor deposition method There can be mentioned a method capable of forming a film with good relevance depending on the positional relationship. Here, as an example, a film forming method by oblique deposition will be described in detail. Note that oblique vapor deposition is vapor deposition that is set such that a vapor deposition material flying from a vapor deposition source reaches the surface of the substrate from a direction inclined with respect to a normal to the surface of the substrate to be formed.

  FIG. 32 is a schematic view of a film forming apparatus using oblique vapor deposition used in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. The film forming apparatus shown in FIG. 32 includes a vacuum chamber 1150 that achieves a high vacuum for vapor deposition, a turbo molecular pump (TMP) 1220, and a gate valve 1222. The vacuum chamber 1150 fixes the holder 1141 and the holder 1141 for fixing the substrate in a state where the angle 1132 formed by the two lines in a plane including the line parallel to the flight direction of the vapor deposition material and the perpendicular 1130 of the substrate is inclined at a constant angle. A rotating support column 1140 that rotates the holder 1141 while maintaining a certain angle 1132, a crucible 1210 that holds the evaporation source 1212, and an electron gun 1200 that generates an electron beam 1201 that evaporates the evaporation source 1212.

During vapor deposition, it is desirable to use TMP in a high vacuum state of, for example, 10 ⁻³ to 10 ⁻⁶ Pa in order to increase the straightness of the evaporated vapor deposition material 1214. When vapor deposition is performed in such a high vacuum state, the probability of collision of vaporized vapor deposition material 1214 with gas molecules in the chamber decreases, so that the change in the traveling direction due to scattering is reduced. As a result, since the vapor deposition material 1214 reaches the substrate with very high straightness, sufficient coverage can be obtained even for a through hole having a high aspect ratio, for example, an aspect ratio exceeding 2. . Further, by performing vapor deposition while rotating the rotation support column 1140 with the holder 1141 tilted, it is possible to form a film uniformly in the circumferential direction of the through hole.

  FIG. 33 is a schematic diagram showing a cross-sectional view of a through electrode substrate on which a conductive layer is formed by oblique deposition in the method for manufacturing a through electrode substrate according to Embodiment 1 of the present invention. The vapor deposition material 1214 evaporated by the electron beam 1201 is incident on the substrate at a certain angle 1132 with respect to the normal 1130 of the substrate. The angle 1132 may be determined according to the aspect ratio of the through hole in which the vapor deposition film is to be formed. For example, the angle 1132 may be an angle that reaches at least the outer peripheral end 329 of the bottom 322 of the bottomed hole 320.

  As described above, by forming the seed layer on the bottomed hole having a high aspect ratio by the oblique vapor deposition method, it is possible to form a film well with the outer peripheral end of the bottom of the bottomed hole. Therefore, since a through electrode in which the generation of voids is suppressed can be obtained, a more reliable through electrode substrate can be obtained.

[Modification 3 of Embodiment 1]
A through electrode substrate manufacturing method according to Modification 3 of Embodiment 1 of the present invention will be described with reference to FIGS. 34 to 41, the same elements as those shown in FIG. Here, a manufacturing method when a glass substrate is used as the through electrode substrate will be described. In addition, the through electrode substrate manufacturing method according to Modification 3 of Embodiment 1 is the same as that of Embodiment 1 up to the step of forming the seed layer shown in FIG.

  FIG. 34 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. 34, unlike the method shown in FIG. 9, a plating layer 340 is formed on the entire surface of the seed layer 325 without forming a resist pattern. Here, the plating layer 340 is formed so as to fill at least the bottomed hole 320. Further, the plating layer 340 may be formed so that the surface of the plating layer 340 is flat.

  FIG. 35 is a cross-sectional view showing a step of etching the seed layer and the plating layer in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. In FIG. 35, etching or polishing is performed leaving the seed layer 325 and the plating layer 340 filled in the bottomed hole. When etching is performed, dry etching or wet etching can be used, and when polishing is performed, CMP can be used.

  FIG. 36 is a cross-sectional view showing a step of forming the first wiring in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. In FIG. 36, unlike FIGS. 15 to 20, before the through hole 120 and the through electrode 110 are formed, that is, the bottomed hole 320 and the seed layer 325 and the plating layer 340 filled in the bottomed hole are formed. In this state, the first wiring 150 is formed. A method similar to that shown in FIGS. 15 to 20 can be used for forming the first wiring 150.

  FIG. 37 is a cross-sectional view showing a step of forming a multilayer wiring structure on the first wiring in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. As shown in FIG. 37, the third wiring 190 including the seventh conductive layer 191 and the eighth conductive layer 192 is formed on the first wiring 150 via the third insulating layer 180, and the fourth wiring 190 is formed on the third wiring 190. A fourth wiring 210 including the ninth conductive layer 211 and the tenth conductive layer 212 is formed through the insulating layer 200. The third wiring 190 and the fourth wiring 210 can be formed by the same method as in FIGS. Here, although FIG. 37 shows a method of forming a three-layered multilayer wiring structure of the first wiring layer 150, the third wiring layer 190, and the fourth wiring layer 210, the present invention is not limited to this method. A multilayer wiring structure having more layers may be formed, or a multilayer wiring structure having fewer layers may be formed.

  FIG. 38 is a cross-sectional view showing a process of bonding the first support substrate to the substrate on which the multilayer wiring structure is formed in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. As shown in FIG. 38, the first support substrate 345 is bonded to the side of the substrate 100 where the multilayer wiring structure is formed (the first surface 101 side) using an adhesive sheet 220. Here, the adhesive sheet 220 may be the same as the adhesive sheet 350 in FIG. 12 or the adhesive sheet 410 in FIG.

  FIG. 39 is a cross-sectional view showing a process of forming a through hole by slimming a substrate on which a bottomed hole is formed from the back surface in a method for manufacturing a through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. . In FIG. 39, the substrate is thinned by slimming from the second surface 102 side of the substrate 100, and the through hole 120 is formed from the bottomed hole 320. The substrate 100 can be thinned using the same method as in FIGS.

  FIG. 40 is a cross-sectional view showing a process of forming the second wiring on the surface opposite to the surface on which the first wiring is formed in the method for manufacturing the through electrode substrate according to Modification 3 of Embodiment 1 of the present invention. is there. In FIG. 40, the second wiring 170 is formed on the second surface 102 side of the substrate 100. A method similar to that shown in FIGS. 15 to 20 can be used for forming the second wiring 170. After forming the second wiring 170, the adhesive sheet 220 and the first support substrate 345 are peeled from the substrate 100, whereby the through electrode substrate shown in FIG. 41 can be obtained. Here, as a method of peeling the first support substrate 345 from the substrate 100, the same method as that in FIGS. 21 and 24 can be used. Here, the step of forming one layer of the second wiring 170 on the second surface 102 side of the substrate 100 has been shown, but a multilayer wiring structure is formed on the second wiring 170 as with the first surface 101 side. May be.

  As described above, according to the method for manufacturing the through electrode substrate according to the third modification of the first embodiment, the process of bonding to and peeling from the support substrate is performed only once, so that the process can be shortened. In addition, by using the through electrode substrate having a multilayer wiring structure, various wiring routings can be realized.

<Embodiment 2>
In the second embodiment, a semiconductor device manufactured using the through electrode substrate in the first embodiment will be described.

  FIG. 42 is a diagram showing a semiconductor device according to Embodiment 2 of the present invention. In the semiconductor device 1000, three through electrode substrates 1310, 1320, and 1330 are stacked and connected to an LSI substrate 1400 on which a semiconductor element such as a DRAM is formed, for example. The through electrode substrate 1310 has connection terminals 1511 and 1512 formed by the first wiring 150, the second wiring 170, and the like. These through electrode substrates 1310, 1320, and 1330 may be through electrode substrates formed from substrates of different materials. The connection terminal 1512 is connected to the connection terminal 1500 of the LSI substrate 1400 by the bump 1610. The connection terminal 1511 is connected to the connection terminal 1522 of the through electrode substrate 1320 by the bump 1620. The connection terminals 1521 of the through electrode substrate 1320 and the connection terminals 1532 of the through electrode substrate 1330 are also connected by the bumps 1630. For the bumps 1610, 1620, and 1630, for example, a metal such as indium, copper, or gold is used.

  In addition, when laminating | stacking a through-electrode board | substrate, not only three layers but two layers may be sufficient, and also four or more layers may be sufficient. Further, the connection between the through-electrode substrate and another substrate is not limited to using bumps, and other bonding techniques such as eutectic bonding may be used. Alternatively, polyimide, epoxy resin, or the like may be applied and baked to bond the through electrode substrate and another substrate.

  FIG. 43 is a diagram showing another example of the semiconductor device according to Embodiment 2 of the present invention. A semiconductor device 1000 illustrated in FIG. 43 includes semiconductor devices (LSI chips) 1410 and 1420 such as a MEMS device, a CPU, and a memory, and a through electrode substrate 1300 that are stacked and connected to the LSI substrate 1400.

  A through electrode substrate 1300 is disposed between the semiconductor chip 1410 and the semiconductor chip 1420 and connected by bumps 1640 and 1650. A semiconductor chip 1410 is placed on the LSI substrate 1400, and the LSI substrate 1400 and the semiconductor chip 1420 are connected by a wire 1700. In this example, the through electrode substrate 1300 is used as an interposer for stacking a plurality of semiconductor chips and three-dimensionally mounting them, and manufacturing a multifunctional semiconductor device by stacking a plurality of semiconductor chips having different functions. can do. For example, by using the semiconductor chip 1410 as a three-axis acceleration sensor and the semiconductor chip 1420 as a two-axis magnetic sensor, a semiconductor device in which a five-axis motion sensor is realized by one module can be manufactured.

  When the semiconductor chip is a sensor formed by a MEMS device, the sensing result may be output as an analog signal. In this case, a low-pass filter, an amplifier, and the like may also be formed on the semiconductor chip or the through electrode substrate 1300.

  FIG. 44 is a diagram showing another example of the semiconductor device according to Embodiment 2 of the present invention. Although the above two examples (FIGS. 42 and 43) are three-dimensional mounting, this example is an example applied to the combined mounting of two dimensions and three dimensions (sometimes referred to as 2.5 dimensions). . In the example shown in FIG. 44, six penetration electrode substrates 1310, 1320, 1330, 1340, 1350, and 1360 are stacked and connected to the LSI substrate 1400. However, all the through electrode substrates are not only laminated and arranged, but are also arranged side by side in the in-plane direction of the substrate. These through electrode substrates may be through electrode substrates formed from substrates of different materials.

  In the example of FIG. 44, the through electrode substrates 1310 and 1350 are connected to the LSI substrate 1400, the through electrode substrates 1320 and 1340 are connected to the through electrode substrate 1310, and the through electrode substrate 1330 is connected to the through electrode substrate 1320. The through electrode substrate 1360 is connected to the through electrode substrate 1350. Note that even when the through-electrode substrate 1300 is used as an interposer for connecting a plurality of semiconductor chips as in the example shown in FIG. 43, the two-dimensional and three-dimensional combined mounting is possible. For example, the through electrode substrates 1330, 1340, 1360 and the like may be replaced with semiconductor chips.

  The semiconductor device 1000 manufactured as described above includes various devices such as portable terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigations, etc.), home appliances, and the like. Installed in electrical equipment.

  Hereinafter, the through electrode substrate according to Embodiment 1 of the present invention and the through electrode substrate of the comparative example are manufactured, and the result of evaluating the embedding property of the through electrode will be specifically described. Here, the example shown in Table 1 is an evaluation result of the embeddability of the through electrode in the through electrode substrate according to Embodiment 1, and the comparative example shows the embeddability of the through electrode in the through electrode substrate similar to Embodiment 1. It is an evaluation result. The difference between the example and the comparative example is an angle 131 (see FIG. 2) between the first surface 101 of the substrate 100 and the first side wall 121 of the through hole 120.

[Comparison of test results between Example and Comparative Example]
Table 1 compares the examples and comparative examples. In Examples and Comparative Examples, samples having a plurality of angles are evaluated, and different sample names are given depending on the range of the angle 131. The angle 131 is an angle formed between the first surface 101 of the substrate 100 and the first side wall 121 of the through hole 120 in FIG. In the evaluation of Table 1, the embedding property and the unevenness of the via surface were evaluated by observing the cross-sectional shape of the through electrode for a plurality of samples having different angles 131. Here, the embedding property is the presence / absence of voids in the through electrode, and the unevenness of the via surface is the penetration from the surface of the plating layer 340 in the flat portion where the through hole is not formed as shown in FIG. A concave depth 800 or a convex height 900 at the center of the electrode. The sample was prepared in a plurality of sizes with the depth of the through hole being fixed to about 100 μm and the width of the bottom of the through hole being in the range of 5 μm to 37.5 μm.

  As shown in Table 1, when the angle 131 is in the range of 91 ° or more and 100 ° or less, no void is generated, and the unevenness of the via surface is also within the range suitable for practical use. In particular, when the angle 131 is in the range of 91.5 ° to 93.5 °, the via surface unevenness is 1 μm or less, and a very good result was obtained. On the other hand, voids occurred in the comparative example (1) in which the angle 131 is less than 91 °. Further, in Comparative Example (2) in which the angle 131 is larger than 100 °, no void is generated, but the via surface has a concave and convex shape of 10 μm or more, which is not suitable for practical use.

  As described above, also from the evaluation results of Example 1, the through electrode substrate according to Embodiment 1 of the present invention can provide a good embedding property of the through electrode, and a highly reliable through electrode substrate can be obtained. There was found.

  Note that the present invention is not limited to the above-described embodiment, and can be modified as appropriate without departing from the spirit of the present invention.

10: Through electrode substrate 100, 500: Substrate 101, 501: First surface 102: Second surface 103: Alteration region 110: Through electrode 111: First conductive layer 112: Second conductive layer 120: Through holes 121, 421, 426: first side wall 123, 323: first hole diameter 124, 324: second hole diameter 131, 423, 424, 428, 429, 1132: angle 140: first insulating layer 141, 161: opening 150: first wiring 151 : 3rd conductive layer 152: 4th conductive layer 160: 2nd insulating layer 170: 2nd wiring 171: 5th conductive layer 172: 6th conductive layer 300: Light source 301: Laser beam 310: Container 311: Chemical solution 320, 420 425, 520: bottomed holes 321, 521: side wall 322: bottom 325, 370, 525: seed layer 326, 430, 526: shoulder 329: outer peripheral end 330, 80: resist pattern 340, 341, 342, 390, 540, 541, 546: plating layer 345: first support substrate 350, 410: adhesive sheet 351, 411: surface 360, 412: outer peripheral portion 400: second support substrate 422 427: second side wall 550: void 1000: semiconductor device 1130: perpendicular 1140: rotating support column 1141: holder 1150: vacuum chamber 1200: electron gun 1201: electron beam 1210: crucible 1212: evaporation source 1214: evaporation material 1222: gate Valve 1300: Through electrode substrate 1310, 1320, 1330, 1340, 1350, 1360: Through electrode substrate 1400: LSI substrate 1410, 1420: Semiconductor chip 1500, 1511, 1512, 1521, 1522, 1532: Connection terminals 1610, 1620, 630,1640,1650: bump 1700: wire

Claims (11)

An insulating substrate having a first surface and a second surface opposite to the first surface, and provided with a through-hole penetrating the first surface and the second surface;
A through electrode disposed inside the through hole and connecting the first surface and the second surface;
An angle formed by the first surface and the first side wall of the through hole is 91 ° or more and 100 ° or less,
The through electrode substrate, wherein a diameter of the through hole in the second surface is ½ or less of a thickness of the insulating substrate. The through hole further has a second side wall on the second surface side of the first side wall,
2. The through electrode substrate according to claim 1, wherein an angle formed by the first surface and the second side wall is greater than 89 ° and less than 91 °. The through hole further has a second side wall on the second surface side of the first side wall,
2. The through electrode substrate according to claim 1, wherein an angle formed between the first surface and the second side wall is larger than an angle formed between the first surface and the first side wall. The through electrode includes a first conductive layer and a second conductive layer,
The first conductive layer is disposed between the insulating substrate and the second conductive layer,
4. The through electrode substrate according to claim 1, wherein the second conductive layer is disposed so as to fill the through hole. 5.   The through electrode substrate according to claim 4, wherein the first conductive layer is a material that suppresses diffusion of the second conductive layer. Forming a bottomed hole having a tapered shape that forms an angle of 91 ° to 100 ° with respect to the first surface from the first surface side of the insulating substrate;
Forming a first conductive layer on the first surface of the insulating substrate and the bottomed hole;
Forming a second conductive layer on the first conductive layer so as to fill the bottomed hole;
Etching the insulating substrate from the second surface side opposite to the first surface of the insulating substrate until the first conductive layer formed at the bottom of the bottomed hole is exposed. A method for manufacturing an electrode substrate. The first conductive layer is formed by a vapor deposition method,
The through electrode substrate according to claim 6, wherein the vapor deposition method is an oblique vapor deposition method in which vapor deposition is performed on a substrate from a direction inclined with respect to a normal line of the first surface of the insulating substrate. Method. The second conductive layer is formed by a plating method,
The plating method uses a plating solution containing an additive that suppresses formation of the second conductive layer on the first conductive layer on the first surface side. A manufacturing method of the penetration electrode substrate given in 2. Before forming the second conductive layer, forming a mask having an opening exposing the bottomed hole,
9. The through hole according to claim 6, wherein after forming the second conductive layer, the mask is removed, and the first conductive layer exposed from the second conductive layer is etched. 10. A method for manufacturing an electrode substrate. When etching from the second surface side of the insulating substrate,
The method of manufacturing a through electrode substrate according to claim 6, wherein the exposed first conductive layer covers the second conductive layer as viewed from the second surface side. . When etching from the second surface side of the insulating substrate,
The method for manufacturing a through electrode substrate according to any one of claims 6 to 10, wherein the first conductive layer serves as an etching stopper.

Images